A multi-ac power electronic device failure performance test circuit and method

Abstract

The present application belongs to the technical field of power electronic converter testing, and particularly relates to a multi-AC port power electronic device failure performance test circuit and method. The circuit comprises a temperature sensor, a temperature recorder, a power analyzer, a plurality of control switches and a plurality of connecting cables; a temperature sensor is arranged on each of the master port and the slave port, and the output end of the temperature sensor is connected with the temperature recorder; a first voltage and current probe is arranged on the input end of the slave port, and a second voltage and current probe is arranged on the output end of the master port; the output ends of the first voltage and current probe and the second voltage and current probe are connected with the power analyzer; the output end of each master port is connected with one end of a first switch, and the other end of the first switch is connected with the input end of the slave port through a connecting cable. The present application can realize the testing of each port in the device, does not need to set a high-power load or a feedback load, saves cost, and avoids energy waste.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of failure performance test of multi-port power electronic converter, and particularly relates to a multi-AC-port power electronic device failure performance test circuit and method. BACKGROUND

[0002] With the intersection and interconnection of various loads and various energies, the application of multi-port power electronic devices gradually increases, such as a three-port traction frequency converter, a three-port power electronic transformer with a photovoltaic inverter, a four-port electric energy router with a photovoltaic inverter and a wind power converter, and a multi-energy complementary regulation device of a microgrid.

[0003] In the failure performance examination and test process of these multi-AC-port power electronic devices, two important test items are long-time efficiency test (including maximum efficiency, rated efficiency, etc.) and temperature rise test of the converter. Usually, in the test, an AC power source, a transformer and an AC load meeting the power level of the device are used, the efficiency of two ports of the device is obtained by controlling different power levels of the AC load, and the efficiency curves of all ports are obtained after repeated tests; in the temperature rise test, the AC load is switched to the rated power level, and the temperature rise test of the device is performed. This method requires high test device cost, and the electric energy generated in the test process can only be converted into heat energy by the AC load and dissipated; in some test systems, a feedback AC power source is used to recover electric energy, but the actual test is only a small part of the test due to the limitation of the maximum power and cost of the feedback power source. SUMMARY

[0004] The present application overcomes the deficiencies of the prior art and solves the technical problem of providing a multi-AC-port power electronic device failure performance test circuit and method.

[0005] To solve the above technical problems, the technical scheme adopted by the present application is as follows: a multi-AC-port power electronic device failure performance test circuit, the to-be-tested power electronic device includes one slave port and at least one master port, the input end of the slave port is connected with a power grid, and the output end is connected with the input end of the master port through an AC bus; the test circuit includes a temperature sensor, a temperature recorder, a power analyzer, a plurality of control switches and a plurality of connection cables;

[0006] The temperature sensor is arranged on each of the master port and the slave port, the test range of the temperature sensor is selected according to the working range temperature of the device, and the output end of the temperature sensor is connected with the temperature recorder; the input end of the slave port is provided with a first voltage and current probe, and the output end of the master port is provided with a second voltage and current probe; the output ends of the first voltage and current probe and the second voltage and current probe are connected with the power analyzer;

[0007] The output end of each main port is connected to one end of a first switch, and the other end of the first switch is connected to the input end of the slave port through a connecting cable.

[0008] The third switch and a power frequency transformer T1 are connected in series and then connected in parallel between the two ends of the first switch, and the transformation ratio of the power frequency transformer T1 is equal to the voltage ratio of the main port and the AC power grid.

[0009] The main port has two, and the output end of each main port is connected to one end of a first switch; the other end of the first switch is connected to one end of a second switch through a connecting cable, and the other end of the second switch is connected to the input end of the slave port.

[0010] The third switch and a power frequency transformer T2 are connected in series and then connected in parallel between the two ends of the first switch, and the transformation ratio of the power frequency transformer T2 is equal to the voltage ratio of the two main ports.

[0011] The main port has three, and the output end of each main port is connected to one end of a first switch; the other end of the first switch is connected to one end of a second switch through a connecting cable, and the other end of the second switch is connected to the input end of the slave port.

[0012] The third switch and a power frequency transformer T1 are connected in series and then connected in parallel between the two ends of the first switch, and the transformation ratio of the power frequency transformer T1 is equal to the voltage ratio of the main port and the slave port.

[0013] In addition, the application also provides a kind of multi-ac power electronic device failure performance test circuit, using the test device of described, including the following steps:

[0014] (1) When testing the efficiency of the slave port and one of the main ports, the second switch corresponding to the port is closed, the input end of the slave port is connected to the power grid, and the output end is connected to the input end of the slave port through the main port and the first switch to form a circulating current circuit; then the slave port controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, and the control strategy of the corresponding main port is controlled to close-loop control the current in the port-connected reactance; different current commands are set, and the efficiency curve under different power levels is obtained by multiple point testing; and the temperature rise curve is measured at the same time.

[0015] (2) When testing two main ports, the first switches corresponding to the two main ports to be tested are closed, the input end of the slave port is connected to the power grid, and the output end is connected to the output end of the slave port through one of the main ports, the corresponding two first switches, and the other main port in turn to form a circulating current circuit; then the slave port controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, and the control strategy of one of the main ports is controlled to close-loop control the current in the port-connected reactance, and the control strategy of the other port remains unchanged; different current commands are set, and the efficiency curve under different power levels is obtained by multiple point testing; and the temperature rise curve is measured at the same time.

[0016] In step (1), the voltage level of the slave port and the main port is the same, and the efficiency calculation formula is:

[0017]

[0018] Where, P U3 represents the output power of the main port; P 电网 represents the input power of the power grid.

[0019] In step (2), the voltage levels of the two main ports to be tested are the same, and the efficiency calculation formula is:

[0020]

[0021] Where, P U2 represents the output power of the main port whose control strategy is changed during testing; P 电网 represents the input power of the power grid.

[0022] In addition, the present application also provides another kind of multi-ac power electronic device failure performance test method of AC port, adopts the test device to realize, including the following steps:

[0023] (1) when testing the efficiency of the slave port and one of the main ports, the third switch and the second switch corresponding to the port are closed, the input end of the slave port is connected to the power grid, the output end is connected in turn through the main port, the second switch, the power frequency transformer T1 and the third switch, and then the input end of the slave port is connected to form a circulating current circuit; then the slave port controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, and the control strategy of the corresponding main port is to control the current in the port connection reactance in a closed loop; different current commands are set, and the efficiency curve under different power levels is obtained through multiple point testing; the temperature rise curve is measured at the same time;

[0024] (2) when testing two main ports, the third switch is opened, the first switch corresponding to one of the tested main ports and the second switch corresponding to the other main port are closed, the input end of the slave port is connected to the power grid, the output end is connected in turn through one of the main ports, the corresponding first switch, the power frequency transformer and the second switch, and then returns to the output end of the slave port, forming a circulating current circuit; then the slave port controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, and the control strategy of one of the main ports is to control the current in the port connection reactance in a closed loop, and the control strategy of the other port remains unchanged; different current commands are set, and the efficiency curve under different power levels is obtained through multiple point testing; the temperature rise curve is measured at the same time.

[0025] In step (1), the voltage levels of the slave port and the main port are different, and the efficiency calculation formula is:

[0026]

[0027] Wherein, P U3 represents the output power of the main port; P 电网 represents the input power of the power grid.

[0028] In step (2), the voltage levels of the two main ports to be tested are different, and the efficiency calculation formula is:

[0029]

[0030] Wherein, P U2 represents the output power of the main port whose control strategy is changed during testing; P 电网 represents the input power of the power grid.

[0031] Compared with the prior art, the present application has the following beneficial effects:

[0032] The application provides a multi-AC port power electronic device failure performance test circuit and method, each port in the device is connected through a test connection cable, and a switch for test switching is arranged on the connection cable, by switching each switch, the test of each port in the device can be realized, without setting a large power load or a feedback load, compared with the scheme of using a large power load or a feedback load, the cost of the experimental device is greatly saved, energy waste is avoided, and the low-carbon and energy-saving requirement is met. The application can meet the examination of efficiency and temperature rise test indexes in the test scheme. In the power electronic device failure performance test of a large power level and a large number of ports, the application can reflect great time cost and economic cost advantages. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 A schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the first embodiment of the application;

[0034] Figure 2 Another schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the first embodiment of the application;

[0035] Figure 3 A schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the second embodiment of the application;

[0036] Figure 4 Another schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the second embodiment of the application;

[0037] Figure 5 A schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the third embodiment of the application;

[0038] Figure 6 Another schematic diagram of a multi-AC port power electronic device failure performance test circuit provided for the third embodiment of the application;

[0039] Figure 7 A main port control mode state switching schematic diagram in the third embodiment of the application. DETAILED DESCRIPTION

[0040] To make the purpose, technical scheme and advantages of the embodiments of the application more clear, the technical scheme in the embodiments of the application will be clearly and completely described below, obviously, the described embodiments are part of the embodiments of the application, rather than all the embodiments; based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the application.

[0041] Embodiment one

[0042] As Figure 1 shown, a schematic diagram of a multi-AC port power electronic device failure performance test circuit provided by Embodiment one of the present application is shown. In this embodiment, the power electronic device to be tested is a two-port device, including a slave port U1 and a master port U2. The input end of the slave port is connected to an AC power grid, and the output end is connected to the input end of the master port through a bus. The test circuit includes temperature sensors, a temperature recorder, a power analyzer, a plurality of control switches, and a plurality of connection cables. Temperature sensors are provided on the master port and the slave port. The output end of the temperature sensors is connected to the temperature recorder. A first voltage and current probe is provided at the input end of the slave port, and a second voltage and current probe is provided at the output end of the master port. The output ends of the first voltage and current probe and the second voltage and current probe are connected to the power analyzer.

[0043] The AC power grid provides the required AC power for the test, and the voltage level is determined according to the required voltage level of the device. The circuit connection relationship is as follows: the two-port device is composed of the slave port U1, the master port U2, and the connection part. The slave port U1 and the master port U2 are composed of power electronic devices and internal passive devices such as capacitors and inductors. The connection between the slave port U1 and the master port U2 can be a DC bus or other forms of connection. During normal operation, the slave port U1 is connected to the power grid, and the master port U2 is connected to a three-phase AC load. The output cable of the master port U2 passes through switch S1 and then connects back to the input end of the slave port U1 through cable L1, forming a circulating current circuit required for testing.

[0044] In this embodiment, the voltage levels of the slave port U1 and the master port U2 can be consistent or inconsistent, depending on the use of the device. When the voltage levels are inconsistent, as Figure 2 shown, a switch S2 and a power frequency transformer T1 are provided in the circuit, which are connected in parallel with switch S1. During testing, the load is removed, and a power frequency transformer T1 with an appropriate transformation ratio is configured according to the voltage levels of the master and slave ports. If the voltage levels are the same, the power frequency transformer T1 does not need to be set.

[0045] The test circuit is as follows: by installing current and voltage probes at the output port of the master port U2 and the output port of the AC power grid, and connecting them to the power analyzer, the efficiency curve under different power levels can be tested and obtained. Through the two temperature sensors, the real-time temperature curve and temperature rise test results of different parts of the device can be obtained.

[0046] The test method is: when the main port U2 voltage is equal to the grid voltage, first control the switch S1 to be closed, then the voltage of the main port U2 is equal to the voltage of the slave port U1. When the main port U2 voltage is not equal to the grid voltage, then close the switch S2 (note that the switch S1 and the switch S2 are interlocked and cannot be closed at the same time), adjust the voltages by using the power frequency converter T1, so as to ensure that the voltage of the AC grid voltage after being transformed by the power frequency converter T1 to the U2 port is the designed output voltage level (in this way, it can be avoided that the grid voltage after being sent to the U2 port through the T1 strikes the internal components of the U2). The control strategy of the device under test is: the slave port U1 controls the internal bus voltage or outputs a fixed phase high-frequency square wave signal according to the original control strategy, and the control strategy of the main port U2 is changed from the original closed-loop control output voltage to the closed-loop control of the current in the port connected reactance, as shown in Figure 7 The switching switch is arranged between the AVR and the ACR in the main port, when the switching switch is switched from the inverter state to the test state, the current test required loading signal i id and i iq is input to the ACR module through the switching switch, and the grid phase signal of the dq-αβ coordinate transformation module is phase-locked by the grid voltage after abc-αβ coordinate transformation. Since the voltage of the main port U2 has been applied through the slave port U1, the control current actually controls the output power, and by setting different current command values for the main port, different powers can be obtained. The output power reenters the device through the cable L1, and is continuously circulated in the device, so that when the device is stably operated, the AC grid only provides the loss power of the device, which greatly reduces the consumption of electric energy in the test load, and the test power level can be set arbitrarily. By setting different current values for the main port U2 and taking multiple points for testing, the fitting degree of the efficiency curve can be better. The efficiency calculation formula is:

[0047]

[0048] Wherein, P U2 represents the power value measured at the output end of the main port U2, and P 电网 represents the power value measured at the input end of the slave port U1.

[0049] In this embodiment, it is set to connect the power grid from port U1, the main port U2 connects the three-phase alternating current load, and the DC bus connection can be used between the slave port U1 and the main port U2, or other forms of bus connection can be used; Two groups of cables are added at the output port of the main port U2, which are connected in series with switches S1 and S2 respectively, wherein according to the voltage ratio of the alternating current grid voltage and the output voltage of the main port U2, a power frequency transformer T1 with the same voltage ratio is added to ensure that the voltage of the alternating current grid voltage after being transformed by T1 to the U2 port is the designed output voltage level (in this way, the power grid voltage can be avoided after being sent to the U2 port through T1, and the power electronic devices in the U2 internal are broken down), if the voltage of U1 and U2 ports is consistent, the transformer T1 can not be connected. One end of switch S1 is connected to the U2 output port, and the other end is connected to the U1 input port, one end of S2 is connected to the output port of U2, and the other end is connected to the primary side of T1, and the secondary side of T1 is also connected to the input port of U1. Switches S1 and S2 are in interlocking relationship, and the cable size where the switches are located should be able to meet the maximum power of all ports of the device for long time operation. Through the installation of current and voltage probes at the U2 output port and the alternating current grid output port, and connecting to the power analyzer, the efficiency curve under different power levels can be tested; through the 2-way temperature sensor, the real-time temperature curve and the temperature rise test result of different parts of the device can be obtained.

[0050] Embodiment two

[0051] As Figure 3 shown, it is a schematic diagram of a multi-alternating current port power electronic device failure performance test circuit provided by embodiment two of the application, in this embodiment, the power electronic device to be tested is a three-port device, wherein U1 is a slave port, and U2 and U3 are main ports. The difference between the slave port U1, the main port U2 and U3 inside and the two-port device is that power can be transmitted in any two ports, so the efficiency test is carried out in two two-port devices. The circuit connection relationship is: on the basis of the test circuit of the two-port device in embodiment one, the output cable of the main port U3 passes through the switch S3 (or the switch S4 and the power frequency transformer T1), and then passes through the cable L1 and the switch S5 to return to the input end of the slave port U1, forming a circulating current circuit required for testing.

[0052] The test circuit is: by installing current and voltage probes at the output port of the main port U2, the output port of the main port U3 and the output port of the alternating current grid, and connecting to the power analyzer, the efficiency curve under different power levels can be tested; through the 3-way temperature sensor, the real-time temperature curve and the temperature rise test result of different parts of the device can be obtained.

[0053] The test method is: ① When testing the efficiency of the slave port U1 and the master port U2, the switch S5 is closed, the switch S3 and the switch S4 are disconnected, the switch S1 is controlled to be closed, and the two-port efficiency curve test method in the first embodiment is used, and the control strategy is unchanged. The efficiency calculation formula is:

[0054]

[0055] Wherein, P U2 represents the power value measured at the output end of the master port U2, P 电网 represents the power value measured at the input end of the slave port U1.

[0056] In addition, the same as the first embodiment is that when the voltage level of the master port U2 is inconsistent with the AC power grid, the switch S2 is controlled to be closed, the switch S1 is disconnected, the power frequency transformer T1 is used to realize the matching of the voltage, and the test is carried out in the same way.

[0057] ② When testing the efficiency of the slave port U1 and the master port U3, the switch S5 is closed, the switch S1 and the switch S2 are disconnected, the switch S3 or the switch S4 is controlled to be closed, and the same two-port efficiency curve test method as the first embodiment is used, and the control strategy is unchanged. The efficiency calculation formula is:

[0058]

[0059] Wherein, P U3 represents the power value measured at the output end of the master port U3, P 电网 represents the power value measured at the input end of the slave port U1.

[0060] ③When testing the efficiency of the two ports of the main port U2 and the main port U3, the switch S5 is disconnected, the switch S2 and the switch S4 are disconnected, the control closes the switch S1 and the switch S3, and the port voltage of the main port U2 and the main port U3 is equal. The control strategy is that the slave port U1 controls the internal bus voltage according to the original control strategy or outputs a fixed-phase high-frequency square wave signal, the control strategy of the main port U2 is changed from the original closed-loop control output voltage to the closed-loop control of the current in the port connection reactance, the switching method is the same as that of the first embodiment, the control strategy of the main port U3 remains unchanged, and the voltage of the main port U2 is controlled by the main port U3. Since the main port U2 and the main port U3 are connected together, the control current actually controls the output power, and different power can be obtained by setting different current command values. The actual power comes out from the AC power grid, enters the main port U2 through the slave port U1, then enters the main port U3 through the switch S1 and the switch S3, and returns to the main port U2 through the internal bus, and the power forms a circulating current between the main port U2 and the main port U3. The AC power grid and U1 only provide the loss power of the device during stable operation, which greatly reduces the consumption of electric energy in the test load, and the set test power gear can be arbitrarily set. Through multiple point testing, the fitting degree of the efficiency curve is better. The efficiency calculation formula is:

[0061]

[0062] wherein, P U2 represents the power value measured at the output end of the main port U2, P 电网 represents the power value measured at the input end of the slave port U1.

[0063] In addition, when the voltages of the main port and the slave port are inconsistent, such as Figure 4As shown, a different variable ratio power frequency transformer T2 is needed to be added again, the other end of switch S4 is connected to the primary side of T2, the secondary side of T2 is also connected to the input port of U1, power frequency transformer T1 and power frequency transformer T2 are in parallel relationship, the variable ratio of power frequency transformer T2 is equal to the voltage ratio of main port U2 and main port U3, the output voltage of main port U3 is guaranteed to be the design output voltage level of main port U2 after being transformed by power frequency transformer T2, so that the internal power electronic devices of U2 can be avoided from being broken. At this time, when the efficiency of main port U2 and main port U3 is tested, switch S5 is controlled to be opened, switches S1 and S4 are closed, switches S2 and S3 are opened, so that the AC power grid forms a required circulating current circuit through from port U1, main port U2, switch S1, power frequency transformer T2, switch S4, main port U3 and back to the bus end; or switch S5 is controlled to be opened, switches S1 and S4 are opened, switches S2 and S3 are closed, so that the AC power grid forms a required circulating current circuit through from port U1, main port U2, switch S2, power frequency transformer T2, switch S3, main port U3 and back to the bus end; the test method is the same as above.

[0064] The embodiment is for a three-port power electronic device, main port U3 is connected in parallel with slave port U1 and main port U2 through an internal bus, on the basis of the test circuit of the two-port device, the output end of main port U3 is similar to main port U2, and two groups of cables and switches S3 and S4 are also added, here, according to most operating conditions, it is considered that the output voltage set values of main port U3 and main port U2 are the same, one end of S3 is connected to the output port of main port U3, and the other end is connected to the input port of slave port U1, one end of S4 is connected to the output port of U3, and the other end is connected to the primary side of T1; if the output voltage set values of main port U2 and main port U3 are different, a different variable ratio power frequency transformer T2 needs to be added again, the other end of S4 is connected to the primary side of T2, and the secondary side of T2 is also connected to the input port of U1, T1 and T2 are in parallel relationship. Switch S5 is added to the L1 cable close to the input end of U1, which is used for efficiency test of U2 and U3 ports. Switches S3 and S4 are interlocked, the cable size of the switch can meet the maximum power long-time operation of all ports of the device, switches S1 (or S2) and S3 (or S4) can be closed at the same time according to the test condition, and are not interlocked. By installing current and voltage probes at the output ports of U2 and U3 and the AC grid output port, and connecting to a power analyzer, efficiency curves under different power levels can be obtained; through three-way temperature sensors, real-time temperature curves and temperature rise test results of different parts of the device can be obtained.

[0065] Embodiment three

[0066] As Figure 5As shown, the third embodiment of the present application provides a multi-AC port power electronic device failure performance test circuit. In this embodiment, the to-be-tested power electronic device is a four-port device, wherein U1 is a slave port, U2, U3 and U4 are master ports. The slave port U1, the master ports U2, U3 and U4 are internally composed of a circuit of power electronic devices and internal capacitors, inductors and other passive devices. Similar to the three-port device, power can be transmitted in the four ports, or in any two or three ports, so the efficiency test needs to be carried out on two ports. The circuit connection relationship is as follows: on the basis of the test circuit of the three-port device, the cable at the output end of the master port U4 is connected back to the input end of the slave port U1 through the cable L2 and the switch S7, and the switch S5 and the switch S7 are connected in parallel through the cable L3, forming a circulating current circuit required for testing. In this embodiment, the port voltage of the slave port U1 is the same as that of the master port U4, and the port voltage of the master port U2 is the same as that of the master port U3.

[0067] The test circuit is as follows: by installing current and voltage probes at the U2 output port, the U3 output port, the U4 output port and the AC grid output port, and connecting them to a power analyzer, the efficiency curve under different power levels can be tested and obtained; by using a 4-way temperature sensor, the real-time temperature curve and the temperature rise test result of different parts of the device can be obtained.

[0068] The test method is as follows: ① When testing the efficiency of the slave port U1 and the master port U2, the switch S5 is closed, the switches S3 and S4 are opened, the switches S6 and S7 are opened, and the switch S1 or the switch S2 is controlled to be closed (when the voltage of the slave port U2 is inconsistent with the voltage of the AC grid), and the two-port efficiency curve test method is used, and the control strategy remains unchanged. The efficiency calculation formula is as follows:

[0069]

[0070] P U2 represents the power value measured at the output end of the master port U2, P 电网 represents the power value measured at the input end of the slave port U1.

[0071] ② When testing the efficiency of the slave port U1 and the master port U3, the switch S5 is closed, the switches S1 and S2 are opened, the switches S6 and S7 are opened, and the switch S3 or the switch S4 is controlled to be closed ((when the voltage of the slave port U3 is inconsistent with the voltage of the AC grid), and the two-port efficiency curve test method is used, and the control strategy remains unchanged. The efficiency calculation formula is as follows:

[0072]

[0073] P U3Pout represents the power value measured at the output end of the main port U3 电网 Pout represents the power value measured at the output end of the main port U2

[0074] ③ When testing the efficiency of the two ports of the main port U2 and the main port U3, S5 is opened, S2 and S4 are opened, S6 and S7 are opened, and S1 and S3 are controlled to be closed, so that the port voltages of the main port U2 and the main port U3 are equal. The control strategy is the same as that of the three-port device, that is, the from port U1 controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, the control strategy of the main port U2 is changed from the original closed-loop control of the output voltage to the closed-loop control of the current in the port connecting reactance, and the control strategy of the main port U3 remains unchanged. The efficiency calculation formula is:

[0075]

[0076] Pout represents the power value measured at the output end of the main port U3 U2 Pout represents the power value measured at the output end of the main port U2 电网 Pout represents the power value measured at the output end of the main port U4

[0077] ④ When testing the efficiency of the two ports of the from port U1 and the main port U4, S5 is opened, S2 and S4 are opened, S1 and S3 are opened, and S6 and S7 are controlled to be closed, so that the port voltages of the from port U1 and the main port U4 are equal. The control strategy is: the U1 unit controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy, and the control strategy of the U4 unit is changed to closed-loop control of the current in the port connecting reactance, and the port voltage is controlled by the U1 unit. Since the from port U1 and the main port U4 are connected together, the control current actually controls the output power, and different power can be obtained by setting different current command values. After the actual power comes out from the AC power grid, it passes through U1, passes through the internal bus to U4, and then returns to U1 through the cable L2, and the power forms a circulating current between U1 and U4. When stable operation, the AC power grid only provides the loss power of the device, which greatly reduces the consumption of electric energy in the test load, and the set test power level can be arbitrarily set. Through multiple point testing, the fitting degree of the efficiency curve is better. The efficiency calculation formula is:

[0078]

[0079] Pout represents the power value measured at the output end of the main port U4 U4 Pout represents the power value measured at the output end of the main port U2 电网 Pout represents the power value measured at the output end of the main port U4

[0080] ⑤ When testing the efficiency of main ports U2 and U4, if the voltages at main ports U2 and U4 are equal, control switches S5, S7, S2, S4, and S3 are opened, and control switches S1 and S6 are closed. At this time, the AC power grid returns to the input terminal of main port U2 via port U1, main port U2, switch S1, switch S6, and main port U4 to form the circulating current circuit required for the test. If the voltages at main ports U2 and U4 are not equal, such as... Figure 6 As shown, control the closing of switches S2 and S6, control the opening of switches S5, S7, S2, and S4, and the opening of switch S3. At this time, the AC power grid returns to the input terminal of the main port U2 through the slave port U1, the main port U2, switch S2, the power frequency inverter T1, switch S6, and the main switch U4 to form the circulating current circuit required for the test. The control strategy is as follows: Port U1 controls the internal bus voltage or outputs a fixed-phase high-frequency square wave signal according to the original control strategy. The control strategy for main port U2 is changed from closed-loop control of the output voltage to closed-loop control of the current in the port-connected reactor. The control strategy for main port U4 remains unchanged; the port voltage of main port U2 is controlled by main port U4. Since main ports U2 and U4 are connected together, controlling the current actually controls the output power. Different power can be obtained by setting different current command values. The actual power, after exiting the AC grid, enters U2 through U1, then enters U4 through switches S1 and S6, and returns to U2 through the internal bus. Power forms a circulating current between U2 and U4. During stable operation, the AC grid and U1 only provide the device's loss power, thus greatly reducing energy consumption in the test load. Moreover, the set test power level can be arbitrarily set. Through multiple point-based tests, the fitting degree of the efficiency curve is improved. The efficiency calculation formula is:

[0081]

[0082] When measuring the efficiency of the two ports of the main port U3 and the main port U4, the test method is the same as that of testing the two ports of the main port U2 and the main port U4. The control switch S5 is opened, S7 is opened, S2 and S4 are opened, S1 is opened, S3 and S6 are closed, and the voltages of the U3 and U4 ports are equal. The control strategy is that the U1 unit controls the internal bus voltage according to the original control strategy or outputs a fixed-phase high-frequency square wave signal, the control strategy of the U3 unit is changed from the original closed-loop control output voltage to the closed-loop control of the current in the port connection reactance, the port voltage is controlled by the U4 unit, and the control strategy of the U4 unit remains unchanged. Since the U3 unit and the U4 unit are connected together, the control current actually controls the output power, and different powers can be obtained by setting different current command values. The actual power comes out of the AC power grid, enters U3 through U1, and then enters U4 through S3 and S6. Through the internal bus, it returns to U3, and the power forms a circulating current between U3 and U4. When the device is in stable operation, the AC power grid and U1 only provide the loss power of the device, which greatly reduces the consumption of electric energy in the test load, and the set test power level can be arbitrarily set. Through multiple point testing, the fitting degree of the efficiency curve is better. The efficiency calculation formula is:

[0083]

[0084] When the two-port efficiency in the reverse direction of power is needed to be measured, only the current command value of the main port in the two ports is assigned a reverse direction value.

[0085] In this embodiment, for four-port and above devices, the remaining main port (such as U4) is connected in parallel with U1, U2 and U3 through an internal bus, forming a multi-port topology. On the basis of the test circuit of the three-port device, the output end of the main port U4 is connected with the cable L2 through the switches S6 and S7, the other side of L2 is connected with the input port of U1, and the one side of S5 is connected with the one side of S7 through the cable L3. If the voltage level of the main port U4 is inconsistent with that of the slave port U1, refer to the practice of the main port U3, and configure a power frequency transformer with consistent transformation ratio according to the need. By installing current and voltage probes on the output ports of U2, U3, U4 and the AC power grid output port, and connecting them to a power analyzer, the efficiency curve under different power levels can be obtained. Through the 4-way temperature sensor, the real-time temperature curve and the temperature rise test result of different parts of the device can be obtained.

[0086] It should be noted that for the device with more than four AC ports, the measurement method and the measurement device are similar to the above three-port and four-port, and the test loop is formed by switching control of the corresponding port during measurement. The control strategy of one of the master ports is changed from the original closed-loop control of the output voltage to the closed-loop control of the current in the port connection reactance, and the control strategy of the other ports remains unchanged. For the case where the voltages of each to-be-measured port are inconsistent, voltage matching can be achieved by setting a power frequency transformer. For power electronic devices that do not distinguish between master and slave ports in the control mode, they are not within the protection scope of the present patent.

[0087] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for testing the failure performance of a multi-port power electronic device, wherein the power electronic device under test includes a slave port and at least one master port, the input terminal of the slave port is connected to the power grid, and the output terminal is connected to the input terminal of the master port via a busbar, characterized in that, A multi-AC port power electronic device failure performance testing circuit is used. This circuit includes a temperature sensor, a temperature recorder, a power analyzer, multiple control switches, and multiple connecting cables. Temperature sensors are installed on both the main and slave ports, and their outputs are connected to the temperature recorder. A first voltage and current probe is installed at the input of the slave port, and a second voltage and current probe is installed at the output of the main port. The outputs of the first and second voltage and current probes are connected to the power analyzer. Each main port's output is connected to one end of a first switch, and the other end of the first switch is connected to the input of the slave port via a connecting cable. The testing method includes the following steps: (1) When testing the efficiency of the slave port and one of the master ports, connect the input terminal of the slave port to the power grid, and connect the output terminal to the input terminal of the slave port through the master port and the first switch to form a circulating circuit; then control the slave port to control the internal bus voltage or output a high-frequency square wave signal with a fixed phase according to the original control strategy, and control the corresponding master port to perform closed-loop control on the current in the reactor connected to the port; set different current commands, and obtain efficiency curves under different power levels through multiple point tests; at the same time, measure the temperature rise curve. (2) When testing two of the main ports, close the first switch corresponding to the two main ports being tested, connect the power grid to the input terminal of the port, and connect the output terminal to the output terminal of the slave port in sequence through one of the main ports, the two corresponding first switches, and the other main port to form a circulating circuit; then control the slave port to control the internal bus voltage or output a high-frequency square wave signal with a fixed phase according to the original control strategy, and control the control strategy of one of the main ports to perform closed-loop control of the current in the reactor connected to the port, while the control strategy of the other port remains unchanged; set different current commands, and obtain efficiency curves under different power levels through multiple point tests; at the same time, measure the temperature rise curve.

2. The failure performance testing method for a multi-AC port power electronic device according to claim 1, characterized in that, In step (1), the voltage levels of the slave port and the master port are the same, and the efficiency calculation formula is: ； Among them, P U3 Indicates the output power of the main port; P 电网 Indicates the power input to the power grid; In step (2), the voltage levels of the two main ports to be tested are the same, and the efficiency calculation formula is: ； Among them, P U2 P represents the output power of the main port where the control strategy changes during testing. 电网 This indicates the power input to the power grid.

3. The failure performance testing method for a multi-AC port power electronic device according to claim 1, characterized in that, The multi-port power electronic device failure performance test circuit also includes a third switch and a power frequency transformer T1. The third switch and the power frequency transformer T1 are connected in series and then connected in parallel across the first switch. The turns ratio of the power frequency transformer T1 is equal to the voltage ratio between the main port and the AC power grid.

4. The failure performance testing method for a multi-AC port power electronic device according to claim 1, characterized in that, The multi-AC port power electronic device failure performance test circuit also includes a second switch. There are two main ports, and the output of each main port is connected to one end of a first switch. The other end of the first switch is connected to one end of the second switch via a connecting cable, and the other end of the second switch is connected to the input of the slave port.

5. The failure performance testing method for a multi-AC port power electronic device according to claim 1, characterized in that, The main port has three ports. The power electronic device failure performance test circuit with multiple AC ports also includes a second switch and a fourth switch. The output of each main port is connected to one end of a first switch. The other end of the first switch is connected to one end of the second switch via a connecting cable. The other end of the second switch is connected to the input of the slave port. One end of the fourth switch is connected to the input of the slave port, and the other end is connected to one end of the second switch.

6. A method for testing the failure performance of a multi-AC port power electronic device, wherein the power electronic device under test includes a slave port and at least one master port, the input terminal of the slave port is connected to the power grid, and the output terminal is connected to the input terminal of the master port via a busbar, characterized in that, A multi-AC port power electronic device failure performance testing circuit is used. This circuit includes a temperature sensor, a temperature recorder, a power analyzer, multiple control switches, and multiple connecting cables. Temperature sensors are installed on both the main and slave ports, and their outputs are connected to the temperature recorder. A first voltage and current probe is installed at the input of the slave port, and a second voltage and current probe is installed at the output of the main port. The outputs of the first and second voltage and current probes are connected to the power analyzer. Each main port's output is connected to one end of a first switch, and the other end of the first switch is connected to the input of the slave port via a connecting cable. The main ports are two in number, and also include a second switch, two third switches, and a power frequency transformer T2. The output of each main port is connected to one end of a first switch; the other end of the first switch is connected to one end of the second switch via a connecting cable, and the other end of the second switch is connected to the input of the slave port; one end of each third switch is connected to the output of a main port, and the other end is connected to the other end of the first switch via the power frequency transformer T2. The turns ratio of the power frequency transformer T2 is equal to the voltage ratio of the two main ports. The process includes the following steps: (1) When testing the efficiency of the slave port and one of the master ports, close the third switch and the second switch corresponding to the slave port, so that the input terminal of the slave port is connected to the power grid, and the output terminal is connected to the input terminal of the slave port in sequence through the master port, the second switch, the power frequency transformer T1, and the third switch to form a circulating circuit; then control the slave port to control the internal bus voltage or output a high-frequency square wave signal with a fixed phase according to the original control strategy, and control the corresponding master port to perform closed-loop control on the current in the reactor connected to the port; set different current commands, and obtain efficiency curves under different power levels through multiple point tests; at the same time, measure the temperature rise curve; (2) When testing two of the main ports, disconnect the third switch, close the first switch corresponding to one of the main ports being tested and the second switch corresponding to the other main port being tested, so that the input terminal of the slave port is connected to the power grid, and the output terminal returns to the output terminal of the slave port in sequence through one of the main ports, the corresponding first switch, the power frequency transformer, and the second switch, forming a circulating circuit; then control the slave port to control the internal bus voltage or output a high-frequency square wave signal with a fixed phase according to the original control strategy, and control the control strategy of one of the main ports to perform closed-loop control of the current in the reactor connected to the port, while the control strategy of the other port remains unchanged; set different current commands, and obtain efficiency curves under different power levels through multiple point tests; at the same time, measure the temperature rise curve.

7. The failure performance testing method for a multi-AC port power electronic device according to claim 6, characterized in that, In step (1), since the voltage levels of the slave port and the master port are different, the efficiency calculation formula is as follows: ； Among them, P U3 Indicates the output power of the main port; P 电网 Indicates the power input to the power grid; In step (2), the voltage levels of the two main ports to be tested are different, and the efficiency calculation formula is: ； Among them, P U2 P represents the output power of the main port where the control strategy changes during testing. 电网 This indicates the power input to the power grid.

8. The failure performance testing method for a multi-AC port power electronic device according to claim 6, characterized in that, When there are three main ports, the test circuit also includes a second switch and a fourth switch. The output of each main port is connected to one end of a first switch. The other end of the first switch is connected to one end of the second switch via a connecting cable. The other end of the second switch is connected to the input of the slave port. One end of the fourth switch is connected to the input of the slave port, and the other end is connected to one end of the second switch. The test circuit also includes a third switch and a power frequency transformer T1. One end of the third switch is connected to the output terminal of a main port, and the other end is connected to the other end of the second switch via the power frequency transformer T1. The turns ratio of the power frequency transformer T1 is equal to the voltage ratio between the main port and the slave port.

Images