Body coil tuning control device and magnetic resonance system

Abstract

An embodiment of the present invention discloses a body coil tuning control device and a magnetic resonance system. The device includes: the input end of a DC-DC converter is connected to the DC power supply of the MRI system, and the output end is connected to the input end of a first LDO; the output end of the first LDO is connected to the first connection end of a first resistor group; the non-inverting input end of a first operational amplifier is connected to the first connection end of the first resistor group, the inverting input end is connected to the second connection end of the first resistor group, and the output end is connected to the gate of a MOSFET array; a negative feedback circuit is connected between the output end and the non-inverting input end of the first operational amplifier; the drain of the MOSFET array is connected to the second connection end of the first resistor group, and the source is connected to the input end of the body coil of the MRI system; the negative feedback circuit enables: after the output signal of the first operational amplifier is input to the gate of the MOSFET array, a constant preset current is output from the source; the number of MOSFETs satisfies that the power of each parallel-connected MOSFET is less than a preset power. The embodiment of the present invention reduces the power consumption and cost of the body coil tuning control device.

Description

Technical Field

[0001] The present invention relates to the technical field of MR (Magnetic Resonance) systems, in particular to a body coil tuning control device and a magnetic resonance system. Background Art

[0002] For 1.5T (Tesla), 3T or even higher MRI (Magnetic Resonance Imaging) systems, the body coil tuning / demodulation controller (BC_DYN) uses a 15V DC power supply as a current source, with a rated current of 5A and a voltage drop as high as 10V. This means that the power consumption of the switching BJT transistor in BC_DYN is about 50W, and the switching transistor requires forced air or water cooling.

[0003] In low-field MRI systems, if this BC_DYN design is adopted, as the frequency decreases, the PIN diode will bear greater RF stress under the same DC bias current. Therefore, in low-field applications, it is necessary to increase the DC current of the PIN diode in the body coil, which will also lead to higher power consumption of the BJT transistor. Summary of the Invention

[0004] In view of this, an embodiment of the present invention provides a body coil tuning control device to reduce the power consumption and cost of the body coil tuning control device;

[0005] An embodiment of the present invention also provides an MR system to reduce the power consumption and cost of the body coil tuning control device.

[0006] The technical solution of the embodiment of the present invention is implemented as follows:

[0007] A body coil tuning control device, the device includes: a DC-DC converter, a first low-dropout linear regulator (LDO), a first resistor group, a first operational amplifier, a negative feedback circuit, a metal-oxide-semiconductor field-effect transistor (MOSFET) array. The first resistor group includes one resistor or multiple series resistors, where:

[0008] The input end of the DC-DC converter is connected to the DC power supply of the magnetic resonance (MRI) system, and the output end is connected to the input end of the first LDO. The DC-DC converter is used to reduce the voltage of the input DC signal to a preset first voltage;

[0009] The output end of the first LDO is connected to the first connection end of the first resistor group, and the output voltage of the first LDO is less than the first voltage;

[0010] The inverting input end of the first operational amplifier is connected to the first connection end of the first resistor group, and the non-inverting input end is connected to the second connection end of the first resistor group;

[0011] The output terminal of the first operational amplifier is connected to the gate G of the MOSFET array;

[0012] The negative feedback circuit is connected between the output terminal and the inverting input terminal of the first operational amplifier;

[0013] The drain D of the MOSFET array is connected to the second connection terminal of the first resistor group, and the source S is connected to the input terminal of the MRI system body coil;

[0014] Among them, the negative feedback circuit satisfies: after the output signal of the first operational amplifier is input to the G pole of the MOSFET array, it can make the S pole of the MOSFET array output a constant preset current;

[0015] The MOSFETs in the MOSFET array are in parallel, and the number of MOSFETs satisfies: the power of each MOSFET is less than the preset power.

[0016] The negative feedback circuit includes: a first capacitor, a first resistor, and a second resistor, where:

[0017] The first connection terminal of the first capacitor is connected to the inverting input terminal of the first operational amplifier, and the second connection terminal of the first capacitor is connected to the first connection terminal of the first resistor;

[0018] The second connection terminal of the first resistor is connected to the output terminal of the first operational amplifier;

[0019] The second resistor is connected in parallel between the first connection terminal of the first capacitor and the second connection terminal of the first resistor;

[0020] The capacitance value of the first capacitor, and the resistance values of the first resistor and the second resistor satisfy: after the output signal of the first operational amplifier is input to the G pole of the MOSFET array, it can make the S pole of the MOSFET array output a constant preset current.

[0021] The device further includes: a second operational amplifier, a third resistor, a fourth resistor, a third operational amplifier, a fifth resistor, and a sixth resistor, where:

[0022] The non-inverting input terminal of the second operational amplifier is connected to the first connection terminal of the first resistor group through the third resistor, and is grounded through the fourth resistor at the same time;

[0023] The inverting input terminal of the second operational amplifier is connected to the second connection terminal of the first resistor group;

[0024] The non-inverting input terminal of the third operational amplifier is connected to the second connection terminal of the first resistor group;

[0025] The inverting input terminal of the third operational amplifier is connected to the first connection terminal of the first resistor group through the fifth resistor, and is grounded through the sixth resistor at the same time;

[0026] The resistance values of the third resistor and the fourth resistor satisfy: the output voltage of the first LDO * the resistance value of the fourth resistor / (the resistance value of the third resistor + the resistance value of the fourth resistor) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array;

[0027] The resistance values of the fifth resistor and the sixth resistor satisfy: the output voltage of the first LDO * the resistance value of the sixth resistor / (the resistance value of the fifth resistor + the resistance value of the sixth resistor) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array;

[0028] Wherein, when it is determined according to the output signals of the second operational amplifier and the third operational amplifier that the current input to the body coil is not less than the preset second current threshold and not greater than the preset first current threshold, it is determined that the current input to the body coil is normal; otherwise, it is determined that the current input to the body coil is abnormal; the preset second current threshold is less than the preset first current threshold.

[0029] The device further includes: a second LDO and a second resistor group, wherein:

[0030] The input end of the second LDO is connected to the input end of the first LDO, and the output end of the second LDO is connected to the first connection end of the second resistor group;

[0031] The second connection end of the second resistor group is connected to the second connection end of the first resistor group;

[0032] Wherein, the second LDO and the first LDO are exactly the same LDO;

[0033] The structure of the second resistor group is exactly the same as that of the first resistor group.

[0034] The first resistor group is formed by connecting two resistors with the same resistance value in series, and the resistance value of each resistor is: 0.01 ohm ± 10%.

[0035] The device further includes: a fourth operational amplifier, a seventh resistor, an eighth resistor and a ninth resistor, wherein:

[0036] The first connection end of the seventh resistor is connected to the output end of the first LDO, and the second connection end of the seventh resistor is connected to the first connection end of the eighth resistor;

[0037] The first connection end of the eighth resistor is connected to the output end of the second LDO;

[0038] The non-inverting input end of the fourth operational amplifier is connected to the second connection end of the seventh resistor;

[0039] The ninth resistor is connected between the inverting input end and the output end of the fourth operational amplifier;

[0040] Among them, the resistance values of the seventh resistor and the eighth resistor are equal;

[0041] When the difference between the output voltage of the fourth operational amplifier and the output voltage of the first LDO is within a preset range, it is determined that the outputs of the first LDO and the second LDO are balanced; otherwise, it is determined that the outputs of the first LDO and the second LDO are unbalanced.

[0042] The resistance value of the seventh resistor is: 10 kΩ ± 20%.

[0043] The resistance value of the ninth resistor is: not less than 1 kΩ and not greater than 5 kΩ.

[0044] The device further includes: a first logic circuit, a second logic circuit, and a MOSFET, where:

[0045] The first logic circuit is connected in series between the output terminal of the first operational amplifier and the G pole of the MOSFET array, where the first input terminal of the first logic circuit is connected to the output terminal of the first operational amplifier;

[0046] The second input terminal of the first logic circuit is connected to the tuning control module;

[0047] The input terminal of the second logic circuit is connected to the tuning control module, and the output terminal is connected to the G pole of the MOSFET;

[0048] The D pole of the MOSFET is connected to the S pole of the MOSFET array, and the S pole of the MOSFET receives the detuning voltage signal;

[0049] When the tuning control module outputs a high level, the first logic circuit outputs the output voltage of the first operational amplifier to the G pole of the MOSFET array, and the MOSFET array is turned on, so that a constant preset current is output from the S pole of the MOSFET array to the MRI system body coil; at the same time, the second logic circuit is turned off, so that the MOSFET is turned off;

[0050] When the tuning control module outputs a low level, the first logic circuit outputs a low level to the G pole of the MOSFET array. At this time, the MOSFET array is cut off, and no current is output from the S pole of the MOSFET array; at the same time, the second logic circuit is turned on, so that the MOSFET is turned on, and the detuning voltage signal is output to the MRI system body coil through the MOSFET.

[0051] A body coil tuning control device, which includes: a DC-DC converter, a first low dropout linear regulator (LDO), a first resistor group, a first operational amplifier, a negative feedback circuit, a metal-oxide-semiconductor field effect transistor (MOSFET) array, a second LDO, a second resistor group, a fourth operational amplifier, a seventh resistor, an eighth resistor, and a ninth resistor. The first resistor group includes one resistor or multiple resistors connected in series. The structure of the second resistor group is exactly the same as that of the first resistor group. The second LDO is the same LDO as the first LDO. The resistance values of the seventh resistor and the eighth resistor are equal. Among them:

[0052] The input end of the DC-DC converter is connected to the DC power supply of the magnetic resonance imaging (MRI) system, and the output end is connected to the input end of the first LDO. The DC-DC converter is used to reduce the voltage of the input DC signal to a preset first voltage;

[0053] The output end of the first LDO is connected to the first connection end of the first resistor group, and the output voltage of the first LDO is less than the first voltage;

[0054] The input end of the second LDO is connected to the input end of the first LDO, and the output end of the second LDO is connected to the first connection end of the second resistor group;

[0055] The second connection end of the second resistor group is connected to the second connection end of the first resistor group;

[0056] The first connection end of the seventh resistor is connected to the output end of the first LDO, and the second connection end of the seventh resistor is connected to the first connection end of the eighth resistor;

[0057] The first connection end of the eighth resistor is connected to the output end of the second LDO;

[0058] The non-inverting input end of the fourth operational amplifier is connected to the second connection end of the seventh resistor;

[0059] The ninth resistor is connected between the inverting input end and the output end of the fourth operational amplifier;

[0060] The inverting input end of the first operational amplifier is connected to the output end of the fourth operational amplifier, and the non-inverting input end is connected to the second connection end of the first resistor group;

[0061] The output end of the first operational amplifier is connected to the gate (G) of the MOSFET array;

[0062] The negative feedback circuit is connected between the output end and the inverting input end of the first operational amplifier;

[0063] The drain (D) of the MOSFET array is connected to the second connection end of the first resistor group, and the source (S) is connected to the input end of the body coil of the MRI system;

[0064] Among them, the negative feedback circuit satisfies that after the output signal of the first operational amplifier is input to the G pole of the MOSFET array, a constant preset current can be output from the S pole of the MOSFET array;

[0065] The MOSFETs in the MOSFET array are connected in parallel, and the number of MOSFETs satisfies that the power of each MOSFET is less than the preset power.

[0066] The negative feedback circuit includes: a first capacitor, a first resistor, and a second resistor, where:

[0067] The first connection end of the first capacitor is connected to the inverting input end of the first operational amplifier, and the second connection end of the first capacitor is connected to the first connection end of the first resistor;

[0068] The second connection end of the first resistor is connected to the output end of the first operational amplifier;

[0069] The second resistor is connected in parallel between the first connection end of the first capacitor and the second connection end of the first resistor;

[0070] The capacitance value of the first capacitor and the resistance values of the first resistor and the second resistor satisfy that after the output signal of the first operational amplifier is input to the G pole of the MOSFET array, a constant preset current can be output from the S pole of the MOSFET array.

[0071] The device further includes: a second operational amplifier, a third resistor, a fourth resistor, a third operational amplifier, a fifth resistor, and a sixth resistor, where:

[0072] The non-inverting input end of the second operational amplifier is connected to the output end of the fourth operational amplifier through the third resistor and grounded through the fourth resistor at the same time;

[0073] The inverting input end of the second operational amplifier is connected to the second connection end of the first resistor group;

[0074] The non-inverting input end of the third operational amplifier is connected to the second connection end of the first resistor group;

[0075] The inverting input end of the third operational amplifier is connected to the output end of the fourth operational amplifier through the fifth resistor and grounded through the sixth resistor at the same time;

[0076] The resistance values of the third resistor and the fourth resistor satisfy: the output voltage of the first LDO * the resistance value of the fourth resistor / (the resistance value of the third resistor + the resistance value of the fourth resistor) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array;

[0077] The resistance values of the fifth resistor and the sixth resistor satisfy: the output voltage of the first LDO * the resistance value of the sixth resistor / (the resistance value of the fifth resistor + the resistance value of the sixth resistor) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array;

[0078] Among them, when it is determined according to the output signals of the second operational amplifier and the third operational amplifier that the current input to the body coil is not less than the preset second current threshold and not greater than the preset first current threshold, it is determined that the current input to the body coil is normal; otherwise, it is determined that the current input to the body coil is abnormal; the preset second current threshold is less than the preset first current threshold.

[0079] The device further includes: a first logic circuit, a second logic circuit, and a MOSFET, where:

[0080] The first logic circuit is connected in series between the output terminal of the first operational amplifier and the G pole of the MOSFET array, where the first input terminal of the first logic circuit is connected to the output terminal of the first operational amplifier;

[0081] The second input terminal of the first logic circuit is connected to the tuning control module;

[0082] The input terminal of the second logic circuit is connected to the tuning control module, and the output terminal is connected to the G pole of the MOSFET;

[0083] The D pole of the MOSFET is connected to the S pole of the MOSFET array, and the S pole of the MOSFET receives the detuning voltage signal;

[0084] When the tuning control module outputs a high level, the first logic circuit outputs the output voltage of the first operational amplifier to the G pole of the MOSFET array, and the MOSFET array is turned on, so that a constant preset current is output from the S pole of the MOSFET array to the MRI system body coil; at the same time, the second logic circuit is turned off, so that the MOSFET is turned off;

[0085] When the tuning control module outputs a low level, the first logic circuit outputs a low level to the G pole of the MOSFET array. At this time, the MOSFET array is cut off, and no current is output from the S pole of the MOSFET array; at the same time, the second logic circuit is turned on, so that the MOSFET is turned on, and the detuning voltage signal is output to the MRI system body coil through the MOSFET.

[0086] A magnetic resonance system includes the body coil tuning control device described in any one of the above.

[0087] In the embodiment of the present invention, the voltage of the DC power supply of the MRI system is reduced by a DC-DC converter, and the voltage is further reduced and stabilized by an LDO. Then, the input signal of the G pole of the MOSFET array is adjusted by an operational amplifier with a negative feedback circuit, so that a constant current signal is output from the S pole of the MOSFET array to the body coil. Since the power consumptions of both the DC-DC converter and the LDO are very low, and the MOSFETs in the MOSFET array are connected in parallel, the power consumption of each MOSFET is also very low. Therefore, the power consumption of the entire body coil tuning control device is very low, and no additional forced air cooling or water cooling device is required, reducing the cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, so that those of ordinary skill in the art can more clearly understand the above and other features and advantages of the present invention. In the drawings:

[0089] Figure 1 is a schematic structural diagram of a body coil tuning control device provided by the first embodiment of the present invention;

[0090] Figure 2 is a schematic structural diagram of a body coil tuning control device provided by the second embodiment of the present invention;

[0091] Figure 3 is a schematic structural diagram of a body coil tuning control device provided by the third embodiment of the present invention;

[0092] Figure 4 is a schematic structural diagram of a body coil tuning control device provided by the fourth embodiment of the present invention;

[0093] Figure 5 is a schematic structural diagram of a body coil tuning control device provided by the fifth embodiment of the present invention;

[0094] Figure 6 is a schematic structural diagram of a body coil tuning control device provided by the sixth embodiment of the present invention;

[0095] Figure 7 is a schematic structural diagram of a body coil tuning control device provided by the seventh embodiment of the present invention;

[0096] Figure 8 is a schematic structural diagram of a body coil tuning control device provided by the eighth embodiment of the present invention;

[0097] Figure 9 is a schematic structural diagram of a body coil tuning control device provided by the ninth embodiment of the present invention;

[0098] Figure 10 is a schematic structural diagram of a body coil tuning control device provided by the tenth embodiment of the present invention.

[0099] Among them, the reference numerals are as follows:

[0100]

[0101] Detailed implementation manners

[0102] To make the objectives, technical solutions and advantages of the present invention clearer, the following examples are given to further elaborate on the present invention in detail.

[0103] Figure 1 FIG. is a schematic diagram of a body coil tuning control device provided by a first embodiment of the present invention. The device mainly includes: a DC (Direct Current) - DC converter (100), a first LDO (Low Dropout Regulator) 11, a first resistor group 12, a first operational amplifier 13, a negative feedback circuit 14, and a MOSFET (Metal - Oxide - Semiconductor Field - Effect Transistor) array 15. The first resistor group 12 includes one resistor or a plurality of series - connected resistors, where:

[0104] The input end of the DC - DC converter 100 is connected to the DC power supply (usually 24V) of the MRI system, and the output end is connected to the input end of the first LDO 11. The DC - DC converter 100 is used to reduce the voltage of the input DC signal (usually 24V) to a preset first voltage (such as: 5.5V);

[0105] The conversion efficiency of the DC - DC converter 100 is greater than 90%. For example, when the input voltage is 24V and the current is 4.75A, the total input power is: 24 * 4.75 = 114W, and the power converted into heat is less than 114 * (100 - 90)% = 11.4W.

[0106] The output end of the first LDO 11 is connected to the first connection end of the first resistor group 12, and the output voltage of the first LDO 11 (such as: 4.5V) is less than the input first voltage (such as: 5.5V);

[0107] The power of the first LDO 11 = (input voltage - output voltage) * current. It can be seen that when the input voltage is 5.5V, the output voltage is 4.5V, and the current is 5A, the power is only (5.5 - 4.5) * 5 = 5W.

[0108] The inverting input end of the first operational amplifier 13 is connected to the first connection end of the first resistor group 12 (i.e., Figure 1in U1), the non-inverting input terminal is connected to the second connection terminal of the first resistor group 12 (i.e., Figure 1 in U2);

[0109] The output terminal of the first operational amplifier 13 is connected to the G (gate) electrode of the MOSFET array 15;

[0110] The negative feedback circuit 14 is connected between the output terminal and the inverting input terminal of the first operational amplifier 13;

[0111] The D (drain) electrode of the MOSFET array 15 is connected to the second connection terminal of the first resistor group 12, and the S (source) electrode is connected to the input terminal of the body coil of the MRI system;

[0112] Among them, the negative feedback circuit 14 satisfies: after the output signal of the first operational amplifier 13 is input to the G electrode of the MOSFET array 15, a constant preset current (such as: 4.75 A) can be output from the S electrode of the MOSFET array 15;

[0113] The MOSFETs in the MOSFET array 15 are connected in parallel, and the number of MOSFETs satisfies: the power of each MOSFET is less than the preset power. Among them, each MOSFET in the MOSFET array 15 can be a P-MOSFET.

[0114] In the above device, the DC-DC converter 100 reduces the voltage of the input DC signal to a preset first voltage, the first LDO 11 reduces and stabilizes the input DC voltage to the second voltage for output, and the first operational amplifier 13 performs amplification processing according to the voltage signal input to the non-inverting input terminal and the voltage signal input to the inverting input terminal. Among them, the negative feedback circuit 14 adjusts the voltage signal input to the inverting input terminal according to the output signal, so that after the output signal of the first operational amplifier 13 is input to the G electrode of the MOSFET array 15, a constant preset current I0 can be output from the S electrode of the MOSFET array 15 to the body coil of the MRI system.

[0115] It can be seen that in the above embodiments, the voltage of the DC power supply of the MRI system is reduced by the DC-DC converter, and the voltage is reduced and stabilized by the LDO, and then the input signal of the G electrode of the MOSFET array is adjusted by the operational amplifier with a negative feedback circuit, so that a constant current signal is output from the S electrode of the MOSFET array to the body coil. Since the power consumption of the DC-DC converter and the LDO is very low, and the MOSFETs in the MOSFET array are connected in parallel, the power consumption of each MOSFET is also very low. Therefore, the power consumption of the entire body coil tuning control device is very low, and no additional forced air cooling or water cooling device is required, reducing the cost.

[0116] Figure 2Schematic diagram of the body coil tuning control device provided by the second embodiment of the present invention. This embodiment gives an implementation of the negative feedback circuit 14 in the first embodiment, and the rest is the same as the first embodiment. In this embodiment, the negative feedback circuit 14 mainly includes: a first capacitor 141, a first resistor 142, and a second resistor 143, where:

[0117] The first connection end of the first capacitor 141 is connected to the inverting input end of the first operational amplifier 13, and the second connection end of the first capacitor 141 is connected to the first connection end of the first resistor 142;

[0118] The second connection end of the first resistor 142 is connected to the output end of the first operational amplifier 13;

[0119] The second resistor 143 is connected in parallel between the first connection end of the first capacitor 141 and the second connection end of the first resistor 142.

[0120] Among them, the capacitance value of the first capacitor 141, and the resistance values of the first resistor 142 and the second resistor 143 satisfy: after the output signal of the first operational amplifier 13 is input to the G pole of the MOSFET array 15, it can make the S pole of the MOSFET array 15 output a constant preset current (such as: 4.75 A).

[0121] Figure 3 Schematic diagram of the structure of the body coil tuning control device provided by the third embodiment of the present invention. Compared with the first embodiment and the second embodiment, this embodiment adds: a second operational amplifier 16, a third resistor 17, a fourth resistor 18, a third operational amplifier 19, a fifth resistor 20, and a sixth resistor 21, where:

[0122] The non-inverting input end of the second operational amplifier 16 is connected to the first connection end of the first resistor group 12 through the third resistor 17, and at the same time, the non-inverting input end of the second operational amplifier 16 is grounded through the fourth resistor 18;

[0123] The inverting input end of the second operational amplifier 16 is connected to the second connection end of the first resistor group 12;

[0124] The non-inverting input end of the third operational amplifier 19 is connected to the second connection end of the first resistor group 12;

[0125] The inverting input end of the third operational amplifier 19 is connected to the first connection end of the first resistor group 12 through the fifth resistor 20, and at the same time, the inverting input end of the third operational amplifier 19 is grounded through the sixth resistor 21;

[0126] The resistance values of the third resistor 17 and the fourth resistor 18 satisfy: the output voltage of the first LDO 11 * the resistance value of the fourth resistor 18 / (the resistance value of the third resistor 17 + the resistance value of the fourth resistor 18) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array 15;

[0127] The resistance values of the fifth resistor 20 and the sixth resistor 21 satisfy: the output voltage of the first LDO 11 * the resistance value of the sixth resistor 21 / (the resistance value of the fifth resistor 20 + the resistance value of the sixth resistor 21) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array 15.

[0128] The second operational amplifier 16 and the third operational amplifier 19 are essentially voltage comparators.

[0129] When the voltage at the non-inverting input terminal of the second operational amplifier 16 is higher than the voltage at the inverting input terminal, the output terminal of the second operational amplifier 16 outputs a high level. At this time, it indicates that the current output from the S pole of the MOSFET array 15 to the body coil is greater than the preset first current threshold;

[0130] When the voltage at the non-inverting input terminal of the third operational amplifier 19 is higher than the voltage at the inverting input terminal, the output terminal of the third operational amplifier 19 outputs a high level. At this time, it indicates that the current output from the S pole of the MOSFET array 15 to the body coil is less than the preset second current threshold.

[0131] Thus, the level output from the output terminals of the second operational amplifier 16 and the third operational amplifier 19 can be used to determine which interval the current output from the S pole of the current MOSFET array 15 to the body coil is in. For example:

[0132] If the first current threshold (e.g., 5.5V) is greater than the second current threshold (e.g., 4.5V), then it is determined which of the following three intervals it is in:

[0133] Interval 1: less than the second current threshold, Interval 2: not less than the second current threshold and not greater than the first current threshold, Interval 3: greater than the first current threshold; among them, if it is in Interval 2, it indicates that the current output to the body coil is normal, otherwise, it indicates that the current output to the body coil is abnormal. Among them, the first current threshold > the above-mentioned constant preset current (e.g., 4.75A), the second current threshold is less than the above-mentioned constant preset current (e.g., 4.75A), and the specific values of the first current threshold and the second current threshold are set according to experience, etc.

[0134] Through the above embodiments, it is possible to monitor whether the current output to the body coil is within the normal range.

[0135] In practical applications, due to the limitations of the performance of the LDO itself, using only one LDO may not be able to achieve the current magnitude required by the body coil of the MRI system. At this time, it is necessary to add an LDO in the device.

[0136] Figure 4 FIG. is a schematic structural diagram of the body coil tuning control device provided by the fourth embodiment of the present invention. Compared with the first, second, and third embodiments, the device further includes: a second LDO 22 and a second resistor group 23, where:

[0137] The input end of the second LDO 22 is connected to the input end of the first LDO 11, and the output end of the second LDO 22 is connected to the first connection end of the second resistor group 23;

[0138] The second connection end of the second resistor group 23 is connected to the second connection end of the first resistor group 12.

[0139] Wherein, the second LDO 22 and the first LDO 11 are exactly the same LDO;

[0140] The structure of the second resistor group 23 is exactly the same as that of the first resistor group 12, that is, the number of resistors included in the second resistor group 23, the resistance value of each resistor, and the connection manner between the resistors are exactly the same as those of the first resistor group 12.

[0141] In the above embodiment, by connecting two LDOs in parallel, the current output to the body coil of the MRI system is increased, so that the current output to the body coil can meet the working requirements of the body coil.

[0142] In practical applications, the first resistor group 12 and the second resistor group 23 can each be composed of two resistors with the same resistance value connected in series, and the resistance value of each resistor can be: 0.01 Ω (ohm) ± 10% to reduce power consumption.

[0143] Considering that: in practical applications, due to various reasons, the LDO may malfunction. In order to detect the working state of the LDO in a timely manner, the present invention provides the following solution:

[0144] Figure 5 FIG. is a schematic structural diagram of the body coil tuning control device provided by the fifth embodiment of the present invention. Compared with the fourth embodiment, the device further includes: a fourth operational amplifier 24, a seventh resistor 25, an eighth resistor 26, and a ninth resistor 27, where:

[0145] The first connection end of the seventh resistor 25 is connected to the output end of the first LDO 11, and the second connection end of the seventh resistor 25 is connected to the first connection end of the eighth resistor 26;

[0146] The first connection end of the eighth resistor 26 is connected to the output end of the second LDO 22;

[0147] The non-inverting input terminal of the fourth operational amplifier 24 is connected to the second connection terminal of the seventh resistor 25;

[0148] The ninth resistor 27 is connected between the inverting input terminal and the output terminal of the fourth operational amplifier 24;

[0149] When it is detected that the difference between the output voltage of the fourth operational amplifier 24 and the output voltage of the first LDO 11 is within a preset range, it is determined that the outputs of the first LDO 11 and the second LDO 22 are balanced; otherwise, it is determined that the outputs of the first LDO 11 and the second LDO 22 are unbalanced. Wherein, the preset range is, for example: ±10% * the normal output voltage of the first LDO 11.

[0150] In practical applications, the resistance values of the seventh resistor 25 and the eighth resistor 26 can be: 10 KΩ (kiloohm) ±20%, and the resistance value of the ninth resistor 27 can be: not less than 1 KΩ and not greater than 5 KΩ.

[0151] Figure 6 FIG. is a schematic structural diagram of the body coil tuning control device provided by the sixth embodiment of the present invention. Compared with the first to fifth embodiments, this device adds: a first logic circuit 28, a second logic circuit 29, and a MOSFET 30, wherein:

[0152] The first logic circuit 28 is connected in series between the output terminal of the first operational amplifier 13 and the G pole of the MOSFET array 15. Among them, the first input terminal of the first logic circuit 28 is connected to the output terminal of the first operational amplifier 13;

[0153] The second input terminal of the first logic circuit 28 is connected to the tuning control module 200;

[0154] The input terminal of the second logic circuit 29 is connected to the tuning control module 200, and the output terminal is connected to the G pole of the MOSFET 30;

[0155] The D pole of the MOSFET 30 is connected to the S pole of the MOSFET array 15, and the S pole of the MOSFET 30 receives the detuning voltage signal U0 (such as: -12V). The MOSFET 30 can be a P-MOSFET.

[0156] When the tuning control module 200 outputs a high level, the first logic circuit 28 outputs the output voltage of the first operational amplifier 13 to the G pole of the MOSFET array 15, and the MOSFET array 15 is turned on. Thus, a constant preset current is output from the S pole of the MOSFET array 15 to the body coil of the MRI system; at the same time, the second logic circuit 29 is turned off, so that the MOSFET 30 is turned off;

[0157] When the tuning control module 200 outputs a low level, the first logic circuit 28 outputs a low level to the G pole of the MOSFET array 15. At this time, the MOSFET array 15 is cut off, and no current is output from the S pole of the MOSFET array 15. At the same time, the second logic circuit 29 is turned on, so that the MOSFET 30 is turned on, and the detuning voltage signal U0 is output to the body coil of the MRI system through the MOSFET 30.

[0158] Figure 7 FIG. 4 is a schematic structural diagram of a body coil tuning control device provided in the seventh embodiment of the present invention. The device includes: a DC-DC converter 100, a first LDO 11, a first resistor group 12, a first operational amplifier 13, a negative feedback circuit 14, a MOSFET array 15, a second LDO 22, a second resistor group 23, a fourth operational amplifier 24, a seventh resistor 25, an eighth resistor 26, and a ninth resistor 27. The first resistor group 12 includes one resistor or a plurality of series resistors. The structure of the second resistor group 23 is exactly the same as that of the first resistor group 12. The second LDO 22 and the first LDO 11 are exactly the same LDOs. The resistance values of the seventh resistor 25 and the eighth resistor 26 are equal. Among them:

[0159] The input end of the DC-DC converter 100 is connected to the DC power supply of the MRI system (usually 24V), and the output end is connected to the input end of the first LDO 11. The DC-DC converter 100 is used to reduce the voltage of the input DC signal (usually 24V) to a preset first voltage (such as: 5.5V).

[0160] The output end of the first LDO 11 is connected to the first connection end of the first resistor group 12, and the output voltage of the first LDO 11 (such as: 4.5V) is less than the first voltage.

[0161] The input end of the second LDO 22 is connected to the input end of the first LDO 11, and the output end of the second LDO 22 is connected to the first connection end of the second resistor group 23.

[0162] The second connection end of the second resistor group 23 is connected to the second connection end of the first resistor group 12.

[0163] The first connection end of the seventh resistor 25 is connected to the output end of the first LDO 11, and the second connection end of the seventh resistor 25 is connected to the first connection end of the eighth resistor 26.

[0164] The first connection end of the eighth resistor 26 is connected to the output end of the second LDO 22.

[0165] The non-inverting input end of the fourth operational amplifier 24 is connected to the second connection end of the seventh resistor 25.

[0166] The ninth resistor 27 is connected between the inverting input terminal and the output terminal of the fourth operational amplifier 24;

[0167] The inverting input terminal of the first operational amplifier 13 is connected to the output terminal of the fourth operational amplifier 24 (i.e., Figure 7 U3 in Figure 7 ), and the non-inverting input terminal is connected to the second connection terminal of the first resistor group 12 (i.e.,

[0168] U2 in

[0169] The output terminal of the first operational amplifier 13 is connected to the G pole of the MOSFET array 15;

[0170] The D pole of the MOSFET array 15 is connected to the second connection terminal of the first resistor group 12, and the S pole is connected to the input terminal of the MRI system body coil;

[0171] Wherein, the negative feedback circuit 14 satisfies that after the output signal of the first operational amplifier 13 is input to the G pole of the MOSFET array 15, a constant preset current (such as: 4.75 A) can be output from the S pole of the MOSFET array 15;

[0172] The MOSFETs in the MOSFET array 15 are connected in parallel, and the number of MOSFETs satisfies that the power of each MOSFET is less than the preset power. Among them, each MOSFET in the MOSFET array 15 can be a P-MOSFET.

[0173] In practical applications, the first resistor group 12 and the second resistor group 23 can be respectively composed of two resistors with the same resistance in series, and the resistance value of each resistor can be: 0.01 Ω (ohm) ± 10% to reduce power consumption.

[0174] In practical applications, the resistance values of the seventh resistor 25 and the eighth resistor 26 can be: 10 KΩ (kiloohm) ± 20%, and the resistance value of the ninth resistor 27 can be: not less than 1 KΩ and not greater than 5 KΩ.

[0175] In the above device, the DC-DC converter 100 reduces the voltage of the input DC signal to a preset first voltage, the first LDO 11 and the second LDO 22 reduce and stabilize the input DC voltage to a second voltage for output, and the first operational amplifier 13 performs amplification processing according to the voltage signal input to the non-inverting input terminal and the voltage signal input to the inverting input terminal. Among them, the negative feedback circuit 14 adjusts the voltage signal input to the inverting input terminal according to the output signal, so that after the output signal of the first operational amplifier 13 is input to the G pole of the MOSFET array 15, a constant preset current I0 can be output from the S pole of the MOSFET array 15 to the body coil of the MRI system.

[0176] It can be seen that in the above embodiments, the voltage of the DC power supply of the MRI system is reduced by a DC-DC converter, and the voltage is further reduced and stabilized by an LDO. Then, the input signal of the G pole of the MOSFET array is adjusted by an operational amplifier with a negative feedback circuit, so that a constant current signal is output from the S pole of the MOSFET array to the body coil. Since the power consumption of both the DC-DC converter and the LDO is very low, and the MOSFETs in the MOSFET array are connected in parallel, the power consumption of each MOSFET is also very low. Therefore, the power consumption of the entire body coil tuning control device is very low, and no additional forced air cooling or water cooling device is required, reducing the cost.

[0177] Figure 8 FIG. 6 is a schematic structural diagram of a body coil tuning control device provided in the eighth embodiment of the present invention. This embodiment gives an implementation manner of the negative feedback circuit 14 in the seventh embodiment, and the rest is the same as that in the first embodiment. In this embodiment, the negative feedback circuit 14 mainly includes: a first capacitor 141, a first resistor 142, and a second resistor 143, where:

[0178] The first connection end of the first capacitor 141 is connected to the inverting input end of the first operational amplifier 13, and the second connection end of the first capacitor 141 is connected to the first connection end of the first resistor 142;

[0179] The second connection end of the first resistor 142 is connected to the output end of the first operational amplifier 13;

[0180] The second resistor 143 is connected in parallel between the first connection end of the first capacitor 141 and the second connection end of the first resistor 142.

[0181] Wherein, the capacitance value of the first capacitor 141, and the resistance values of the first resistor 142 and the second resistor 143 satisfy: after the output signal of the first operational amplifier 13 is input to the G pole of the MOSFET array 15, a constant preset current (such as: 4.75 A) can be output from the S pole of the MOSFET array 15.

[0182] Figure 9 FIG. 7 is a schematic structural diagram of a body coil tuning control device provided in the ninth embodiment of the present invention. Compared with the seventh and eighth embodiments, this embodiment adds: a second operational amplifier 16, a third resistor 17, a fourth resistor 18, a third operational amplifier 19, a fifth resistor 20, and a sixth resistor 21, where:

[0183] The non-inverting input end of the second operational amplifier 16 is connected to the output end of the fourth operational amplifier 24 through the third resistor 17, and is grounded through the fourth resistor 18 at the same time;

[0184] The inverting input terminal of the second operational amplifier 16 is connected to the second connection terminal of the first resistor group 12;

[0185] The non-inverting input terminal of the third operational amplifier 19 is connected to the second connection terminal of the first resistor group 12;

[0186] The inverting input terminal of the third operational amplifier 19 is connected to the output terminal of the fourth operational amplifier 24 through the fifth resistor 20 and is grounded through the sixth resistor 21 at the same time;

[0187] The resistance values of the third resistor 17 and the fourth resistor 18 satisfy: the output voltage of the first LDO 11 * the resistance value of the fourth resistor 18 / (the resistance value of the third resistor 17 + the resistance value of the fourth resistor 18) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array 15;

[0188] The resistance values of the fifth resistor 20 and the sixth resistor 21 satisfy: the output voltage of the first LDO 11 * the resistance value of the sixth resistor 21 / (the resistance value of the fifth resistor 20 + the resistance value of the sixth resistor 21) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array 15;

[0189] Wherein, when it is determined according to the output signals of the second operational amplifier 16 and the third operational amplifier 19 that the current input to the body coil is not less than the preset second current threshold and not greater than the preset first current threshold, it is determined that the current input to the body coil is normal; otherwise, it is determined that the current input to the body coil is abnormal; the preset second current threshold is less than the preset first current threshold.

[0190] Figure 10 FIG. 19 is a schematic structural diagram of a body coil tuning control device provided by the tenth embodiment of the present invention. Compared with the seventh, eighth, and ninth embodiments, the following are added: a first logic circuit 28, a second logic circuit 29, and a MOSFET 30, wherein:

[0191] The first logic circuit 28 is connected in series between the output terminal of the first operational amplifier 13 and the G pole of the MOSFET array 15. Among them, the first input terminal of the first logic circuit 28 is connected to the output terminal of the first operational amplifier 13;

[0192] The second input terminal of the first logic circuit 28 is connected to the tuning control module 200;

[0193] The input terminal of the second logic circuit 29 is connected to the tuning control module 200, and the output terminal is connected to the G pole of the MOSFET 30;

[0194] The D pole of the MOSFET 30 is connected to the S pole of the MOSFET array 15, and the S pole of the MOSFET 30 receives a detuning voltage signal;

[0195] When the tuning control module 200 outputs a high level, the first logic circuit 28 outputs the output voltage of the first operational amplifier 13 to the G pole of the MOSFET array 15, and the MOSFET array 15 is turned on. Thus, a constant preset current is output from the S pole of the MOSFET array 15 to the MRI system body coil; at the same time, the second logic circuit 29 is turned off, so that the MOSFET 30 is turned off.

[0196] When the tuning control module 200 outputs a low level, the first logic circuit 28 outputs a low level to the G pole of the MOSFET array 15. At this time, the MOSFET array 15 is cut off, and no current is output from the S pole of the MOSFET array 15; at the same time, the second logic circuit 29 is turned on, so that the MOSFET 30 is turned on, and the detuning voltage signal is output to the MRI system body coil through the MOSFET 30.

[0197] Comparing the seventh to tenth embodiments with the fifth to sixth embodiments, it can be found that the difference is only that:

[0198] In the seventh to tenth embodiments, the inverting input terminal of the first operational amplifier 13 is connected to, and the non-inverting input terminal of the second operational amplifier 16 is connected through the third resistor 17, and the inverting input terminal of the third operational amplifier 19 is connected through the fifth resistor 20 to the output terminal of the fourth operational amplifier 24 (i.e., Figures 7 to 10 U3 in

[0199] In the fifth to sixth embodiments, the inverting input terminal of the first operational amplifier 13 is connected to, and the non-inverting input terminal of the second operational amplifier 16 is connected through the third resistor 17, and the inverting input terminal of the third operational amplifier 19 is connected through the fifth resistor 20 to the first connection terminal of the first resistor group 12 (i.e., Figures 5 to 6 U1 in

[0200] The embodiment of the present invention further provides an MR system, including the body coil tuning control device described in any of the above embodiments.

[0201] The beneficial technical effects of the embodiment of the present invention are as follows:

[0202] 1. Low power consumption

[0203] The voltage of the DC power supply of the MRI system is reduced by a DC-DC converter, and then the voltage is further reduced and stabilized by an LDO. Subsequently, the input signal of the G pole of the MOSFET array is adjusted by an operational amplifier with a negative feedback circuit, so that a constant current signal is output from the S pole of the MOSFET array to the body coil. Since the power consumptions of both the DC-DC converter and the LDO are very low, and the MOSFETs in the MOSFET array are connected in parallel, the power consumption of each MOSFET is also very low. Therefore, the power consumption of the entire body coil tuning control device is very low.

[0204] For example: If the input voltage of the LDO is 5.5V and the output voltage is 4.5V, the voltage drop is 1V. If the current is 4.75A, the power consumption is 4.75W, indicating that the power consumption is very low.

[0205] II. Low cost

[0206] No additional forced air cooling or water cooling device is required, reducing the cost.

[0207] For example: If the MOSFET array 15 includes 12 P-MOSFETs, the maximum overall power consumption of the MOSFET array 15 is 10W, and the power consumption of each P-MOSFET is only about 1.2W, and the highest temperature caused is only about 60°C. No water cooling and forced air cooling are required at room temperature.

[0208] III. No need to use a fuse anymore

[0209] Since the LDO itself has the characteristic of shutting down when the current exceeds the limit, there is no need to use a fuse anymore.

[0210] IV. Faster time response

[0211] The response time of the MOSFET is faster than that of the existing BJT transistor.

[0212] V. Having a current monitoring function, higher reliability and more convenient maintenance

[0213] VI. When the body coil adopts a multi-channel design, the body coil tuning control device provided by the embodiment of the present invention can be respectively used to supply current to each channel, improving the current supply capacity.

[0214] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims

1. A body coil tuning control device, characterized in that, the device includes: a DC-DC converter (100), a first low-dropout linear regulator LDO (11), a first resistor group (12), a first operational amplifier (13), a negative feedback circuit (14), a metal-oxide semiconductor field effect transistor MOSFET array (15), the first resistor group (12) includes one resistor or multiple series resistors, wherein: the input end of the DC-DC converter (100) is connected to the DC power supply of the magnetic resonance MRI system, and the output end is connected to the input end of the first LDO (11), and the DC-DC converter (100) is used to reduce the voltage of the input DC signal to a preset first voltage; the output end of the first LDO (11) is connected to the first connection end of the first resistor group (12), and the output voltage of the first LDO (11) is less than the first voltage; the inverting input end of the first operational amplifier (13) is connected to the first connection end of the first resistor group (12), and the non-inverting input end is connected to the second connection end of the first resistor group (12); the output end of the first operational amplifier (13) is connected to the gate G of the MOSFET array (15); the negative feedback circuit (14) is connected between the output end and the inverting input end of the first operational amplifier (13); the drain D of the MOSFET array (15) is connected to the second connection end of the first resistor group (12), and the source S is connected to the input end of the body coil of the MRI system; wherein, the negative feedback circuit (14) satisfies: after the output signal of the first operational amplifier (13) is input to the G pole of the MOSFET array (15), it can make the S pole of the MOSFET array (15) output a constant preset current; the MOSFETs in the MOSFET array (15) are in parallel, and the number of MOSFETs satisfies: the power of each MOSFET is less than the preset power.

2. The device according to claim 1, characterized in that, the negative feedback circuit (14) includes: a first capacitor (141), a first resistor (142) and a second resistor (143), wherein: the first connection end of the first capacitor (141) is connected to the inverting input end of the first operational amplifier (13), and the second connection end of the first capacitor (141) is connected to the first connection end of the first resistor (142); the second connection end of the first resistor (142) is connected to the output end of the first operational amplifier (13); the second resistor (143) is connected in parallel between the first connection end of the first capacitor (141) and the second connection end of the first resistor (142); the capacitance value of the first capacitor (141), and the resistance values of the first resistor (142) and the second resistor (143) satisfy: after the output signal of the first operational amplifier (13) is input to the G pole of the MOSFET array (15), it can make the S pole of the MOSFET array (15) output a constant preset current.

3. The device according to claim 1, characterized in that, The device further includes: a second operational amplifier (16), a third resistor (17), a fourth resistor (18), a third operational amplifier (19), a fifth resistor (20), and a sixth resistor (21), where: The non-inverting input terminal of the second operational amplifier (16) is connected to the first connection terminal of the first resistor group (12) through the third resistor (17), and is grounded through the fourth resistor (18) at the same time; The inverting input terminal of the second operational amplifier (16) is connected to the second connection terminal of the first resistor group (12); The non-inverting input terminal of the third operational amplifier (19) is connected to the second connection terminal of the first resistor group (12); The inverting input terminal of the third operational amplifier (19) is connected to the first connection terminal of the first resistor group (12) through the fifth resistor (20), and is grounded through the sixth resistor (21) at the same time; The resistance values of the third resistor (17) and the fourth resistor (18) satisfy: the output voltage of the first LDO (11) * the resistance value of the fourth resistor (18) / (the resistance value of the third resistor (17) + the resistance value of the fourth resistor (18)) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array (15); The resistance values of the fifth resistor (20) and the sixth resistor (21) satisfy: the output voltage of the first LDO (11) * the resistance value of the sixth resistor (21) / (the resistance value of the fifth resistor (20) + the resistance value of the sixth resistor (21)) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array (15); Wherein, when it is determined according to the output signals of the second operational amplifier (16) and the third operational amplifier (19) that: the current input to the body coil is not less than the preset second current threshold and not greater than the preset first current threshold, it is determined that the current input to the body coil is normal; otherwise, it is determined that the current input to the body coil is abnormal; the preset second current threshold is less than the preset first current threshold.

4. The device according to claim 1, characterized in that the device further includes: a second LDO (22) and a second resistor group (23), where: The input terminal of the second LDO (22) is connected to the input terminal of the first LDO (11), and the output terminal of the second LDO (22) is connected to the first connection terminal of the second resistor group (23); The second connection terminal of the second resistor group (23) is connected to the second connection terminal of the first resistor group (12); wherein, the second LDO (22) and the first LDO (11) are exactly the same LDO; The structure of the second resistor group (23) is exactly the same as that of the first resistor group (12).

5. The device according to claim 4, characterized in that the first resistor group (12) is composed of two resistors with the same resistance value connected in series, and the resistance value of each resistor is: 0.01 ohm ± 10%.

6. The device according to claim 4, characterized in that the device further includes: a fourth operational amplifier (24), a seventh resistor (25), an eighth resistor (26), and a ninth resistor (27), where: The first connection terminal of the seventh resistor (25) is connected to the output terminal of the first LDO (11), and the second connection terminal of the seventh resistor (25) is connected to the first connection terminal of the eighth resistor (26); The first connection terminal of the eighth resistor (26) is connected to the output terminal of the second LDO (22); The non-inverting input terminal of the fourth operational amplifier (24) is connected to the second connection terminal of the seventh resistor (25); The ninth resistor (27) is connected between the inverting input terminal and the output terminal of the fourth operational amplifier (24); Among them, the resistance values of the seventh resistor (25) and the eighth resistor (26) are equal; When it is detected that the difference between the output voltage of the fourth operational amplifier (24) and the output voltage of the first LDO (11) is within a preset range, it is determined that the outputs of the first LDO (11) and the second LDO (22) are balanced, otherwise, it is determined that the outputs of the first LDO (11) and the second LDO (22) are unbalanced.

7. The device according to claim 6, wherein, The resistance value of the seventh resistor (25) is: 10 kΩ ± 20%.

8. The device according to claim 6 or 7, wherein, The resistance value of the ninth resistor (27) is: not less than 1 kΩ and not greater than 5 kΩ.

9. The device according to claim 1, wherein, The device further includes: a first logic circuit (28), a second logic circuit (29) and a MOSFET (30), wherein: The first logic circuit (28) is connected in series between the output terminal of the first operational amplifier (13) and the G pole of the MOSFET array (15), wherein the first input terminal of the first logic circuit (28) is connected to the output terminal of the first operational amplifier (13); The second input terminal of the first logic circuit (28) is connected to the tuning control module (200); The input terminal of the second logic circuit (29) is connected to the tuning control module (200), and the output terminal is connected to the G pole of the MOSFET (30); The D pole of the MOSFET (30) is connected to the S pole of the MOSFET array (15), and the S pole of the MOSFET (30) receives the detuning voltage signal; When the tuning control module (200) outputs a high level, the first logic circuit (28) outputs the output voltage of the first operational amplifier (13) to the G pole of the MOSFET array (15), and the MOSFET array (15) is turned on, so that a constant preset current is output from the S pole of the MOSFET array (15) to the MRI system body coil; at the same time, the second logic circuit (29) is turned off, so that the MOSFET (30) is turned off; When the tuning control module (200) outputs a low level, the first logic circuit (28) outputs a low level to the G pole of the MOSFET array (15), at this time the MOSFET array (15) is cut off, and no current is output from the S pole of the MOSFET array (15); at the same time, the second logic circuit (29) is turned on, so that the MOSFET (30) is turned on, and the detuning voltage signal is output to the MRI system body coil through the MOSFET (30).

10. A body coil tuning control device, wherein, The device includes: a DC-DC converter (100), a first low-dropout linear regulator (LDO) (11), a first resistor group (12), a first operational amplifier (13), a negative feedback circuit (14), a metal-oxide-semiconductor field-effect transistor (MOSFET) array (15), a second LDO (22), a second resistor group (23), a fourth operational amplifier (24), a seventh resistor (25), an eighth resistor (26), and a ninth resistor (27). The first resistor group (12) includes one resistor or multiple resistors connected in series. The structure of the second resistor group (23) is exactly the same as that of the first resistor group (12). The second LDO (22) is exactly the same LDO as the first LDO (11). The resistance values of the seventh resistor (25) and the eighth resistor (26) are equal. Among them: The input end of the DC-DC converter (100) is connected to the DC power supply of the magnetic resonance imaging (MRI) system, and the output end is connected to the input end of the first LDO (11). The DC-DC converter (100) is used to reduce the voltage of the input DC signal to a preset first voltage. The output end of the first LDO (11) is connected to the first connection end of the first resistor group (12), and the output voltage of the first LDO (11) is less than the first voltage. The input end of the second LDO (22) is connected to the input end of the first LDO (11), and the output end of the second LDO (22) is connected to the first connection end of the second resistor group (23). The second connection end of the second resistor group (23) is connected to the second connection end of the first resistor group (12). The first connection end of the seventh resistor (25) is connected to the output end of the first LDO (11), and the second connection end of the seventh resistor (25) is connected to the first connection end of the eighth resistor (26). The second connection end of the eighth resistor (26) is connected to the output end of the second LDO (22). The non-inverting input end of the fourth operational amplifier (24) is connected to the second connection end of the seventh resistor (25). The ninth resistor (27) is connected between the inverting input end and the output end of the fourth operational amplifier (24). The inverting input end of the first operational amplifier (13) is connected to the output end of the fourth operational amplifier (24), and the non-inverting input end is connected to the second connection end of the first resistor group (12). The output end of the first operational amplifier (13) is connected to the gate (G) of the MOSFET array (15). The negative feedback circuit (14) is connected between the output end and the inverting input end of the first operational amplifier (13). The drain (D) of the MOSFET array (15) is connected to the second connection end of the first resistor group (12), and the source (S) is connected to the input end of the body coil of the MRI system. Among them, the negative feedback circuit (14) satisfies: after the output signal of the first operational amplifier (13) is input to the gate (G) of the MOSFET array (15), it can make the source (S) of the MOSFET array (15) output a constant preset current. The MOSFETs in the MOSFET array (15) are connected in parallel, and the number of MOSFETs satisfies: the power of each MOSFET is less than the preset power.

11. The device according to claim 10, It is characterized in that the negative feedback circuit (14) includes: a first capacitor (141), a first resistor (142) and a second resistor (143), wherein: a first connection end of the first capacitor (141) is connected to an inverting input end of the first operational amplifier (13), and a second connection end of the first capacitor (141) is connected to a first connection end of the first resistor (142); a second connection end of the first resistor (142) is connected to an output end of the first operational amplifier (13); the second resistor (143) is connected in parallel between the first connection end of the first capacitor (141) and the second connection end of the first resistor (142); the capacitance value of the first capacitor (141), and the resistance values of the first resistor (142) and the second resistor (143) satisfy: after the output signal of the first operational amplifier (13) is input to the G pole of the MOSFET array (15), a constant preset current can be output from the S pole of the MOSFET array (15).

12. The device according to claim 10, It is characterized in that the device further includes: a second operational amplifier (16), a third resistor (17), a fourth resistor (18), a third operational amplifier (19), a fifth resistor (20) and a sixth resistor (21), wherein: a non-inverting input end of the second operational amplifier (16) is connected to an output end of the fourth operational amplifier (24) through the third resistor (17), and is grounded through the fourth resistor (18) at the same time; an inverting input end of the second operational amplifier (16) is connected to a second connection end of the first resistor group (12); a non-inverting input end of the third operational amplifier (19) is connected to a second connection end of the first resistor group (12); an inverting input end of the third operational amplifier (19) is connected to an output end of the fourth operational amplifier (24) through the fifth resistor (20), and is grounded through the sixth resistor (21) at the same time; the resistance values of the third resistor (17) and the fourth resistor (18) satisfy: the output voltage of the first LDO (11) * the resistance value of the fourth resistor (18) / (the resistance value of the third resistor (17) + the resistance value of the fourth resistor (18)) = the preset first current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array (15); the resistance values of the fifth resistor (20) and the sixth resistor (21) satisfy: the output voltage of the first LDO (11) * the resistance value of the sixth resistor (21) / (the resistance value of the fifth resistor (20) + the resistance value of the sixth resistor (21)) = the preset second current threshold * the resistance value of the body coil + the voltage difference between the D pole and the S pole of the MOSFET array (15); wherein, when it is determined according to the output signals of the second operational amplifier (16) and the third operational amplifier (19) that: the current input to the body coil is not less than the preset second current threshold and not greater than the preset first current threshold, it is determined that the current input to the body coil is normal; otherwise, it is determined that the current input to the body coil is abnormal; the preset second current threshold is less than the preset first current threshold.

13. The device according to claim 10, It is characterized in that The device further comprises: a first logic circuit (28), a second logic circuit (29) and a MOSFET (30), wherein: The first logic circuit (28) is connected in series between the output terminal of the first operational amplifier (13) and the G pole of the MOSFET array (15), wherein the first input terminal of the first logic circuit (28) is connected to the output terminal of the first operational amplifier (13); The second input terminal of the first logic circuit (28) is connected to the tuning control module (200); The input terminal of the second logic circuit (29) is connected to the tuning control module (200), and the output terminal is connected to the G pole of the MOSFET (30); The D pole of the MOSFET (30) is connected to the S pole of the MOSFET array (15), and the S pole of the MOSFET (30) receives a detuning voltage signal; When the tuning control module (200) outputs a high level, the first logic circuit (28) outputs the output voltage of the first operational amplifier (13) to the G pole of the MOSFET array (15), and the MOSFET array (15) is turned on, so that a constant preset current is output from the S pole of the MOSFET array (15) to the MRI system body coil; at the same time, the second logic circuit (29) is turned off, so that the MOSFET (30) is turned off; When the tuning control module (200) outputs a low level, the first logic circuit (28) outputs a low level to the G pole of the MOSFET array (15), at this time the MOSFET array (15) is cut off, and no current is output from the S pole of the MOSFET array (15); at the same time, the second logic circuit (29) is turned on, so that the MOSFET (30) is turned on, and the detuning voltage signal is output to the MRI system body coil through the MOSFET (30).

14. A magnetic resonance system, characterized in that it comprises a body coil tuning control device as described in any one of claims 1 to 13.

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