FPCB and Method for Manufacturing the Same

By embedding a pattern fuse with a double helix structure in the pattern circuit layer of the FPCB, using the through polymer conduction method, the problem of the need to install a fuse during the manufacturing process of the existing FPCB has increased the total volume and increased cost, and the effect of reducing the total volume and saving costs is achieved.

CN115486208BActive Publication Date: 2025-05-30LG ENERGY SOLUTION LTD
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Patent Information

Application Number
CN202180030496.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-07-28
Filing Date
2021-07-14
Publication Date
2025-05-30
Estimated Expiration
2041-07-14

AI Technical Summary

Technical Problem

Existing FPCBs require fuses during manufacturing, resulting in an increase in overall volume and an increase in cost.

Method used

A pattern fuse with a double helix structure is embedded in the pattern circuit layer of the FPCB, and the installation process is avoided by a through polymer conduction method.

Benefits of technology

Reduces the total volume of the FPCB, saves costs, while maintaining the function of the fuse.

✦ Generated by Eureka AI based on patent content.

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Abstract

In an FPCB including a patterned circuit layer according to an embodiment of the present invention for achieving the above object, a patterned fuse is embedded in the patterned circuit layer, and the patterned fuse includes: a first wire made of metal and having a spiral structure; and a second wire made of metal and having a spiral structure, wherein the first wire and the second wire have a double spiral structure.
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Description

Technical Field

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of priority of Korean Patent Application No. 10 - 2020 - 0094041, filed on Jul. 28, 2020, the entire contents of which are incorporated herein by reference.

[0003] The present invention relates to a flexible printed circuit board (FPCB) and a method for manufacturing the FPCB. More specifically, the present invention relates to an FPCB and a method for manufacturing the FPCB, in which a fuse does not need to be mounted on the FPCB, thereby reducing the overall volume and saving costs. Background Art

[0004] Printed circuit boards (PCBs) are widely used in various electronic products, such as TVs, computers, mobile phones, displays, communication networks, and semiconductor modules. As a type of such PCBs, particularly flexible printed circuit boards (FPCBs) have recently been widely used.

[0005] Generally, an FPCB is manufactured by laminating a copper foil on a polyimide film to form a copper - clad laminate, laminating a dry film on the copper - clad laminate to form a conductor pattern through exposure, development, and etching processes, and then attaching a cover layer on the outermost copper foil. By utilizing the flexibility of the raw materials, the FPCB is mounted inside a complex product housing in a bent state or used at a repeatedly moving part. Due to the nature of the FPCB, the FPCB is used in various ways in miniaturization (digital cameras, camcorders, etc.), flexibility (printer heads, hard disks, etc.), high - density wire harnesses (precision instruments, such as medical devices), and assembly rationalization (measuring instruments, in - vehicle electronic devices, battery modules, etc.).

[0006] The FPCB is formed by etching or the like, so it does not occupy a large volume and does not often cause problems such as disconnection due to external shock. However, after the FPCB is completely manufactured, components such as fuses are separately mounted on the FPCB through a mounting process. Therefore, there is a problem that the overall volume of the FPCB increases and the cost also increases.

[0007] [Prior Art Documents]

[0008] (Patent Document 1) Korean Patent Publication No. 1845714 Summary of the Invention

[0009] Technical Problem

[0010] To solve the above problems, an object of the present invention is to provide an FPCB and a method for manufacturing the FPCB, in which a fuse does not need to be installed on the FPCB, thereby reducing the overall volume and saving costs.

[0011] The problems to be solved by the present invention are not limited to the above problems, and according to the following description, other problems not mentioned may be obvious to those skilled in the art.

[0012] Technical solution

[0013] In an FPCB according to an embodiment of the present invention for achieving the above object and including a patterned circuit layer, a patterned fuse is embedded in the patterned circuit layer, and the patterned fuse includes: a first wire made of metal and having a spiral structure; and a second wire made of metal and having a spiral structure, wherein the first wire and the second wire have a double spiral structure.

[0014] In addition, the first wire may include: a first lower wire formed on the bottom surface of the patterned circuit layer; a first upper wire formed on the top surface of the patterned circuit layer; and a first conduction wire configured to connect the first lower wire and the first upper wire to each other, and the second wire may include: a second lower wire formed on the bottom surface of the patterned circuit layer; a second upper wire formed on the top surface of the patterned circuit layer; and a second conduction wire configured to connect the second lower wire and the second upper wire to each other.

[0015] In addition, the first wire and the second wire may have a quadrilateral shape and a double spiral structure.

[0016] In addition, each of the first lower wire, the second lower wire, the first upper wire, and the second upper wire may be formed to have a straight shape.

[0017] In addition, each of the first conduction wire and the second conduction wire may be formed to have a straight shape in the thickness direction on the patterned circuit layer.

[0018] In addition, each of the first wire and the second wire may have a starting terminal and an ending terminal, and the starting terminal and the ending terminal are only exposed on one of the top surface or the bottom surface of the patterned circuit layer.

[0019] In addition, the starting terminal of the first wire and the starting terminal of the second wire may be separately formed, and the ending terminal of the first wire and the ending terminal of the second wire may also be separately formed.

[0020] In addition, the starting terminals of the first wire and the second wire can be formed to be connected to each other, and the ending terminals of the first wire and the second wire can be formed to be connected to each other.

[0021] In addition, each of the first wire and the second wire can have a starting terminal connected to a power bus bar and an ending terminal connected to a sensing bus bar.

[0022] In addition, the ending terminal of the first wire can be connected to a first sensing bus bar, and the ending terminal of the second wire can be connected to a second sensing bus bar.

[0023] In addition, the metal can include at least one of silver, copper, gold, or aluminum.

[0024] In addition, a cover layer can also be laminated on the top surface of the patterned circuit layer.

[0025] A method for manufacturing an FPCB according to an embodiment of the present invention for achieving the above object includes: forming a first lower wire and a second lower wire on the top surface of a base film; exposing both ends of the first lower wire and the second lower wire, and laminating micro-columns on the top surface of the base film; forming a first conducting wire and a second conducting wire on both ends of the first lower wire and the second lower wire respectively; injecting a filler into the free space on the top surface of the base film that is not filled with micro-columns; and forming a first upper wire connecting the first conducting wires to each other and a second upper wire connecting the second conducting wires to each other on the top surfaces of the micro-columns.

[0026] In addition, in the formation of the first lower wire and the second lower wire, the first lower wire and the second lower wire can be formed parallel to the first direction.

[0027] In addition, in the formation of the first upper wire and the second upper wire, the first upper wire and the second upper wire can be formed parallel to the second direction.

[0028] In addition, the first direction and the second direction can be different directions from each other.

[0029] In addition, in the formation of the first lower wire and the second lower wire, the first lower wire and the second lower wire can be formed on the top surface of the base film by at least one of an etching method or a printing method.

[0030] In addition, in the formation of the first upper wire and the second upper wire, the first upper wire and the second upper wire can be formed on the top surface of the micro-columns by at least one of an etching method or a printing method.

[0031] In addition, after forming the first upper wire and the second upper wire, the first wire including the first lower wire, the first conduction wire, and the first upper wire and the second wire including the second lower wire, the second conduction wire, and the second upper wire may each have a starting terminal formed at a starting portion and an ending terminal formed at an ending portion.

[0032] In addition, the first wire and the second wire may have starting terminals and ending terminals that are exposed only on one of the top surface or the bottom surface of the patterned circuit layer.

[0033] Other specific details of the present invention are included in the detailed description and the drawings.

[0034] Advantageous Effects

[0035] According to an embodiment of the present invention, there are at least the following effects.

[0036] Since the patterned fuse having a double helix structure is formed on the FPCB using the Through Polymer Via (TPV) method instead of a mounting method or the like, the overall volume of the FPCB can be reduced and costs can be saved.

[0037] The effects according to the present invention are not limited to the content illustrated above, and various other effects are included herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 FIG. 1 is a perspective view of an FPCB 1 in which a patterned fuse 100 is embedded according to an embodiment of the present invention.

[0039] Figure 2 FIG. 2 is a flowchart showing a method for manufacturing an FPCB 1 in which a patterned fuse 100 is embedded according to an embodiment of the present invention.

[0040] Figure 3 FIG. 3 is a schematic side view showing a state in which a first lower wire 1011 and a second lower wire 1021 are formed on a base film 11 according to an embodiment of the present invention.

[0041] Figure 4 FIG. 4 is a schematic top view showing a state in which a first lower wire 1011 and a second lower wire 1021 are formed on a base film 11 according to an embodiment of the present invention.

[0042] Figure 5 FIG. 5 is a schematic side view showing a state in which micro pillars 103 are formed on a base film 11 according to an embodiment of the present invention.

[0043] Figure 6is a schematic top view showing a state in which the micro pillars 103 are formed on the base film 11 according to an embodiment of the present invention.

[0044] Figure 7 is a schematic side view showing a state in which the first conductive wire 1012 and the second conductive wire 1022 are formed on the base film 11 according to an embodiment of the present invention.

[0045] Figure 8 is a schematic side view showing a state in which the filler 104 is injected into the base film 11 according to an embodiment of the present invention.

[0046] Figure 9 is a schematic top view showing a state in which the filler 104 is injected into the base film 11 according to an embodiment of the present invention.

[0047] Figure 10 is a schematic top view showing a state in which the first upper wire 1013 and the second upper wire 1023 are formed according to an embodiment of the present invention.

[0048] Figure 11 is a perspective view showing a state in which the starting terminals 1014 and 1024 and the ending terminals 1015 and 1025 are formed on the first wire 101 and the second wire 102 according to an embodiment of the present invention.

[0049] Figure 12 is a schematic view showing a state in which the bus bars 21 and 22 are connected to the pattern fuse 100 according to an embodiment of the present invention.

[0050] Figure 13 is a perspective view showing a state in which the starting terminals 105 and 106 and the ending terminals 106 are formed on the first wire 101 and the second wire 102 according to another embodiment of the present invention.

[0051] Figure 14 is a schematic view showing a state in which the bus bars 21a and 22a are connected to the pattern fuse 100a according to another embodiment of the present invention. DETAILED DESCRIPTION

[0052] Advantages and features of the inventive concept and methods of realizing them can be more easily understood by referring to the following detailed description of exemplary embodiments and the accompanying drawings. However, the inventive concept may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art to which the inventive concept pertains. The inventive concept will be defined only by the appended claims. Throughout the specification, the same reference numerals refer to the same elements.

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein will be used in the sense commonly understood by those of ordinary skill in the art to which this inventive concept pertains. In addition, terms defined in commonly used dictionaries will not be ideally or excessively interpreted unless explicitly defined.

[0054] The terms used herein are for the purpose of describing embodiments and are not intended to limit the present invention. In this disclosure, unless the context clearly indicates otherwise, the singular forms include the plural forms. As used herein, the terms "comprising" and / or "including" are intended to include the recited elements and do not preclude the possibility of the presence or addition of one or more other elements.

[0055] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0056] Figure 1 is a perspective view of the FPCB 1 in which the patterned fuse 100 is embedded according to an embodiment of the present invention.

[0057] According to an embodiment of the present invention, since the patterned fuse 100 having a double - helix structure is formed on the FPCB 1 using the through - polymer vias (TPV) method rather than an installation method or the like, the overall volume of the FPCB 1 can be reduced and costs can be saved.

[0058] To this end, in the FPCB 1 including the patterned circuit layer 10 according to an embodiment of the present invention, the patterned fuse 100 is embedded in the patterned circuit layer 10, and the patterned fuse 100 includes: a first wire 101 made of metal and formed in a spiral shape; and a second wire 102 made of metal and formed in a spiral shape. The first wire 101 and the second wire 102 have a double - helix structure.

[0059] As Figure 1 shown, the patterned fuse 100 according to an embodiment of the present invention includes a first wire 101 and a second wire 102. The first wire 101 is made of metal and is embedded in the patterned circuit layer 10 of the FPCB 1. In addition, the second wire 102 is also made of metal and is embedded in the patterned circuit layer 10 of the FPCB 1. Both the first wire 101 and the second wire 102 have a spiral structure, particularly a double - helix structure.

[0060] Specifically, the first wire 101 includes a first lower wire 1011, a first upper wire 1013, and a first conductive wire 1012. The first lower wire 1011 is formed to have a straight shape on the bottom surface of the patterned circuit layer 10, and the first upper wire 1013 is formed to have a straight shape on the top surface of the patterned circuit layer 10. In addition, the first conductive wire 1012 connects the first lower wire 1011 and the first upper wire 1013 to each other and is formed to have a straight shape in the thickness direction on the patterned circuit layer 10. As described above, since the first lower wire 1011, the first upper wire 1013, and the first conductive wire 1012 all have straight shapes, the first wire 101 can have a quadrilateral shape. In addition, since the first lower wire 1011, the first conductive wire 1012, and the first upper wire 1013 are sequentially connected and repeatedly formed, the first wire 101 can have a spiral structure.

[0061] In the same manner, the second wire 102 includes a second lower wire 1021, a second upper wire 1023, and a second conductive wire 1022. The second lower wire 1021 is formed to have a straight shape on the bottom surface of the patterned circuit layer 10, and the second upper wire 1023 is formed to have a straight shape on the top surface of the patterned circuit layer 10. In addition, the second conductive wire 1022 connects the second lower wire 1021 and the second upper wire 1023 to each other and is formed to have a straight shape in the thickness direction on the patterned circuit layer 10. As described above, since the second lower wire 1021, the second upper wire 1023, and the second conductive wire 1022 all have straight shapes, the second wire 102 can have a quadrilateral shape. In addition, since the second lower wire 1021, the second conductive wire 1022, and the second upper wire 1023 are sequentially connected and repeatedly formed, the second wire 102 can have a spiral structure.

[0062] The first wire 101 and the second wire 102 are not formed separately, but are spirally formed in a state of overlapping each other, that is, having a double spiral structure. In addition, the metal used to form the first wire 101 and the second wire 102 may include at least one of silver, copper, gold, or aluminum having high conductivity. In particular, copper, which is easy to form, inexpensive, and economical, may be preferably included.

[0063] Figure 2 is a flowchart showing a method for manufacturing an FPCB 1 in which a patterned fuse 100 is embedded according to an embodiment of the present invention.

[0064] The method for manufacturing the FPCB 1 according to an embodiment of the present invention includes: a process of forming a first lower wire 1011 and a second lower wire 1021 on the top surface of a base film 11; a process of exposing both ends of the first lower wire 1011 and the second lower wire 1021 and laminating micro pillars 103 on the top surface of the base film 11; a process of forming a first conduction wire 1012 and a second conduction wire 1022 on both ends of the first lower wire 1011 and the second lower wire 1021, respectively; a process of injecting a filler 104 into the free space on the top surface of the base film 11 that is not filled with the micro pillars 103; and a process of forming a first upper wire 1013 that connects the first conduction wires 1012 to each other and a second upper wire 1023 that connects the second conduction wires 1022 to each other on the top surface of the micro pillars 103.

[0065] Hereinafter, reference will be made to Figures 3 to 10 for a detailed description of each step shown in the Figure 2 flowchart.

[0066] Figure 3 is a schematic side view showing a state in which a first lower wire 1011 and a second lower wire 1021 are formed on a base film 11 according to an embodiment of the present invention, and Figure 4 is a schematic top view showing a state in which a first lower wire 1011 and a second lower wire 1021 are formed on a base film 11 according to an embodiment of the present invention.

[0067] First, a base film 11 is prepared, and as Figure 3 shown, a first lower wire 1011 and a second lower wire 1021 are formed on the top surface of the base film 11 (S201). The base film 11 may be a film containing silicon. In addition, the first lower wire 1011 and the second lower wire 1021 may be formed on the top surface of the base film 11 by at least one of an etching method or a printing method.

[0068] Both the first lower wire 1011 and the second lower wire 1021 are provided in a plurality and may be formed parallel to a first direction. In addition, as Figure 4 shown, the first direction may have a predetermined inclination with respect to the base film 11, for example. In addition, the first lower wire 1011 and the second lower wire 1021 may be formed alternately with each other. Thus, subsequently, the first wire 101 and the second wire 102 may have a double helix structure.

[0069] Figure 5 is a schematic side view showing a state in which micro pillars 103 are formed on a base film 11 according to an embodiment of the present invention, and Figure 6 is a schematic top view showing a state in which micro pillars 103 are formed on a base film 11 according to an embodiment of the present invention.

[0070] When forming the first lower conductor 1011 and the second lower conductor 1021, as Figure 5 shown, both ends of the first lower conductor 1011 and the second lower conductor 1021 are exposed, and the micro pillars 103 are laminated on the top surface of the base film 11 (S202). At this time, as Figure 6 shown, the micro pillars 103 are provided in plurality and may be formed parallel to a second direction different from the first direction. In addition, subsequently, the first upper conductor 1013 and the second upper conductor 1023 are formed along the micro pillars 103. Accordingly, the ends of different first lower conductors 1011 may be respectively provided on both ends of one micro pillar 103, or the ends of different second lower conductors 1021 may be respectively provided on both ends of one micro pillar 103.

[0071] To laminate the micro pillars 103, a thick photoresist may be first laminated and then the thick photoresist may be patterned. The micro pillars 103 may be an epoxy-based SU-8 negative photoresist which is crosslinked by ultraviolet rays and the remaining portion thereof is cleaned to facilitate patterning.

[0072] Meanwhile, although not shown in the drawings, after laminating the micro pillars 103, a separate seed layer may be formed to activate the micro pillars 103. To form the seed layer, a physical vapor deposition (PVD) method may be used, or an atomic layer deposition (ALD) method may be used. In addition, the seed layer may include titanium nitride (TiN) having conductivity, good adhesion to metals, and a low processing temperature.

[0073] Figure 7 is a schematic side view showing a state in which the first conduction conductor 1012 and the second conduction conductor 1022 are formed on the base film 11 according to an embodiment of the present invention.

[0074] After laminating the micro pillars 103, the first conduction conductor 1012 and the second conduction conductor 1022 may be respectively formed at both ends of the first lower conductor 1011 and the second lower conductor 1021 (S203). As described above, the ends of different first lower conductors 1011 may be respectively provided on both ends of the micro pillars 103, or the ends of different second lower conductors 1021 may be respectively provided on both ends of the micro pillars 103. Accordingly, when forming the first conduction conductor 1012 and the second conduction conductor 1022, as Figure 7 shown, the first conduction conductor 1012 and the second conduction conductor 1022 may be formed along the side walls at both ends of the micro pillars 103.

[0075] To form the first conduction conductor 1012 and the second conduction conductor 1022, the micro pillars 103 may be electroless plated with a metal such as copper. In addition, to prevent metal corrosion, electrolytic plating may be additionally performed with a metal having a low ionization tendency.

[0076] Each of the first conductive wire 1012 and the second conductive wire 1022 is also made of metal, and when the first upper wire 1013 and the second upper wire 1023 are subsequently formed, the first conductive wire 1012 and the second conductive wire 1022 connect the lower wires 1011 and 1021 to the upper wires 1013 and 1023 respectively, thereby serving as through electrodes configured to electrically connect the bottom surface and the top surface of the patterned circuit layer 10 to each other.

[0077] Figure 8 is a schematic side view showing a state in which the filler 104 is injected into the base film 11 according to an embodiment of the present invention, and Figure 9 is a schematic top view showing a state in which the filler 104 is injected into the base film 11 according to an embodiment of the present invention.

[0078] As Figure 8 and Figure 9 shown, on the top surface of the base film 11, the filler 104 is injected into the free space not filled with the micro pillars 103 (S204). The filler 104 may be an epoxy molding compound (EMC) having electrical insulation properties. Thus, the micro pillars 103 can be encapsulated inside the insulator.

[0079] Figure 10 is a schematic top view showing a state in which the first upper wire 1013 and the second upper wire 1023 are formed according to an embodiment of the present invention.

[0080] On the top surface of the micro pillars 103, a first upper wire 1013 that connects the first conductive wires 1012 to each other and a second upper wire 1023 that connects the second conductive wires 1022 to each other are formed (S205). In addition, the first upper wire 1013 and the second upper wire 1023 can be formed on the top surface of the micro pillars 103 by at least one of an etching method or a printing method.

[0081] Both the first upper wire 1013 and the second upper wire 1023 are formed along the micro pillars 103. That is, the first upper wire 1013 can be formed on the top surface of the micro pillars 103 on which the first conductive wires 1012 are formed while connecting the first conductive wires 1012 to each other, and the second upper wire 1023 can be formed on the top surface of the micro pillars 103 on which the second conductive wires 1022 are formed while connecting the second conductive wires 1022 to each other. At this time, the first upper wire 1013 and the second upper wire 1023 can be formed wider than the first conductive wire 1012 and the second conductive wire 1022 to be connected to the first conductive wire 1012 and the second conductive wire 1022 respectively.

[0082] As described above, the ends of different first lower conductors 1011 can be respectively disposed at both ends of a micro-pillar 103, or the ends of different second lower conductors 1021 can be respectively disposed at both ends of a micro-pillar 103. Therefore, the first upper conductor 1013 is connected to each of the different first lower conductors 1011 through the first conductive wire 1012, and the second upper conductor 1023 is connected to each of the different second lower conductors 1021 through the second conductive wire 1012, so that the first wire 101 and the second wire 102 can be spirally formed.

[0083] Both the first upper conductor 1013 and the second upper conductor 1023 are provided in plurality and are both formed along the micro-pillar 103, and thus can be formed parallel to the second direction. Preferably, the second direction is a direction different from the first direction. For example, as Figure 10 shown, the second direction can have a predetermined inclination with respect to the first direction. In addition, the first upper conductor 1013 and the second upper conductor 1023 can be alternately formed with each other. Therefore, in the pattern circuit layer 10 of the FPCB 1, a pattern fuse 100 including the first wire 101 and the second wire 102 having a double spiral structure can be formed in an embedded manner. In addition, after the pattern fuse 100 is formed, the base film 11 can be removed.

[0084] Meanwhile, although not shown in the drawings, in order to protect the circuit pattern of the FPCB 1, a cover layer can be laminated on the top surface of the micro-pillar 103. The cover layer can be a film of a polyimide-based material.

[0085] Figure 11 is a perspective view showing a state in which the starting terminals 1014 and 1024 and the ending terminals 1015 and 1025 are formed on the first wire 101 and the second wire 102 according to an embodiment of the present invention.

[0086] After the first upper conductor 1013 and the second upper conductor 1023 are formed, starting terminals 1014 and 1024 are formed at the starting portions of the first wire 101 and the second wire 102, and ending terminals 1015 and 1025 are formed at the ending portions of the first wire 101 and the second wire 102. At this time, the starting terminals 1014 and 1024 and the ending terminals 1015 and 1025 of the first wire 101 and the second wire 102 are only exposed on one of the top surface or the bottom surface of the pattern circuit layer 10.

[0087] In addition, according to an embodiment of the present invention, the first wire 101 and the second wire 102 have starting terminals 1014 and 1024 and ending terminals 1015 and 1025 that are separately formed. That is, as Figure 11As shown, at the starting portion of the first wire 101, a first starting terminal 1014 is formed, and at the starting portion of the second wire 102, a second starting terminal 1024 is separately formed. Further, at the ending portion of the first wire 101, a first ending terminal 1015 is formed, and at the ending portion of the second wire 102, a second ending terminal 1025 is separately formed.

[0088] Figure 12 is a schematic diagram showing a state in which bus bars 21 and 22 are connected to a pattern fuse 100 according to an embodiment of the present invention.

[0089] If at least one of the first starting terminal 1014, the second starting terminal 1024, the first ending terminal 1015, or the second ending terminal 1025 is exposed on the other surface of the pattern circuit layer 10 to be connected to the bus bars 21 and 22, the upper surface and the bottom surface of the FPCB 1 should be bent to be inverted with respect to each other. Then, a process of bending the FPCB 1 should be further added, and there is also a problem that the durability of the bent portion is reduced, resulting in a shortened lifespan.

[0090] As Figure 12 shown, the first starting terminal 1014 of the first wire 101 and the second starting terminal 1024 of the second wire 102 are connected to a power bus bar 21. However, according to an embodiment of the present invention, both the first starting terminal 1014 and the second starting terminal 1024 are exposed on the same surface of the pattern circuit layer 10, such that when connected to the power bus bar 21, the top surface and the bottom surface of the FPCB 1 do not need to be bent to be inverted with respect to each other.

[0091] Further, the first ending terminal 1015 of the first wire 101 and the second ending terminal 1025 of the second wire 102 are respectively connected to different sensing bus bars 221 and 222. However, both the first ending terminal 1015 and the second ending terminal 1025 are exposed on the same surface of the pattern circuit layer 10, such that when connected to the sensing bus bar 22, the top surface and the bottom surface of the FPCB 1 do not need to be bent to be inverted with respect to each other.

[0092] Figure 13 is a perspective view showing a state in which starting terminals 105 and ending terminals 106 are formed on the first wire 101 and the second wire 102 according to another embodiment of the present invention.

[0093] According to another embodiment of the present invention, the first wire 101 and the second wire 102 have starting terminals 105 and ending terminals 106 that are respectively formed to be connected to each other. That is, as Figure 13As shown, a first starting terminal formed in a starting portion of a first wire 101 and a second starting terminal formed in a starting portion of a second wire 102 are formed to be connected to each other. In addition, a first ending terminal formed in an ending portion of the first wire 101 and a second ending terminal formed in an ending portion of the second wire 102 are formed to be connected to each other. In particular, as Figure 13 shown, the first starting terminal and the second starting terminal may be integrally formed into a single starting terminal 105, and the first ending terminal and the second ending terminal may be integrally formed into a single ending terminal 106. However, the present invention is not limited thereto. The first starting terminal and the second starting terminal, and the first ending terminal and the second ending terminal may be separately formed and then joined to each other through separate joining portions (not shown), or may be connected to each other by welding or an adhesive. In addition, the starting terminal 105 and the ending terminal 106 of the first wire 101 and the second wire 102 are only exposed on one of the top surface or the bottom surface of the patterned circuit layer 10.

[0094] Figure 14 FIG. is a schematic diagram showing a state in which bus bars 21a and 22a are connected to a patterned fuse 100a according to another embodiment of the present invention.

[0095] As Figure 14 shown, the starting terminals 105 of the first wire 101 and the second wire 102 are formed to be connected to each other and are thus connected to a power bus bar 21a. However, the first starting terminal and the second starting terminal are both exposed on the same surface of the patterned circuit layer 10 and then connected to each other, such that when connected to the power bus bar 21a, the top surface and the bottom surface of the FPCB 1a do not need to be bent to be inverted with respect to each other.

[0096] In addition, the ending terminals 106 of the first wire 101 and the second wire 102 are also formed to be connected to each other and are thus connected to a sensing bus bar 22a. However, the first ending terminal and the second ending terminal are both exposed on the same surface of the patterned circuit layer 10, such that when connected to the sensing bus bar 22a, the top surface and the bottom surface of the FPCB 1a do not need to be bent to be inverted with respect to each other.

[0097] Those of ordinary skill in the art to which the present invention pertains will understand that the present invention may be implemented in other specific forms without changing its technical spirit or essential features. Therefore, it should be understood that the embodiments described above are illustrative in all aspects and not restrictive. The scope of the present invention is represented by the appended claims rather than by the above detailed description, and various embodiments derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included within the scope of the present invention.

[0098] [Description of Reference Numerals or Symbols]

[0099] 1: FPCB

[0100] 10: Pattern circuit layer 11: Base film

[0101] 21: Power bus 22: Sensing bus

[0102] 100: Pattern fuse 101: First conductor

[0103] 102: Second wire 103: Microcolumn

[0104] 104: Filler 1011: First lower conductor

[0105] 1012: first conductive wire 1013: first upper wire

[0106] 1014: first start terminal 1015: first end terminal

[0107] 1021: second lower conductor 1022: second conducting conductor

[0108] 1023: second upper conductor 1024: second starting terminal

[0109] 1025: Second end terminal

Claims

1. An FPCB, the FPCB comprising a patterned circuit layer, wherein, a patterned fuse is embedded in the patterned circuit layer, and the patterned fuse comprises: a first wire, the first wire being made of metal and having a spiral structure; and a second wire, the second wire being made of metal and having a spiral structure, wherein the first wire and the second wire have a double - spiral structure.

2. The FPCB according to claim 1, wherein, the first wire comprises: a first lower wire, the first lower wire being formed on the bottom surface of the patterned circuit layer; a first upper wire, the first upper wire being formed on the top surface of the patterned circuit layer; and a first conducting wire, the first conducting wire being configured to connect the first lower wire and the first upper wire to each other, and the second wire comprises: a second lower wire, the second lower wire being formed on the bottom surface of the patterned circuit layer; a second upper wire, the second upper wire being formed on the top surface of the patterned circuit layer; and a second conducting wire, the second conducting wire being configured to connect the second lower wire and the second upper wire to each other.

3. The FPCB according to claim 2, wherein, the first wire and the second wire have a quadrilateral shape and a double - spiral structure.

4. The FPCB according to claim 3, wherein, each of the first lower wire, the second lower wire, the first upper wire and the second upper wire is formed to have a straight shape.

5. The FPCB according to claim 3, wherein, each of the first conducting wire and the second conducting wire is formed to have a straight shape in the thickness direction on the patterned circuit layer.

6. The FPCB according to claim 1, wherein, each of the first wire and the second wire has a starting terminal and an ending terminal, and the starting terminal and the ending terminal are only exposed on one of the top surface or the bottom surface of the patterned circuit layer.

7. The FPCB according to claim 6, wherein, the starting terminal of the first wire and the starting terminal of the second wire are formed separately, and the ending terminal of the first wire and the ending terminal of the second wire are also formed separately.

8. The FPCB according to claim 6, wherein, the starting terminal of the first wire and the starting terminal of the second wire are formed to be connected to each other, and the ending terminal of the first wire and the ending terminal of the second wire are formed to be connected to each other.

9. The FPCB according to claim 6, wherein, each of the first wire and the second wire has the starting terminal connected to a power bus bar and the ending terminal connected to a sensing bus bar.

10. The FPCB according to claim 9, wherein, the ending terminal of the first wire is connected to a first sensing bus bar, and the ending terminal of the second wire is connected to a second sensing bus bar.

11. The FPCB according to claim 1, wherein, the metal includes at least one of silver, copper, gold, or aluminum.

12. The FPCB according to claim 1, wherein, a cover layer is further laminated on the top surface of the patterned circuit layer.

13. A method for manufacturing an FPCB, the method comprising: forming a first lower wire and a second lower wire on the top surface of a base film; exposing both ends of the first lower wire and the second lower wire, and laminating micro-columns on the top surface of the base film; forming a first conductive wire and a second conductive wire on both ends of the first lower wire and the second lower wire respectively; injecting a filler into the free space on the top surface of the base film that is not filled with the micro-columns; and forming a first upper wire connecting the first conductive wires to each other and a second upper wire connecting the second conductive wires to each other on the top surface of the micro-columns.

14. The method according to claim 13, wherein, in the formation of the first lower wire and the second lower wire, the first lower wire and the second lower wire are formed parallel to a first direction.

15. The method according to claim 14, wherein, in the formation of the first upper wire and the second upper wire, the first upper wire and the second upper wire are formed parallel to a second direction.

16. The method according to claim 15, wherein, the first direction and the second direction are different directions from each other.

17. The method according to claim 13, wherein, in the formation of the first lower wire and the second lower wire, the first lower wire and the second lower wire are formed on the top surface of the base film by at least one of an etching or printing method.

18. The method according to claim 13, wherein, in the formation of the first upper wire and the second upper wire, the first upper wire and the second upper wire are formed on the top surface of the micro-columns by at least one of an etching or printing method.

19. The method according to claim 13, wherein, after forming the first upper wire and the second upper wire, a first wire including the first lower wire, the first conductive wire, and the first upper wire and a second wire including the second lower wire, the second conductive wire, and the second upper wire both have a starting terminal formed at the starting portion and an ending terminal formed at the ending portion.

20. The method according to claim 19, wherein, the first wire and the second wire have the starting terminal and the ending terminal exposed only on one of the top surface or the bottom surface of the patterned circuit layer.

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