Packaged device, packaged module, and electronic device
By employing insulating and thermally conductive layers with different thermal conductivity in power semiconductor devices, the problems of insufficient heat dissipation and high cost in existing technologies are solved, achieving efficient heat dissipation and low-cost packaged device design.
Patent Information
- Application Number
- CN202211131844.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-16
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2042-09-16
AI Technical Summary
In existing power semiconductor devices, the low thermal conductivity of Al2O3 ceramic insulating layers limits the heat dissipation capacity of the devices and cannot meet the requirements of high power density. Furthermore, high thermal conductivity materials such as AlN or Si3N4 are expensive, increasing the overall cost of the devices.
By employing a first insulating layer and a second insulating layer with different thermal conductivity, and configuring insulating layers of different materials for electronic components with different power or power density, combined with a thermally conductive layer and thermally conductive components, flexible layout and electrical connection can be achieved, simplifying the etching process and reducing costs.
This improves the heat dissipation capability of the packaged device, reduces the overall cost, and enhances the reliability and heat dissipation efficiency of the device.
Smart Images

Figure CN115513191B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor device technology, and more particularly to a packaging device, a packaging module using the packaging device, and an electronic device using the packaging device or the packaging module. Background Technology
[0002] To meet the ever-increasing power demands, power semiconductor devices, especially power supply semiconductor devices, are evolving towards being thinner, smaller, and having higher power density. As a result, the heat dissipation requirements for power semiconductor devices are becoming increasingly stringent.
[0003] The direct bonded copper (DBC) substrate in existing power semiconductor devices consists of an upper copper foil, a lower copper foil, and a ceramic insulating layer located between the upper and lower copper foils. Currently, the most commonly used ceramic insulating layer material is Al2O3. Although Al2O3 is inexpensive and has a mature process, it has a low thermal conductivity (only 24 W / mK). The heat dissipation capacity of power semiconductor devices using Al2O3 ceramic insulating layers is limited. With the shrinking size and increasing power density of power semiconductor devices, DBC made of Al2O3 with relatively low thermal conductivity has become one of the bottlenecks limiting the improvement of the heat dissipation capacity of power semiconductor devices. Summary of the Invention
[0004] In view of this, in order to solve at least one of the above defects, it is necessary to propose a packaged device with high heat dissipation capability and low cost in the embodiments of this application.
[0005] Furthermore, embodiments of this application also propose a packaging module using the packaging device and an electronic device using the packaging device or the packaging module.
[0006] The first aspect of this application provides a packaging device, the packaging device including a first circuit board and a second circuit board, the first circuit board including a first circuit layer and a first insulating layer stacked in sequence, and at least one first electronic component disposed on the first circuit board; the second circuit board including a second circuit layer and a second insulating layer stacked in sequence, and at least one second electronic component disposed on the second circuit board, wherein the thermal conductivity of the first insulating layer is higher than the thermal conductivity of the second insulating layer.
[0007] By strategically configuring first and second insulating layers with different thermal conductivity, a first insulating layer with higher thermal conductivity can be configured on a first circuit board with higher power or power density, while a second insulating layer with lower thermal conductivity can be configured on a second circuit board with lower power or power density. The flexible layout of the first and second circuit boards can maximize the heat dissipation capacity of the packaged device while reducing the overall cost of the packaged device.
[0008] In conjunction with the first aspect, in some embodiments, the second circuit layer is electrically connected to the first circuit layer via a conductor; or, the first circuit layer is electrically connected to the second circuit layer via an electrical connection layer, wherein the first circuit layer, the second circuit layer, and the electrical connection layer are an integral structure.
[0009] The first circuit layer and the second circuit layer can be electrically connected through different electrical connection methods, thereby achieving electrical connection between the first circuit board and the second circuit board. The first and second circuit layers can be electrically connected via wires (e.g., metal bonding wires), a simple connection method that is also flexible and convenient for easy electrical connection operations, facilitating flexible layout of the first and second circuit boards. Alternatively, the first and second circuit layers can be formed into an integral structure via an electrical connection layer. The first circuit layer, the second circuit layer, and the electrical connection layer can be formed in one step (e.g., by etching the same metal layer), eliminating the need for separate etching processes. This simplifies the process complexity and difficulty of etching the first and second circuit layers and eliminates the need for bonding wires, improving the reliability of the packaged device.
[0010] In conjunction with the first aspect, in some embodiments, the first insulating layer and the second insulating layer are in contact with each other.
[0011] When laying out the first circuit board and the second circuit board, the first insulating layer and the second insulating layer can be in contact with each other to achieve lateral heat conduction between the first circuit board and the second circuit board, which can further improve the heat dissipation capacity.
[0012] In conjunction with the first aspect, in some embodiments, the first insulating layer and the second insulating layer are an integral structure.
[0013] By forming the first insulating layer and the second insulating layer into an integral structure, the flatness and rigidity of the integral first insulating layer and the second insulating layer can be improved, which facilitates the etching of the first circuit and the second circuit. At the same time, during the subsequent assembly of the heat dissipation device, the integral first insulating layer and the second insulating layer can effectively reduce the risk of gaps forming between the heat dissipation device and the first circuit board and the second circuit board, thereby improving the heat dissipation efficiency.
[0014] In conjunction with the first aspect, in some embodiments, the second circuit board further includes a circuit board body and at least one opening through the circuit board body, wherein at least one of the first circuit boards is disposed in each opening.
[0015] Although the thermal conductivity of the second insulating layer is low, its price is also low. By treating the second circuit substrate as a whole and forming an opening on it, the first circuit substrate with higher thermal conductivity is embedded within the opening, which helps to improve the heat dissipation capacity of the packaged device while reducing its cost. Moreover, since the second circuit substrate is a whole, the second circuit layer can complete the formation of different areas of the circuit in one etching process, simplifying the etching process, and different areas can be electrically connected without the need for bonding wires. In addition, the second circuit substrate, as a whole, has high flatness and rigidity, which can effectively reduce the risk of gaps forming between the heat dissipation device and the first and second circuit substrates during subsequent assembly with the heat dissipation device, thereby improving the heat dissipation efficiency of the packaged device.
[0016] In conjunction with the first aspect, in some embodiments, the material of the first insulating layer includes AlN or Si3N4, and the material of the second insulating layer includes Al2O3.
[0017] AlN or Si3N4 have high thermal conductivity but are expensive, while Al2O3 has low thermal conductivity but is inexpensive. Combining these two types of materials and configuring the first and second insulating layers of the above materials in a targeted manner according to the power or power density of the first and second circuit boards can significantly improve the heat dissipation capability of the packaged device while greatly reducing the cost.
[0018] In conjunction with the first aspect, in some embodiments, the first circuit board further includes a first thermally conductive layer located on the surface of the first insulating layer opposite to the first circuit layer, and the second circuit board further includes a second thermally conductive layer located on the surface of the second insulating layer opposite to the second circuit layer.
[0019] By adding a first thermally conductive layer and a second thermally conductive layer, it is beneficial to remove heat from the first circuit board and the second circuit board, thereby further improving the heat dissipation efficiency of the packaged device.
[0020] In conjunction with the first aspect, in some embodiments, the surface of the first thermally conductive layer facing away from the first insulating layer is coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, and the first thermally conductive layer and the second thermally conductive layer are an integral structure.
[0021] When assembling the first circuit board and the second circuit board, the surface of the first thermally conductive layer away from the first insulating layer and the surface of the second thermally conductive layer away from the second insulating layer can be made coplanar. In this case, by making the first thermally conductive layer and the second thermally conductive layer into an integral structure, the flatness of the connection interface between the packaged device and the heat dissipation device can be increased when connecting it to the heat dissipation device in the future, and the risk of gaps forming at the connection interface can be reduced, so as to further improve the heat dissipation efficiency.
[0022] In conjunction with the first aspect, in some embodiments, the surface of the first thermally conductive layer facing away from the first insulating layer and the surface of the second thermally conductive layer facing away from the second insulating layer are not coplanar, and the first thermally conductive layer and the second thermally conductive layer are disposed opposite to each other.
[0023] When assembling the first circuit board and the second circuit board, the surface of the first thermal conductive layer away from the first insulating layer and the surface of the second thermal conductive layer away from the second insulating layer can be made non-coplanar (for example, the first circuit board and the second circuit board can be stacked or staggered). This allows for a flexible layout of the first circuit board and the second circuit board. In this case, by setting the first thermal conductive layer and the second thermal conductive layer opposite to each other, it is convenient for the packaged device to achieve the purpose of double-sided heat dissipation.
[0024] In conjunction with the first aspect, in some embodiments, the packaging device further includes a package body that encapsulates the first circuit board and the second circuit board, wherein the surface of the first thermally conductive layer facing away from the first insulating layer and the surface of the second thermally conductive layer facing away from the second insulating layer are both exposed by the package body.
[0025] By adding a package, the first circuit board and the second circuit board can be protected.
[0026] In conjunction with the first aspect, in some embodiments, the surface of the first thermally conductive layer opposite to the first insulating layer is provided with a first thermally conductive component, and the surface of the second thermally conductive layer opposite to the second insulating layer is provided with a second thermally conductive component.
[0027] By adding a first heat-conducting component and a second heat-conducting component, it is easier to assemble and connect the subsequent packaged device with the heat dissipation device, and at the same time, the heat dissipation effect can be improved.
[0028] In conjunction with the first aspect, in some embodiments, when the surface of the first thermally conductive layer facing away from the first insulating layer is coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, the first thermally conductive component and the second thermally conductive component are an integral structure.
[0029] By making the first and second heat-conducting components an integrated structure, the flatness of the connection interface between the first and second heat-conducting components and the heat dissipation device can be improved, reducing the risk of gaps appearing at the connection interface and further improving the heat dissipation efficiency of the packaged device.
[0030] A second aspect of this application provides a packaging module, which includes the packaging device described in the first aspect of this application and at least one heat dissipation device, wherein the at least one heat dissipation device is located on the side of the first insulating layer away from the first circuit layer and / or on the side of the second insulating layer away from the second circuit layer.
[0031] By adding heat dissipation devices to the surface of the packaged device, the heat dissipation efficiency of the packaged device can be further improved. By flexibly arranging the first circuit board and the second circuit board, when the surface of the first thermally conductive layer facing away from the first insulating layer is coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, only one heat dissipation device can be installed to achieve single-sided heat dissipation of the packaged device, which also helps to reduce the overall thickness of the packaged module; when the surface of the first thermally conductive layer facing away from the first insulating layer is not coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, at least two heat dissipation devices can be installed on the packaged device to achieve double-sided heat dissipation of the packaged device and improve the heat dissipation efficiency of the packaged module.
[0032] A third aspect of this application provides an electronic device, the electronic device including a housing and a packaging device as described in the first aspect of this application or a packaging module as described in the second aspect of this application located within the housing.
[0033] By using the packaging device described in the first aspect of the present application or the packaging module described in the second aspect of the present application, the heat dissipation capacity of electronic devices can be improved, while reducing the cost of electronic devices. Attached Figure Description
[0034] Figure 1 This is a schematic diagram of the structure of a packaging device according to an embodiment of this application.
[0035] Figure 2 This is a top view of a packaged device according to an embodiment of this application, showing the first electronic component and the second electronic component connected in parallel.
[0036] Figure 3 This is a top view of a packaged device according to an embodiment of this application, showing the first electronic component and the second electronic component connected in series.
[0037] Figure 4 yes Figure 3 A schematic diagram of the circuit topology in which the first electronic component and the second electronic component are connected in series in the packaged device.
[0038] Figure 5 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0039] Figure 6 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0040] Figure 7 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0041] Figure 8 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0042] Figure 9This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0043] Figure 10 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0044] Figure 11 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0045] Figure 12 yes Figure 11 A cross-sectional view of the packaged device along XII-XII.
[0046] Figure 13 This is a schematic diagram of the structure of a packaging device according to another embodiment of this application.
[0047] Figure 14 This is a schematic diagram of the structure of a packaging module according to an embodiment of this application.
[0048] Figure 15 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application.
[0049] Explanation of main component symbols
[0050] Packaged devices 100, 200, 300, 400, 500, 600, 700
[0051] First circuit board 1, 1a, 1b, 1c, 1e
[0052] First line layer 11, 11a
[0053] First insulating layer 12
[0054] First thermal conductive layer 13, 13a
[0055] Second circuit board 2, 2a, 2b, 2c, 2d, 2e
[0056] Second line layer 21, 21a, 21d
[0057] Second insulating layer 22, 22d
[0058] Second thermal conductive layer 23, 23a, 23d
[0059] Circuit board body 24
[0060] Opening 25
[0061] First Electronic Components 3
[0062] Second electronic component 4
[0063] Package 5
[0064] First heat-conducting component 6
[0065] Second heat-conducting component 7
[0066] Wire 8
[0067] Electrical connection layer 9
[0068] Adhesive layer 10
[0069] Casing 20
[0070] 1000 Packaging Modules
[0071] Heat dissipation device 1100
[0072] Electronic equipment 2000
[0073] Casing 2100 Detailed Implementation
[0074] The embodiments of this application are described below with reference to the accompanying drawings. Unless otherwise specified, the data ranges involved in the embodiments of this application should include end values. Furthermore, in the accompanying drawings of this application… Figure 8 , 9 The dashed lines in 10, 12 and 13 are only used to distinguish different structural components and are not part of the structural components in the diagram.
[0075] The direct copper-clad substrate (DBC) in typical power semiconductor devices has low thermal conductivity in its insulating layer, resulting in poor heat dissipation for high-power electronic components. This low heat dissipation efficiency can easily lead to damage to electronic components and cannot meet the heat dissipation requirements of high-power-density power semiconductor devices.
[0076] To improve the heat dissipation capability of power semiconductor devices, the applicant attempted to fabricate power semiconductor devices using AlN DBC substrates or Si3N4 Active Metal Brazing (AMB) substrates. Although the heat dissipation capability was improved, the cost of AlN and Si3N4 ceramic substrates was high, which significantly increased the overall cost of power semiconductor devices.
[0077] In view of this, please refer to Figure 1 As shown, in order to improve the heat dissipation efficiency of power semiconductor devices and reduce the overall cost of power semiconductor devices, this application provides a packaged device 100. The packaged device 100 may be, but is not limited to, a power semiconductor device used for power processing, including frequency conversion, voltage conversion, current conversion, power management, etc.
[0078] like Figure 1As shown, the packaging device 100 includes a first circuit board 1 and a second circuit board 2. The first circuit board 1 includes a first circuit layer 11 and a first insulating layer 12 stacked in sequence, and at least one first electronic component 3 is disposed on the first circuit board 1. The second circuit board 2 includes a second circuit layer 21 and a second insulating layer 22 stacked in sequence, and at least one second electronic component 4 is disposed on the second circuit board 2. The thermal conductivity of the first insulating layer 12 is higher than that of the second insulating layer 22.
[0079] The first electronic component 3 is located on and electrically connected to the first circuit layer 11, and the second electronic component 4 is located on and electrically connected to the second circuit layer 21. It is understood that the first electronic component 3 may not be electrically connected to the first circuit layer 11, and the second electronic component 4 may not be electrically connected to the second circuit layer 21. The power or power density of the first electronic component 3 is greater than that of the second electronic component 4. During operation, both the first electronic component 3 and the second electronic component 4 generate heat, but the amount of heat generated will differ due to their different power or power density. Therefore, there may be a problem of locally large amounts of heat in the packaged device 100. In some embodiments, the power of the first electronic component 3 is greater than that of the second electronic component 4, resulting in a greater heat dissipation load on the first circuit board 1 compared to the second circuit board 2. Since the second circuit board 2 does not require such a large heat dissipation load, this embodiment uses a first insulating layer 12 with higher thermal conductivity and a second insulating layer 22 with relatively lower thermal conductivity to improve the heat dissipation capacity of the first circuit board 1, thereby achieving the optimal heat dissipation effect of the packaged device 100 and minimizing the overall cost of the packaged device 100. It is understood that in other embodiments, when the power density of the first electronic component 3 disposed on the first circuit board 1 is high, there may also be a problem of excessive heat. Therefore, a first insulating layer 12 with higher thermal conductivity can also be used to improve the heat dissipation capacity of the first circuit board 1. Furthermore, different thermal conductivity first insulating layers 12 and second insulating layers 22 can be configured for different types of electronic components, such as wide bandgap devices (SiC wafers and GaN wafers) and Si-based wafers. By configuring a first insulating layer 12 with high thermal conductivity for wide bandgap devices, these devices can operate at higher junction temperatures, but simultaneously require smaller wafer sizes for the same current rating. This means wide bandgap devices have higher power densities and demand greater heat dissipation capabilities. The high thermal conductivity of the first circuit substrate 1 reduces the thermal resistance of the wide bandgap device. Furthermore, compared to traditional low thermal conductivity circuit substrates, using a high thermal conductivity first circuit substrate 1 reduces the required wafer area for the same thermal resistance, thus lowering the cost of the wide bandgap device in the package 100. Additionally, using a second insulating layer 22 with lower thermal conductivity and lower cost for ordinary Si-based wafers further reduces the cost of the package 100 while ensuring overall heat dissipation capabilities.
[0080] Both the first insulating layer 12 and the second insulating layer 22 serve both insulating and thermally conductive functions. The difference lies in that the first insulating layer 12 has a higher thermal conductivity than the second insulating layer 22, resulting in greater heat dissipation capacity. Specifically, both the first insulating layer 12 and the second insulating layer 22 are made of insulating and thermally conductive materials, such as insulating ceramics or highly thermally conductive insulating resins, but are not limited to these. In some embodiments, both the first insulating layer 12 and the second insulating layer 22 can be insulating ceramic substrates. The material of the first insulating layer 12 can be AlN or Si3N4, and the material of the second insulating layer 22 can be Al2O3, but is not limited thereto. The first insulating layer 12, made of AlN or Si3N4, has high thermal conductivity (170 W / mK and 90 W / mK, respectively), but its cost is also relatively high (at least five times the cost of Al2O3). Conversely, the second insulating layer 22, made of Al2O3, has relatively low thermal conductivity (24 W / mK), but its cost is lower. Therefore, according to the heat dissipation distribution within the packaged device 100, this embodiment of the application optimizes the distribution of the first electronic component 3 and the second electronic component 4 within the packaged device 100, and configures the first insulating layer 12 and the second insulating layer 22 with different thermal conductivity, thereby improving the heat dissipation capacity of the first circuit board 1, reducing the heat of the high-power first electronic component 3, and ensuring the normal heat dissipation of the low-power second electronic component 4, so as to achieve the best heat dissipation effect of the packaged device 100 while reducing the overall cost of the packaged device 100.
[0081] Both the first circuit layer 11 and the second circuit layer 21 can be metal circuit layers, and the materials of the first circuit layer 11 and the second circuit layer 21 include, but are not limited to, copper or copper alloys.
[0082] like Figure 1 As shown, the first circuit board 1 further includes a first thermally conductive layer 13 located on the surface of the first insulating layer 12 facing away from the first circuit layer 11, and the second circuit board 2 further includes a second thermally conductive layer 23 located on the surface of the second insulating layer 22 facing away from the second circuit layer 21. The first thermally conductive layer 13 and the second thermally conductive layer 23 can be metallic thermally conductive layers, specifically including but not limited to copper or copper alloys. It is understood that the first thermally conductive layer 13 and the second thermally conductive layer 23 can also be other thermally conductive materials, such as highly thermally conductive resins.
[0083] In some embodiments, the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 is coplanar with the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22. This can improve the flatness of the connection interface when the packaged device 100 is connected to the heat dissipation device, reduce the risk of gaps appearing at the connection interface due to the separate arrangement of the first circuit board 1 and the second circuit board 2, and further improve the heat dissipation effect of the packaged device 100.
[0084] In some embodiments, both the first circuit board 1 and the second circuit board 2 can be formed by circuit fabrication, such as DBC boards or AMB boards. Circuit boards made of DBC or AMB-type ceramic substrates not only have higher thermal conductivity and stronger bonding strength, but also have a low coefficient of thermal expansion (especially the coefficient of thermal expansion of AMB boards is almost close to that of silicon), making them suitable for high-voltage operation without partial discharge. It is understood that the thickness of the first thermally conductive layer 13 and the second thermally conductive layer 23 can be relatively thick to facilitate subsequent connection with heat dissipation devices and achieve a more ideal heat conduction effect. In some embodiments, the first circuit board 1 is made of a high thermal conductivity ceramic material, such as an AlN-type DBC board or a Si3N4-type AMB board, in areas where the first electronic component 3 has high heat dissipation, thereby improving the heat dissipation capacity of the first circuit board 1, reducing the thermal resistance of the first electronic component 3, and meeting the heat dissipation requirements; while in other areas with lower heat dissipation, a lower-cost Al2O3-type DBC board is used to improve the heat dissipation capacity of the packaged device 100 while reducing costs.
[0085] Understandably, the packaged device 100 can also be in other modular package forms. For example, it is also applicable to replace the DBC board or AMB board with other insulating and thermally conductive materials. That is, the materials of the first insulating layer 12 and the second insulating layer 22 are selected from other insulating and thermally conductive materials (such as high thermal conductivity insulating resin) for the packaged device. Such packaged devices include, but are not limited to, packaged technology based on IP multimedia subsystem (IMS) technology, single tube packaged technology with built-in DBC, or intelligent power module (IPM) packaged technology.
[0086] In some embodiments, the first insulating layer 12 and the second insulating layer 22 are isolated, that is, a certain gap is formed between the first insulating layer 12 and the second insulating layer 22, and they do not contact each other. In this case, the first circuit board 1 and the second circuit board 2 can be separated, such as... Figure 1As shown, this design increases the flexibility of the layout of the first circuit board 1 and the second circuit board 2. It also allows for the use of appropriately sized first insulating layers 12 and 22 based on the number and area of the first electronic components 3 and 4 in different areas. This spacing between the first insulating layers 12 and 22 ensures heat dissipation while minimizing the size of the first circuit board 1 and the second circuit board 2, further reducing costs and the size of the packaged device 100. It is understood that in other embodiments, the first insulating layer 12 and the second insulating layer 22 can be in contact, but the first circuit layer 11 and the second circuit layer 21 are electrically isolated. This allows for lateral heat conduction between the first circuit board 1 and the second circuit board 2, facilitating the lateral transfer of heat from high-heat-dissipation areas to low-heat-dissipation areas, thereby further improving the overall heat dissipation efficiency of the packaged device 100.
[0087] It is understandable that the first circuit board 1 and the second circuit board 2 may or may not be electrically connected. For the convenience of electrical lead-out of the packaged device 100, the first circuit board 1 and the second circuit board 2 are electrically connected. It is also understandable that the number of first circuit boards 1 and second circuit boards 2 can be one or multiple. Multiple first circuit boards 1 can be electrically connected to each other, and multiple second circuit boards 2 can also be electrically connected to each other. By strategically configuring the first insulating layer 12 and the second insulating layer 22 with different thermal conductivity for electronic components of different power or regions with different power densities, the layout flexibility of the first circuit board 1 and the second circuit board 2 can be improved.
[0088] Please refer to it again. Figure 1 and Figure 2 Both the first electronic component 3 and the second electronic component 4 may include one or more active devices, such as active chips, including but not limited to power chips, digital chips, and radio frequency chips. In some embodiments, both the first electronic component 3 and the second electronic component 4 may include power chips such as insulated-gate bipolar transistors (IGBTs), silicon carbide (SiC), and gallium nitride (GaN). It is understood that both the first electronic component 3 and the second electronic component 4 may also include one or more passive devices, including but not limited to resistors, capacitors, inductors, filters, and couplers. The back surfaces (i.e., non-active surfaces) of the first electronic component 3 and the second electronic component 4 can be respectively mounted on the first circuit layer 11 and the second circuit layer 21 by a mounting method, specifically by soldering onto the surfaces of the first circuit layer 11 and the second circuit layer 21. It is understood that the first electronic component 3 and the second electronic component 4 can also be mounted onto the surfaces of the first circuit layer 11 and the second circuit layer 21 by sintering.
[0089] Please see Figure 2 and Figure 3 The first electronic component 3 and the second electronic component 4 can be connected in series and / or in parallel. According to different electrical connection forms, connection lines are set between the first circuit board 1, the second circuit board 2, the first electronic component 3 and the second electronic component 4.
[0090] like Figure 2 As shown, in the packaged device 100, when the first electronic component 3 and the second electronic component 4 need to be connected in parallel, the first circuit layer 11 and the second circuit layer 21 need to be electrically connected. A common example is the parallel connection of an Insulated Gate Bipolar Transistor (IGBT) and a diode. Here, the IGBT chip, as the first electronic component 3, is a high-heat-dissipation device, and the diode, as the second electronic component 4, is a low-heat-dissipation device. The corresponding layout and connection method is as follows: Figure 2 As shown, the high heat dissipation IGBT chip is laid on the first circuit substrate 1 (i.e., the high thermal conductivity DBC board), and the low heat dissipation diode chip is laid on the second circuit substrate 2 (i.e., the Al2O3 type DBC board). Due to the parallel connection between the two, a transverse bridging wire 8 (usually an aluminum or copper bonding wire) is needed between the two types of first circuit substrate 1 and second circuit substrate 2 to electrically connect the first circuit layer 11 and the second circuit layer 21. This connection method is simple, and the wire 8 is flexible, making the electrical connection operation convenient and facilitating the flexible layout of the first circuit substrate 1 and the second circuit substrate 2.
[0091] In the packaged device 100, when the first electronic component 3 and the second electronic component 4 need to be connected in series, taking the common Type I three-level neutral point clamped (NPC) circuit as an example, the circuit diagram is as follows. Figure 4 As shown, for the NPC topology, the heat dissipation distribution of different chips is not the same. For scenarios requiring bidirectional power transmission capability, the high heat dissipation or main heat dissipation bottleneck device (i.e., the first electronic component 3) is the external transistor Q1 / Q4 and its anti-parallel diodes D1 / D4. Figure 3 The diagram shown is a schematic of the module layout for this NPC topology. For the scenario where the first electronic component 3 with high heat dissipation and the second electronic component 4 with low heat dissipation are connected in series, no additional bridging bonding wire is needed between the first circuit board 1 and the second circuit board 2.
[0092] Please refer to it again. Figure 1The packaged device 100 further includes a package body 5 that encapsulates the first circuit board 1 and the second circuit board 2. The surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22 are both exposed by the package body 5. It is understood that the package body 5 also encapsulates the first electronic component 3 and the second electronic component 4. By adding the package body 5, the internal first circuit board 1, second circuit board 2, first electronic component 3, and second electronic component 4 can be protected, especially reducing the impact of mechanical stress, chemical contamination, and light source radiation on the first electronic component 3 and the second electronic component 4. The package body 5 is made of an insulating and thermally conductive encapsulation material, typically including an insulating and thermally conductive resin. The insulating and thermally conductive resin can be selected from resins such as ABF resin, epoxy resin, polyphenylene oxyethylene (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). It is understood that other insulating and thermally conductive materials with properties such as high thermal conductivity, good dielectric properties, low coefficient of thermal expansion, high strength, high hardness, and non-toxicity can also be used for encapsulation of the packaging device 100 provided in this application embodiment.
[0093] like Figure 5 As shown, the encapsulation device 100 may further include a first thermally conductive component 6 and a second thermally conductive component 7, wherein the first thermally conductive component 6 is located on the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12, and the second thermally conductive component 7 is located on the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22. By increasing the thickness of the first thermally conductive component 6 and the second thermally conductive component 7, which are relatively thicker than the first thermally conductive layer 13 and the second thermally conductive layer 23, it is easier to assemble and connect the encapsulation device 100 with the heat dissipation device, and the flatness of the connection interface between the encapsulation device 100 and the heat dissipation device can be improved, reducing the risk of gaps at the connection interface, and further improving the heat dissipation efficiency of the encapsulation device 100. In some embodiments, such as Figure 5 As shown, when the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 is coplanar with the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22, the first thermally conductive component 6 and the second thermally conductive component 7 are an integral structure. Specifically, the first thermally conductive component 6 and the second thermally conductive component 7 are the same thermally conductive layer (e.g., a metal layer). Setting the first thermally conductive component 6 and the second thermally conductive component 7 as an integral structure can improve the flatness of the interface between the first thermally conductive component 6 and the second thermally conductive component 7 and the heat dissipation device, and further improve the heat dissipation efficiency of the packaged device 100.
[0094] like Figure 1As shown, the encapsulation device 100 may further include a housing 20, wherein the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22 are exposed by the housing 20 to facilitate subsequent assembly with a heat dissipation device. The housing 20 may be made of a thermally conductive material, specifically a metal (e.g., copper, aluminum), plastic with added thermally conductive filler, glass, or ceramic, wherein the thermally conductive filler may be graphene particles, metal particles, metal oxide particles, etc. The housing 20 can protect the internal structure of the encapsulation device 100 and improve the encapsulation device 100's resistance to environmental factors.
[0095] The packaging device 100 provided in this application embodiment, by selectively configuring a first insulating layer 12 and a second insulating layer 22 with different thermal conductivity, can configure a first circuit board 1 with a higher power or power density and a first insulating layer 12 with a higher thermal conductivity, and configure a second circuit board 2 with a lower power or power density and a second insulating layer 22 with a lower thermal conductivity but also a lower cost. The first circuit board 1 and the second circuit board 2 are set separately, which increases the flexibility of the layout of the first circuit board 1 and the second circuit board 2, can maximize the heat dissipation capacity of the packaging device 100, and at the same time reduce the overall cost of the packaging device 100. In addition, the first circuit board 1 and the second circuit board 2 are prepared and processed separately, and the thickness of the two can be different. Therefore, the configuration and assembly of the first circuit board 1 and the second circuit board 2 are more flexible.
[0096] Please see Figure 6 Another embodiment of this application provides a packaging device 200, which differs from the packaging device 100 in the preceding embodiment in that the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22 in the packaging device 200 are not coplanar, that is, the first circuit board 1 and the second circuit board 2 can be staggered or stacked.
[0097] In some embodiments, the first circuit board 1 and the second circuit board 2 are stacked along the thickness direction of the package device 200, wherein the surface of the first thermally conductive layer 13 facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 facing away from the second insulating layer 22 are opposite to each other (i.e., they are arranged opposite to each other). At this time, heat dissipation devices can be connected to the opposite surfaces of the first thermally conductive layer 13 and the second thermally conductive layer 23 respectively to achieve the purpose of double-sided heat dissipation of the package device 200.
[0098] In other embodiments, such as Figure 7As shown, the surfaces of the first thermally conductive layer 13 and the second thermally conductive layer 23 that are opposite to each other are respectively provided with a first thermally conductive component 6 and a second thermally conductive component 7, wherein the first thermally conductive component 6 and the second thermally conductive component 7 are two independent components, which facilitates the subsequent connection and assembly of the packaged device 200 with the heat dissipation device.
[0099] Compared with the previous embodiments, the packaging device 200 in this embodiment, by mounting the first circuit board 1 and the second circuit board 2 on different planes, can ensure optimal heat dissipation and lowest cost while improving the utilization rate of the internal space of the packaging device 200, thus reducing its size. Furthermore, it can achieve double-sided heat dissipation, further improving the heat dissipation efficiency of the packaging device 200.
[0100] Please see Figure 8 Another embodiment of this application provides a packaging device 300, which differs from the packaging device 100 in the following ways: the packaging device 300 includes a first circuit board 1a and a second circuit board 2a, which are integrally formed. The first circuit board 1a includes a first circuit layer 11a, a first insulating layer 12, and a first thermally conductive layer 13a stacked sequentially. The second circuit board 2a includes a second circuit layer 21a, a second insulating layer 22, and a second thermally conductive layer 23a stacked sequentially. An electrical connection layer 9 is provided between the first circuit layer 11a and the second circuit layer 21a, and the first circuit layer 11a, the second circuit layer 21a, and the electrical connection layer 9 are integrally formed. The first thermally conductive layer 13a and the second thermally conductive layer 23a are also integrally formed.
[0101] In some embodiments, the first circuit layer 11a, the second circuit layer 21a, and the electrical connection layer 9 are formed by etching the same metal layer.
[0102] In some embodiments, the first thermally conductive layer 13a and the second thermally conductive layer 23a are the same thermally conductive layer, for example, the first thermally conductive layer 13a and the second thermally conductive layer 23a may be composed of the same metal layer.
[0103] Compared with the previous embodiments, the packaging device 300 of this embodiment facilitates the assembly of the packaging device 300 by setting the first circuit substrate 1a and the second circuit substrate 2a as an integral structure; by setting the first circuit layer 11a and the second circuit layer 21a as an integral structure, they can be formed by the same metal layer in a single etching process, without the need for separate etching, which simplifies the etching process of the first circuit layer 11a and the second circuit layer 21a; in addition, when the first circuit layer 11a and the second circuit layer 21a need to be electrically connected, the electrical connection layer 9 between the first circuit layer 11a and the second circuit layer 21a can be retained during the etching process, without the need to weld wires between the first circuit layer 11a and the second circuit layer 21a, which improves the reliability of the packaging device 300.
[0104] Please see Figure 9 Another embodiment of this application provides a packaging device 400, which differs from the packaging device 300 in the preceding embodiments in that: the packaging device 400 includes a first circuit board 1b and a second circuit board 2b, which are integrally formed. The first circuit board 1b includes a first circuit layer 11a, a first insulating layer 12, and a first thermally conductive layer 13 stacked sequentially, and the second circuit board 2b includes a second circuit layer 21a, a second insulating layer 22, and a second thermally conductive layer 23 stacked sequentially. An electrical connection layer 9 is provided between the first circuit layer 11a and the second circuit layer 21a, and the first circuit layer 11a, the second circuit layer 21a, and the electrical connection layer 9 are integrally formed.
[0105] In some embodiments, the first circuit layer 11a, the second circuit layer 21a, and the electrical connection layer 9 are formed by etching the same metal layer.
[0106] In some embodiments, if the thickness of the first circuit substrate 1b and the second circuit substrate 2b is required to be the same, and the thickness of the first insulating layer 12 and the second insulating layer 22 is not the same, the thickness of the first thermally conductive layer 13 and the second thermally conductive layer 23 can be adjusted to make the thickness of the first circuit substrate 1b and the second circuit substrate 2b the same.
[0107] Compared with the previous embodiments, when the thicknesses of the first insulating layer 12 and the second insulating layer 22 are inconsistent, the packaging device 400 of this embodiment can be designed as an integral part of the first circuit layer 11a and the second circuit layer 21a, and the first thermal conductive layer 13 and the second thermal conductive layer 23 can be set independently, so that the first circuit substrate 1b and the second circuit substrate 2b form an integral structure. At this time, the first circuit layer 11a and the second circuit layer 21a are etched in one step, which simplifies the complexity of the etching process. Moreover, the integral design of the first circuit layer 11a and the second circuit layer 21a facilitates the assembly of the packaging device 500.
[0108] Please see Figure 10Another embodiment of this application provides a packaging device 500, which differs from the packaging device 300 in the preceding embodiments in that: the packaging device 500 includes a first circuit board 1c and a second circuit board 2c, which are integrally formed. The first circuit board 1c includes a first circuit layer 11, a first insulating layer 12, and a first thermally conductive layer 13a stacked sequentially, and the second circuit board 2c includes a second circuit layer 21, a second insulating layer 22, and a second thermally conductive layer 23a stacked sequentially. The first thermally conductive layer 13a and the second thermally conductive layer 23a are integrally formed.
[0109] In some embodiments, the first thermally conductive layer 13a and the second thermally conductive layer 23a are the same thermally conductive layer, for example, the first thermally conductive layer 13a and the second thermally conductive layer 23a may be composed of the same metal layer.
[0110] In some embodiments, if the thickness of the first circuit substrate 1c and the second circuit substrate 2c needs to be the same, and the thickness of the first insulating layer 12 and the second insulating layer 22 is not the same, the thickness of the first circuit substrate 1c and the second circuit substrate 2c can be adjusted to make the thickness of the first circuit substrate 1c and the second circuit substrate 2c the same.
[0111] Compared with the previous embodiments, in this embodiment, when the thicknesses of the first insulating layer 12 and the second insulating layer 22 are inconsistent, the packaging device 500 can be designed with the first thermally conductive layer 13a and the second thermally conductive layer 23a as an integral design, and the first circuit layer 11 and the second circuit layer 21 can be set independently, so that the first circuit board 1c and the second circuit board 2c form an integral structure, which facilitates the assembly of the packaging device 500. In addition, the first thermally conductive layer 13a and the second thermally conductive layer 23a are an integral structure, which can improve the flatness of the connection interface when the packaging device 500 is subsequently assembled with the heat dissipation device, thereby reducing the risk of gaps appearing at the connection interface and further improving the heat dissipation efficiency of the packaging device 500.
[0112] Please see Figure 11 and Figure 12 Another embodiment of this application provides a packaging device 600, which differs from the packaging device 100 in the preceding embodiment in that: the packaging device 600 includes a first circuit board 1 and a second circuit board 2d. The second circuit board 2d includes a second circuit layer 21d, a second insulating layer 22d and a second thermally conductive layer 23d stacked sequentially. The second circuit board 2d also includes a circuit board body 24 and at least one opening 25 penetrating the circuit board body 24. The second electronic component 4 is located on the circuit board body 24, and at least one first circuit board 1 is provided in each opening 25.
[0113] In some embodiments, an opening 25 may be formed on the circuit board body 24 by means of mechanical opening or laser opening.
[0114] Compared with the previous embodiments, in this embodiment, although the thermal conductivity of the second insulating layer 22 in the packaged device 600 is lower, its price is also lower. By treating the second circuit substrate 2d as a whole and forming an opening 25 on the second circuit substrate 2d, the first circuit substrate 1 with higher thermal conductivity is embedded in the opening 25, which helps to improve the heat dissipation capacity of the packaged device 600 while reducing the cost of the packaged device 600. Moreover, since the second circuit substrate 2d is treated as a whole, the second circuit layer 21d can complete the forming of different areas of the circuit in one etching, which simplifies the etching process. Different areas of the second circuit layer 21d do not need to be soldered with wires, which improves the reliability of the packaged device 600. In addition, since the second circuit substrate 2d is treated as a whole, its flatness and rigidity are both high. When the packaged device 600 is assembled with the heat dissipation device in the future, it can also effectively reduce the risk of gaps forming between the heat dissipation device and the first circuit substrate 1 and the second circuit substrate 2d, further improving the heat dissipation efficiency of the packaged device 600.
[0115] Please see Figure 13 Another embodiment of this application provides a packaging device 700, which differs from the packaging device 300 in the preceding embodiment in that: the packaging device 700 includes a first circuit board 1e and a second circuit board 2e, the first circuit board 1e and the second circuit board 2e are an integral structure, wherein the first circuit board 1e includes a first circuit layer 11a, a first insulating layer 12 and a first thermally conductive layer 13a stacked in sequence, and the second circuit board 2e includes a second circuit layer 21a, a second insulating layer 22 and a second thermally conductive layer 23a stacked in sequence, wherein the first insulating layer 12 and the second insulating layer 22 are connected together by an adhesive layer 10 to form an integral structure.
[0116] Compared with the aforementioned embodiments, the packaging device 700 of this embodiment further integrates the first insulating layer 12 and the second insulating layer 22 into a single structure, which facilitates the assembly of the first circuit substrate 1e and the second circuit substrate 2e, and facilitates the one-time etching of the first line layer 11a and the second line layer 21a. Moreover, it can further improve the flatness of the integrated first thermal conductive layer 13a and the second thermal conductive layer 23a, reduce the risk of gaps appearing at the connection interface when the packaging device 700 is subsequently connected to the heat dissipation device, and improve the heat dissipation efficiency of the packaging device 700.
[0117] Please see Figure 14 Combined with reference Figures 1 to 13One embodiment of this application provides a packaging module 1000, which includes the aforementioned packaging devices 100 (200, 200, 300, 400, 500, 600, 700) and at least one heat dissipation device 1100. The at least one heat dissipation device 1100 is located on the side of the first thermally conductive layer 13 (13a) away from the first insulating layer 12 and / or on the side of the second thermally conductive layer 23 (23a, 23d) away from the second insulating layer 22 (22d).
[0118] In some embodiments, when the surface of the first thermally conductive layer 13 (13a) facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 (23a, 23d) facing away from the second insulating layer 22 (22d) are coplanar, the encapsulation module 1000 includes a heat dissipation device 1100. In this case, the heat dissipation device 1100 is disposed on the surface of the first thermally conductive layer 13 (13a) facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 (23a, 23d) facing away from the second insulating layer 22 (22d).
[0119] In other embodiments, when the surface of the first thermally conductive layer 13 (13a) facing away from the first insulating layer 12 and the surface of the second thermally conductive layer 23 (23a, 23d) facing away from the second insulating layer 22 (22d) are not coplanar, the encapsulation module 1000 includes two heat dissipation devices 1100, one heat dissipation device 1100 is located on the surface of the first thermally conductive layer 13 (13a) facing away from the first insulating layer 12, and the other heat dissipation device 1100 is located on the surface of the second thermally conductive layer 23 (23a, 23d) facing away from the second insulating layer 22 (22d).
[0120] In some embodiments, the heat dissipation device 1100 can be directly disposed on the first thermally conductive layer 13 (13a) and the second thermally conductive layer 23 (23a, 23d). It is understood that the heat dissipation device 1100 can be directly contacted and connected to the first thermally conductive layer 13 (13a) and the second thermally conductive layer 23 (23a, 23d), or can be attached to the surface of the first thermally conductive layer 13 (13a) and the second thermally conductive layer 23 (23a, 23d) by means of thermally conductive adhesive.
[0121] In other embodiments, the heat dissipation device 1100 can also be indirectly connected to the first thermally conductive layer 13 (13a) and the second thermally conductive layer 23 (23a, 23d) through the first thermally conductive component 6 and the second thermally conductive component 7. It is understood that the heat dissipation device 1100 can be directly connected to the first thermally conductive component 6 and the second thermally conductive component 7, or it can be indirectly connected through thermally conductive adhesive.
[0122] By adding a heat dissipation device 1100, the heat dissipation efficiency of the packaged devices 100 (200, 200, 300, 400, 500, 600, 700) can be further improved. Furthermore, by flexibly setting the positions of the first circuit board 1 (1a, 1b, 1c, 1e) and the second circuit board 2 (2a, 2b, 2c, 2d, 2e), single-sided or double-sided heat dissipation can be achieved to meet different needs.
[0123] Please see Figure 15 One embodiment of this application provides an electronic device 2000, which includes a housing 2100 and the aforementioned encapsulation devices 100 (200, 200, 300, 400, 500, 600, 700) or the aforementioned encapsulation module 1000 located within the housing 2100. The electronic device 2000 can be a vehicle power supply, a photovoltaic inverter, a power station, or an industrial motor drive, etc. In this embodiment, the electronic device 2000 is an electric vehicle charging station.
[0124] It should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Where there is no conflict, the embodiments and features described in the embodiments of this application can be combined with each other. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A packaged device, characterized in that, include: The first circuit board includes a first circuit layer and a first insulating layer stacked sequentially, and at least one first electronic component is provided on the first circuit board. as well as The second circuit board includes a second circuit layer and a second insulating layer stacked sequentially. At least one second electronic component is provided on the second circuit board. The second circuit board also includes a circuit board body and at least one opening penetrating the circuit board body. At least one first circuit board is provided in each opening. The thermal conductivity of the first insulating layer is higher than that of the second insulating layer.
2. The packaged device according to claim 1, characterized in that, The second circuit layer is electrically connected to the first circuit layer via a conductor; Alternatively, the first circuit layer is electrically connected to the second circuit layer through an electrical connection layer, and the first circuit layer, the second circuit layer, and the electrical connection layer are an integral structure.
3. The packaged device according to claim 1 or 2, characterized in that, The first insulating layer and the second insulating layer are in contact with each other.
4. The packaged device according to claim 1 or 2, characterized in that, The first insulating layer and the second insulating layer are an integral structure.
5. The packaging device according to any one of claims 1 to 4, characterized in that, The first insulating layer is made of AlN or Si3N4, and the second insulating layer is made of Al2O3.
6. The packaging device according to any one of claims 1 to 5, characterized in that, The first circuit board further includes a first thermally conductive layer located on the surface of the first insulating layer opposite to the first circuit layer, and the second circuit board further includes a second thermally conductive layer located on the surface of the second insulating layer opposite to the second circuit layer.
7. The packaging device according to claim 6, characterized in that, The surface of the first thermally conductive layer facing away from the first insulating layer is coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, and the first thermally conductive layer and the second thermally conductive layer are an integral structure.
8. The packaging device according to claim 6, characterized in that, The surface of the first thermally conductive layer facing away from the first insulating layer is not coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, and the first thermally conductive layer and the second thermally conductive layer are disposed opposite to each other.
9. The packaged device according to any one of claims 6 to 8, characterized in that, It also includes a package that encapsulates the first circuit board and the second circuit board, wherein the surface of the first thermally conductive layer facing away from the first insulating layer and the surface of the second thermally conductive layer facing away from the second insulating layer are both exposed by the package.
10. The packaged device according to any one of claims 6 to 9, characterized in that, The first thermally conductive layer has a first thermally conductive component on its surface away from the first insulating layer, and the second thermally conductive layer has a second thermally conductive component on its surface away from the second insulating layer.
11. The packaged device according to claim 10, characterized in that, When the surface of the first thermally conductive layer facing away from the first insulating layer is coplanar with the surface of the second thermally conductive layer facing away from the second insulating layer, the first thermally conductive component and the second thermally conductive component are an integral structure.
12. A packaging module, characterized in that, The device includes a packaged device as described in any one of claims 1 to 11 and at least one heat dissipation device, wherein the at least one heat dissipation device is located on the side of the first insulating layer opposite to the first circuit layer and / or on the side of the second insulating layer opposite to the second circuit layer.
13. An electronic device, characterized in that, It includes a housing and a packaging device as described in any one of claims 1 to 11 or a packaging module as described in claim 12, located within the housing.
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