Coding modulation method, demodulation and decoding method, device, system, medium and equipment

Abstract

The present application provides a coding and modulation method, a demodulation and decoding method, a coding and modulation device, a demodulation and decoding device, a system for coding, modulation and demodulation, a computer-readable storage medium and an electronic device, and relates to the field of coding and decoding technology. The method divides a to-be-coded bit sequence into a plurality of target to-be-coded sub-segments without changing the code length of a polar code, and maps the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

Description

Technical Field

[0001] The present application relates to the field of coding and decoding technology, and in particular, to a coding and modulation method, a demodulation and decoding method, a coding and modulation device, a demodulation and decoding device, a system for coding, modulation and demodulation, a computer-readable storage medium and an electronic device. Background Art

[0002] Communication systems usually use channel coding to improve the reliability of data transmission. Polar Code is a coding method based on channel polarization. Channel polarization is divided into two stages, namely channel combination and channel splitting. Through channel combination and splitting, the symmetric capacity of each subchannel will show a two-level differentiation trend: as the code length N increases, the capacity of some subchannels tends to 1, while the capacity of the remaining subchannels tends to 0. Polar Code uses this channel polarization phenomenon to transmit message bits on K subchannels whose capacity tends to 1, and transmit frozen bits (that is, fixed bits known to both the sender and the receiver, usually set to all zero) on the remaining subchannels. The code thus constructed is called Polar Code, with a code rate of K / N.

[0003] As a block code, Polar Code can be used as a component code of Block Coded Modulation (BCM) code to form Multi-Layer Polar Coded Modulation (MLPC). The total code length of MLPC is multiple times the polar code length, which will result in longer processing delay and higher hardware complexity compared with traditional polar code encoding. By shortening the polar code length by multiple times, although the total code length can be kept the same as the traditional polar code length, shorter polar codes mean worse decoding performance.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute an existing solution known to ordinary technicians in the field. Summary of the invention

[0005] The purpose of the present application is to provide a coding modulation method, a demodulation and decoding method, a coding modulation device, a demodulation and decoding device, a system for coding modulation and demodulation and decoding, a computer-readable storage medium and an electronic device, which divide a to-be-coded bit sequence into a plurality of target to-be-coded sub-segments without changing the code length of the polar code, and map the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

[0006] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0007] According to one aspect of the present application, a coding modulation method is provided, the method being performed by a transmitting end, the method comprising:

[0008] Dividing the bit sequence to be encoded to obtain a plurality of target sub-segments to be encoded;

[0009] Mapping multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information;

[0010] Performing sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments;

[0011] The corresponding coded sub-segments are modulated into modulation signals through each modulation sub-channel and the modulation signals are sent to the receiving end.

[0012] In an exemplary embodiment of the present application, a bit sequence to be encoded is divided to obtain a plurality of target sub-segments to be encoded, including:

[0013] Dividing the bit sequence to be encoded to obtain a plurality of reference sub-segments to be encoded;

[0014] Sub-segment transformation is performed on a plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded.

[0015] In an exemplary embodiment of the present application, the bit sequence to be encoded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; the reference sub-segment to be encoded, the target sub-segment to be encoded, and the specific sub-segment to be encoded all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number of second preset lengths.

[0016] In an exemplary embodiment of the present application, sub-segment transformation is performed on multiple reference sub-segments to be encoded to obtain multiple target sub-segments to be encoded, including:

[0017] Determining, from each reference to-be-encoded sub-segment according to the first sub-segment transformation rule, a specific bit set for generating each target to-be-encoded sub-segment;

[0018] Performing an exclusive OR operation within the at least one specific bit set to obtain a plurality of target sub-segments to be encoded;

[0019] The first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain constant 0 bits, the XOR operation involving only information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits to obtain mixed bits.

[0020] In an exemplary embodiment of the present application, sub-segment encoding is performed on each specific sub-segment to be encoded to obtain multiple encoded sub-segments, including:

[0021] Polar code encoding is performed on each specific sub-segment to be encoded to obtain multiple polar codes as multiple encoded sub-segments.

[0022] In an exemplary embodiment of the present application, the reference subsegment to be encoded includes information bits and frozen bits, and the target subsegment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits.

[0023] In an exemplary embodiment of the present application, the target to-be-encoded subsegment includes a check code, and the check code serves as an information bit and / or a pure information bit; the check code includes at least one of the following: a cyclic redundancy check code and a parity check code.

[0024] In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation sub-channel, and mapping multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information includes:

[0025] Determine the code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel;

[0026] Determine a first mapping rule for specific sub-segments to be coded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be coded;

[0027] Determine, according to the first mapping rule, a second mapping rule between bits in a plurality of target to-be-encoded subsegments and bits in a plurality of specific to-be-encoded subsegments;

[0028] There is a positive correlation between the capacity of each modulation sub-channel and the corresponding code rate of each specific sub-segment to be encoded.

[0029] In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and mapping multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information includes:

[0030] Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

[0031] Determine the number of constant 0 bits and / or frozen bits that need to be allocated to each corresponding specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

[0032] The specific sub-segment to be encoded corresponding to each modulated sub-channel is determined based on the constant 0 bit number and / or the frozen bit number of each specific sub-segment to be encoded.

[0033] In an exemplary embodiment of the present application, the modulation subchannel corresponds to a second preset number, and mapping multiple target to-be-coded subsegments to specific to-be-coded subsegments corresponding to each modulation subchannel according to the modulation channel information includes:

[0034] When the first preset number and the second preset number are consistent, mapping the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel one by one according to the modulation channel information;

[0035] When the first preset number is equal to the plurality of second preset numbers, mapping the plurality of target sub-segments to be coded to specific sub-segments to be coded that have a many-to-one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein the plurality of specific sub-segments to be coded correspond to one modulation sub-channel;

[0036] When multiple first preset numbers are equal to the second preset number, multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded that have a one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein one specific sub-segment to be encoded corresponds to multiple modulation sub-channels.

[0037] According to one aspect of the present application, a demodulation and decoding method is provided, which is performed by a receiving end and includes:

[0038] Demodulating the modulated signal sent by the transmitter through each modulation sub-channel to obtain a sequence to be decoded;

[0039] Dividing the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decoding the plurality of sub-segments to be decoded according to a coding rule by a plurality of sub-segment decoders to obtain decoding sub-segments of each sub-segment to be decoded;

[0040] Determine a plurality of target decoding sub-segments according to each decoding sub-segment;

[0041] Sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoding bit sequence.

[0042] In an exemplary embodiment of the present application, the sub-segment decoders and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

[0043] In an exemplary embodiment of the present application, multiple sub-segment decoders are used to decode multiple sub-segments to be decoded according to the coding rules to obtain decoded sub-segments of each sub-segment to be decoded, including:

[0044] Performing non-SCL decoding on multiple sub-segments to be decoded to obtain multiple merge paths;

[0045] A plurality of decoding sub-segments are determined according to the plurality of merging paths.

[0046] In an exemplary embodiment of the present application, a plurality of sub-segments to be decoded are subjected to non-continuous deletion list nonSCL decoding to obtain a plurality of merge paths, including:

[0047] Performing continuous deletion list SCL decoding on each sub-segment to be decoded, respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

[0048] Splitting each first decoding path between sub-segments to obtain a plurality of incomplete second decoding paths;

[0049] Performing a frozen bit constraint check on the second decoding path, and determining a path that passes the check as a third decoding path;

[0050] Selecting a path with the largest path probability value from the third decoding paths as a fourth decoding path; wherein the number of the fourth decoding paths is less than or equal to a first preset threshold;

[0051] Divide each fourth decoding path into sub-segments to obtain a first decoding path queue of each to-be-decoded sub-segment;

[0052] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to a second preset threshold, taking the paths with different probability values ​​in the first decoding path queue as candidate decoding paths;

[0053] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values ​​before the second preset threshold as candidate decoding paths;

[0054] Continue to perform non-continuous deletion list nonSCL decoding on each sub-segment to be decoded based on the alternative decoding path;

[0055] When the length of the second decoding path satisfies the first preset length, a plurality of merging paths are determined based on the candidate decoding paths.

[0056] In an exemplary embodiment of the present application, each fourth decoding path is divided into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded, including:

[0057] Arrange the fourth decoding paths from large to small according to the path probability values ​​to obtain a second decoding path queue;

[0058] The paths in the second decoding path queue are divided into sub-segments while keeping the queue order unchanged, so as to obtain the first decoding path queue of each sub-segment to be decoded.

[0059] In an exemplary embodiment of the present application, determining a plurality of decoding sub-segments according to a plurality of merging paths includes:

[0060] Verify each merged path based on a preset verification method, and determine the merged path that passes the verification and has the highest probability as the decoding path;

[0061] The decoding path is divided into sub-segments to obtain a plurality of decoding sub-segments.

[0062] In an exemplary embodiment of the present application, a plurality of target decoding sub-segments are determined according to each decoding sub-segment, including:

[0063] Mapping each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain a plurality of target decoding sub-segments; wherein the target decoding sub-segments and the decoding sub-segments both correspond to a first preset number;

[0064] The third mapping rule and the first mapping rule on the encoding side are inverse processes of each other;

[0065] Mapping the bits in each decoding sub-segment to the bits in the target decoding sub-segment according to a fourth mapping rule;

[0066] The fourth mapping rule and the second mapping rule on the encoding side are inverse processes of each other.

[0067] In an exemplary embodiment of the present application, sub-segment transformation and sub-segment merging are performed on a plurality of target decoding sub-segments to obtain a decoding bit sequence, including:

[0068] Selecting a target bit from each target decoding sub-segment, and transforming the target bit into a final bit according to a second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule at the encoding side are inverse processes of each other;

[0069] Determining each final decoded sub-segment based on the final bit;

[0070] The final decoded sub-segments are combined to obtain a decoded bit sequence.

[0071] In an exemplary embodiment of the present application, performing a frozen bit constraint check on the second decoding path includes:

[0072] When the final bit is a frozen bit, based on the third sub-segment transformation rule and the fourth mapping rule, it is checked whether the XOR operation results of the corresponding bits in the plurality of second decoding paths are consistent with the frozen bit.

[0073] According to one aspect of the present application, a coding modulation device is provided, the device comprising:

[0074] A sub-segment acquisition unit, used for dividing the to-be-encoded bit sequence to obtain a plurality of target to-be-encoded sub-segments;

[0075] A sub-segment mapping unit, configured to map a plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information;

[0076] A sub-segment encoding unit, used for performing sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments;

[0077] The modulation and transmission unit is used to modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel and transmit the modulation signals to the receiving end.

[0078] In an exemplary embodiment of the present application, the sub-segment acquisition unit divides the to-be-encoded bit sequence to obtain a plurality of target to-be-encoded sub-segments, including:

[0079] Dividing the bit sequence to be encoded to obtain a plurality of reference sub-segments to be encoded;

[0080] Sub-segment transformation is performed on a plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded.

[0081] In an exemplary embodiment of the present application, the bit sequence to be encoded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; the reference sub-segment to be encoded, the target sub-segment to be encoded, and the specific sub-segment to be encoded all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number of second preset lengths.

[0082] In an exemplary embodiment of the present application, a sub-segment acquisition unit performs sub-segment transformation on a plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded, including:

[0083] Determining, from each reference to-be-encoded sub-segment according to the first sub-segment transformation rule, a specific bit set for generating each target to-be-encoded sub-segment;

[0084] Performing an exclusive OR operation within the at least one specific bit set to obtain a plurality of target sub-segments to be encoded;

[0085] The first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain constant 0 bits, the XOR operation involving only information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits to obtain mixed bits.

[0086] In an exemplary embodiment of the present application, the sub-segment encoding unit performs sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments, including:

[0087] Polar code encoding is performed on each specific sub-segment to be encoded to obtain multiple polar codes as multiple encoded sub-segments.

[0088] In an exemplary embodiment of the present application, the reference subsegment to be encoded includes information bits and frozen bits, and the target subsegment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits.

[0089] In an exemplary embodiment of the present application, the target to-be-encoded subsegment includes a check code, and the check code serves as an information bit and / or a pure information bit; the check code includes at least one of the following: a cyclic redundancy check code and a parity check code.

[0090] In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation sub-channel, and the sub-segment mapping unit maps multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information, including:

[0091] Determine the code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel;

[0092] Determine a first mapping rule for specific sub-segments to be coded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be coded;

[0093] Determine, according to the first mapping rule, a second mapping rule between bits in a plurality of target to-be-encoded subsegments and bits in a plurality of specific to-be-encoded subsegments;

[0094] There is a positive correlation between the capacity of each modulation sub-channel and the corresponding code rate of each specific sub-segment to be encoded.

[0095] In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and the sub-segment mapping unit maps multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information, including:

[0096] Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

[0097] Determine the number of constant 0 bits and / or frozen bits that need to be allocated to each corresponding specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

[0098] The specific sub-segment to be encoded corresponding to each modulated sub-channel is determined based on the constant 0 bit number and / or the frozen bit number of each specific sub-segment to be encoded.

[0099] In an exemplary embodiment of the present application, the modulation subchannel corresponds to a second preset number, and the subsegment mapping unit maps multiple target to-be-encoded subsegments to specific to-be-encoded subsegments corresponding to each modulation subchannel according to the modulation channel information, including:

[0100] When the first preset number and the second preset number are consistent, mapping the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel one by one according to the modulation channel information;

[0101] When the first preset number is equal to the plurality of second preset numbers, mapping the plurality of target sub-segments to be coded to specific sub-segments to be coded that have a many-to-one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein the plurality of specific sub-segments to be coded correspond to one modulation sub-channel;

[0102] When multiple first preset numbers are equal to the second preset number, multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded that have a one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein one specific sub-segment to be encoded corresponds to multiple modulation sub-channels.

[0103] According to one aspect of the present application, a demodulation and decoding device is provided, the device comprising:

[0104] A receiving demodulation unit, used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded;

[0105] A first decoding unit is used to divide the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decode the plurality of sub-segments to be decoded according to a coding rule by using a plurality of sub-segment decoders to obtain a decoding sub-segment of each sub-segment to be decoded;

[0106] A second decoding unit, used for determining a plurality of target decoding sub-segments according to each decoding sub-segment;

[0107] The third decoding unit is used to perform sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence.

[0108] In an exemplary embodiment of the present application, the sub-segment decoders and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

[0109] In an exemplary embodiment of the present application, the first decoding unit decodes the multiple sub-segments to be decoded respectively according to the coding rule by using the multiple sub-segment decoders to obtain the decoded sub-segments of each sub-segment to be decoded, including:

[0110] Performing non-SCL decoding on multiple sub-segments to be decoded to obtain multiple merge paths;

[0111] A plurality of decoding sub-segments are determined according to the plurality of merging paths.

[0112] In an exemplary embodiment of the present application, the first decoding unit performs non-continuous deletion list nonSCL decoding on multiple sub-segments to be decoded to obtain multiple merging paths, including:

[0113] Performing continuous deletion list SCL decoding on each sub-segment to be decoded, respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

[0114] Splitting each first decoding path between sub-segments to obtain a plurality of incomplete second decoding paths;

[0115] Performing a frozen bit constraint check on the second decoding path, and determining a path that passes the check as a third decoding path;

[0116] Selecting a path with the largest path probability value from the third decoding paths as a fourth decoding path; wherein the number of the fourth decoding paths is less than or equal to a first preset threshold;

[0117] Divide each fourth decoding path into sub-segments to obtain a first decoding path queue of each to-be-decoded sub-segment;

[0118] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to a second preset threshold, taking the paths with different probability values ​​in the first decoding path queue as candidate decoding paths;

[0119] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values ​​before the second preset threshold as candidate decoding paths;

[0120] Continue to perform non-continuous deletion list nonSCL decoding on each sub-segment to be decoded based on the alternative decoding path;

[0121] When the length of the second decoding path satisfies the first preset length, a plurality of merging paths are determined based on the candidate decoding paths.

[0122] In an exemplary embodiment of the present application, the first decoding unit divides each fourth decoding path into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded, including:

[0123] Arrange the fourth decoding paths from large to small according to the path probability values ​​to obtain a second decoding path queue;

[0124] The paths in the second decoding path queue are divided into sub-segments while keeping the queue order unchanged, so as to obtain the first decoding path queue of each sub-segment to be decoded.

[0125] In an exemplary embodiment of the present application, the first decoding unit determines a plurality of decoding sub-segments according to a plurality of merging paths, including:

[0126] Verify each merged path based on a preset verification method, and determine the merged path that passes the verification and has the highest probability as the decoding path;

[0127] The decoding path is divided into sub-segments to obtain a plurality of decoding sub-segments.

[0128] In an exemplary embodiment of the present application, the second decoding unit determines a plurality of target decoding sub-segments according to each decoding sub-segment, including:

[0129] Mapping each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain a plurality of target decoding sub-segments; wherein the target decoding sub-segments and the decoding sub-segments both correspond to a first preset number;

[0130] The third mapping rule and the first mapping rule on the encoding side are inverse processes of each other;

[0131] Mapping the bits in each decoding sub-segment to the bits in the target decoding sub-segment according to a fourth mapping rule;

[0132] The fourth mapping rule and the second mapping rule on the encoding side are inverse processes of each other.

[0133] In an exemplary embodiment of the present application, the third decoding unit performs sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence, including:

[0134] Selecting a target bit from each target decoding sub-segment, and transforming the target bit into a final bit according to a second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule at the encoding side are inverse processes of each other;

[0135] Determining each final decoded sub-segment based on the final bit;

[0136] The final decoded sub-segments are combined to obtain a decoded bit sequence.

[0137] In an exemplary embodiment of the present application, the first decoding unit performs a frozen bit constraint check on the second decoding path, including:

[0138] When the final bit is a frozen bit, based on the third sub-segment transformation rule and the fourth mapping rule, it is checked whether the XOR operation results of the corresponding bits in the plurality of second decoding paths are consistent with the frozen bit.

[0139] According to one aspect of the present application, a system for performing coding modulation and demodulation decoding is provided, the system comprising a transmitting end and a receiving end, wherein:

[0140] The transmitting end is used to divide the to-be-coded bit sequence to obtain a plurality of target to-be-coded sub-segments; map the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information; perform sub-segment coding on each specific to-be-coded sub-segment to obtain a plurality of coded sub-segments; modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel respectively and send the modulation signals to the receiving end;

[0141] The receiving end is used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded; divide the sequence to be decoded into multiple sub-segments to be decoded, and decode the multiple sub-segments to be decoded respectively according to the coding rules by multiple sub-segment decoders to obtain the decoding sub-segments of each sub-segment to be decoded; determine multiple target decoding sub-segments according to each decoding sub-segment; perform sub-segment transformation and sub-segment merging on the multiple target decoding sub-segments to obtain a decoding bit sequence.

[0142] According to one aspect of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, any one of the above methods is implemented.

[0143] According to one aspect of the present application, an electronic device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform any one of the above methods by executing the executable instructions.

[0144] The exemplary embodiments of the present application may have some or all of the following beneficial effects:

[0145] In the coding and modulation method provided in an example embodiment of the present application, the bit sequence to be coded can be divided to obtain multiple target sub-segments to be coded; the multiple target sub-segments to be coded are mapped to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information; each specific sub-segment to be coded is sub-segment encoded to obtain multiple coded sub-segments; the corresponding coded sub-segments are modulated into modulation signals through each modulation sub-channel and the modulation signals are sent to the receiving end. In the coding and modulation method provided in an example embodiment of the present application, the modulation signals sent by the transmitting end through each modulation sub-channel can be demodulated to obtain a sequence to be decoded; the sequence to be decoded is divided into multiple sub-segments to be decoded, and multiple sub-segment decoders are used to decode multiple sub-segments according to the coding rules to obtain decoding sub-segments of each sub-segment to be decoded; multiple target decoding sub-segments are determined according to each decoding sub-segment; multiple target decoding sub-segments are sub-segment transformed and sub-segment merged to obtain a decoding bit sequence. In this way, the bit sequence to be encoded can be divided into multiple target sub-segments to be encoded without changing the code length of the polar code, and the multiple target sub-segments to be encoded can be mapped to specific sub-segments to be encoded corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channel and improving transmission reliability. In addition, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then multiple target decoding sub-segments can be determined according to each decoding sub-segment, and the decoding bit sequence can be obtained by sub-segment transformation and sub-segment merging, so as to improve the decoding performance without increasing the processing time for encoding and decoding when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is improved on the decoding side on the basis of improving the encoding flexibility on the encoding side.

[0146] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0147] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0148] Figure 1 The flowchart of the coding modulation method according to an embodiment of the present application is schematically shown;

[0149] Figure 2 A flowchart of a coding modulation method according to another embodiment of the present application is schematically shown;

[0150] Figure 3 The flowchart of the demodulation and decoding method according to one embodiment of the present application is schematically shown;

[0151] Figure 4 A flowchart of a demodulation and decoding method according to another embodiment of the present application is schematically shown;

[0152] Figure 5 A schematic diagram of a system architecture for performing coding modulation and demodulation decoding according to an embodiment of the present application is shown;

[0153] Figure 6 The following schematically shows a coding modulation system architecture diagram according to an embodiment of the present application;

[0154] Figure 7 The schematic diagram shows a demodulation and decoding system architecture according to an embodiment of the present application;

[0155] Figure 8 The structure block diagram of the coding modulation device according to one embodiment of the present application is schematically shown;

[0156] Fig. 9 The structure block diagram of a demodulation and decoding device according to an embodiment of the present application is schematically shown;

[0157] Fig.10 The structure diagram of a computer system suitable for implementing an electronic device of an embodiment of the present application is schematically shown. DETAILED DESCRIPTION

[0158] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present application will be more comprehensive and complete, and the concept of the example embodiments will be fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical solutions of the present application may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present application.

[0159] In addition, the accompanying drawings are only schematic illustrations of the present application and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.

[0160] Among them, the technical solution of the embodiment of the present invention can be applied to various communication systems. For example, 5G communication system, Global System of Mobile communication (GSM) system, Code Division Multiple Access (CDMA) system, Wideband Code Division Multiple Access (WCDMA) system, General Packet Radio Service (GPRS), Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD) system, Universal Mobile Telecommunication System (UMTS), etc.

[0161] See also Figure 1 , Figure 1A flowchart of a coding and modulation method according to an embodiment of the present application is schematically shown. The method is executed by a transmitting end, and the transmitting end may be an access network device or a terminal device, or may be other devices that require channel coding, which is not limited in the embodiments of the present application. Among them, the access network device can provide communication coverage for a specific geographical area, and can communicate with terminal devices located in the coverage area. The access network device can support communication protocols of different standards, or can support different communication modes. For example, the access network device can be an evolutionary node B (eNB or eNodeB) in an LTE system, or a radio network controller in a cloud radio access network (CRAN), or an access network device in a 5G network, such as a gNB, or a small station, a micro station or a transmission reception point (TRP), or a relay station, an access point or an access network device in a future evolved public land mobile network (PLMN), or various forms of future devices that assume base station functions, etc. Among them, the terminal device may refer to an access terminal, user equipment (UE), a user unit, a user station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile terminal, a user terminal, a terminal, a wireless communication device, a user agent or a user device. The access terminal may be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in the Internet of Things, a virtual reality device, a terminal device in a 5G network or a future communication network, or a terminal device in a future evolved public land mobile network (PLMN), etc.

[0162] like Figure 1 As shown, the coding modulation method may include: steps S110 to S140.

[0163] Step S110: Divide the bit sequence to be encoded to obtain a plurality of target sub-segments to be encoded.

[0164] Step S120: mapping multiple target sub-segments to be coded to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information.

[0165] Step S130: performing sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments.

[0166] Step S140: modulate the corresponding coded sub-segments into modulated signals through each modulation sub-channel and send the modulated signals to the receiving end.

[0167] Among them, the bit sequence to be encoded corresponds to a first preset length N, and the first preset length is equal to an integer power of 2; the reference sub-segment to be encoded, the target sub-segment to be encoded, and the specific sub-segment to be encoded all correspond to a second preset length n and a first preset number m, and the second preset length is equal to an integer power of 2; the first preset length N is the first preset number m and the second preset length n; among them, N, n, and m are all positive integers.

[0168] Implementation Figure 1 The method shown can divide the to-be-coded bit sequence into multiple target to-be-coded sub-segments without changing the polar code length, and map the multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

[0169] Next, the above steps of this exemplary embodiment are described in more detail.

[0170] In step S110, the to-be-encoded bit sequence is divided to obtain a plurality of target to-be-encoded sub-segments.

[0171] Specifically, the bit sequence to be encoded may include a plurality of bits corresponding to a first preset length, such as N=1024 bits. A plurality of target sub-segments to be encoded are used to form the bit sequence to be encoded, the first preset number m of the target sub-segments to be encoded is 2, and the second preset length n of the target sub-segments to be encoded is 512.

[0172] As an optional embodiment, dividing the bit sequence to be coded to obtain multiple target sub-segments to be coded includes: dividing the bit sequence to be coded to obtain multiple reference sub-segments to be coded; performing sub-segment transformation on the multiple reference sub-segments to be coded to obtain multiple target sub-segments to be coded. In this way, flexible coding can be achieved and decoding performance can be guaranteed by dividing the bit sequence to be coded.

[0173] Specifically, multiple reference sub-segments to be encoded may be represented as m reference sub-segments to be encoded. For example, they may be represented as follows:

[0174] v 1 =[v 11 v 12 v13 …v 1n-1 v 1n ]

[0175] v 2 =[v 21 v 22 v 23 …v 2n-1 v 2n ]

[0176] …

[0177] v m =[v m1 v m2 v m3 …v mn-1 v mn ]

[0178] And, multiple target sub-segments to be encoded can be represented as m target sub-segments to be encoded, for example, can be represented as follows:

[0179] a 1 =[a 11 a 12 a 13 …a 1n-1 a 1n ]

[0180] a 2 =[a 21 a 22 a 23 …a 2n-1 a 2n ]

[0181] …

[0182] a m =[a m1 a m2 a m3 …a mn-1 a mn ]

[0183] As an optional embodiment, sub-segment transformation is performed on multiple reference sub-segments to be encoded to obtain multiple target sub-segments to be encoded, including: determining a specific bit set for generating each target sub-segment to be encoded from each reference sub-segment to be encoded according to a first sub-segment transformation rule; performing an XOR operation within the set on at least one specific bit set to obtain multiple target sub-segments to be encoded; wherein the first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain a constant 0 bit, the XOR operation involving only information bits to obtain a pure information bit, and the XOR operation involving frozen bits and information bits to obtain a mixed bit. In this way, the transformation of the sub-segment to be encoded can be achieved through the first sub-segment transformation rule, which is conducive to improving coding flexibility.

[0184] Specifically, according to the first sub-segment transformation rule, a specific bit set for generating each target sub-segment to be encoded can be determined, for example, for generating a 1j The specific bit sets include [v 1j , v 2j , v 3j , …, v (m-2)j , v (m-1)j , v mj ], used to generate a 2j The specific bit sets include [v 2j , v 4j , v 6j , …, v (m-4)j , v (m-2)j , v mj ].

[0185] In addition, performing an XOR operation within the set on at least one specific bit set to obtain a plurality of target sub-segments to be encoded includes: performing an XOR operation within the set on at least one specific bit set based on the following expression to obtain a plurality of target sub-segments to be encoded; wherein the frozen bit v mj The direct result is the frozen bit a mj , by the information bit v mj The information bit a is obtained directly mj .

[0186]

[0187] In step S120, a plurality of target sub-segments to be coded are mapped to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information.

[0188] Specifically, the modulation channel information includes but is not limited to at least one of the following: modulation subchannel capacity, equivalent bit channel reliability information. Among them, the modulation subchannel capacity is used to indicate the capacity of the modulation subchannel, and different modulation subchannels may correspond to different capacities or the same capacity, which is not limited in the embodiments of the present application. The equivalent bit channel reliability information is used to limit information such as the number of unreliable equivalent bit channels, which is not limited in the embodiments of the present application. In addition, the number of modulation subchannels can be expressed as p, where p is a positive integer.

[0189] As an optional embodiment, the modulation channel information includes the capacity of each modulation sub-channel, and multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded corresponding to each modulation sub-channel according to the modulation channel information, including: determining the corresponding code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel; determining the first mapping rule of the specific sub-segment to be encoded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be encoded; according to the first mapping rule, determining the second mapping rule between the bits in the multiple target sub-segments to be encoded and the bits in the multiple specific sub-segments to be encoded; wherein the capacity of each modulation sub-channel is positively correlated with the code rate of each corresponding specific sub-segment to be encoded. In this way, based on the capacity of each modulation sub-channel, specific sub-segments to be encoded with different code rates can be mapped to modulation sub-channels with different channel capacities, so that the specific sub-segments to be encoded with a large code rate correspond to the modulation sub-channel with a large capacity, and the specific sub-segments to be encoded with a small code rate correspond to the modulation sub-channel with a small capacity, thereby achieving the balance of the modulation sub-channels and improving the transmission reliability.

[0190] The first mapping rule is used to determine the mapping relationship between the sub-segment and the modulated sub-channel. The second mapping rule is used to determine the mapping relationship between the bits in all target sub-segments to be encoded and the bits in all specific sub-segments to be encoded, that is, the mapping relationship of the bits is across sub-segments and is based on the entire target bit sequence to be encoded and the entire specific bit sequence to be encoded.

[0191] Specifically, capacity refers to the maximum transmission rate that can be achieved for error-free transmission on a channel. Code rate = information bit length / code length. Among them, the method of determining the code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel can be: determine the number of constant 0 bits and / or frozen bits of each specific sub-segment to be encoded as x, and determine the code rate of each specific sub-segment to be encoded according to the expression [(code length L1-x1) / code length L1] / [(code length L2-x2) / code length L2]=C1 / C2, x1+x2=W; among them, W is a known constant, and C1 and C2 are the corresponding modulation sub-channel capacities.

[0192] In addition, the full sub-segment code rate is the ratio of the sum of the number of constant 0 bits and the number of frozen bits in the m target sub-segments to be encoded to the first preset length.

[0193] As an optional embodiment, the modulation channel information includes equivalent bit channel reliability information, and multiple target sub-segments to be coded are mapped to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information, including: determining the number of unreliable equivalent bit channels in each modulation sub-channel according to the equivalent bit channel reliability information; determining the number of constant 0 bits and / or frozen bits that need to be allocated to the corresponding specific sub-segments to be coded according to the number of unreliable equivalent bit channels in each modulation sub-channel; determining the specific sub-segments to be coded corresponding to each modulation sub-channel based on the number of constant 0 bits and / or frozen bits of each specific sub-segment to be coded. In this way, specific sub-segments to be coded with different code rates can be mapped to modulation sub-channels with different channel capacities based on the preset equivalent bit channel reliability information, so that specific sub-segments to be coded with a large code rate correspond to modulation sub-channels with a large capacity, and specific sub-segments to be coded with a small code rate correspond to modulation sub-channels with a small capacity more efficiently, thereby achieving balancing of modulation sub-channels and improving transmission reliability.

[0194] The number of modulated sub-channel equivalent bit channels may be expressed as N / p, where p is a second preset number corresponding to the modulated sub-channels.

[0195] Specifically, the specific sub-segment to be encoded corresponding to each modulation sub-channel is determined based on the constant number of 0 bits and / or the number of frozen bits of each specific sub-segment to be encoded, including: performing bit configuration based on the constant number of 0 bits and / or the number of frozen bits of each specific sub-segment to be encoded to obtain the specific sub-segment to be encoded corresponding to each modulation sub-channel.

[0196] As an optional embodiment, the modulation subchannel corresponds to the second preset number p, and multiple target subsegments to be encoded are mapped to specific subsegments to be encoded corresponding to each modulation subchannel according to the modulation channel information, including: when the first preset number and the second preset number are consistent, the multiple target subsegments to be encoded are mapped to specific subsegments to be encoded corresponding to each modulation subchannel one by one according to the modulation channel information; when the first preset number is equal to multiple second preset numbers, the multiple target subsegments to be encoded are mapped to specific subsegments to be encoded that have a many-to-one-to-many relationship with each modulation subchannel according to the modulation channel information; wherein the multiple specific subsegments to be encoded correspond to one modulation subchannel; when the multiple first preset numbers are equal to the second preset numbers, the multiple target subsegments to be encoded are mapped to specific subsegments to be encoded that have a one-to-many relationship with each modulation subchannel according to the modulation channel information; wherein one specific subsegment to be encoded corresponds to multiple modulation subchannels. In this way, a suitable corresponding method can be selected based on the first preset number and the second preset number, which is conducive to improving the modulation flexibility and the transmission reliability of the modulation subchannel.

[0197] Specifically, the first preset number is consistent with the second preset number, which can be understood as m=p; the first preset number is equal to a plurality of the second preset numbers, which can be understood as m=kp; and a plurality of the first preset numbers is equal to the second preset number, which can be understood as km=p. k is a positive integer.

[0198] When m=p, multiple target sub-segments to be coded can be mapped to specific sub-segments to be coded corresponding to each modulation sub-channel one by one according to the modulation channel information, so that the relationship between the specific sub-segments to be coded and each modulation sub-channel is positively correlated, that is, a large-capacity modulation sub-channel corresponds to a specific sub-segment to be coded with a large code rate, and a small-capacity modulation sub-channel corresponds to a specific sub-segment to be coded with a small code rate. When m=kp, the specific sub-segments to be coded can be combined, and k specific sub-segments to be coded can be divided into a group to obtain a total of p specific sub-segment groups to be coded, so that each specific sub-segment group to be coded can correspond to a modulation sub-channel, and the code rate of each specific sub-segment group to be coded is different, so that the code rate of the specific sub-segment group to be coded is positively correlated with the relationship between each modulation sub-channel, that is, a large-capacity modulation sub-channel corresponds to a specific sub-segment group to be coded with a large code rate, and a small-capacity modulation sub-channel corresponds to a specific sub-segment group to be coded with a small code rate, and each specific sub-segment group to be coded is polarized to obtain a polarization code. When km=p, k modulation subchannels can be divided into a group, obtaining a total of m modulation subchannel groups, so that each modulation subchannel group can correspond to a specific subsegment to be encoded, so that the capacity of each modulation subchannel group and the code rate of the specific subsegment to be encoded are positively correlated, that is, a large-capacity modulation subchannel group corresponds to a specific subsegment to be encoded with a large code rate, and a small-capacity modulation subchannel group corresponds to a specific subsegment to be encoded with a small code rate.

[0199] In step S130, sub-segment encoding is performed on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments.

[0200] As an optional embodiment, performing sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments includes: performing polarization code encoding on each specific sub-segment to be encoded to obtain multiple polarization codes as multiple encoded sub-segments. In this way, polarization code encoding based on sequence segmentation can be implemented, and the flexibility of polarization code encoding can be improved.

[0201] The reference sub-segment to be encoded includes information bits and frozen bits, and the target sub-segment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits. In addition, the target sub-segment to be encoded includes a check code, which is used as information bits and / or pure information bits; the check code includes but is not limited to at least one of the following: a cyclic redundancy check code and a parity check code.

[0202] Specifically, the specific sub-segments to be encoded and the encoding sub-segments are in a one-to-one correspondence, and polarization codes are encoded on each specific sub-segment to be encoded to obtain multiple polarization codes as multiple encoding sub-segments, including: performing polarization code encoding based on an encoder corresponding to each specific sub-segment to be encoded to obtain multiple polarization codes as multiple encoding sub-segments. The multiple encoders can implement parallel encoding.

[0203] In step S140, the corresponding coded sub-segments are modulated into modulation signals through each modulation sub-channel and the modulation signals are sent to the receiving end.

[0204] The receiving end is used to demodulate and decode the modulated signal of the sending end.

[0205] See also Figure 2 , Figure 2 The following schematically shows a flow chart of a coding modulation method according to another embodiment of the present application. Figure 2 As shown, the coding modulation method may include: step S210 to step S270.

[0206] Step S210: Divide the bit sequence to be encoded to obtain a plurality of reference sub-segments to be encoded.

[0207] Step S220: determining a specific bit set for generating each target sub-segment to be encoded from each reference sub-segment to be encoded according to the first sub-segment transformation rule; wherein the first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain constant 0 bits, the XOR operation involving only information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits to obtain mixed bits; and the reference sub-segment to be encoded includes information bits and frozen bits, and the target sub-segment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits; the target sub-segment to be encoded includes a check code, and the check code serves as an information bit and / or a pure information bit; the check code includes but is not limited to at least one of the following: a cyclic redundancy check code and a parity check code.

[0208] Step S230: Perform an XOR operation on at least one specific bit set to obtain multiple target sub-segments to be encoded. When the modulation channel information includes the capacity of each modulation sub-channel, step S240 is performed; when the modulation channel information includes equivalent bit channel reliability information, step S250 is performed.

[0209] Step S240: Determine the code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel; determine the first mapping rule of the specific sub-segment to be encoded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be encoded; determine the second mapping rule between the bits in the multiple target sub-segments to be encoded and the bits in the multiple specific sub-segments to be encoded according to the first mapping rule; wherein the capacity of each modulation sub-channel and the code rate of each specific sub-segment to be encoded are positively correlated. Then, execute step S260.

[0210] Step S250: Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information; determine the number of constant 0 bits and / or frozen bits that need to be allocated to each corresponding specific subsegment to be encoded according to the number of unreliable equivalent bit channels in each modulation subchannel; determine the specific subsegment to be encoded corresponding to each modulation subchannel based on the number of constant 0 bits and / or frozen bits of each specific subsegment to be encoded. Then, execute step S260.

[0211] Step S260: performing polar code encoding on each specific sub-segment to be encoded to obtain multiple polar codes as multiple encoded sub-segments.

[0212] Step S270: modulate the corresponding coded sub-segments into modulated signals through each modulation sub-channel and send the modulated signals to the receiving end.

[0213] It should be noted that steps S210 to S270 are Figure 1 The steps and their embodiments shown correspond to each other. For the specific implementation of steps S210 to S270, please refer to Figure 1 The steps and embodiments shown are not described in detail here.

[0214] It can be seen that implementation Figure 2 The method shown can divide the to-be-coded bit sequence into multiple target to-be-coded sub-segments without changing the polar code length, and map the multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

[0215] See also Figure 3 , Figure 3 The flowchart of the demodulation and decoding method according to an embodiment of the present application is schematically shown. The method is executed by a receiving end, which may be an access network device or a terminal device, or may be other devices that require channel coding, which is not limited in the present embodiment. Figure 3 As shown, the demodulation and decoding method may include: steps S310 to S340.

[0216] Step S310: demodulate the modulated signal sent by the transmitter through each modulation sub-channel to obtain a sequence to be decoded.

[0217] Step S320: Divide the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decode the plurality of sub-segments to be decoded according to the coding rule by a plurality of sub-segment decoders to obtain decoding sub-segments of each sub-segment to be decoded.

[0218] Step S330: Determine a plurality of target decoding sub-segments according to each decoding sub-segment.

[0219] Step S340: performing sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence.

[0220] The sub-segment decoders and the sub-segments to be decoded both correspond to a first preset number m, and each sub-segment to be decoded corresponds to a second preset length n.

[0221] Implementation Figure 3 The method shown can divide the sequence to be decoded into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then determine multiple target decoding sub-segments according to each decoding sub-segment, and obtain a decoding bit sequence by sub-segment transformation and sub-segment merging, so as to achieve the consistency of encoding and decoding processing time without increasing the decoding performance when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is also improved on the decoding side based on the improvement of the encoding flexibility on the encoding side.

[0222] Next, the above steps of this exemplary embodiment are described in more detail.

[0223] In step S310, the modulated signal sent by the transmitting end through each modulation sub-channel is demodulated to obtain a sequence to be decoded.

[0224] Specifically, the sequence to be decoded may correspond to a first preset length.

[0225] In step S320, the sequence to be decoded is divided into a plurality of sub-segments to be decoded, and a plurality of sub-segments to be decoded are decoded respectively by a plurality of sub-segment decoders according to a coding rule to obtain a decoded sub-segment of each sub-segment to be decoded.

[0226] As an optional embodiment, multiple sub-segments to be decoded are decoded by multiple sub-segment decoders according to the coding rules to obtain the decoded sub-segments of each sub-segment to be decoded, including: performing non-continuous deletion list nonSCL decoding on the multiple sub-segments to be decoded to obtain multiple merge paths; and determining multiple decoded sub-segments according to the multiple merge paths. In this way, multiple decoded sub-segments can be obtained based on the non-continuous deletion list nonSCL decoding for multiple sub-segments to be decoded, which is conducive to improving decoding flexibility.

[0227] As an optional embodiment, non-continuous deletion list nonSCL decoding is performed on multiple sub-segments to be decoded to obtain multiple merged paths, including: performing continuous deletion list SCL decoding on each sub-segment to be decoded to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded; performing path splitting between sub-segments on each first decoding path to obtain multiple incomplete second decoding paths; performing frozen bit constraint condition check on the second decoding path, and determining the path that passes the check as the third decoding path; selecting a path with the largest path probability value from the third decoding path as the fourth decoding path; wherein the number of the fourth decoding paths is less than or equal to the first preset threshold; and performing a predetermined number of steps on each first decoding path. The fourth decoding path is divided into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to the second preset threshold, the paths with different probability values ​​in the first decoding path queue are used as alternative decoding paths; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than the second preset threshold, the paths with different probability values ​​before the second preset threshold are selected as alternative decoding paths; based on the alternative decoding paths, non-continuous deletion list nonSCL decoding is continued for each sub-segment to be decoded; when the length of the second decoding path meets the first preset length, multiple merged paths are determined based on each alternative decoding path. In this way, the sub-segment parallel CA-nonSCL decoding method can be implemented, and both continuous deletion list SCL decoding and non-continuous deletion list nonSCL decoding are used for the sub-segments to be decoded, thereby improving decoding flexibility and decoding performance, and reducing hardware complexity and hardware power consumption.

[0228] Specifically, each sub-segment to be decoded 1, 2, ..., m can be subjected to continuous deletion list SCL decoding respectively to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded. Different sub-segments to be decoded correspond to different first path probability sets. The first decoding path can be understood as a path corresponding to a part of the bits in the sub-segment to be decoded. The first path probability set may include multiple path probabilities. For example, if the sub-segment to be decoded 1 is represented as [bit a, bit b, bit c], the probability of bit a being 1 is calculated to be 0.8, and the probability of bit a being 0 is calculated to be 0.2, then the probability set corresponding to bit a is: bit a-[0.8,0.2]. Similarly, if the probability set corresponding to bit b is: bit b-[0.2,0.8]. According to the order of [bit a, bit b, bit c], before the probability corresponding to bit c is calculated, the incomplete first decoding path corresponding to the sub-segment 1 to be decoded can be determined, that is, 0.8 in bit a-[0.8,0.2] can be the first probability of path 1, and 0.2 in bit b-[0.2,0.8] can be the second probability of path 1, path 1: 0.8-0.2. Similarly, path 2: 0.8-0.8, path 3: 0.2-0.2, path 4: 0.2-0.8 can be obtained. Path 1, path 2, path 3, and path 4 can be understood as the incomplete first decoding path corresponding to the sub-segment 1 to be decoded. Based on the probability values ​​corresponding to each path, the probability values ​​corresponding to each path can be calculated. For example, the probability of path 1 is 0.16, the probability of path 2 is 0.64, the probability of path 3 is 0.04, and the probability of path 1 is 0.16. The probability values ​​of each path constitute the first path probability set corresponding to the sub-segment to be decoded.

[0229] Furthermore, each first decoding path can be split between sub-segments to obtain multiple incomplete second decoding paths, that is, the first decoding path of each sub-segment to be decoded can be split between sub-segments. For example, if sub-segment 1 to be decoded corresponds to path 1.1 and path 1.2, and if sub-segment 2 to be decoded corresponds to path 2.1 and path 2.2, path splitting between sub-segments can obtain [path 1.1-path 2.1], [path 1.1-path 2.2], [path 1.2-path 2.1], and [path 1.2-path 2.2] as the second decoding paths.

[0230] Furthermore, the frozen bit constraint condition test can be performed on the second decoding path, and the path that passes the test is determined as the third decoding path, such as [path 1.1-path 2.1], [path 1.1-path 2.2]. And, the path with the largest path probability value is selected from the third decoding path as the fourth decoding path; wherein the number of fourth decoding paths is less than or equal to the first preset threshold (e.g., 10). Specifically, when the number of paths with the largest path probability value is less than or equal to the first preset threshold, all paths with the largest path probability value can be used as the fourth decoding path; when the number of paths with the largest path probability value is greater than the first preset threshold, the paths with the largest path probability value of the first preset threshold can be used as the fourth decoding path.

[0231] In an exemplary embodiment of the present application, the frozen bit constraint condition check is performed on the second decoding path, including: when the final bit is a frozen bit, based on the third sub-segment transformation rule and the fourth mapping rule, checking whether the XOR operation results of the corresponding bits in the plurality of second decoding paths are consistent with the frozen bit. This can improve the decoding performance.

[0232] Among them, the frozen bit can be represented by any set numerical value (such as 0, 1, etc.) or identifier, etc., which is not limited in the embodiment of the present application.

[0233] For example, the first preset number is 2, and the first bit of the first sub-segment in the decoding sub-segment [path 1.1-path 2.1] is a 11 , the first bit of the second sub-segment is a 21 , the first bit of the first sub-segment in the target decoding sub-segment is b 11 Corresponding to a 21 , the first bit of the second sub-segment in the target decoding sub-segment is b 21 Corresponding to a 11 , the first bit of the first sub-segment in the final sub-segment is c 11 , the first bit of the second sub-segment in the final sub-segment is c 21 , if c 11 is a frozen bit (the frozen bit is preset to 0), because b 11 and b 21 The XOR result is equal to c 11 , so when b 11 and b 21 When the XOR operation result is equal to 0, the frozen bit constraint condition is satisfied. 11 Corresponding to a 21 , b 21 Corresponding to a 11 , so when a 11 and a 21 The frozen bit constraint condition is satisfied when the XOR result of a is equal to 0, that is, when a 11and a 21 When the XOR result of a is equal to 0, [path 1.1-path 2.1] satisfies the frozen bit constraint. 11 and a 21 When the XOR operation result is not equal to 0, [path 1.1-path 2.1] does not meet the frozen bit constraint condition, [path 1.1-path 2.1] will be deleted and cannot be retained as an alternative decoding path.

[0234] In an exemplary embodiment of the present application, each fourth decoding path is divided into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded, including: arranging each fourth decoding path from large to small according to the path probability value to obtain a second decoding path queue; dividing the paths in the second decoding path queue into sub-segments and keeping the queue order unchanged to obtain a first decoding path queue of each sub-segment to be decoded. This can help improve decoding performance.

[0235] For example, if there are fourth decoding paths [path 1.1-path 2.1], [path 1.1-path 2.2], [path 1.2-path 2.1], [path 1.2-path 2.2], the fourth decoding paths are arranged from large to small according to the path probability value, and the second decoding path queue {[path 1.2-path 2.1], [path 1.2-path 2.2], [path 1.1-path 2.1], [path 1.1-path 2.2]} can be obtained. The paths in the second decoding path queue are divided into sub-segments and the queue order is kept unchanged, and the first decoding path queues of each sub-segment to be decoded can be obtained, such as the first decoding path queue of sub-segment 1 to be decoded [path 1.2, path 1.2, path 1.1, path 1.1], and the first decoding path queue of sub-segment 2 to be decoded [path 2.1, path 2.2, path 2.1, path 2.2].

[0236] On the one hand, when it is detected that the number of paths with different probability values ​​in the first decoding path queue (e.g., [path 1.2, path 1.2, path 1.1, path 1.1, path 1.1]) is less than or equal to a second preset threshold (e.g., 3), the path [path 1.2, path 1.1] with different probability values ​​in the first decoding path queue is used as an alternative decoding path.

[0237] On the other hand, when it is detected that the number of paths with different probability values ​​in the first decoding path queue (e.g., [path 1.2, path 1.2, path 1.1, path 1.1, path 1.3, path 1.4]) (e.g., 11) is greater than a second preset threshold (e.g., 3), paths with different probability values ​​at most before the second preset threshold (e.g., 3) [path 1.2, path 1.1, path 1.3] are selected as alternative decoding paths.

[0238] Furthermore, non-continuous deletion list nonSCL decoding can be continued for each sub-segment to be decoded based on the alternative decoding path until the decoding of the entire sub-segment to be decoded is completed, and a second decoding path whose length meets the first preset length is obtained. Based on this, multiple merge paths can be determined according to each alternative decoding path.

[0239] As an optional embodiment, multiple decoding sub-segments are determined based on multiple merged paths, including: verifying each merged path based on a preset verification method, determining the merged path that passes the verification and has the highest probability as the decoding path; and dividing the decoding path into sub-segments to obtain multiple decoding sub-segments. In this way, efficient screening of the decoding path can be achieved, a single decoding path can be obtained, the correctness of the decoding path can be improved, and the sub-segment division of the decoding path can be more simply achieved to improve the decoding performance.

[0240] Specifically, the preset check method may include but is not limited to a cyclic redundancy check and a parity check. Among them, the cyclic redundancy check code is used to generate according to the mixed bits and pure information bits / information bits in the sub-segment to be encoded, and the check code bits can be set at the pure information bits / information bits in the sub-segment to be encoded. If multiple check code schemes are adopted, multiple check codes can be generated according to the corresponding mixed bits and pure information bits / information bits in the sub-segment to be encoded, and the bits of multiple check codes can be set at the pure information bits / information bits in the sub-segment to be encoded.

[0241] In step S330, a plurality of target decoding sub-segments are determined according to each decoding sub-segment.

[0242] As an optional embodiment, multiple target decoding sub-segments are determined according to each decoding sub-segment, including: mapping each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain multiple target decoding sub-segments; wherein the target decoding sub-segment and the decoding sub-segment both correspond to a first preset number; wherein the third mapping rule and the first mapping rule on the encoding side are inverse processing of each other; and mapping the bits in each decoding sub-segment to the bits in the target decoding sub-segment according to a fourth mapping rule; wherein the fourth mapping rule and the second mapping rule on the encoding side are inverse processing of each other. In this way, the mapping of the decoding sub-segments can be realized, which is conducive to obtaining an accurate decoding bit sequence.

[0243] Specifically, each decoding sub-segment is mapped to a target decoding sub-segment according to a third mapping rule to obtain multiple target decoding sub-segments, including: based on a mapping method corresponding to the encoding side, each decoding sub-segment is mapped to a target decoding sub-segment according to a third mapping rule to obtain multiple target decoding sub-segments.

[0244] In step S340, sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoding bit sequence.

[0245] As an optional embodiment, sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoding bit sequence, including: selecting a target bit from each target decoding sub-segment, and transforming the target bit into a final bit according to a second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule on the encoding side are inverse processes of each other; determining each final decoding sub-segment based on the final bit; and merging each final decoding sub-segment to obtain a decoding bit sequence. In this way, sub-segment transformation and sub-segment merging can be performed on the target decoding sub-segments obtained by decoding, so that the final decoding bit sequence can be obtained more flexibly.

[0246] Specifically, the decoded bit sequence corresponds to the first preset length N. The second sub-segment transformation rule and the first sub-segment transformation rule on the encoding side are mutually inversely processed and can be understood as follows: based on the constant 0 bit, it can be determined that the bit is obtained by the frozen bit participating in the XOR operation, based on the pure information bit, it can be determined that the bit is obtained by the information bit participating in the XOR operation, based on the mixed bit, it can be determined that the bit is obtained by the frozen bit and the information bit participating in the XOR operation, the frozen bit is directly obtained from the frozen bit, and the information bit is directly obtained from the information bit.

[0247] See also Figure 4 , Figure 4 The flowchart of the demodulation and decoding method according to another embodiment of the present application is schematically shown. Figure 4 As shown, the demodulation and decoding method may include: steps S410 to S460.

[0248] Step S410: demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded, and divide the sequence to be decoded into multiple sub-segments to be decoded.

[0249] Step S420: Perform continuous deletion list SCL decoding on each sub-segment to be decoded, respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded; perform path splitting between sub-segments on each first decoding path, to obtain multiple incomplete second decoding paths; perform frozen bit constraint condition check on the second decoding path, and determine the path that passes the check as the third decoding path; select the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein the number of fourth decoding paths is less than or equal to the first preset threshold; arrange each fourth decoding path from large to small according to the path probability value, to obtain a second decoding path queue; and select the paths in the second decoding path queue. The path is divided into sub-segments and the queue order is kept unchanged to obtain a first decoding path queue for each sub-segment to be decoded; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to a second preset threshold, the paths with different probability values ​​in the first decoding path queue are used as alternative decoding paths; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than the second preset threshold, the paths with different probability values ​​before the second preset threshold number are selected as alternative decoding paths; based on the alternative decoding paths, non-continuous deletion list nonSCL decoding is continued for each sub-segment to be decoded; when the length of the second decoding path meets the first preset length, multiple merged paths are determined based on each alternative decoding path.

[0250] Step S430: verify each merged path based on a preset verification method, determine the merged path that passes the verification and has the highest probability as the decoding path; divide the decoding path into sub-segments to obtain multiple decoding sub-segments.

[0251] Step S440: Map each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain multiple target decoding sub-segments; wherein the target decoding sub-segments and the decoding sub-segments both correspond to a first preset number; wherein the third mapping rule and the first mapping rule on the encoding side are inverse processing of each other; map the bits in each decoding sub-segment to the bits in the target decoding sub-segment according to a fourth mapping rule; wherein the fourth mapping rule and the second mapping rule on the encoding side are inverse processing of each other.

[0252] Step S450: Select target bits from each target decoding sub-segment, and transform the target bits into final bits according to the second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule on the encoding side are inverse processes of each other.

[0253] Step S460: determining each final decoding sub-segment based on the final bit; merging each final decoding sub-segment to obtain a decoding bit sequence.

[0254] It should be noted that steps S410 to S460 are Figure 3The steps and their embodiments shown correspond to each other. For the specific implementation of steps S410 to S460, please refer to Figure 3 The steps and embodiments shown are not described in detail here.

[0255] It can be seen that implementation Figure 4 The method shown can divide the sequence to be decoded into multiple sub-segments to be decoded and decode them in a manner corresponding to the encoding side, and then determine multiple target decoding sub-segments according to each decoding sub-segment, and obtain a decoding bit sequence by sub-segment transformation and sub-segment merging, so as not to increase the processing time for encoding and decoding when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is also improved on the decoding side based on the improvement of the encoding flexibility on the encoding side.

[0256] See also Figure 5 , Figure 5 The following schematically shows a system architecture diagram for performing coding modulation and demodulation decoding according to an embodiment of the present application. Figure 5 As shown, a system 500 for performing coding modulation and demodulation decoding includes a transmitting end 510 and a receiving end 520, wherein:

[0257] The transmitting end 510 is used to divide the to-be-coded bit sequence to obtain a plurality of target to-be-coded sub-segments; map the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information; perform sub-segment coding on each specific to-be-coded sub-segment to obtain a plurality of coded sub-segments; modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel and send the modulation signals to the receiving end 520;

[0258] The receiving end 520 is used to demodulate the modulated signal sent by the transmitting end 510 through each modulation sub-channel to obtain a sequence to be decoded; divide the sequence to be decoded into multiple sub-segments to be decoded, and decode the multiple sub-segments to be decoded respectively according to the coding rules by multiple sub-segment decoders to obtain decoding sub-segments of each sub-segment to be decoded; determine multiple target decoding sub-segments according to each decoding sub-segment; perform sub-segment transformation and sub-segment merging on the multiple target decoding sub-segments to obtain a decoding bit sequence.

[0259] It can be seen that implementation Figure 5The method shown can divide the bit sequence to be encoded into multiple target sub-segments to be encoded without changing the code length of the polar code, and map the multiple target sub-segments to be encoded to specific sub-segments to be encoded corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channel and improving transmission reliability. In addition, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then multiple target decoding sub-segments are determined according to each decoding sub-segment, and the decoded bit sequence is obtained by sub-segment transformation and sub-segment merging, so as to improve the decoding performance without increasing the processing time for encoding and decoding when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is improved on the decoding side on the basis of improving the encoding flexibility on the encoding side.

[0260] See also Figure 6 , Figure 6 The following schematically shows a coding modulation system architecture diagram according to an embodiment of the present application. Figure 6 As shown, the coding modulation system includes: a segmentation module 610, a sub-segment transformation module 620, a sub-segment mapping module 630, a sub-segment encoder 641, a sub-segment encoder 642, ..., a sub-segment encoder 643, a channel mapper 650, a modulation sub-channel 661, a modulation sub-channel 662, ..., a modulation sub-channel 663, and a channel 670.

[0261] The segmentation module 610 may be used to divide the to-be-encoded bit sequence to obtain a plurality of target to-be-encoded sub-segments.

[0262] The sub-segment transformation module 620 can be used to determine a specific bit set for generating each target sub-segment to be encoded from each reference sub-segment to be encoded according to the first sub-segment transformation rule, and perform an XOR operation within the set on at least one specific bit set to obtain multiple target sub-segments to be encoded.

[0263] The sub-segment mapping module 630 can be used to determine the number of unreliable equivalent bit channels in each modulation sub-channel according to the reliability information of the equivalent bit channels; determine the number of constant 0 bits and / or frozen bits that need to be allocated to the corresponding specific sub-segments to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel; determine the specific sub-segments to be encoded corresponding to each modulation sub-channel based on the number of constant 0 bits and / or frozen bits of each specific sub-segment to be encoded. Alternatively, determine the code rate of each specific sub-segment to be encoded corresponding to each modulation sub-channel according to the capacity of each modulation sub-channel; determine the first mapping rule of the specific sub-segment to be encoded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be encoded; determine the second mapping rule between the bits in multiple target sub-segments to be encoded and the bits in multiple specific sub-segments to be encoded according to the first mapping rule; wherein the capacity of each modulation sub-channel is positively correlated with the code rate of each corresponding specific sub-segment to be encoded.

[0264] Subsegment encoder 641, subsegment encoder 642, ..., subsegment encoder 643 may respectively perform polarization code encoding on each specific subsegment to be encoded, to obtain multiple polarization codes as multiple encoded subsegments.

[0265] The channel mapper 650 can be used to map multiple target sub-segments to be encoded into specific sub-segments to be encoded corresponding to each modulation sub-channel one-to-one according to the modulation channel information when the first preset number and the second preset number are consistent; when the first preset number is equal to multiple second preset numbers, map multiple target sub-segments to be encoded into specific sub-segments to be encoded that have a many-to-one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein the multiple specific sub-segments to be encoded correspond to one modulation sub-channel; when multiple first preset numbers are equal to the second preset numbers, map multiple target sub-segments to be encoded into specific sub-segments to be encoded that have a one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein one specific sub-segment to be encoded corresponds to multiple modulation sub-channels.

[0266] Modulation subchannel 661, modulation subchannel 662, ..., modulation subchannel 663 may be used to respectively modulate corresponding coding subsegments into modulation signals and send the modulation signals to a receiving end through channel 670.

[0267] It can be seen that implementation Figure 6 The system shown can divide the to-be-coded bit sequence into multiple target to-be-coded sub-segments without changing the polar code length, and map the multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

[0268] See also Figure 7 , Figure 7 The schematic diagram shows a demodulation and decoding system architecture according to an embodiment of the present application. Figure 7As shown, the demodulation and decoding system includes: a demodulator 710, a channel mapper 720, a sub-segment SCL decoder 731, a sub-segment SCL decoder 732, ..., a sub-segment SCL decoder 733, a sub-segment concatenation / L alternative path selection / verification module 740, a sub-segment mapper 750, a sub-segment transformation module 760, and a sub-segment merging module 770.

[0269] The demodulator 710 may be configured to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded, and divide the sequence to be decoded into a plurality of sub-segments to be decoded.

[0270] The channel mapper 720 may be used to map the sub-segment to be decoded to the corresponding sub-segment SCL decoder according to the channel mapping method.

[0271] Sub-segment SCL decoder 731, sub-segment SCL decoder 732, ..., sub-segment SCL decoder 733 can be used to perform continuous deletion list SCL decoding on each sub-segment to be decoded, and obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded.

[0272] The sub-segment concatenation / L alternative path selection / verification module 740 can be used to split the paths between sub-segments of each first decoding path to obtain multiple incomplete second decoding paths; perform a frozen bit constraint condition check on the second decoding path, and determine the path that passes the check as the third decoding path; select the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein the number of fourth decoding paths is less than or equal to the first preset threshold; arrange each fourth decoding path from large to small according to the path probability value to obtain a second decoding path queue; divide the paths in the second decoding path queue into sub-segments and keep the queue order unchanged to obtain a first decoding path queue for each sub-segment to be decoded; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to the second preset threshold, the paths with different probability values ​​in the first decoding path queue are used as alternative decoding paths; when it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than the second preset threshold, the paths with different probability values ​​before the second preset threshold number are selected as alternative decoding paths.

[0273] In addition, the sub-segment SCL decoder 731, the sub-segment SCL decoder 732, ..., the sub-segment SCL decoder 733 may also be used to continue to perform non-continuous deletion list nonSCL decoding on each to-be-decoded sub-segment based on the alternative decoding path.

[0274] In addition, the sub-segment concatenation / L alternative path selection / verification module 740 can be used to determine multiple merged paths based on each alternative decoding path when the length of the second decoding path meets the first preset length; verify each merged path based on a preset verification method, and determine the merged path that passes the verification and has the highest probability as the decoding path; divide the decoding path into sub-segments to obtain multiple decoding sub-segments.

[0275] The sub-segment mapper 750 can be used to map each decoding sub-segment into a target decoding sub-segment according to a third mapping rule to obtain multiple target decoding sub-segments; wherein the third mapping rule and the first mapping rule on the encoding side are inverse processing of each other; and map the bits in each decoding sub-segment into bits in a target decoding sub-segment according to a fourth mapping rule; wherein the fourth mapping rule and the second mapping rule on the encoding side are inverse processing of each other.

[0276] The sub-segment transformation module 760 can be used to select target bits from each target decoding sub-segment, and transform the target bits into final bits according to the second sub-segment transformation rule, and determine each final decoding sub-segment based on the final bits; wherein the second sub-segment transformation rule and the first sub-segment transformation rule on the encoding side are inverse processing of each other.

[0277] The sub-segment merging module 770 may be used to merge the final decoded sub-segments to obtain a decoded bit sequence.

[0278] It can be seen that implementation Figure 7 The system shown can divide the sequence to be decoded into multiple sub-segments to be decoded and decode them in a manner corresponding to the encoding side, and then determine multiple target decoding sub-segments according to each decoding sub-segment, and obtain a decoding bit sequence by sub-segment transformation and sub-segment merging, so as to improve the decoding performance without increasing the processing time for implementing encoding and decoding when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is also improved on the decoding side based on the improvement of the encoding flexibility on the encoding side.

[0279] See also Figure 8 , Figure 8 The structure block diagram of the coding modulation device according to an embodiment of the present application is schematically shown. Figure 1 The method shown corresponds to Figure 8 As shown, the coding modulation device 800 includes:

[0280] A sub-segment obtaining unit 801 is used to divide the bit sequence to be encoded to obtain a plurality of target sub-segments to be encoded;

[0281] The sub-segment mapping unit 802 is used to map multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information;

[0282] The sub-segment encoding unit 803 is used to perform sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments;

[0283] The modulation and transmission unit 804 is used to modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel and transmit the modulation signals to the receiving end.

[0284] Among them, the bit sequence to be encoded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; the reference sub-segment to be encoded, the target sub-segment to be encoded, and the specific sub-segment to be encoded all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number of second preset lengths.

[0285] It can be seen that implementation Figure 8 The device shown can divide the to-be-coded bit sequence into multiple target to-be-coded sub-segments without changing the code length of the polar code, and map the multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel, thereby achieving equalization of the modulation sub-channels and improving transmission reliability.

[0286] In an exemplary embodiment of the present application, the sub-segment acquisition unit 801 divides the bit sequence to be encoded to obtain a plurality of target sub-segments to be encoded, including:

[0287] Dividing the bit sequence to be encoded to obtain a plurality of reference sub-segments to be encoded;

[0288] Sub-segment transformation is performed on a plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded.

[0289] It can be seen that by implementing this optional embodiment, efficient encoding can be achieved and decoding performance can be guaranteed by dividing the coded bit sequence.

[0290] In an exemplary embodiment of the present application, the sub-segment acquisition unit 801 performs sub-segment transformation on a plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded, including:

[0291] Determining, from each reference to-be-encoded sub-segment according to the first sub-segment transformation rule, a specific bit set for generating each target to-be-encoded sub-segment;

[0292] Performing an exclusive OR operation within the at least one specific bit set to obtain a plurality of target sub-segments to be encoded;

[0293] The first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain constant 0 bits, the XOR operation involving only information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits to obtain mixed bits.

[0294] The reference sub-segment to be encoded includes information bits and frozen bits, and the target sub-segment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits.

[0295] The target sub-segment to be encoded includes a check code, and the check code serves as an information bit and / or a pure information bit; the check code includes at least one of the following: a cyclic redundancy check code and a parity check code.

[0296] It can be seen that by implementing this optional embodiment, the transformation of the sub-segment to be encoded can be achieved through the first sub-segment transformation rule, which is conducive to improving the coding flexibility.

[0297] In an exemplary embodiment of the present application, the sub-segment encoding unit 803 performs sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments, including:

[0298] Polar code encoding is performed on each specific sub-segment to be encoded to obtain multiple polar codes as multiple encoded sub-segments.

[0299] It can be seen that by implementing this optional embodiment, polar code encoding based on sequence segmentation can be implemented, and the flexibility of polar code encoding can be improved.

[0300] In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation subchannel, and the subsegment mapping unit 802 maps multiple target to-be-coded subsegments to specific to-be-coded subsegments corresponding to each modulation subchannel according to the modulation channel information, including:

[0301] Determine the code rate of each specific sub-segment to be encoded according to the capacity of each modulation sub-channel;

[0302] Determine a first mapping rule for specific sub-segments to be coded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be coded;

[0303] Determine, according to the first mapping rule, a second mapping rule between bits in a plurality of target to-be-encoded subsegments and bits in a plurality of specific to-be-encoded subsegments;

[0304] There is a positive correlation between the capacity of each modulation sub-channel and the corresponding code rate of each specific sub-segment to be encoded.

[0305] It can be seen that by implementing this optional embodiment, specific sub-segments to be encoded with different code rates can be mapped to modulation sub-channels with different channel capacities based on the capacity of each modulation sub-channel, so that specific sub-segments to be encoded with a large code rate correspond to modulation sub-channels with a large capacity, and specific sub-segments to be encoded with a small code rate correspond to modulation sub-channels with a small capacity, thereby achieving balance of modulation sub-channels and improving transmission reliability.

[0306] In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and the sub-segment mapping unit 802 maps multiple target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information, including:

[0307] Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

[0308] Determine the number of constant 0 bits and / or frozen bits that need to be allocated to each corresponding specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

[0309] The specific sub-segment to be encoded corresponding to each modulated sub-channel is determined based on the constant 0 bit number and / or the frozen bit number of each specific sub-segment to be encoded.

[0310] It can be seen that by implementing this optional embodiment, specific sub-segments to be encoded with different code rates can be mapped to modulation sub-channels with different channel capacities based on the preset equivalent bit channel reliability information, so that specific sub-segments to be encoded with a large code rate correspond to modulation sub-channels with a large capacity, and specific sub-segments to be encoded with a small code rate correspond to modulation sub-channels with a small capacity more efficiently, thereby achieving balance of modulation sub-channels and improving transmission reliability.

[0311] In an exemplary embodiment of the present application, the modulation subchannel corresponds to the second preset number, and the subsegment mapping unit 802 maps the multiple target to-be-coded subsegments to specific to-be-coded subsegments corresponding to each modulation subchannel according to the modulation channel information, including:

[0312] When the first preset number and the second preset number are consistent, mapping the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel one by one according to the modulation channel information;

[0313] When the first preset number is equal to the plurality of second preset numbers, mapping the plurality of target sub-segments to be coded to specific sub-segments to be coded that have a many-to-one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein the plurality of specific sub-segments to be coded correspond to one modulation sub-channel;

[0314] When multiple first preset numbers are equal to the second preset number, multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded that have a one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein one specific sub-segment to be encoded corresponds to multiple modulation sub-channels.

[0315] It can be seen that by implementing this optional embodiment, a suitable corresponding method can be selected based on the first preset number and the second preset number, which is beneficial to improving the modulation flexibility and the transmission reliability of the modulation sub-channel.

[0316] Since the various functional modules of the coding and modulation device in the example embodiment of the present application correspond to the steps of the example embodiment of the coding and modulation method described above, for details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the coding and modulation method described above in the present application.

[0317] See also Fig. 9 , Fig. 9 The structure block diagram of the demodulation and decoding device according to an embodiment of the present application is schematically shown. Figure 3 The method shown corresponds to Fig. 9 As shown, the demodulation and decoding device 900 includes:

[0318] The receiving demodulation unit 901 is used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded;

[0319] The first decoding unit 902 is used to divide the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decode the plurality of sub-segments to be decoded according to the coding rule by using a plurality of sub-segment decoders to obtain decoding sub-segments of each sub-segment to be decoded;

[0320] A second decoding unit 903, configured to determine a plurality of target decoding sub-segments according to each decoding sub-segment;

[0321] The third decoding unit 904 is used to perform sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence.

[0322] The sub-segment decoders and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

[0323] It can be seen that implementation Fig. 9The device shown can divide the sequence to be decoded into multiple sub-segments to be decoded and decode them in a manner corresponding to the encoding side, and then determine multiple target decoding sub-segments according to each decoding sub-segment, and obtain a decoding bit sequence by sub-segment transformation and sub-segment merging, so as to improve the decoding performance without increasing the processing time for implementing encoding and decoding when the destination outputs the bit sequence in serial. In addition, since multiple sub-segments to be decoded can be decoded respectively according to the encoding rules by multiple sub-segment decoders, the decoding flexibility is also improved on the decoding side based on the improvement of the encoding flexibility on the encoding side.

[0324] In an exemplary embodiment of the present application, the first decoding unit 902 decodes the multiple sub-segments to be decoded respectively according to the coding rule by using multiple sub-segment decoders to obtain the decoded sub-segments of each sub-segment to be decoded, including:

[0325] Performing non-SCL decoding on multiple sub-segments to be decoded to obtain multiple merge paths;

[0326] A plurality of decoding sub-segments are determined according to the plurality of merging paths.

[0327] It can be seen that by implementing this optional embodiment, multiple decoding sub-segments can be obtained by decoding based on the non-continuous deletion list nonSCL for multiple sub-segments to be decoded, which is beneficial to improving decoding flexibility.

[0328] In an exemplary embodiment of the present application, the first decoding unit 902 performs non-continuous deletion list nonSCL decoding on multiple sub-segments to be decoded to obtain multiple merging paths, including:

[0329] Performing continuous deletion list SCL decoding on each sub-segment to be decoded, respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

[0330] Splitting each first decoding path between sub-segments to obtain a plurality of incomplete second decoding paths;

[0331] Performing a frozen bit constraint check on the second decoding path, and determining a path that passes the check as a third decoding path;

[0332] Selecting a path with the largest path probability value from the third decoding paths as a fourth decoding path; wherein the number of the fourth decoding paths is less than or equal to a first preset threshold;

[0333] Divide each fourth decoding path into sub-segments to obtain a first decoding path queue of each to-be-decoded sub-segment;

[0334] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to a second preset threshold, taking the paths with different probability values ​​in the first decoding path queue as candidate decoding paths;

[0335] When it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values ​​before the second preset threshold as candidate decoding paths;

[0336] Continue to perform non-continuous deletion list nonSCL decoding on each sub-segment to be decoded based on the alternative decoding path;

[0337] When the length of the second decoding path satisfies the first preset length, a plurality of merging paths are determined based on the candidate decoding paths.

[0338] It can be seen that the implementation of this optional embodiment can realize the sub-segment parallel CA-SCL-full sub-segment optimal method, and use both continuous deletion list SCL decoding and non-continuous deletion list nonSCL decoding for the decoding sub-segment, thereby improving decoding flexibility and reducing hardware complexity and hardware power consumption.

[0339] In an exemplary embodiment of the present application, the first decoding unit divides each fourth decoding path into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded, including:

[0340] Arrange the fourth decoding paths from large to small according to the path probability values ​​to obtain a second decoding path queue;

[0341] The paths in the second decoding path queue are divided into sub-segments while keeping the queue order unchanged, so as to obtain the first decoding path queue of each sub-segment to be decoded.

[0342] It can be seen that implementing this optional embodiment can be beneficial to improving decoding performance.

[0343] In an exemplary embodiment of the present application, the first decoding unit 902 determines a plurality of decoding sub-segments according to a plurality of merging paths, including:

[0344] Verify each merged path based on a preset verification method, and determine the merged path that passes the verification and has the highest probability as the decoding path;

[0345] The decoding path is divided into sub-segments to obtain a plurality of decoding sub-segments.

[0346] It can be seen that the implementation of this optional embodiment can achieve efficient screening of decoding paths, obtain a single decoding path, improve the correctness of the decoding path, and thus facilitate easier implementation of sub-segment division of the decoding path to improve decoding performance.

[0347] In an exemplary embodiment of the present application, the second decoding unit 903 determines a plurality of target decoding sub-segments according to each decoding sub-segment, including:

[0348] Mapping each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain a plurality of target decoding sub-segments; wherein the target decoding sub-segments and the decoding sub-segments both correspond to a first preset number;

[0349] The third mapping rule and the first mapping rule on the encoding side are inverse processes of each other;

[0350] Mapping the bits in each decoding sub-segment to the bits in the target decoding sub-segment according to a fourth mapping rule;

[0351] The fourth mapping rule and the second mapping rule on the encoding side are inverse processes of each other.

[0352] It can be seen that the implementation of this optional embodiment can achieve the mapping of the decoding sub-segments, which is conducive to obtaining an accurate decoding bit sequence.

[0353] In an exemplary embodiment of the present application, the third decoding unit 904 performs sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence, including:

[0354] Selecting a target bit from each target decoding sub-segment, and transforming the target bit into a final bit according to a second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule at the encoding side are inverse processes of each other;

[0355] Determining each final decoded sub-segment based on the final bit;

[0356] The final decoded sub-segments are combined to obtain a decoded bit sequence.

[0357] It can be seen that by implementing this optional embodiment, sub-segment transformation and sub-segment merging can be performed on the target decoding sub-segments obtained by efficient decoding, so that the final decoding bit sequence can be obtained more flexibly.

[0358] In an exemplary embodiment of the present application, the first decoding unit performs a frozen bit constraint check on the second decoding path, including:

[0359] When the final bit is a frozen bit, based on the third sub-segment transformation rule and the fourth mapping rule, it is checked whether the XOR operation results of the corresponding bits in the plurality of second decoding paths are consistent with the frozen bit.

[0360] It can be seen that implementing this optional embodiment can improve decoding performance.

[0361] Since the various functional modules of the demodulation and decoding device in the example embodiment of the present application correspond to the steps of the example embodiment of the demodulation and decoding method described above, for details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the demodulation and decoding method described above in the present application.

[0362] It should be noted that, although several modules or units of the equipment for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into being embodied by multiple modules or units.

[0363] See also Fig.10 , Fig.10 A schematic diagram of the structure of a computer system suitable for implementing an electronic device of an embodiment of the present application is shown.

[0364] It should be noted that Fig.10 The computer system 1000 of the electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0365] like Fig.10 As shown, the computer system 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage part 1008 into a random access memory (RAM) 1003. Various programs and data required for system operation are also stored in the RAM 1003. The CPU 1001, the ROM 1002, and the RAM 1003 are connected to each other via a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.

[0366] The following components are connected to the I / O interface 1005: an input section 1006 including a keyboard, a mouse, etc.; an output section 1007 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN card, a modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I / O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1010 as needed, so that a computer program read therefrom is installed into the storage section 1008 as needed.

[0367] In particular, according to an embodiment of the present application, the process described with reference to the flowchart above can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through the communication part 1009, and / or installed from a removable medium 1011. When the computer program is executed by the central processing unit (CPU) 1001, various functions defined in the method and apparatus of the present application are executed.

[0368] As another aspect, the present application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiment; or may exist independently without being assembled into the electronic device. The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the method described in the above embodiment.

[0369] It should be noted that the computer-readable medium shown in the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0370] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the above-mentioned module, program segment or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0371] The units involved in the embodiments described in this application may be implemented by software or hardware, and the units described may also be set in a processor. The names of these units do not, in some cases, constitute limitations on the units themselves.

[0372] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary technical means in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the aforementioned claims.

Claims

1. A coding modulation method, characterized in that: The method is performed by a sending end, and the method includes: Dividing the bit sequence to be encoded to obtain a plurality of target sub-segments to be encoded; Mapping the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information; the modulation channel information includes the capacity of each modulation sub-channel or equivalent bit channel reliability information; Performing sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments; Modulating the corresponding coded sub-segments into modulation signals respectively through the modulation sub-channels and sending the modulation signals to the receiving end; The mapping of the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information includes: Determine the corresponding code rate of each specific sub-segment to be coded according to the capacity of each modulation sub-channel; determine a first mapping rule for the specific sub-segment to be coded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be coded; determine a second mapping rule between bits in the multiple target sub-segments to be coded and bits in the multiple specific sub-segments to be coded according to the first mapping rule; or Determine the number of unreliable equivalent bit channels in each modulation sub-channel according to the equivalent bit channel reliability information; determine the number of constant 0 bits and / or the number of frozen bits that need to be allocated to the corresponding specific sub-segments to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel; determine the specific sub-segments to be encoded corresponding to each modulation sub-channel based on the number of constant 0 bits and / or the number of frozen bits of each specific sub-segment to be encoded.

2. The method according to claim 1, characterized in that The bit sequence to be encoded is divided to obtain multiple target sub-segments to be encoded, including: Dividing the bit sequence to be encoded to obtain a plurality of reference sub-segments to be encoded; Sub-segment transformation is performed on the multiple reference sub-segments to be encoded to obtain multiple target sub-segments to be encoded.

3. The method according to claim 2, characterized in that The bit sequence to be encoded corresponds to a first preset length, which is equal to an integer power of 2; the reference sub-segment to be encoded, the target sub-segment to be encoded, and the specific sub-segment to be encoded all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number times the second preset length.

4. The method according to claim 2, characterized in that: Performing sub-segment transformation on the multiple reference sub-segments to be encoded to obtain multiple target sub-segments to be encoded includes: Determining, from each reference to-be-encoded sub-segment according to the first sub-segment transformation rule, a specific bit set for generating each target to-be-encoded sub-segment; Performing an exclusive OR operation within the at least one specific bit set to obtain a plurality of target sub-segments to be encoded; Among them, the first sub-segment transformation rule is used to limit the XOR operation involving only frozen bits to obtain constant 0 bits, the XOR operation involving only information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits to obtain mixed bits.

5. The method according to claim 1, characterized in that Sub-segment encoding is performed on each specific sub-segment to be encoded to obtain multiple encoded sub-segments, including: Polar code encoding is performed on each specific sub-segment to be encoded to obtain multiple polar codes as multiple encoded sub-segments.

6. The method according to any one of claims 2, 4 and 5, characterized in that: The reference sub-segment to be encoded includes information bits and frozen bits, and the target sub-segment to be encoded includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits.

7. The method according to claim 6, characterized in that The target sub-segment to be encoded includes a check code, and the check code serves as an information bit and / or a pure information bit; the check code includes at least one of the following: a cyclic redundancy check code and a parity check code.

8. The method according to claim 1, characterized in that There is a positive correlation between the capacity of each modulation sub-channel and the code rate of each corresponding specific sub-segment to be encoded.

9. The method according to claim 3, characterized in that: The modulation subchannel corresponds to a second preset number, and mapping the multiple target to-be-coded subsegments to specific to-be-coded subsegments corresponding to each modulation subchannel according to the modulation channel information includes: When the first preset number is consistent with the second preset number, mapping the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel one by one according to the modulation channel information; When the first preset number is equal to a plurality of the second preset numbers, mapping the plurality of target sub-segments to be coded to specific sub-segments to be coded that have a many-to-one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein the plurality of specific sub-segments to be coded correspond to one modulation sub-channel; When multiple first preset numbers are equal to the second preset number, the multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded that have a one-to-many relationship with each modulation sub-channel according to the modulation channel information; wherein one specific sub-segment to be encoded corresponds to multiple modulation sub-channels.

10. A demodulation and decoding method, characterized in that: The method is performed by a receiving end, and the method includes: Demodulating the modulated signal sent by the transmitter through each modulation sub-channel to obtain a sequence to be decoded; The sequence to be decoded is divided into a plurality of sub-segments to be decoded, and the plurality of sub-segments to be decoded are respectively decoded by a plurality of sub-segment decoders according to a coding rule to obtain decoding sub-segments of each sub-segment to be decoded, including: performing non-continuous deletion list nonSCL decoding on the plurality of sub-segments to be decoded to obtain a plurality of merge paths; determining a plurality of decoding sub-segments according to the plurality of merge paths; wherein the plurality of merge paths are obtained by: performing continuous deletion list SCL decoding on each sub-segment to be decoded to obtain a non-complete first decoding sub-segment of each sub-segment to be decoded a first path probability set of a path; splitting the paths between sub-segments of the first decoding paths to obtain a plurality of incomplete second decoding paths; performing a frozen bit constraint condition test on the second decoding paths, and determining the paths that pass the test as third decoding paths; selecting a path with the largest path probability value from the third decoding paths as a fourth decoding path; dividing the fourth decoding paths into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded; determining an alternative decoding path according to the first decoding path queue, and determining a plurality of merged paths according to the alternative decoding paths; Determine a plurality of target decoding sub-segments according to each decoding sub-segment; Sub-segment transformation and sub-segment merging are performed on the multiple target decoding sub-segments to obtain a decoding bit sequence.

11. The method according to claim 10, characterized in that The sub-segment decoders and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

12. The method according to claim 10, characterized in that Determining an alternative decoding path according to the first decoding path queue, and determining a plurality of merging paths according to the alternative decoding paths, including: When it is detected that the number of paths with different probability values ​​in the first decoding path queue is less than or equal to a second preset threshold, taking the paths with different probability values ​​in the first decoding path queue as candidate decoding paths; When it is detected that the number of paths with different probability values ​​in the first decoding path queue is greater than the second preset threshold, selecting paths with different probability values ​​before the second preset threshold as candidate decoding paths; Continue to perform non-continuous deletion list nonSCL decoding on each sub-segment to be decoded based on the alternative decoding path; When the length of the second decoding path satisfies the first preset length, a plurality of merging paths are determined based on the candidate decoding paths.

13. The method according to claim 10, characterized in that Each fourth decoding path is divided into sub-segments to obtain a first decoding path queue of each sub-segment to be decoded, including: Arrange the fourth decoding paths from large to small according to the path probability values ​​to obtain a second decoding path queue; The paths in the second decoding path queue are divided into sub-segments while keeping the queue order unchanged, so as to obtain the first decoding path queue of each sub-segment to be decoded.

14. The method according to claim 10, characterized in that Determining a plurality of decoding sub-segments according to the plurality of merging paths comprises: Verify each merged path based on a preset verification method, and determine the merged path that passes the verification and has the highest probability as the decoding path; The decoding path is divided into sub-segments to obtain a plurality of decoding sub-segments.

15. The method according to claim 10, characterized in that A plurality of target decoding sub-segments are determined according to each decoding sub-segment, including: Mapping each decoding sub-segment to a target decoding sub-segment according to a third mapping rule to obtain a plurality of target decoding sub-segments; wherein the target decoding sub-segments and the decoding sub-segments both correspond to a first preset number; wherein the third mapping rule and the first mapping rule on the encoding side are inverse processing of each other; The bits in each decoding sub-segment are mapped to the bits in the target decoding sub-segment according to a fourth mapping rule; wherein the fourth mapping rule and the second mapping rule at the encoding side are inverse processing of each other.

16. The method according to claim 10, characterized in that Performing sub-segment transformation and sub-segment merging on the multiple target decoding sub-segments to obtain a decoding bit sequence, including: Selecting a target bit from each target decoding sub-segment, and transforming the target bit into a final bit according to a second sub-segment transformation rule; wherein the second sub-segment transformation rule and the first sub-segment transformation rule at the encoding side are inverse processes of each other; Determining each final decoded sub-segment based on the final bit; The final decoded sub-segments are combined to obtain a decoded bit sequence.

17. The method according to claim 10, characterized in that Performing a frozen bit constraint check on the second decoding path includes: When the final bit is a frozen bit, based on the third sub-segment transformation rule and the fourth mapping rule, it is checked whether the XOR operation results of the corresponding bits in the plurality of second decoding paths are consistent with the frozen bit.

18. A coding modulation device, characterized in that: The device comprises: A sub-segment acquisition unit, used for dividing the to-be-encoded bit sequence to obtain a plurality of target to-be-encoded sub-segments; A subsegment mapping unit, configured to map the plurality of target to-be-coded subsegments to specific to-be-coded subsegments corresponding to each modulation subchannel according to modulation channel information; the modulation channel information includes the capacity of each modulation subchannel or equivalent bit channel reliability information; A sub-segment encoding unit, used for performing sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments; A modulation and transmission unit, configured to modulate the corresponding coded sub-segments into modulation signals through the modulation sub-channels and transmit the modulation signals to a receiving end; The mapping of the plurality of target to-be-coded sub-segments to specific to-be-coded sub-segments corresponding to each modulation sub-channel according to the modulation channel information includes: Determine the corresponding code rate of each specific sub-segment to be coded according to the capacity of each modulation sub-channel; determine a first mapping rule for the specific sub-segment to be coded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be coded; determine a second mapping rule between bits in the multiple target sub-segments to be coded and bits in the multiple specific sub-segments to be coded according to the first mapping rule; or Determine the number of unreliable equivalent bit channels in each modulation sub-channel according to the equivalent bit channel reliability information; determine the number of constant 0 bits and / or the number of frozen bits that need to be allocated to the corresponding specific sub-segments to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel; determine the specific sub-segments to be encoded corresponding to each modulation sub-channel based on the number of constant 0 bits and / or the number of frozen bits of each specific sub-segment to be encoded.

19. A demodulation and decoding device, characterized in that: The device comprises: A receiving demodulation unit, used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded; The first decoding unit is used to divide the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decode the plurality of sub-segments to be decoded according to the coding rules by a plurality of sub-segment decoders to obtain decoding sub-segments of each sub-segment to be decoded, including: performing non-continuous deletion list nonSCL decoding on the plurality of sub-segments to be decoded to obtain a plurality of merge paths; determining a plurality of decoding sub-segments according to the plurality of merge paths; wherein the plurality of merge paths are obtained by: performing continuous deletion list SCL decoding on each sub-segment to be decoded to obtain a non-complete A first path probability set of a first decoding path; performing path splitting between sub-segments on each of the first decoding paths to obtain a plurality of incomplete second decoding paths; performing a frozen bit constraint condition test on the second decoding path, and determining the path that passes the test as a third decoding path; selecting a path with the largest path probability value from the third decoding path as a fourth decoding path; performing sub-segment division on each fourth decoding path to obtain a first decoding path queue of each sub-segment to be decoded; determining an alternative decoding path according to the first decoding path queue, and determining a plurality of merged paths according to the alternative decoding paths; A second decoding unit, used for determining a plurality of target decoding sub-segments according to each decoding sub-segment; The third decoding unit is used to perform sub-segment transformation and sub-segment merging on the multiple target decoding sub-segments to obtain a decoding bit sequence.

20. A system for performing coding modulation and demodulation decoding, characterized in that: The system comprises a transmitting end and a receiving end, wherein: The transmitting end is used to divide the bit sequence to be coded to obtain multiple target sub-segments to be coded; map the multiple target sub-segments to be coded to specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information; the modulation channel information includes the capacity of each modulation sub-channel or equivalent bit channel reliability information; perform sub-segment coding on each specific sub-segment to be coded to obtain multiple coded sub-segments; modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel and send the modulation signals to the receiving end; wherein, mapping the multiple target sub-segments to be coded to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information includes: Determine the corresponding code rate of each specific sub-segment to be coded according to the capacity of each modulation sub-channel; determine a first mapping rule for the specific sub-segment to be coded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be coded; determine a second mapping rule between bits in the multiple target sub-segments to be coded and bits in the multiple specific sub-segments to be coded according to the first mapping rule; or Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information; determine the number of constant 0 bits and / or the number of frozen bits that need to be allocated to each corresponding specific subsegment to be encoded according to the number of unreliable equivalent bit channels in each modulation subchannel; determine the specific subsegment to be encoded corresponding to each modulation subchannel based on the number of constant 0 bits and / or the number of frozen bits of each specific subsegment to be encoded; The receiving end is used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded; divide the sequence to be decoded into multiple sub-segments to be decoded, and respectively decode the multiple sub-segments to be decoded according to the coding rules by multiple sub-segment decoders to obtain the decoding sub-segments of each sub-segment to be decoded; determine multiple target decoding sub-segments according to each decoding sub-segment; perform sub-segment transformation and sub-segment merging on the multiple target decoding sub-segments to obtain a decoding bit sequence; wherein, the multiple sub-segments to be decoded are respectively decoded by multiple sub-segment decoders according to the coding rules, including: performing non-continuous deletion list nonSCL decoding on the multiple sub-segments to be decoded to obtain multiple merging paths; determining multiple decoding sub-segments according to the multiple merging paths ; Wherein, the multiple merged paths are obtained in the following manner: perform continuous deletion list SCL decoding on each sub-segment to be decoded, and obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded; perform path splitting between sub-segments on each first decoding path, and obtain multiple incomplete second decoding paths; perform frozen bit constraint condition test on the second decoding path, and determine the path that passes the test as the third decoding path; select the path with the largest path probability value from the third decoding path as the fourth decoding path; divide each fourth decoding path into sub-segments, and obtain a first decoding path queue for each sub-segment to be decoded; determine an alternative decoding path based on the first decoding path queue, and determine multiple merged paths based on the alternative decoding paths.

21. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the coding and modulation method according to any one of claims 1 to 9 or the demodulation and decoding method according to any one of claims 10 to 17 is implemented.

22. An electronic device, characterized in that: include: processor; as well as A memory, configured to store executable instructions of the processor; The processor is configured to execute the coding and modulation method described in any one of claims 1 to 9 or the demodulation and decoding method described in any one of claims 10 to 17 by executing the executable instructions.

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