Modulation method of three-level inverter, electronic equipment and storage medium

Abstract

The invention discloses a modulation method of a three-level inverter, electronic equipment and a storage medium, and the modulation method comprises the steps: calculating a voltage difference value between the voltage at the two ends of a lower capacitor and the voltage at the two ends of an upper capacitor; respectively calculating the product of the voltage difference value and each phase current to obtain a plurality of midpoint balance judgment components, and determining a midpoint voltage compensation component according to the symbols of all the midpoint balance judgment components; performing proportional equalization processing on the neutral-point voltage compensation component to obtain a neutral-point voltage balance component; and superposing the neutral-point voltage balance component and the obtained zero-sequence voltage compensation component to an original modulation signal of the three-level inverter to obtain a target modulation signal. In the invention, a proportion control link is added for the loop injected with the common-mode component, so that a space can be created for injecting the zero-sequence component for the direct-current bus, the balance of the neutral-point voltage and the suppression of the zero-sequence circulating current are realized, the circulating current consumption is effectively reduced, and the electric energy quality and the transmission efficiency are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a modulation method of a three-level inverter, an electronic device and a computer-readable storage medium. Background Art

[0002] In recent years, the combination of new energy field and power electronics technology has developed rapidly. Three-level inverters have been widely used in the field of power electronics. Compared with traditional two-level inverters, they have some obvious advantages, such as the voltage borne by each power tube is half of that on the DC side, and the harmonic content of the output waveform is greatly reduced at the same switching frequency; its voltage change rate is smaller, and electromagnetic interference is also smaller. In actual three-level inverters (such as NPC three-level inverters), by accurately controlling the injection of common-mode components, the midpoint voltage can be effectively regulated, thereby achieving the midpoint voltage balance of the inverter. However, during the regulation process, when the maximum value of the three-phase modulation wave is clamped at the amplitude, such as the maximum modulation signal is clamped to +1, the minimum modulation signal is clamped to -1, or the median modulation signal is clamped to 0, there is no additional space on the DC bus to inject the zero-sequence component, and it is impossible to correct the three-phase modulation wave by feeding back the zero-sequence circulating current signal, so it is impossible to simultaneously achieve balanced midpoint voltage and suppress low-frequency zero-sequence circulating current. Summary of the invention

[0003] The present invention aims to solve one of the technical problems in the related art to at least some extent. To this end, the present invention proposes a modulation method, an electronic device and a computer-readable storage medium for a three-level inverter, which can simultaneously achieve the balance of the midpoint voltage and the suppression of the zero-sequence circulating current.

[0004] In a first aspect, an embodiment of the present invention provides a modulation method for a three-level inverter, comprising:

[0005] Acquire each phase current of the three-level inverter, the voltage across the lower capacitor and the voltage across the upper capacitor, and calculate the voltage difference between the voltage across the lower capacitor and the voltage across the upper capacitor;

[0006] respectively calculating the product of the voltage difference and each of the phase currents to obtain a plurality of midpoint balance judgment components, and determining a midpoint voltage compensation component according to the signs of all the midpoint balance judgment components;

[0007] Performing proportional balancing processing on the midpoint voltage compensation component to obtain a midpoint voltage balance component, wherein a ratio of the midpoint voltage balance component to the midpoint voltage compensation component is between 0 and 1;

[0008] The midpoint voltage balance component and the acquired zero-sequence voltage compensation component are superimposed on the original modulation signal of the three-level inverter to obtain a target modulation signal.

[0009] Optionally, in one embodiment of the present invention, performing proportional balancing processing on the midpoint voltage compensation component to obtain the midpoint voltage balance component includes:

[0010] The midpoint voltage compensation component is multiplied by the acquired balancing ratio parameter to obtain a corresponding midpoint voltage balancing component, wherein the balancing ratio parameter is greater than 0 and less than 1.

[0011] Optionally, in one embodiment of the present invention, the balancing ratio parameter is obtained by the following formula:

[0012]

[0013] Among them, K p is the equilibrium ratio parameter, m is the preset specific gravity coefficient, V dc-half-min is the smaller of the voltage across the lower capacitor and the voltage across the upper capacitor, V dc-half-max is the larger of the voltage across the lower capacitor and the voltage across the upper capacitor.

[0014] Optionally, in one embodiment of the present invention, determining the midpoint voltage compensation component according to the signs of all the midpoint balance judgment components includes:

[0015] Select any two of the midpoint balance judgment components from all the midpoint balance judgment components, and simultaneously determine the positive and negative signs of the selected two midpoint balance judgment components;

[0016] According to the positive and negative signs of the two selected midpoint balance judgment components, the midpoint voltage compensation component required by the three-level inverter in the current state is determined.

[0017] Optionally, in one embodiment of the present invention, the zero-sequence voltage compensation component is obtained by the following steps:

[0018] Subtracting a preset zero-sequence circulating current reference value from the acquired zero-sequence circulating current value of the three-level inverter to obtain a zero-sequence difference component;

[0019] The zero-sequence difference component is input into a preconfigured PI controller to obtain the zero-sequence voltage compensation component output by the PI controller.

[0020] Optionally, in one embodiment of the present invention, the zero-sequence circulating current reference value is 0.

[0021] In a second aspect, an embodiment of the present invention provides an electronic device, including:

[0022] at least one processor;

[0023] at least one memory for storing at least one program;

[0024] When at least one of the programs is executed by at least one of the processors, the modulation method of the three-level inverter as described in the first aspect is implemented.

[0025] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium storing a program executable by a processor, wherein the program executable by the processor is used to implement the modulation method of the three-level inverter as described in the first aspect when executed by the processor.

[0026] Compared with the related prior art, the modulation method, electronic device and computer-readable storage medium of the three-level inverter proposed in the present invention perform proportional balancing processing on the midpoint voltage compensation component on the basis of the carrier pulse width modulation strategy based on common-mode component injection, that is, add a proportional control link to the loop for injecting common-mode components, so that the ratio of the midpoint voltage balance component to the midpoint voltage compensation component is between 0 and 1. In this case, the maximum value of the three-phase modulation wave will no longer be clamped at the amplitude, so that space can be created for injecting zero-sequence components into the DC bus, and the midpoint voltage balance component and the determined zero-sequence voltage compensation component can be superimposed on the original modulation signal at the same time, so that the balance of the midpoint voltage and the suppression of the zero-sequence circulating current can be achieved. In application scenarios such as energy storage converters and new energy grid-connected converters, the circulating current consumption can be effectively reduced, and the power quality and transmission efficiency can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a flow chart of a modulation method of a three-level inverter provided by an embodiment of the present invention;

[0028] Figure 2 is a circuit topology diagram of a parallel NPC type three-level inverter provided by an embodiment of the present invention;

[0029] Figure 3 yes Figure 2 Schematic diagram of the bridge arm midpoint of the circuit topology shown;

[0030] Figure 4 is a spatial voltage vector and its sector distribution diagram provided by an embodiment of the present invention;

[0031] Figure 5 1 is a schematic diagram of the principle of a modulation method for a three-level inverter provided by an embodiment of the present invention;

[0032] Figure 6 yes Figure 1 Flowchart of step S3000 in FIG.

[0033] Figure 7 yes Figure 1A partial flow chart of the step "determining the midpoint voltage compensation component according to the signs of all midpoint balance judgment components" in step S2000;

[0034] Figure 8 is a control strategy block diagram of a modulation method based on a three-level inverter provided by an embodiment of the present invention;

[0035] Fig. 9 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0037] It should be noted that although the functional modules are divided in the device schematic and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart.

[0038] Figure 1 The present invention provides a flow chart of a modulation method of a three-level inverter according to an embodiment of the present invention, wherein the three-level inverter includes a lower capacitor and an upper capacitor. Figure 1 As shown, the modulation method of the three-level inverter may include but is not limited to steps S1000 to S4000.

[0039] Step S1000, obtaining each phase current of the three-level inverter, the voltage across the lower capacitor and the voltage across the upper capacitor, and calculating the voltage difference between the voltage across the lower capacitor and the voltage across the upper capacitor;

[0040] Step S2000, respectively calculating the product of the voltage difference and each phase current to obtain a plurality of midpoint balance judgment components, and determining the midpoint voltage compensation component according to the signs of all the midpoint balance judgment components;

[0041] Step S3000, performing proportional balancing processing on the midpoint voltage compensation component to obtain a midpoint voltage balance component, wherein the ratio of the midpoint voltage balance component to the midpoint voltage compensation component is between 0 and 1;

[0042] Step S4000: superimpose the midpoint voltage balance component and the acquired zero-sequence voltage compensation component on the original modulation signal of the three-level inverter to obtain a target modulation signal.

[0043] In order to better illustrate the working principle of the modulation method in the embodiment of the present invention, the following first provides an explanation of relevant terms.

[0044] Three-level inverter: also called three-level converter, is a power electronic conversion device, usually used in medium and high voltage power systems, with high power density and efficiency. Commonly used topologies include diode clamped type (NPC), flying capacitor type (FC) and cascade type (CHB), etc. It should be noted that the specific structure, parameters and scenarios of the three-level inverter can be multiple, and specific settings or determinations need to be made according to different application situations. For example, the three-level inverter in this embodiment can be, but is not limited to, set to operate under multi-machine parallel conditions.

[0045] Common mode component (zero sequence voltage): In a three-phase AC power system, when the three-phase voltage is asymmetrical, a zero sequence voltage will be generated, which is the vector sum of the three-phase voltage, and the magnitude and phase depend on the degree of imbalance of the three-phase voltage. In an NPC type three-level inverter, by introducing a certain common mode component (zero sequence voltage) at the output end of the inverter, the midpoint potential can be adjusted to achieve a balancing effect.

[0046] Zero-sequence circulating current: When common AC / DC bus inverters are operated in parallel, a circulating current path is formed. When there is filter parameter offset, inconsistent control parameters, and asynchronous operation of switching devices between inverters, zero-sequence circulating current will be generated. The existence of zero-sequence circulating current will increase system losses, reduce the effective capacity of the system, and affect the energy conversion efficiency of the system.

[0047] The following is a circuit diagram of a three-level inverter working in a specific scenario. Figure 2 As shown, Figure 2 The circuit topology diagram of the parallel NPC type three-level inverter provided in one embodiment of the present invention mainly realizes the power conversion function from AC to DC, including three-phase inductors L1, L2, three-phase full-bridge power switch S a,k , S b,k , S c,k , S′ a,k , S′ b,k , S′ c,k , k = 1, 2, 3, 4. Figure 2 Taking an inverter in as an example, the switches S1 and S3 of the same bridge arm work in complementary mode, and the switches S2 and S4 work in complementary mode. Multiple inverters are connected in parallel, that is, the AC side is connected to the three-phase AC bus (grid) and the DC side is connected to the DC bus. The direction of current flowing from the inverter into the grid is defined as the positive direction, which is recorded as i a,m 、i b,m 、i c,m , m = 1, 2, the grid voltage is e a 、e b 、e c , the DC side voltage is V dc . Corresponds to Figure 2The circuit topology shown, Figure 3 is a schematic diagram of the midpoint of the bridge arm, where ΔV is defined NP is the difference between the voltage across the lower capacitor and the voltage across the upper capacitor; Figure 4 The figure is the space voltage vector and its sector distribution diagram. It can be seen that the large vector has no effect on the midpoint voltage. The midpoint vector has only one phase connected to the bus midpoint, which is the main reason for the midpoint imbalance. The two redundant small vectors produce the same α-component but produce opposite midpoint current directions, which can be used to achieve midpoint balance control. In addition, the space vector PWM and the carrier-based PWM have an intrinsic connection, that is, the two redundant small vectors are mapped to the modulation wave based on the carrier PWM, and the phase difference between the two is V dc / 2 common-mode component, therefore, in the SVPWM modulation strategy or predictive control, by reasonably selecting the redundant vector, in the carrier-based pulse width modulation strategy (CB-PWM), the appropriate common-mode component is correspondingly superimposed to achieve the goal of balancing the midpoint voltage.

[0048] In this step, compared with the relevant existing technology, on the basis of the carrier pulse width modulation strategy based on common-mode component injection, the midpoint voltage compensation component is proportionally balanced, that is, a proportional control link is added to the loop for injecting common-mode components, so that the ratio of the midpoint voltage balance component to the midpoint voltage compensation component is between 0 and 1. In this case, the maximum value of the three-phase modulation wave will no longer be clamped at the amplitude, thereby creating space for injecting zero-sequence components into the DC bus, and the midpoint voltage balance component and the determined zero-sequence voltage compensation component can be superimposed on the original modulation signal at the same time, thereby achieving both balanced midpoint voltage and suppressed zero-sequence circulating current. In application scenarios such as energy storage inverters and new energy grid-connected inverters, the circulating current consumption can be effectively reduced, and the power quality and transmission efficiency can be improved.

[0049] Specifically, Figure 5 As shown, the midpoint voltage balance can be achieved by using, but not limited to, a pre-configured zero sequence generator, which has the following functions: In the CB-PWM modulation strategy, by providing the three-phase modulation wave v a 、v b and v c The zero-sequence voltage signal generated by the zero-sequence generator is added to correct the original modulation signal to obtain the target modulation signal v′ a , v′ b and v′ c In practice, the original modulation signal can be clamped according to different working conditions and midpoint potential balance requirements to achieve midpoint voltage balance; in an application process, v a 、v b and v c And the midpoint balance judgment component, namely ΔV NP i x(x=a,b,c),i x The instantaneous value of each current of the three phases (inverted to the positive direction) is input into the zero sequence generator, and the output of the zero sequence generator is further processed by proportional balancing to output the required common mode component.

[0050] It should be noted that the application scope of the embodiment of the present invention is multiple machines in parallel. Figure 2 The circuit topology shown only uses two inverters in parallel as an example, but in actual application scenarios, more inverters can be set up in parallel as needed. Accordingly, if only two inverters are connected in parallel, only two inverters need to be controlled and debugged. If three or more inverters are connected in parallel, three or more inverters need to be controlled and debugged. The injection control of the midpoint zero-sequence component and the zero-sequence circulating current component is performed on each inverter separately, that is, they need to be injected separately according to the current local state of the inverter. For the control of any inverter, the three-phase modulation wave v a 、v b and v c The relevant zero-sequence components injected into each phase are the same, whether they are components that suppress the midpoint potential balance or components that suppress the zero-sequence circulating current.

[0051] like Figure 6 As shown, in one embodiment of the present invention, step S3000 may include but is not limited to step S3100.

[0052] Step S3100: multiply the midpoint voltage compensation component by the acquired balance ratio parameter to obtain a corresponding midpoint voltage balance component, wherein the balance ratio parameter is greater than 0 and less than 1.

[0053] In this step, by multiplying the midpoint voltage compensation component with the obtained balancing ratio parameter, since the balancing ratio parameter is greater than 0 and less than 1, it is equivalent to reducing the midpoint voltage compensation component, so that the maximum and minimum values ​​of the three-phase modulation wave are no longer clamped at the upper and lower amplitudes, so that there is space on the DC bus to inject zero-sequence components to suppress zero-sequence circulating currents, thereby achieving both balanced midpoint voltage and suppressed zero-sequence circulating currents.

[0054] In one embodiment, the balancing ratio parameter may be obtained by, but is not limited to, the following formula:

[0055]

[0056] Among them, K p is the equilibrium ratio parameter, m is the preset specific gravity coefficient, V dc-half-min is the smaller of the voltage across the lower capacitor and the voltage across the upper capacitor, V dc-half-maxis the larger of the voltage across the lower capacitor and the voltage across the upper capacitor.

[0057] It should be noted that m represents the weight of the injected control midpoint balance component in the total zero-sequence component (i.e., the sum of the control midpoint balance component and the zero-sequence circulating current suppression component). The specific value can be set accordingly according to different application scenarios, and is not limited here. For example, in one application scenario, m can be set to 10 but is not limited to it. When the midpoint potential difference is very small and the zero-sequence circulating current generated by the two parallel inverters is large, V dc-half-min / V dc-half-max The value of is infinitely close to 1, at this time 1-V dc-half-min / V dc-half-max Very small, and may even approach 0 infinitely. At this time, the output K p If m is smaller, it will increase the space for injecting the component that suppresses the zero-sequence circulating current on the DC bus. If the zero-sequence circulating current generated by the two parallel inverters is very small, if you want to increase the proportion of the injected midpoint voltage compensation component, you can increase m from 10 to 100 or 1000. The value of is larger, so the output K p It is also large, which is equivalent to reducing the space for injecting zero-sequence components on the DC bus to suppress zero-sequence circulating current, and increasing the space for injecting mid-point voltage compensation components to control mid-point potential balance.

[0058] In one embodiment, the zero-sequence voltage compensation component can be obtained by, but is not limited to, the following steps: subtracting a preset zero-sequence circulating current reference value from the obtained zero-sequence circulating current value of the three-level inverter to obtain a zero-sequence difference component; inputting the zero-sequence difference component into a preconfigured PI controller to obtain a zero-sequence voltage compensation component output by the PI controller, wherein the PI controller can be configured accordingly by those skilled in the art according to a specific application scenario, which is not limited here; it can be seen that when two inverters are connected in parallel, a zero-sequence current path will be formed, and circulating current may occur; in the absence of zero-sequence current control, any difference between the two inverters (such as different switching frequencies, different power level parameters, or different switching dead times) may result in large circulating currents; refer to Figure 5 , based on the injection of the zero-sequence component loop, the zero-sequence circulating current reference value i * z and zero sequence circulating current i z The zero-sequence difference component is obtained by difference, and the zero-sequence difference component is sent to the PI controller. Then the zero-sequence voltage compensation component output by the PI controller and the common-mode component finally output by the zero-sequence generator are superimposed on the original modulation signal, and finally the corrected target modulation signal is obtained, thereby achieving the purpose of balancing the midpoint voltage and suppressing the zero-sequence circulating current.

[0059] In one embodiment, the zero-sequence circulating current reference value may be set accordingly according to a specific application scenario, for example, it may be, but is not limited to, 0.

[0060] like Figure 7 As shown, in one embodiment of the present invention, the steps in step S2000, determining the midpoint voltage compensation component according to the signs of all midpoint balance judgment components, may include but are not limited to steps S2100 to S2200.

[0061] Step S2100, selecting any two midpoint balance judgment components from all midpoint balance judgment components, and determining the positive and negative signs of the two selected midpoint balance judgment components;

[0062] Step S2200: Determine the midpoint voltage compensation component required by the three-level inverter in the current state according to the positive and negative signs of the two selected midpoint balance judgment components.

[0063] In this step, by calculating ΔV NP i x To determine whether the current of phase x contributes to the midpoint balance, for example, when ΔV NP >0, that is, the voltage across the lower capacitor is higher than the voltage across the upper capacitor. At this time, to make ΔV NP decreases, the midpoint current should satisfy i N >0; therefore, ΔV NP i x >0 helps midpoint balance, while ΔV NP i x <0, the midpoint deviation will be aggravated. For the specific judgment method, please refer to the following Table 1. Figure 4 The spatial voltage vector and its sector distribution shown are synthesized with the midpoint current vector shown in Table 2 below, and the appropriate voltage vector is selected for synthesis injection according to the required zero-sequence component to achieve the balance of the midpoint potential.

[0064] Table 1 Auxiliary midpoint balance auxiliary control action table

[0065]

[0066] Table 2 Midpoint current vector synthesis table

[0067]

[0068] The compensation amount shown in Table 1 is the midpoint voltage compensation component. The flag values ​​"0" and "1" in the first column and the second column in Table 1 represent "no" and "yes", respectively. It can be seen that although the various situations in Table 1 are not the same, their basic control principles are similar. To avoid redundancy, a specific description is given below for one situation in Table 1, but it should not be understood as a limitation.NP i a >0, ΔV NP i c >0 as an example, corresponding to the case where the flag values ​​are all 1, that is, it is determined that ΔV NP i a >0, ΔV NP i c >0, then according to v b The size further determines the compensation amount, that is, when v b >0, the compensation amount of the a-phase modulation wave is 1-v a , the compensation amount of the c-phase modulation wave is 1-v c , at this time, phase a and phase c are clamped to +1; when v b ≤0, the compensation amount of the a-phase modulation wave is -1-v a , the compensation amount of the c-phase modulation wave is -1-v c , at this time, phase a and phase c are clamped to -1. It should be noted that the "control action" shown in Table 1 is the result of correcting the three-phase modulation signal by the compensation amount, as part of the control loop, rather than the actual manual control. It can be understood as the control action represented by the compensation amount, but not the actual control action.

[0069] In order to better illustrate the working principle of the above embodiments, Figure 8 The control strategy block diagram of the modulation method based on the three-level inverter provided by an embodiment of the present invention is illustrated. Specifically, the main functional modules used include at least two current controllers, a coordinate transformation module, a modulation signal correction module and a CB-PWM modulation module, and the control process is as follows: the active current component reference value i * d Subtract the measured value of the active current component i d , the error value is sent to the corresponding current controller to obtain the active component v of the active converter output voltage d ; Similarly, the reactive current component reference value i * q Subtract the reactive current component measured value i q , the error value is sent to the corresponding current controller to obtain the active component v of the reactive converter output voltage q , then v d 、v q Transformed to the abc coordinate system, the output three-phase modulation wave v a 、v b and v c Then, the modulation signal correction module generates the target modulation signal v′ which can take into account both the midpoint voltage balance and the zero-sequence circulating current suppression. a , v′ b and v′c Finally, 12 pulse width modulation signals are output through the CB-PWM modulation link.

[0070] Fig. 9 FIG. 1 is a schematic diagram of the structure of an electronic device 1000 provided by an embodiment of the present invention. Fig. 9 As shown, the electronic device 1000 includes a memory 1100 and a processor 1200. The number of the memory 1100 and the processor 1200 may be one or more. Fig. 9 In the embodiment, a memory 1100 and a processor 1200 are taken as an example; the memory 1100 and the processor 1200 in the device may be connected via a bus or other means. Fig. 9 The example of connecting through bus is taken in the following.

[0071] The memory 1100 is a computer-readable storage medium that can be used to store software programs, computer executable programs and modules, such as program instructions / modules corresponding to the modulation method of the three-level inverter provided in any embodiment of the present invention. The processor 1200 implements the modulation method of the three-level inverter by running the software programs, instructions and modules stored in the memory 1100.

[0072] The memory 1100 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function. In addition, the memory 1100 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some instances, the memory 1100 may further include a memory remotely arranged relative to the processor 1200, and these remote memories may be connected to the device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0073] An embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the modulation method of the three-level inverter provided in any embodiment of the present invention.

[0074] An embodiment of the present invention further provides a computer program product, including a computer program or computer instructions, wherein the computer program or computer instructions are stored in a computer-readable storage medium, a processor of a computer device reads the computer program or computer instructions from the computer-readable storage medium, and the processor executes the computer program or computer instructions, so that the computer device executes the modulation method of the three-level inverter provided in any embodiment of the present invention.

[0075] The electronic devices and application scenarios described in the embodiments of the present invention are intended to more clearly illustrate the technical solutions of the embodiments of the present invention, and do not constitute a limitation on the technical solutions provided by the embodiments of the present invention. Those skilled in the art will appreciate that with the evolution of electronic devices and the emergence of new application scenarios, the technical solutions provided by the embodiments of the present invention are equally applicable to similar technical problems.

[0076] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0077] In hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0078] The terms "component", "module", "system", etc. used in this specification are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, or a computer. By way of illustration, both applications running on a computing device and a computing device can be components. One or more components may reside in a process or an execution thread, and a component may be located on a computer or distributed between two or more computers. In addition, these components may be executed from various computer-readable media having various data structures stored thereon. Components may communicate, for example, through local or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, or a network, such as the Internet interacting with other systems through signals).

Claims

1. A modulation method for a three-level inverter, characterized in that: The three-level inverter includes a lower capacitor and an upper capacitor, and the method includes: Acquire each phase current of the three-level inverter, the voltage across the lower capacitor and the voltage across the upper capacitor, and calculate the voltage difference between the voltage across the lower capacitor and the voltage across the upper capacitor; respectively calculating the product of the voltage difference and each of the phase currents to obtain a plurality of midpoint balance judgment components, and determining a midpoint voltage compensation component according to the signs of all the midpoint balance judgment components; Performing proportional balancing processing on the midpoint voltage compensation component to obtain a midpoint voltage balance component, wherein a ratio of the midpoint voltage balance component to the midpoint voltage compensation component is between 0 and 1; The midpoint voltage balance component and the acquired zero-sequence voltage compensation component are superimposed on the original modulation signal of the three-level inverter to obtain a target modulation signal.

2. The modulation method of the three-level inverter according to claim 1, characterized in that: The step of performing proportional balancing processing on the midpoint voltage compensation component to obtain the midpoint voltage balance component includes: The midpoint voltage compensation component is multiplied by the acquired balancing ratio parameter to obtain a corresponding midpoint voltage balancing component, wherein the balancing ratio parameter is greater than 0 and less than 1.

3. The modulation method of the three-level inverter according to claim 2, characterized in that: The balance ratio parameter is obtained by the following formula: Among them, K p is the equilibrium ratio parameter, m is the preset specific gravity coefficient, V dc-half-min is the smaller of the voltage across the lower capacitor and the voltage across the upper capacitor, V dc-half-max is the larger of the voltage across the lower capacitor and the voltage across the upper capacitor.

4. The modulation method of the three-level inverter according to claim 1, characterized in that: The determining of the midpoint voltage compensation component according to the signs of all the midpoint balance judgment components comprises: Select any two of the midpoint balance judgment components from all the midpoint balance judgment components, and simultaneously determine the positive and negative signs of the selected two midpoint balance judgment components; According to the positive and negative signs of the two selected midpoint balance judgment components, the midpoint voltage compensation component required by the three-level inverter in the current state is determined.

5. The modulation method of the three-level inverter according to claim 1, characterized in that: The zero-sequence voltage compensation component is obtained by the following steps: Subtracting a preset zero-sequence circulating current reference value from the acquired zero-sequence circulating current value of the three-level inverter to obtain a zero-sequence difference component; The zero-sequence difference component is input into a preconfigured PI controller to obtain the zero-sequence voltage compensation component output by the PI controller.

6. The modulation method of the three-level inverter according to claim 5, characterized in that: The zero-sequence circulating current reference value is 0.

7. An electronic device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When at least one of the programs is executed by at least one of the processors, the modulation method of the three-level inverter according to any one of claims 1 to 6 is implemented.

8. A computer-readable storage medium, characterized in that: A program executable by a processor is stored therein, and when the program executable by the processor is executed by the processor, it is used to implement the modulation method of the three-level inverter according to any one of claims 1 to 6.

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