Computer implemented methods, systems, and storage media
By dividing graph data into subgraphs and storing central node attributes on interconnected devices, and by optimizing transmission using prefetch buffers and traffic monitors, the latency and communication cost issues of large-size graph data in distributed systems are solved, enabling more efficient information access.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ALIBABA DAMO (HANGZHOU) TECH CO LTD
- Filing Date
- 2021-06-24
- Publication Date
- 2026-05-19
AI Technical Summary
Large-size graph data suffers from high latency and communication costs in distributed systems, especially due to increased latency caused by the performance costs of nodes and edges.
The graph data is logically divided into multiple subgraphs, and the attributes and node identifiers of the central node are stored on the interconnected devices. The prefetch engine is used to prefetch relevant information into the buffer when needed, and the transmission is optimized by the traffic monitor.
It reduces the waiting time for information transmission between devices, lowers the total communication cost, and improves the resource utilization efficiency of the computing system.
Smart Images

Figure CN115525793B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of computers, and more particularly to methods, systems and non-transitory computer-readable storage media implemented by computers. Background Technology
[0002] A graph is a type of data structure or database that is stored and executed by a computing system and used to model a set of objects and the connections (relationships) between them. Each object is represented as a node (or vertices) connected or linked by edges in the graph. The properties or attributes of an object are associated with the nodes used to represent that object.
[0003] Graphs can be used to identify dependencies, clusters, similarities, matches, categories, flows, costs, centralities, and more in large datasets. Graphs are used in a wide range of applications, including but not limited to graph analytics and graph neural networks (GNNs), and more specifically, applications such as online shopping engines, social networks, recommendation engines, mapping engines, fault analysis, network management, and search engines. In contrast to applications like facial recognition, where sampled nodes (pixels) might be grouped close together, in the aforementioned applications, sampled nodes might be separated by multiple hops (i.e., multiple other nodes between two sampled nodes), and access might be random or irregular.
[0004] Graphs allow for faster retrieval and navigation of complex hierarchical structures that are difficult to model in relational systems. A large number of processing operations associated with graphs include graph traversal operations, such as pointer chasing, which reads a node to identify one or more edges. These identified edges point to and connect to one or more other nodes, which can then be read in turn to identify corresponding other edges, and so on.
[0005] Graph data typically includes node structure information and attributes. Node structure information may include, for example, information that identifies the node (e.g., a node identifier, often simply called a node ID) and information about the node's neighboring nodes. Attributes may include characteristics or properties of an object and the values of those characteristics or properties, which are represented by the node and associated with the node representing the object. For example, if the object represents a person, its characteristics might include the person's age and gender; in this case, the attributes would also include values representing age and values representing gender.
[0006] Graphs are on the order of terabytes in size. A graph can contain billions of nodes and trillions of edges. Therefore, a graph can be divided into multiple subgraphs, and these subgraphs can be distributed across multiple devices; that is, a large graph can be divided into multiple smaller subgraphs stored on different devices.
[0007] The node sampling phase is one of the main causes of graph-related latency. Each node and edge has associated performance costs, so the total communication cost (e.g., the latency and bandwidth consumed) for accessing data in a large graph can be very high. Latency in distributed graphs increases accordingly due to the increased latency caused by information transmission between devices.
[0008] Reducing latency associated with large graphs (especially distributed graphs) would be beneficial. Summary of the Invention
[0009] Embodiments of this disclosure provide solutions to the above-described problems. In general, embodiments of this disclosure describe methods and systems capable of prefetching in distributed graph architectures.
[0010] More specifically, in embodiments of this disclosure, a graph stored in a computing system is logically divided into multiple subgraphs, which are stored on multiple different interconnect devices in the computing system, and the nodes of the multiple subgraphs include a hub node that connects adjacent subgraphs.
[0011] In embodiments of this disclosure, each interconnect device stores the attributes and node identifier (ID) of the central node of the plurality of subgraphs on other interconnect devices. Furthermore, a software or hardware prefetch engine on the device prefetches the attributes and node identifier associated with the sampled node.
[0012] Furthermore, in embodiments of this disclosure, a prefetcher on a device connected to each interconnect device can prefetch the attributes, node identifiers, and other node structure information of nodes in a subgraph on any interconnect device to other interconnect devices that need or may need such node attributes and node structure information. In embodiments of this disclosure, a traffic monitor is provided on the interface device to monitor traffic; when the traffic is low, the interface device prefetches node attributes.
[0013] According to a first aspect of this disclosure, a computer-implemented method is provided, comprising: accessing a plurality of central nodes in a graph, the graph comprising a plurality of nodes and logically divided into a plurality of subgraphs, each subgraph comprising at least one of the central nodes, and each of the central nodes in the subgraphs connecting the subgraph to another subgraph in the plurality of subgraphs; storing in a second device attribute and node structure information associated with a central node of a first subgraph in the plurality of subgraphs, wherein the second device is further configured to store information of a second subgraph in the plurality of subgraphs; and storing in a first device attribute and node structure information associated with a central node of the second subgraph, wherein the first device is further configured to store information of the first subgraph.
[0014] In some embodiments, the attribute and node structure information associated with the center node of the first subgraph, and the attribute and node structure information associated with the center node of the second subgraph, include one or more of the following attribute and node structure information: corresponding attribute values; corresponding node identifiers; and corresponding node structures.
[0015] In some embodiments, the method further includes: when the interval between the center node of the first subgraph and the root node of the first subgraph is a single hop, prefetching the attributes and node structure information associated with the center node of the first subgraph into the prefetch buffer of the first device.
[0016] In some embodiments, the method further includes: when the center node of the first subgraph is sampled, the interval between the center node of the first subgraph and the root node of the first subgraph is a single hop, and the interval between the center node of the first subgraph and the center node of the second subgraph is a single hop, prefetching the attributes and node structure information associated with the center node of the second subgraph into the prefetch buffer of the first device.
[0017] In some embodiments, the method further includes: obtaining node identifiers of a plurality of nodes adjacent to a root node adjacent to a first central node; sampling at least one subset of nodes corresponding to these node identifiers; and prefetching attributes of nodes in the sampled subset into a prefetch buffer of the first device.
[0018] In some embodiments, the method further includes: prefetching attributes and node structure information associated with one of the plurality of nodes into a buffer in a third device coupled to the first device and the second device.
[0019] In some embodiments, the method further includes: monitoring traffic flow using the third device, wherein the prefetching is performed when the measured value of the traffic flow meets a threshold.
[0020] In some embodiments, in response to a request from the first device, the prefetching includes: obtaining node identifiers of a plurality of nodes adjacent to the second central node on the second device; sampling at least one subset of nodes corresponding to these node identifiers; and extracting attributes of the nodes in the subset into the buffer of the third device.
[0021] According to a second aspect of the present disclosure, a system is provided, comprising: a processor; a storage unit connected to the processor; and a plurality of interconnect devices connected to the storage unit, the plurality of interconnect devices including a first device and a second device, the first device including a memory and at least one buffer, and the second device including a memory and at least one buffer; wherein the first device is configured to store information of nodes in a first subgraph of a graph, and the second device is configured to store information of nodes in a second subgraph of the graph, the graph including a plurality of subgraphs, the nodes of the first subgraph including a first center node, the nodes of the second subgraph including a second center node, the first center node and the second center node being interconnected by an edge, the first device storing attribute and node structure information associated with the second center node, and the second device storing attribute and node structure information associated with the first center node.
[0022] In some embodiments, the first device includes an access engine configured to: prefetch node identifiers of a plurality of nodes adjacent to a root node adjacent to the first central node, sample at least one subset of nodes corresponding to these node identifiers, and obtain attributes of the nodes in the subset.
[0023] In some embodiments, the attribute and node structure information associated with the first central node and the attribute and node structure information associated with the second central node include one or more of the following attribute and node structure information: corresponding attribute values; corresponding node identifiers; and corresponding node structures.
[0024] In some embodiments, when the interval between the first central node and the root node of the first subgraph is a single hop, the attributes and node structure information associated with the first central node are prefetched into the prefetch buffer of the first device.
[0025] In some embodiments, when the first central node is separated from the root node and sampled, and the interval between the first central node and the second central node is a single hop, the attributes and node structure information associated with the second central node are prefetched into the prefetch buffer of the first device.
[0026] In some embodiments, the system further includes a third device connected to the first device and the second device, the third device including a prefetch buffer, and the third device prefetching attributes and node structure information associated with one of the plurality of nodes into the prefetch buffer.
[0027] In some embodiments, the third device further includes a traffic monitor, wherein when the traffic measured by the traffic monitor meets a threshold, the third device prefetches the attributes and node structure information associated with the node into the prefetch buffer.
[0028] In some embodiments, the third device is configured to: in response to a request from the first device, obtain node identifiers of a plurality of nodes adjacent to the second central node on the second device, sample at least one subset of nodes corresponding to these node identifiers, and extract the attributes of the nodes in the subset into a prefetch buffer of the third device.
[0029] In some embodiments, the first device includes a first field-programmable gate array (FPGA), the second device includes a second FPGA, and the third device includes a storage switch connected to the first device and the second device.
[0030] According to a third aspect of the present disclosure, a non-transitory computer-readable storage medium is also provided, comprising computer-executable instructions stored therein, the computer-executable instructions comprising: a first instruction for accessing a graph comprising a plurality of subgraphs, the plurality of subgraphs including a first subgraph and a second subgraph, the first subgraph including a first set of nodes having a first central node, the second subgraph including a second set of nodes having a second central node, and the first subgraph and the second subgraph being connected by an edge connecting the first central node and the second central node; a second instruction for storing in a first device attribute and node structure information associated with the second central node, the first device also storing information associated with the first subgraph; and a third instruction for storing in a second device attribute and node structure information associated with the first central node, the second device also storing information associated with the second subgraph.
[0031] In some embodiments, the non-transitory computer-readable storage medium further includes: a fourth instruction for prefetching attribute and node structure information associated with the first central node into a prefetch buffer of the first device when the interval between the first central node and the root node of the first subgraph is a single hop.
[0032] In some embodiments, the non-transitory computer-readable storage medium further includes: a fifth instruction for prefetching attributes and node structure information associated with the second central node into a prefetch buffer of the first device when the first central node is sampled, the interval between the first central node and the root node of the first subgraph is a single hop, and the interval between the first central node and the second central node is a single hop.
[0033] In some embodiments, the non-transitory computer-readable storage medium further includes: a sixth instruction for obtaining node identifiers of a plurality of nodes of nodes adjacent to the root node adjacent to the first central node; a seventh instruction for sampling at least one subset of nodes corresponding to these node identifiers; and an eighth instruction for prefetching attributes of nodes in the sampled subset into a prefetch buffer of the first device.
[0034] In some embodiments, the non-transitory computer-readable storage medium further includes: a ninth instruction for prefetching attribute and node structure information associated with one of the plurality of nodes into a buffer of a third device coupled to the first device and the second device.
[0035] In some embodiments, the non-transitory computer-readable storage medium further includes: a tenth instruction for monitoring traffic using the third device, and prefetching attribute and node structure information related to the node into the buffer in the third device when the measured value of the traffic meets a threshold.
[0036] Therefore, according to embodiments of this disclosure, the latency associated with operations that transmit information between multiple interconnected devices is eliminated, thereby reducing the total communication cost of the computing system. In addition to reduced communication costs, the resources of the computing system are utilized more efficiently.
[0037] Those skilled in the art will recognize the above-mentioned objects, other objects, and advantages of the various embodiments of the present invention after reading the following detailed description of the embodiments illustrated in the accompanying drawings. Attached Figure Description
[0038] The accompanying drawings, which form part of this specification, depict the same / similar elements and illustrate some embodiments of the present disclosure, and together with the detailed description, serve to explain the principles of the present disclosure.
[0039] Figure 1 A schematic diagram of an exemplary distributed graph architecture, which is stored on and executed by a computing system, according to some embodiments of the present disclosure;
[0040] Figure 2A A schematic block diagram of components in an exemplary computing system according to some embodiments of the present disclosure is shown;
[0041] Figure 2B A schematic diagram illustrating the mapping relationship between subgraphs of an exemplary distributed graph and devices in a computing system, according to some embodiments of the present disclosure, is shown.
[0042] Figure 3 A schematic block diagram of selected elements or components of a device for storing and computing subgraphs according to some embodiments of the present disclosure is shown;
[0043] Figure 4 A schematic diagram of elements of two adjacent subgraphs in a distributed graph according to some embodiments of the present disclosure is shown;
[0044] Figure 5 A schematic block diagram of an interface device connected to a device for storing and computing subgraphs is shown, according to some embodiments of the present disclosure.
[0045] Figure 6 A flowchart illustrating a computer-implemented method according to some embodiments of the present disclosure is shown. Detailed Implementation
[0046] Reference will now be made in detail to various embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. Although described in conjunction with these embodiments, it should be understood that they are not intended to limit this disclosure to these embodiments. Rather, this disclosure is intended to cover alternatives, modifications, and equivalents that may be included within the spirit and scope of this disclosure as defined by the appended claims. Furthermore, numerous specific details are set forth in the following detailed description of this disclosure in order to provide a thorough understanding of the disclosure. However, it should be understood that this disclosure may be practiced without these specific details. On the other hand, well-known methods, processes, components, and circuits have not been described in detail to avoid unnecessarily obscuring aspects of this disclosure.
[0047] Certain parts described in detail below are presented in terms of procedures, logic blocks, processes, and other symbolic representations of operations performed on data bits within computer memory. These descriptions and representations are means used by those skilled in the art of data processing to most effectively convey the substance of their work to others skilled in the art. In this application, procedures, logic blocks, processes, etc., are conceived as a self-consistent series of steps or instructions leading to a desired result. These steps are physical operations utilizing physical quantities. Typically, though not always, these quantities take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, and otherwise manipulated in a computing system. It is sometimes convenient to refer to these signals as transactions, bits, values, elements, symbols, characters, samples, pixels, etc., primarily for general reasons.
[0048] However, it should be remembered that all these and similar terms should be associated with appropriate physical quantities and are merely convenient notations applied to those quantities. Unless otherwise obviously stated in the following discussion, it should be understood that throughout this disclosure, discussions using terms such as “access,” “prefetch,” “sample,” “send,” “write,” “read,” “divide,” “request,” “store,” “record,” “transfer,” “select,” etc., refer to a device or computing system or similar electronic computing device or system (e.g., Figure 2A , Figure 2B , Figure 3 and Figure 5 The actions and processing of the system shown (e.g., Figure 6 (The method shown). A computing system or similar electronic computing device operates and transforms data represented as physical (electrical) quantities within a memory, register, or other such device used for information storage, transmission, or display.
[0049] Some of the elements or embodiments described herein can be discussed in the general context of computer-executable instructions embodied on some form of computer-readable storage medium (e.g., a program module) that is executed by one or more computers or other devices. By way of example and not limitation, a computer-readable storage medium may include non-transitory computer storage media and communication media. Typically, a program module includes routines, programs, objects, components, data structures, etc., for performing a particular task or implementing a particular abstract data type. In various embodiments, the functionality of a program module may be combined or distributed as needed.
[0050] Computer storage media include volatile and non-volatile, removable and non-removable media implemented in any manner or technology used for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, Double Data Rate (DDR) memory, Random Access Memory (RAM), Static Random Access Memory (SRAM), or Dynamic Random Access Memory (DRAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Flash Memory (such as SSD) or other memory technologies, CompactDisk Read Only Memory (CD-ROM), Digital Versatile Disk (DVD) or other optical storage, Magnetic Cassette, Magnetic Tape, Magnetic Disk Storage or other magnetic storage devices, or any other medium that can be used to store desired information and access and retrieve that information.
[0051] Communication media can embody computer-executable instructions, data structures, and program modules, and include any information transmission medium. By way of example and not limitation, communication media includes wired media such as wired networks or direct wired connections, and wireless media such as acoustic, radio frequency (RF), infrared, and other wireless media. Any combination of the above may also be included within the scope of computer-readable media.
[0052] Figure 1 Exemplary storage on a computing system and powered by a computing system (e.g., such as...) are shown according to some embodiments of this disclosure. Figure 2A , Figure 2B , Figure 3 and Figure 5 The diagram illustrates a distributed graph architecture executed by the computing system shown. Figure 1In the example shown, Figure 100 is logically divided into three communities, or subgraphs 102, 104, and 106; however, the number of subgraphs is not limited to this. Figure 100 includes multiple nodes (each node in...) Figure 1 (represented as a square).
[0053] Typically, a community is a subset of nodes in a graph; therefore, the number of edges within a community is greater than the number of edges connecting that community to the rest of the graph. Graph 100 can be logically divided into communities or subgraphs using community detection algorithms such as, but not limited to, the following: the Kernighan-Lin (KL) algorithm; the Girvan-Newman algorithm; multi-level algorithms; leading eigenvector algorithms; and the Louvain algorithm.
[0054] Each node in Figure 100 represents an object, and the object's attributes and structural information are associated with the node representing that object. Node / object attributes may include one or more features or properties of the object (e.g., if the object represents a person, its features might include the person's age and / or gender), and attribute data may include values for these features (e.g., numerical values characterizing the person's age and markers identifying the person's gender). Node / object structural information may include, for example, information for identifying the node (e.g., a node identifier) and information for identifying other nodes connected to that node.
[0055] Each subgraph is connected to its neighboring subgraphs via corresponding edges through one or more central nodes. For example, in Figure 1 In the diagram, subgraph 102 includes center nodes 121, 122, and 123, which are connected to center nodes 161 and 162 of subgraph 104 via corresponding edges. Similarly, the center nodes in subgraph 102 are connected to the center nodes in subgraph 106, and vice versa.
[0056] Neighboring or adjacent subgraphs (e.g., subgraphs 102 and 104) are interconnected by single hops; for example, edge 110 connects center nodes 121 and 161. Nodes in the subgraphs of Figure 100 are also interconnected by edges.
[0057] Figure 2A A component block diagram of an exemplary computing system according to some embodiments of the present disclosure is shown. The computing system 200 can be used to store and execute data such as... Figure 1 The example shown is a distributed graph architecture as illustrated in Figure 100.
[0058] exist Figure 2A In the example shown, computing system 200 includes multiple central processing units (CPUs), such as CPU 202. In embodiments of this disclosure, each CPU includes or is coupled to a corresponding graphics processing unit (GPU), such as GPU 204. In some embodiments, each CPU is connected to a corresponding top-of-rack (TOR) switch (e.g., TOR switch 206) via a network interface card (NIC) (e.g., NIC 208).
[0059] In this embodiment of the disclosure, each CPU is also connected to a corresponding device or integrated circuit, such as devices 211, 212, 213, ..., N (i.e., devices 211 to N). Figure 2A In the embodiment shown, device 211-N is a field-programmable gate array (FPGA).
[0060] In this embodiment of the disclosure, the devices 211-N are interconnected in a manner such that any device can communicate with any other device, transmit data to any other device, and receive data from any other device. In some embodiments, the devices 211-N are interconnected via a Fully Connected Local Network (FCLN) 216. As described below (in conjunction with...) Figure 3 In some embodiments, each of devices 211 to N is connected to an interface device 316, which is, for example, a memory-over-fabric (MoF).
[0061] Figure 2B A schematic diagram illustrating exemplary mapping relationships between subgraphs 102, 104, and 106 and devices 211-N according to some embodiments of the present disclosure is shown. In these embodiments, each of devices 211-N stores and computes its respective subgraph. As an example, subgraph 102 is stored and computed by device 211, subgraph 106 is stored and computed by device 212, and subgraph 104 is stored and computed by device 213.
[0062] Figure 3A schematic block diagram of selected elements or components of an apparatus (e.g., apparatus 211) for storing and computing subgraphs according to some embodiments of the present disclosure is shown. As described below, apparatus 211 also facilitates prefetching of node attributes and node structure information (e.g., node identifiers). Figure 2A The other devices 212, 213, ..., N (i.e., devices 212 to N) shown are configured and function similarly to device 211. Devices 211 to N may include elements or components other than those shown and described below, and each element or component may be coupled as shown or in different ways.
[0063] In the example, the functions performed by certain modules in device 211 are used to describe it. Although the description and illustration are of separate modules, this disclosure is not limited thereto. That is, for example, combinations of these modules / functions can be integrated into a single module that performs multiple functions.
[0064] exist Figure 3 In one embodiment, example device 211 includes a command encoder 302 and a command decoder 304 coupled to a command scheduler 306. Device 211 includes or is coupled to a communication interface 308 (e.g., an Advanced Extensible Interface) for communication with... Figure 2A The system 200 communicates with other devices (e.g., CPU 202) shown.
[0065] Device 211 is also coupled to a storage unit via a load unit (LD unit for short) 310. As described above, device 211 can store and compute on subgraph 102. The storage unit includes memory 312 (e.g., DDR memory) on device 211, which is used to store the attributes, node identifiers, and other node structure information of nodes in subgraph 102. The storage unit also includes main memory 314 (e.g., RAM), which is coupled to device 211 and other devices 212 to N.
[0066] Device 211 is also coupled to other devices 212-N via interface device 316 (e.g., MoF) to access subgraphs on other devices. The following is in conjunction with... Figure 4 The interface device 216 is described in further detail.
[0067] It is worth noting that, Figure 3 The device 211 shown includes a prefetcher 320, one or more buffers 322 having a prefetch buffer 323, a neighbor acquisition module 332, a sample acquisition module 334, an attribute acquisition module 336, and an encoding acquisition module 338. The prefetch buffer 323 is used to store the node attributes to be prefetched.
[0068] In the exemplary device 211, the prefetcher 320, the prefetch buffer 323, the neighbor acquisition module 332, the sample acquisition module 334, the attribute acquisition module 336, and the encoding acquisition module 338 constitute the elements of an access engine (AxE) implemented on the device 211. This access engine can be implemented as hardware or software, or a combination of both.
[0069] In this embodiment of the disclosure, since the number of central nodes is relatively small, therefore Figure 100 (see Figure 100) Figure 1 The attributes and node structure information (e.g., node identifiers) of all central nodes in all subgraphs within a given subgraph can be obtained from System 200 (see [link]). Figure 2A Each device 211 to N in ) stores.
[0070] In Figure 100 (see Figure 100) Figure 1 In the subgraph of the graph, the node of interest is referred to as the root node in this paper. For example, a node can be selected, and the attributes of that node (the root node) can be read or retrieved.
[0071] However, in some cases, not all attributes of the root node may be known. For example, if the root node represents a person, that person's age may be recorded, but their gender may not. However, using a community detection algorithm (used to organize and divide the nodes in Figure 100 into multiple communities or subgraphs), the unknown attributes of the root node can be inferred or estimated from the attributes of neighboring nodes (those connected to the root node via a single hop, as described in this paper). Optionally, the unknown attributes of the root node can also be inferred or estimated based on the attributes of nearby nodes (those connected to the root node via multiple hops, as described in this paper).
[0072] Please see Figure 3 The neighbor acquisition module 332 is used to determine and extract from memory 312 the node identifiers of nodes that are adjacent to or near the root node. The node identifiers constitute a relatively small amount of data, so obtaining those node identifiers consumes only a relatively small amount of system resources (e.g., bandwidth).
[0073] Then, the sample acquisition module 334 samples nodes that have node identifiers identified by the neighbor acquisition module 332. The sampled data may include all nodes identified by the neighbor acquisition module 332, or only a subset of these nodes. For example, the subset of nodes may be selected randomly or based on weights assigned to the nodes. The weights of a node may be determined, for example, based on the distance between the node and the root node, which is measured by the number of hops between the node and the root node.
[0074] Subsequently, the attribute acquisition module 336 retrieves the attributes of the nodes sampled by the sample acquisition module 334 from the memory 312. As described above, if the samples obtained by the sample acquisition module 334 only include a selected subset of nodes, the amount of data (attributes) obtained is reduced, thereby consuming less system resources.
[0075] Next, the encoding acquisition module 338 encodes the acquired attributes and writes them into the main memory (e.g., RAM 314). When necessary, these attributes in the main memory can be accessed for further processing.
[0076] In embodiments according to this disclosure, when device 211 (see...) Figure 3 When the root node of a subgraph stored in memory 312 is selected, and the root node is separated from the center node of the subgraph by a single hop, device 211 can prefetch attributes from memory 312 into buffer 322. In this case, the center node of an adjacent subgraph stored on a device adjacent to device 211 (e.g., device 212) is separated from the root node by two hops. In this case, prefetching the attributes of the center node of the subgraph on device 211 into prefetch buffer 323, and prefetching the attributes of the center nodes of adjacent subgraphs (e.g., stored on device 212) into prefetch buffer 323, will help reduce waiting time. Then, if one of the aforementioned center nodes is sampled, its attributes can be directly obtained from prefetch buffer 323.
[0077] Furthermore, if one of the aforementioned central nodes is sampled, device 211 can send a request to other devices (e.g., device 212) via interface device 316 to prefetch the attributes of nodes adjacent to the central node on those other devices.
[0078] Figure 4A schematic diagram of elements in two adjacent subgraphs 102 and 106 of FIG100 according to some embodiments of the present disclosure is shown. In this example, the center node 415 of subgraph 102 and the center node 425 of subgraph 106 are connected by a single hop via edge 405, that is, the center node 415 of subgraph 102 and the center node 425 of subgraph 106 are each other's first-hop neighbors. Subgraph 102 includes a node 413 adjacent to the center node 415, that is, node 413 is connected to the center node 415 by a single hop via edge 414. In this example, node 413 is connected to the center node 425 by a double hop via edges 414 and 405. Similarly, subgraph 106 includes a node 423 adjacent to the center node 425. In this example, node 413 is not a center node and may be referred to as an internal node or a non-center node in this disclosure. Subgraph 102 is stored and computed by device 211 (which may be referred to as the first device), and subgraph 106 is stored and computed by device 212 (which may be referred to as the second device).
[0079] In some embodiments, when node 413 is selected as the root node, the attributes of the central node 415 can be prefetched into the prefetch buffer 323 of the first device 211. Similarly, when node 423 is selected as the root node, the attributes of the central node 415 can be prefetched into the prefetch buffer of the second device 212. Furthermore, when node 413 is selected as the root node, the attributes of the central node 425 can be prefetched into the prefetch buffer 323 of the first device 211. Similarly, when node 423 is selected as the root node, the attributes of the central node 425 can be prefetched into the prefetch buffer of the second device 212.
[0080] By using the prefetching operation described above, the latency associated with transmitting information between interconnected devices can be reduced or eliminated in many cases, thereby reducing the total communication cost of the computing system.
[0081] Figure 5 A schematic block diagram of an interface device 316 (e.g., MoF) according to some embodiments of the present disclosure is shown. In addition to the elements or components shown and described below, device 316 may also include other elements or components. Device 316 may be coupled to, for example... Figure 2A The devices 211 to N in the computing system 200 shown, and which may be referred to as third devices in this disclosure.
[0082] Device 316 is coupled to device 211, and optionally, to an access engine (AxE) on device 211. Figure 5In the example shown, device 316 includes: an assembler 502 for packing and routing data packets to facilitate data transfer between devices in computing system 200; a dissembler 504 for unpacking data packets and arbitrating data transmission; and a scheduler 506. Device 316 also includes a module 508 to perform other functions, such as flow control and error detection, and is connected to devices 212-N.
[0083] In some embodiments, device 316 further includes a prefetcher and a prefetch buffer 510. The prefetcher can prefetch attributes and node structure information (e.g., node identifiers) of nodes adjacent to the central node and store these attributes in the prefetch buffer 510. In the above example (e.g., Figure 4 In the example shown, when the central node 425 on the second device 432 is sampled by the first device 211, the nodes adjacent to the central node (e.g., node 423) can also be sampled by the first device 211. In this case, in some embodiments, in response to sampling of the central node 425 on the second device 212, the attributes of one or more nodes adjacent to the central node are prefetched into a prefetch buffer 510 on the device 316, and the device 211 can then access and read the prefetch buffer 510 to obtain the attributes of the one or more nodes mentioned above.
[0084] More specifically, combined Figure 3 and Figure 4 In some embodiments, for example, when central node 415 or central node 425 is sampled by device 211, the neighbor acquisition module 332 of device 211 sends a request to device 316 to obtain the node identifiers of nodes (e.g., node 423) recorded on the second device 212 and adjacent or neighboring to central node 425. In response to a request from sample acquisition module 334, nodes (having node identifiers identified by the neighbor acquisition module 332 of device 211, e.g., node 423) are sampled, and the attributes of these nodes are stored in a prefetch buffer 510 on device 316. If a node is sampled, the attributes of that node stored in the prefetch buffer 510 are sent by device 316 to the first device 211. That is, in some embodiments, the prefetching operation of the node's attributes is in response to a request from attribute acquisition module 336 of device 211.
[0085] Furthermore, other more aggressive prefetching schemes can be used, in which attributes can be prefetched from nodes that are more than a single hop or a double hop away from the root node.
[0086] By using device 316 for prefetching, the latency associated with information transmission between interconnected devices is further reduced, thereby further reducing the total communication cost of the computing system.
[0087] In some embodiments, device 316 further includes a traffic monitor 516. For example, traffic monitor 516 monitors traffic (e.g., bandwidth consumption) in device 316, and for example, when traffic is low (e.g., below a threshold), node attributes are prefetched into a prefetch buffer 510 on device 316. Therefore, in addition to reducing communication overhead, the resources of the computing system can be utilized more efficiently.
[0088] The embodiments of this disclosure significantly reduce worst-case / long-tail latency. Compared to a baseline scheme where the central node is not stored on devices 211-N, simulation results of the embodiments of this disclosure show that, as described above, storing the central nodes of all devices 211-N in each device can reduce latency by 47.6%; combining this improvement with the prefetch buffer and prefetch scheme on devices 211-N can reduce latency by 49.5%; and combining the above improvement with the prefetch buffer and prefetch scheme on device 316 can reduce latency by 74.8%.
[0089] Figure 6 A flowchart 600 illustrating a computer-implemented method according to some embodiments of the present disclosure is shown. All or some of the operations represented by the boxes in flowchart 600 can be implemented as computer-executable instructions residing on some form of non-transitory computer-readable storage medium, and can be manufactured by, for example... Figure 2A The computing system 200 shown is an example of a computing system that performs the operation. In one example discussed below, the graph is logically divided into a first subgraph stored and computed by a first device, and a second subgraph stored and computed by a second device; this scheme can be easily extended to more than two subgraphs and devices.
[0090] exist Figure 6 In the box 602 shown, in conjunction with the reference Figure 4 In Figure 100, center nodes 415 and 425 are visited. The graph is logically divided into multiple subgraphs, each containing multiple center nodes, which are used to connect these subgraphs, as previously described herein.
[0091] In block 604, attributes and node structure information (e.g., node identifier) associated with the central node (e.g., node 415) of the first subgraph 102 are stored in a second device 212, which also stores information about the second subgraph 106; and attributes and node structure information (e.g., node identifier) associated with the central node (e.g., node 425) of the second subgraph are stored in a first device 211, which also stores information about the first subgraph. Attributes include one or more node features or properties and their respective values, and as described above, node structure information includes node identifiers and other structural information.
[0092] In box 606, node attributes are prefetched. Examples of prefetching schemes have been described above and below. However, embodiments according to this disclosure are not limited to those examples.
[0093] In some embodiments, in conjunction with reference Figure 3 The node identifiers of the nodes adjacent to the root node (which is the root node adjacent to the center node, for example, node 413 adjacent to the center node 415) are determined or obtained, at least a subset of these nodes are sampled, and the attributes of the nodes in the sampled subset are prefetched into the prefetch buffer 323 of the first device 211.
[0094] In some embodiments, when the distance between the center node of the first subgraph and the root node of the first subgraph (e.g., node 413) is a single hop (e.g., via edge 414), the attributes associated with the center node (e.g., node 415) of the first subgraph 102 are prefetched into the prefetch buffer 323 of the first device 211.
[0095] In some embodiments, when the center node (e.g., node 415) of the first subgraph 102 is sampled, the interval between the first subgraph 102 and the root node (e.g., node 413) of the first subgraph is a single hop, and the interval between the center node of the first subgraph and the center node of the second subgraph is a single hop (e.g., through edge 405), the attributes associated with the center node (e.g., node 425) of the second subgraph 106 are prefetched into the prefetch buffer 323 of the first device 211.
[0096] In some embodiments, in conjunction with reference Figure 5Attributes associated with nodes (e.g., internal nodes or non-central nodes) and node structure information (e.g., node IDs) are prefetched into a prefetch buffer 510 of a third device 316 (e.g., MoF), which communicates (couples) with the first device 211 and the second device 212. More specifically, in these embodiments, in response to a request from the first device: node identifiers of nodes on the second device adjacent to the second central node 425 are determined or acquired; at least a subset of these nodes are sampled; and the attributes of the sampled nodes are prefetched into the buffer 510 of the third device 316. In some embodiments, the device 316 is also used to monitor traffic, in which case the device 316 performs prefetching if the measured traffic value meets a threshold.
[0097] While the foregoing disclosure has illustrated various embodiments using specific block diagrams, flowcharts, and examples, each block diagram component, flowchart step, operation, and / or component described and / or illustrated herein can be implemented individually and / or collectively with a wide range of configurations. Furthermore, any disclosure of a component contained within other components should be considered exemplary, as the same functionality can be implemented through many other architectures.
[0098] Although the subject matter has been described in specific language of structural features and / or methodological actions, it should be understood that the subject matter defined in this disclosure is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are disclosed as examples of implementing this disclosure.
[0099] The embodiments of the present invention are described as follows. Although the invention has been described in specific embodiments, it should not be construed as being limited to these embodiments, but should be interpreted in accordance with the appended claims.
Claims
1. A method implemented by a computer, wherein, include: Access multiple central nodes in a graph, the graph comprising multiple nodes and logically divided into multiple subgraphs, each subgraph comprising at least one central node, and each central node in a subgraph connecting the subgraph to another subgraph among the multiple subgraphs; The second device stores attribute and node structure information associated with the central node of the first subgraph in the plurality of subgraphs, wherein the second device is also used to store information of the second subgraph in the plurality of subgraphs; as well as The first device stores attribute and node structure information associated with the central node of the second subgraph, wherein the first device is also used to store information of the first subgraph; When the interval between the center node of the first subgraph and the root node of the first subgraph is a single hop, the attributes and node structure information associated with the center node of the first subgraph are prefetched into the prefetch buffer of the first device.
2. The method according to claim 1, wherein, Also includes: When the center node of the first subgraph is sampled, the interval between the center node of the first subgraph and the root node of the first subgraph is a single hop, and the interval between the center node of the first subgraph and the center node of the second subgraph is a single hop, the attributes and node structure information associated with the center node of the second subgraph are prefetched into the prefetch buffer of the first device.
3. A system in which, include: processor; Storage units connected to the processor; as well as A plurality of interconnect devices connected to the storage unit, the plurality of interconnect devices including a first device and a second device, the first device including a memory and at least one buffer, and the second device including a memory and at least one buffer; The first device is used to store information about nodes in a first subgraph of the graph, and the second device is used to store information about nodes in a second subgraph of the graph. The graph includes multiple subgraphs. The nodes of the first subgraph include a first center node, and the nodes of the second subgraph include a second center node. The first center node and the second center node are connected to each other by an edge. The first device stores the attribute and node structure information associated with the second central node, and the second device stores the attribute and node structure information associated with the first central node. When the interval between the first central node and the root node of the first subgraph is a single hop, the attributes and node structure information associated with the first central node are prefetched into the prefetch buffer of the first device.
4. The system according to claim 3, wherein, The first device includes an access engine configured to: prefetch node identifiers of a plurality of nodes adjacent to a root node adjacent to the first central node, sample at least one subset of nodes corresponding to these node identifiers, and obtain attributes of the nodes in the subset.
5. The system according to claim 3, wherein, The attribute and node structure information associated with the first central node and the attribute and node structure information associated with the second central node include one or more of the following attribute and node structure information: corresponding attribute values; corresponding node identifiers; and corresponding node structures.
6. The system according to claim 3, wherein, When the first central node is separated from the root node and sampled, and the interval between the first central node and the second central node is a single hop, the attributes and node structure information associated with the second central node are prefetched into the prefetch buffer of the first device.
7. The system according to claim 3, wherein, Also includes: A third device connected to the first device and the second device, the third device including a prefetch buffer, and the third device prefetching attributes and node structure information associated with one of the plurality of nodes into the prefetch buffer.
8. The system according to claim 7, wherein, The third device further includes a flow monitor, wherein when the flow measured by the flow monitor meets a threshold, the third device prefetches the attributes and node structure information associated with the node into the prefetch buffer.
9. The system according to claim 7, wherein, The third device is configured to: in response to a request from the first device, obtain node identifiers of a plurality of nodes adjacent to the second central node on the second device, sample at least one subset of nodes corresponding to these node identifiers, and extract the attributes of the nodes in the subset into the prefetch buffer of the third device.
10. A non-transitory computer-readable storage medium, wherein, Includes computer-executable instructions stored therein, the computer-executable instructions including: A first instruction is used to access a graph, which includes multiple subgraphs, including a first subgraph and a second subgraph. The first subgraph includes a first set of nodes with a first center node, and the second subgraph includes a second set of nodes with a second center node. The first subgraph and the second subgraph are connected by an edge connecting the first center node and the second center node. The second instruction is used to store attribute and node structure information associated with the second central node in the first device, and the first device also stores information related to the first subgraph; and The third instruction is used to store attribute and node structure information associated with the first central node in the second device, and the second device also stores information related to the second subgraph; The fourth instruction is used to prefetch the attributes and node structure information associated with the first central node into the prefetch buffer of the first device when the interval between the first central node and the root node of the first subgraph is a single hop.