A semiconductor chip multi-temperature automated testing system and testing method

Abstract

The application discloses a kind of semiconductor chip multi-temperature automated test system and test method, wherein, the system includes handler and test machine, further include: high-low temperature equipment, and the high-low temperature equipment is installed in the handler;Wherein, the high-low temperature equipment is used to provide a variety of different test temperatures for semiconductor chip;The test machine is used to test the semiconductor chip under different test temperatures respectively;The handler is used to sort the semiconductor chip, and the sorting is according to the test data output by the test machine.The high-low temperature equipment is arranged on the handler, so that the handler can control the test temperature while testing and sorting the semiconductor chip, realizes the automated temperature scanning test of semiconductor chip, saves the labor cost, and improves the test efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip testing technical field, and in particular to a semiconductor chip multi-temperature automatic testing system and testing method. BACKGROUND

[0002] The semiconductor chip testing equipment in the prior art, such as a handler and a tester, are directly connected through a cable. The semiconductor chip sends a start testing signal to the tester after reaching the testing position of the handler. The tester tests once and returns a signal to complete the testing process.

[0003] However, the semiconductor chip can only be tested at one temperature. If the performance of the chip at high and low temperatures needs to be tested simultaneously, the chip needs to be tested at one temperature condition and then reloaded for testing at another temperature condition. That is, each time the chip is loaded, it can only be tested at one set temperature. For example, when 85℃ is set, the performance of the chip at 85℃ can only be tested, and testing at other temperatures cannot be realized. Therefore, if the chip needs to be tested at different temperatures, a large amount of time will be consumed. SUMMARY

[0004] Therefore, the embodiments of the present application provide a semiconductor chip multi-temperature automatic testing system and testing method to solve the problem that the performance of the chip at one temperature can only be tested at one time.

[0005] The embodiments of the present application provide a semiconductor chip multi-temperature automatic testing system, which comprises a handler and a tester, and further comprises a high-low temperature device, wherein the high-low temperature device is installed in the handler.

[0006] The high-low temperature device is configured to provide different testing temperatures for the semiconductor chip.

[0007] The tester is configured to test the semiconductor chip at different testing temperatures.

[0008] The handler is configured to sort the semiconductor chip according to the testing data output by the tester.

[0009] Optionally, the semiconductor chip multi-temperature automatic testing system further comprises a main control board.

[0010] The main control board is configured to control the high-low temperature device, the handler and / or the tester.

[0011] Optionally, the main control board controls the temperature of the high-low temperature device according to the first test temperature and the step temperature inputted by the outside or preset by the inside to provide different test temperatures for the semiconductor chip; and / or,

[0012] The main control board controls the test machine to test the semiconductor chip in the high-low temperature device; and / or,

[0013] The main control board obtains the sorting basis of the semiconductor chip according to the test data outputted by the test machine, and controls the sorting machine to sort the semiconductor chip based on the sorting basis.

[0014] The embodiment of the present application further provides a semiconductor chip multi-temperature automatic test method applied to a semiconductor chip multi-temperature automatic test system, wherein the system comprises a sorting machine and a test machine, the system further comprises a high-low temperature device, and the high-low temperature device is installed in the sorting machine, and the method comprises the following steps:

[0015] S201: After detecting that the semiconductor chip is located in the test position of the high-low temperature device, the sorting machine directly or indirectly sends a first instruction to the high-low temperature device;

[0016] S202: The high-low temperature device adjusts the current test temperature to a first test temperature according to the first instruction;

[0017] S203: The test machine tests the semiconductor chip under the current test temperature to obtain test data under the current test temperature;

[0018] S204: If the test of the semiconductor chip has not ended, the high-low temperature device adjusts the current test temperature to another new test temperature;

[0019] The steps S203 and S204 are repeated until the test of the semiconductor chip ends;

[0020] S205: The sorting machine sorts the semiconductor chip, and the sorting basis is the test data obtained by the test machine testing the semiconductor chip.

[0021] Optionally, the semiconductor chip multi-temperature automatic test system further comprises a main control board;

[0022] After detecting that the semiconductor chip is located in the test position of the high-low temperature device, the sorting machine indirectly sends a first instruction to the high-low temperature device, which comprises the following steps:

[0023] After detecting that the semiconductor chip is located in the test position of the high-low temperature device, the sorting machine sends the corresponding first instruction to the main control board.

[0024] The main control board forwards the first instruction to the high-low temperature device, or generates a new first instruction based on the first instruction and sends the new first instruction to the high-low temperature device.

[0025] Optionally, the test end condition is that a completed test temperature meets the test needs of the semiconductor chip, or test data obtained by a completed test indicates that the semiconductor chip is unqualified.

[0026] Optionally, the first test temperature is greater than 20℃ and less than 30℃; the highest test temperature meeting the test needs of the semiconductor chip is a first temperature, and the lowest test temperature is a second temperature, and the first temperature is higher than the first test temperature, and the second temperature is lower than the first test temperature; after the high-low temperature device adjusts the current test temperature to the first test temperature, it is first adjusted to the second temperature, and then adjusted to the first temperature according to a preset step temperature.

[0027] Optionally, the temperature between the second temperature and the first temperature is divided into at least two temperature ranges, wherein the lowest temperature of a first temperature range is the second temperature, and the highest temperature is greater than or equal to the first test temperature.

[0028] The handler sorts the semiconductor chips, comprising:

[0029] The handler obtains a sorting basis; the sorting basis is determined based on at least a grading result of the semiconductor chip, and the grading result is determined according to test data obtained by the tester testing the semiconductor chip;

[0030] The handler sorts the semiconductor chips according to the sorting basis;

[0031] If the test temperature at the last test when the test of the semiconductor chip ends is not in the first temperature range, the grading result of the semiconductor chip is obtained according to the judgment result of each test of the semiconductor chip.

[0032] Optionally, the judgment result includes A level, B level and C level, and the levels of the A level, the B level and the C level are in turn reduced.

[0033] When the grading result of the semiconductor chip is obtained according to the judgment result of each test of the semiconductor chip: if the judgment result of at least N times of test is A level, the grading result of the semiconductor chip is A level; if the judgment result of at least N times of test is C level, the grading result of the semiconductor chip is C level; otherwise, the grading result of the semiconductor chip is B level.

[0034] Wherein, the N is a positive integer, and the N is greater than or equal to a preset value, the preset value is greater than or equal to half of the number of completed tests.

[0035] Optionally, if the test temperature at the last test when the test of the semiconductor chip ends is not in the first temperature range, the sorting basis used when sorting the semiconductor chip is determined according to the grading result of the semiconductor chip and the failure temperature, and the failure temperature is determined according to the test temperature when the test of the semiconductor chip ends and the reason for the end of the test.

[0036] Optionally, the determination result of each test of the semiconductor chip is obtained according to the following method:

[0037] For each test, it is determined whether the test data of each test item is in the corresponding reference range or not.

[0038] If the test data of one of the test items is not in the corresponding reference range, the determination result of the current test is unqualified.

[0039] If the test data of all the test items is in the corresponding reference range, the difference between the test data of each test item and the corresponding optimal reference value is calculated, the score of each test item is determined according to the size of the difference, the larger the difference is, the smaller the score is, the sum of the scores of all the test items is calculated, and according to the sum of the scores, it is determined whether the determination result of the current test is A level, B level or C level, and the sum of the scores required for A level, B level and C level decreases in turn.

[0040] Optionally, the reference range is different with different test temperatures.

[0041] The semiconductor chip multi-temperature automatic test system and method provided by the embodiment of the application can control the test temperature of the semiconductor chip when the semiconductor chip is tested and sorted by the sorting machine, that is, the semiconductor chip can be kept on the test site in the high-low temperature equipment on the sorting machine without moving, and then the test temperature of the semiconductor chip is controlled by the high-low temperature equipment, so that the semiconductor chip can be tested at different temperatures, the automatic temperature scanning test of the semiconductor chip is realized, the labor cost is saved, and the test efficiency is improved.

[0042] In addition, the semiconductor chip multi-temperature automatic test system provided by the embodiment of the present application can obtain the temperature characteristics of multiple parameters of the semiconductor chip through one-time scanning, facilitating temperature-related analysis on multiple performances of the semiconductor chip. Moreover, in the embodiment of the present application, the handler stores the semiconductor chips according to the sorting basis, and the sorting basis is related to the temperature grade of the semiconductor chip (determined based on the temperature range in which the failure temperature of the semiconductor chip is located), thereby improving the convenience of screening semiconductor chips of different temperature grades. BRIEF DESCRIPTION OF DRAWINGS

[0043] The features and advantages of the present application will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, which are given by way of illustration and are not intended to be limiting of the present application, in which:

[0044] Figure 1 a structure diagram of a semiconductor chip multi-temperature automatic test system provided by the embodiment of the present application;

[0045] Figure 2 a flowchart of a semiconductor chip multi-temperature automatic test method provided by the embodiment of the present application. DETAILED DESCRIPTION

[0046] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0047] It should be noted that the terms “comprising”, “containing” or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or apparatus. Without more limitations, the element defined by the statement “including a…” does not exclude the presence of additional identical elements in the process, method, article or apparatus including the element. In addition, the terms “first”, “second” and the like are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. In the description of the following embodiments, the meaning of “multiple” is two or more, unless otherwise specifically limited.

[0048] Reference should be made to Figure 1The embodiment of the present application provides a semiconductor chip multi-temperature automatic test system, which comprises a handler 101 and a tester 102, and further comprises a high-low temperature device 103, wherein the high-low temperature device 103 is installed in the handler 101, that is, the high-low temperature device 103 is arranged on the handler 101, or the high-low temperature device 103 is an integral structure with the handler 101.

[0049] The high-low temperature device 103 is used for providing different test temperatures for the semiconductor chip, that is, the temperature of the high-low temperature device 103 is controlled, so that the semiconductor chip reaches the required temperature for test.

[0050] The tester 102 is used for testing the semiconductor chip under different test temperatures respectively, and is used for testing the performance of the semiconductor chip. The semiconductor chip placed in the high-low temperature device 103 can be connected with the tester 102 through an external connecting line, the tester 102 provides the power required for test for the semiconductor chip through the external connecting line, and obtains the output of the semiconductor chip during test. The output can include the voltage and current, the voltage and current frequency and the voltage resistance value, and the test data corresponding to the output can be obtained.

[0051] The handler 101 is used for sorting the semiconductor chip, and the sorting is based on the test data output by the tester 102, that is, the sorting is based on the test data obtained by the tester 102. The test data can include the output current accuracy, the output voltage accuracy, the chip voltage resistance value and the failure temperature.

[0052] Specifically, the sorting of the semiconductor chip by the handler 101 includes marking and storing in a pipe. The marking is marking an identification. In addition, the marking identification and the test data of the chip can be stored in association, so that all the test data of the semiconductor chip can be obtained by scanning the identification in the later period, thereby facilitating extraction of the test data for analysis in the later period. The handler 101 stores the semiconductor chip in the corresponding pipe only after the marking is completed. The handler 101 can sort the semiconductor chip according to the test data output by the tester 102, or other devices (for example, a main control board) can obtain the sorting basis (at least according to the grading result) of the semiconductor chip according to the test data output by the tester 102, and then the handler 101 sorts the semiconductor chip based on the sorting basis.

[0053] As to the high-low temperature device 103, in the embodiment of the present application, the high-low temperature device 103 can realize the functions of heating and cooling at the same time, and can be installed on the sealed device of the sorting machine 101.

[0054] In the embodiment of the present application, the high-low temperature device 103 is designed as an integral structure with the sorting machine 101 by setting the high-low temperature device 103 on the sorting machine 101, so that the sorting machine 101 can control the test temperature of the semiconductor chip while testing and sorting the semiconductor chip, that is, the semiconductor chip can be kept on the test site after reaching the test site in the high-low temperature device 103 on the sorting machine 101, and then the sorting machine 101 controls the test temperature of the semiconductor chip through the high-low temperature device 103, so that the semiconductor chip can be tested at different temperatures respectively, and the automatic temperature scanning test of the semiconductor chip is realized, the labor cost is saved, and the test efficiency is improved.

[0055] In addition, for each test of the semiconductor chip, a plurality of parameters of the semiconductor chip can be tested, so that the temperature characteristics of a plurality of parameters of the semiconductor chip can be scanned at one time by using the semiconductor chip multi-temperature automatic test system provided by the embodiment of the present application, and the temperature-related analysis of a plurality of performances of the semiconductor chip is facilitated.

[0056] In some specific embodiments, the semiconductor chip multi-temperature automatic test system further comprises a main control board;

[0057] The main control board is used for controlling the high-low temperature device 103, the sorting machine 101 and / or the test machine 102.

[0058] Specifically, the main control board can be located in a separate host computer, or can be integrated in the control computer of the sorting machine 101. When the main control board is located in a separate host computer, the main control board and the sorting machine 101 can communicate through wireless or wired mode. The main control board and the high-low temperature device 103 can communicate through wireless or wired mode. The main control board and the test machine 102 can also communicate through wireless or wired mode.

[0059] In some specific embodiments, the main control board controls the temperature of the high-low temperature device 103 according to the first test temperature and the step temperature inputted from outside or preset internally, to provide a plurality of different test temperatures for the semiconductor chip;

[0060] and / or,

[0061] The main control board controls the test machine 102 to test the semiconductor chip in the high-low temperature device 103; of course, the temperature in the high-low temperature device 103 needs to reach the temperature required for the current test when testing;

[0062] and / or,

[0063] The main control board obtains the sorting basis of the semiconductor chip according to the test data output by the test machine 102, and controls the sorting machine 101 to sort the semiconductor chip based on the sorting basis. Specifically, the test machine 102 can send the test data obtained in each test (once the test temperature is adjusted, the test of the semiconductor chip is one test) to the main control board after each test is completed. After the test of the semiconductor chip is completed, the main control board analyzes all the test data of the semiconductor chip to obtain the sorting basis of the semiconductor chip.

[0064] The first test temperature can be the temperature when the semiconductor chip is tested for the first time, and can also be referred to as the initial test temperature.

[0065] Please refer to Figure 2 The embodiment of the application provides a semiconductor chip multi-temperature automatic test method, which is applied to a semiconductor chip multi-temperature automatic test system, the system comprises a sorting machine 101 and a test machine 102, the system further comprises a high-low temperature device 103, and the high-low temperature device 103 is installed in the sorting machine 101, that is, the high-low temperature device 103 and the sorting machine 101 are integrated, and the method comprises the following steps:

[0066] S201: After the sorting machine 101 detects that a semiconductor chip is located in the test position of the high-low temperature device 103, the sorting machine 101 directly or indirectly sends a first instruction to the high-low temperature device 103; the first instruction can indicate that the semiconductor chip has arrived at the test position, or indicate that the high-low temperature device 103 starts to control the test temperature, or indicate that the high-low temperature device 103 adjusts the current test temperature to the first test temperature;

[0067] Specifically, the semiconductor chip to be tested can be placed in the high-low temperature device 103 on the sorting machine 101 by using a mechanical arm or manually; specifically, the semiconductor chip to be tested can be placed in the test position in the high-low temperature device 103. A sensor can be arranged in the high-low temperature device 103, which is used to detect whether the semiconductor chip is placed in the test position;

[0068] S202: The high-low temperature device 103 adjusts the current test temperature to the first test temperature according to the first instruction; specifically, the adjustment can be heating or cooling; the first test temperature can be specified or preset;

[0069] Of course, if the current temperature is already the first test temperature, the high-low temperature device 103 does not need to be adjusted, for example, if the first test temperature is 25℃, and the current temperature in the high-low temperature device 103 is exactly 25℃, no temperature adjustment is needed, only temperature maintenance is needed.

[0070] For another example, the first test temperature can not be a fixed value, but only needs to be within a certain range, for example, any temperature value within 20℃-25℃ can be used as the first test temperature, and at this time the current temperature in the high-low temperature device 103 is exactly within this range, no temperature adjustment is needed, only temperature maintenance is needed. The next temperature adjustment can be based on the current actual first test temperature, for example, the current temperature is 26.1℃, and the step temperature is 2℃, then the next temperature adjustment needs to be 24.1℃ or 28.1℃;

[0071] S203: The tester 102 tests the semiconductor chip at the current test temperature to obtain test data at the current test temperature;

[0072] S204: If the test of the semiconductor chip has not ended, the high-low temperature device 103 adjusts the current test temperature to another new test temperature; specifically, the new test temperature can be obtained by adding or subtracting a preset step temperature from the first test temperature;

[0073] Repeat steps S203 and S204 until the test of the semiconductor chip ends;

[0074] S205: The handler 101 sorts the semiconductor chip, and the sorting is based on the test data obtained by the tester 102 testing the semiconductor chip.

[0075] The semiconductor chip multi-temperature automatic test system in the embodiment of the application can be any semiconductor chip multi-temperature automatic test system described in the system embodiment described above, and therefore the specific structure and functions can refer to the system embodiment described above, which will not be repeated here.

[0076] In the embodiment of the present application, the high-low temperature device 103 is arranged on the sorting machine 101, that is, the high-low temperature device 103 is designed as an integral structure with the sorting machine 101, so that the sorting machine 101 can control the test temperature of the semiconductor chip while testing and sorting the semiconductor chip. That is, after the semiconductor chip reaches the test position in the high-low temperature device 103 on the sorting machine 101, the semiconductor chip can be kept on the test position, and then the sorting machine 101 controls the test temperature of the semiconductor chip through the high-low temperature device 103, so that the semiconductor chip can be tested at different temperatures respectively, and the automatic temperature scanning test of the chip is realized, the labor cost is saved, and the test efficiency is improved.

[0077] In some specific embodiments, the semiconductor chip multi-temperature automatic test system further comprises a main control board;

[0078] After the sorting machine 101 detects that the semiconductor chip is located at the test position in the high-low temperature device 103, the sorting machine 101 indirectly sends a first instruction to the high-low temperature device 103, which comprises:

[0079] After the sorting machine 101 detects that the semiconductor chip is located at the test position in the high-low temperature device 103, the sorting machine 101 sends a corresponding first instruction to the main control board. The first instruction can indicate that the semiconductor chip has reached the test position.

[0080] The main control board forwards the first instruction to the high-low temperature device 103, or generates a new first instruction based on the first instruction and sends it to the high-low temperature device 103. Specifically, the new first instruction can instruct the high-low temperature device 103 to start controlling the test temperature, or instruct the high-low temperature device 103 to adjust the current test temperature to a first test temperature.

[0081] In addition, in some specific embodiments, in the case that the semiconductor chip multi-temperature automatic test system further comprises a main control board, after the high-low temperature device 103 adjusts the current test temperature to the first test temperature according to the first instruction, the high-low temperature device 103 sends a signal to the main control board that the current test temperature has been adjusted to the first test temperature, and the main control board sends a test start instruction to the test machine 102 after receiving the signal. The test machine 102 starts testing the semiconductor chip after receiving the instruction, so as to complete the test of the semiconductor chip at the current test temperature (i.e. the first test temperature).

[0082] In addition, in some specific embodiments, in the case that the semiconductor chip multi-temperature automatic test system further comprises a main control board, after the high-low temperature device 103 adjusts the current test temperature to the first test temperature according to the first instruction, the high-low temperature device 103 sends a signal to the main control board that the current test temperature has been adjusted to the first test temperature, and the main control board sends a test start instruction to the test machine 102 after receiving the signal. The test machine 102 starts testing the semiconductor chip after receiving the instruction, so as to complete the test of the semiconductor chip at the current test temperature (i.e. the first test temperature).

[0083] In addition, after the tester 102 completes the test of the semiconductor chip at the current test temperature and sends the first test end signal and the test data to the main control board, the main control board can send an instruction to the high-low temperature device 103 to adjust to another new test temperature.

[0084] As to how to determine whether the test of the semiconductor chip is completed, in some specific embodiments, the main control board can determine whether the performance of the semiconductor chip at the current test temperature is qualified according to the test data obtained in the current test, i.e. the test data obtained by the tester 102 in the test of the semiconductor chip at the current test temperature, and if the performance of the semiconductor chip at the current test temperature is determined to be unqualified, it is determined that the test of the semiconductor chip is completed. Specifically, the main control board can determine whether the performance of the semiconductor chip at the current test temperature is qualified after receiving the first test end signal (indicating that the test at the current test temperature is completed) and the test data sent by the tester 102. In the determination of whether the performance of the semiconductor chip at the current test temperature is qualified, if the test data of one of the test items is not within the corresponding reference range, the determination result of the current test is unqualified.

[0085] In some specific embodiments, the condition for the test to be completed is that the test data obtained in the completed test indicates that the semiconductor chip is unqualified, or the completed test temperature satisfies the test requirement of the semiconductor chip (i.e. it is not because the semiconductor chip is unqualified, but because all the test data obtained in the test indicates that the semiconductor chip is qualified, only because the test at all the required test temperatures has been completed). As long as one of the two conditions is met, the condition for the test to be completed is met.

[0086] In the embodiment, the completed test temperature satisfies the test requirement of the semiconductor chip, in particular, if the semiconductor chip needs to be tested in a certain temperature range (for example, -40℃-150℃), once the preset step temperature is used to change the current test temperature until all the optional temperatures in the temperature range have been used as the test temperature to complete the test of the semiconductor chip, the completed test temperature is considered to satisfy the test requirement of the semiconductor chip. For example, the required temperature range for testing the semiconductor chip is -40℃-150℃, if -40℃ is used as the first test temperature and 2℃ is used as the step temperature, the current test temperature is gradually increased, when the current test temperature is increased to 150℃, the completed test temperature is considered to satisfy the test requirement of the semiconductor chip. For another example, the required temperature range for testing the semiconductor chip is -40℃-150℃, if 30℃ is used as the first test temperature and 2℃ is used as the step temperature, the current test temperature is gradually decreased to -40℃ and then gradually increased to 150℃, when the current test temperature is increased to 150℃, the completed test temperature is considered to satisfy the test requirement of the semiconductor chip.

[0087] In some specific embodiments, the first test temperature is greater than 20℃ and less than 30℃; the test temperature satisfying the test requirement of the semiconductor chip is the highest first temperature and the lowest second temperature, and the first temperature is higher than the first test temperature and the second temperature is lower than the first test temperature; after the current test temperature is adjusted to the first test temperature, the high-low temperature device 103 is first adjusted to the second temperature and then adjusted to the first temperature according to the preset step temperature.

[0088] Optionally, the high-low temperature device 103 adjusts the current test temperature according to the instruction of the main control board, that is, the high-low temperature device 103 is adjusted to the temperature indicated by the instruction of the main control board.

[0089] In the embodiment, the test of the semiconductor chip at the adjusted test temperature is needed after each adjustment of the current test temperature. In particular, after the current test temperature is adjusted to the first test temperature, the test of the semiconductor chip at the first test temperature is needed. After the current test temperature is adjusted to the second temperature, the test of the semiconductor chip at the second temperature is needed, and then, the test of the semiconductor chip at the current temperature is needed after the temperature is adjusted according to the preset step temperature (for example, 2℃).

[0090] In the embodiment of the present application, in order to improve the efficiency of the temperature scanning test, the first test temperature, i.e. the initial test temperature of the semiconductor chip, is set to a temperature value greater than 20℃ and less than 30℃, and specifically can be room temperature 25℃. If the test result of the semiconductor chip at this temperature is not qualified, there is no need to perform high-low temperature test on it.

[0091] In addition, in the embodiment of the present application, after the current test temperature is adjusted to the first test temperature, the high-low temperature device 103 is first adjusted to the second temperature, and then adjusted to the first temperature according to the preset step temperature, that is, the temperature scanning test is performed from the lowest temperature to the highest temperature. The reason for this design is that at the lowest temperature (the second temperature), the semiconductor chip may have frost or water droplets condensed on the surface of the chip. Therefore, when the high temperature test is performed, the semiconductor chip and the sealed cavity of the high-low temperature device 103 are baked, avoiding the situation of frost or water droplets condensation on the semiconductor chip due to low temperature, thereby improving the safety and reliability of the semiconductor chip test.

[0092] In some specific embodiments, the temperature between the second temperature and the first temperature is divided into at least two temperature ranges, wherein the lowest temperature of the first temperature range is the second temperature, and the highest temperature is greater than or equal to the first test temperature.

[0093] The handler 101 sorts the semiconductor chips, including:

[0094] The handler 101 obtains a sorting basis, wherein the sorting basis is determined based on at least a grading result of the semiconductor chip, and the grading result is determined according to test data obtained by the tester 102 testing the semiconductor chip.

[0095] The handler 101 sorts the semiconductor chips according to the sorting basis.

[0096] If the test temperature at the last test is not in the first temperature range when the test on the semiconductor chip ends, the grading result of the semiconductor chip is obtained according to the judgment result of each test on the semiconductor chip. Specifically, first, the judgment result of each test is obtained according to the test data obtained by each test of the semiconductor chip, and then the grading result of the semiconductor chip is obtained based on the judgment result of each test.

[0097] In addition, if the test temperature at the last test is within the first temperature range (indicating that the test data of the last test indicates that the semiconductor chip is unqualified) when the test of the semiconductor chip ends, the grading result of the semiconductor chip can be considered as unqualified. Specifically, since the test temperature changes in the following manner: the test temperature of the first test is the first test temperature, and the test temperature of the subsequent tests changes from the lowest second test temperature to the highest first test temperature, if the semiconductor chip is unqualified at a lower test temperature, the semiconductor chip can be directly determined as unqualified.

[0098] Specifically, the sorting basis can be determined by the handler 101 itself according to the test data of the semiconductor chip.

[0099] In the case where the semiconductor chip multi-temperature automatic test system further comprises a main control board, the sorting basis can be obtained by the main control board analyzing the test data of the semiconductor chip. The main control board sends the sorting basis obtained by analysis to the handler 101, so that the handler 101 sorts the semiconductor chip according to the sorting basis. Alternatively, the specific form of the sorting basis sent by the main control board to the handler 101 can be a marking label, and the marking label can indicate the sorting basis (the sorting basis can indicate the grading result). The judgment basis of the sorting basis is all the test data of the semiconductor chip, so the main control board can obtain the sorting basis only after the test of the semiconductor chip ends, and then sends the sorting basis to the handler 101. In addition, the main control board can send a second test end signal to the handler 101 at the same time of sending the marking label, and the second test end signal indicates that the test of the semiconductor chip ends.

[0100] After receiving the marking label and the second test end signal, the handler 101 marks the semiconductor chip and stores it in the corresponding tube, thereby completing the test and sorting of the semiconductor chip.

[0101] In some specific embodiments, the judgment result comprises A level, B level and C level, and the levels of the A level, the B level and the C level are in descending order;

[0102] When the grading result of the semiconductor chip is obtained according to the judgment result of each test of the semiconductor chip: if the judgment result of at least N tests is A level, the grading result of the semiconductor chip is A level; if the judgment result of at least N tests is C level, the grading result of the semiconductor chip is C level; and in other cases, the grading result of the semiconductor chip is B level;

[0103] Wherein, the N is a positive integer, and the N is greater than or equal to a preset value, the preset value is greater than or equal to half of the number of completed tests.

[0104] For example, N can be two-thirds of the number of completed tests. The number of completed tests refers to the number of completed tests for the current semiconductor chip.

[0105] In the embodiment of the present application, only when the test temperature at the last test is not in the first temperature range, the grading result of the semiconductor chip is obtained according to the judgment result of each test for the semiconductor chip, which indicates that the temperature scan test has scanned the first temperature range, that is, the semiconductor chip has been tested more times.

[0106] In some specific embodiments, if the test for the semiconductor chip ends, and the test temperature at the last test is not in the first temperature range, then the sorting basis used when the semiconductor chip is sorted is determined according to the grading result of the semiconductor chip and the failure temperature, and the failure temperature is determined according to the test temperature at the end of the test and the reason for the end of the test (i.e. which test end condition is met to cause the end of the test). The test temperature at the end of the test of the semiconductor chip is the test temperature at the last test for the semiconductor chip.

[0107] Regarding the failure temperature of the semiconductor chip, there are two cases corresponding to the two reasons for the end of the test: one, the condition for the end of the test is that the completed test temperature meets the test requirement for the semiconductor chip, at this time, the failure temperature of the semiconductor chip is considered to be outside the test temperature range of all tests; two, the condition for the end of the test is that the test data obtained by the completed test indicates that the semiconductor chip is unqualified, specifically, the test data obtained by the last test indicates that the semiconductor chip is unqualified, at this time, the test temperature at the end of the test is the failure temperature of the semiconductor chip.

[0108] In some embodiments of the embodiment of the present application, after the first test of the semiconductor chip at the preset first test temperature, the test temperature of the semiconductor chip is lowered to the lowest test temperature (i.e. the second temperature), and then the temperature scan test of the semiconductor chip is realized by slowly increasing the temperature from the lowest test temperature, so that the failure temperature of the semiconductor chip can be accurately obtained.

[0109] Specifically, all test temperatures required for the test, i.e. the temperatures between the second temperature and the first temperature, can be divided into four temperature ranges in order from low to high: the first temperature range, the second temperature range, the third temperature range and the fourth temperature range.

[0110] For example, when testing a semiconductor chip, the testing temperature of the semiconductor chip is usually designed to be -40°C to 150°C. All the testing temperatures required for the testing can be divided into a first temperature range [-40°C, 85°C], a second temperature range [85°C, 105°C], a third temperature range [105°C, 125°C] and a fourth temperature range [125°C, 150°C].

[0111] According to the failure temperature of the semiconductor chip, the temperature grade of the semiconductor chip can be divided into the following grades:

[0112] First grade: the failure temperature of the semiconductor chip is outside all the testing temperature ranges of the testing, i.e. all the testing data of the testing performed indicates that the semiconductor chip is qualified;

[0113] Second grade: the failure temperature is in the fourth temperature range, for example, between 125°C and 150°C (not including 125°C, but including 150°C);

[0114] Third grade: the failure temperature is in the third temperature range, for example, between 105°C and 125°C (not including 105°C, but including 125°C);

[0115] Fourth grade: the failure temperature is in the second temperature range, for example, between 85°C and 105°C (not including 85°C, but including 105°C);

[0116] Fifth grade: the failure temperature is in the first temperature range, for example, between -40°C and 85°C (including -40°C and 85°C).

[0117] The sorting basis of the semiconductor chip: if the failure temperature is in the first temperature range, i.e. the temperature grade is the fifth grade, the sorting basis is directly unqualified (if the failure temperature is in the first temperature range, i.e. the testing temperature at the last testing is in the first temperature range, at this time, the grading result of the semiconductor chip can be considered as unqualified); if the failure temperature is in other temperature ranges except the first temperature range, i.e. the temperature grade of the semiconductor chip is any one of the other four grades except the fifth grade, the sorting basis needs to be determined in combination with the grading result and the temperature grade of the semiconductor chip.

[0118] Specifically, when the grading result and the temperature grade of the semiconductor chip are combined to determine the sorting basis, if the temperature grade is grade one and the grading result is grade A, the sorting basis can be, for example, "1" or "1A", and the handler 101 can store the semiconductor chip in a first tube; if the temperature grade is grade one and the grading result is grade B, the sorting basis can be, for example, "2" or "1B", and the handler 101 can store the semiconductor chip in a second tube; if the temperature grade is grade one and the grading result is grade C, the sorting basis can be, for example, "3" or "1C", and the handler 101 can store the semiconductor chip in a third tube; if the temperature grade is grade two and the grading result is grade A, the sorting basis can be, for example, "4" or "2A", and the handler 101 can store the semiconductor chip in a fourth tube, and so on, so that the semiconductor chips with the temperature grades of one to four are stored in twelve corresponding tubes respectively. If the temperature grade of the semiconductor chip is grade five, the handler 101 stores the semiconductor chip in a thirteenth tube.

[0119] In the embodiment of the present application, the handler 101 stores the semiconductor chips according to the sorting basis, and the sorting basis is related to the temperature grade of the semiconductor chip, so that the convenience of screening the semiconductor chips with different temperature grades is improved.

[0120] In some specific embodiments, the judging result of each test of the semiconductor chip is obtained according to the following method:

[0121] For each test, it is judged whether the test data of each test item is within the corresponding reference range or not;

[0122] If the test data of one of the test items is not within the corresponding reference range, the judging result of the current test is unqualified. In the embodiment of the present application, the judging result of the test of the semiconductor chip is unqualified only once, specifically, the judging result of the last test can be unqualified. This is because the test of the semiconductor chip is ended as soon as the judging result of one test is unqualified.

[0123] If the test data of all the test items are within the corresponding reference range, the difference between the test data of each test item and the corresponding optimal reference value is calculated respectively; the score of each test item is determined according to the size of the difference, the larger the difference (here, the absolute value) is, the smaller the score is; the sum of the scores of all the test items is calculated; and according to the sum of the scores, it is determined whether the judgment result of the current test is A level, B level or C level, and the sum of the scores required for A level, B level and C level decreases in turn. In the embodiment of the application, for each test, if the test data of all the test items are within the corresponding reference range, the test result is considered to be qualified, or the judgment result of the test is qualified.

[0124] Specifically, when the score of each test item is determined according to the size of the difference, if the difference is less than or equal to a first threshold value, the score of the test item is a first score S1, if the difference is greater than the first threshold value and less than or equal to a second threshold value, the score of the test item is a second score S2, and if the difference is greater than the second threshold value and less than or equal to a third threshold value, the score of the test item is a third score S3. The first threshold value, the second threshold value and the third threshold value increase in turn, and the first score S1, the second score S2 and the third score S3 decrease in turn, for example, the first score S1 is 3, the second score S2 is 2, and the third score S3 is 1.

[0125] When the judgment result of the current test is determined according to the sum of the scores, if the sum of the scores is equal to M*S1, the judgment result is A level, if the sum of the scores is less than M*S1 and greater than or equal to M*S2, the judgment result is B level, and if the sum of the scores is less than M*S2 and greater than or equal to M*S3, the judgment result is C level, wherein M is the number of test items.

[0126] Optionally, the first threshold value, the second threshold value and the third threshold value are different at different test temperatures. Specifically, for each test (the test temperature of each test is different), when the score of each test item is determined according to the size of the difference, the first threshold value, the second threshold value and the third threshold value used may be different.

[0127] The first threshold value, the second threshold value and the third threshold value of each test item corresponding to different test temperatures can be set in the main control panel in advance, and the main control panel only needs to retrieve the corresponding first threshold value, second threshold value and third threshold value (including the first threshold value, second threshold value and third threshold value of each test item) according to the current test temperature.

[0128] In some specific embodiments, the reference range varies with the test temperature. That is, the reference range corresponding to the test data of each test item obtained in each test is related to the test temperature at the time of the test. This is because the test data of a semiconductor chip usually varies with temperature, such as the leakage voltage of a semiconductor chip. At low temperature, the leakage voltage is low because of low electron activity, and at high temperature, the leakage voltage is high because of high electron activity. Therefore, if only one reference range of the test data is set at all test temperatures, the test result will be inaccurate. Therefore, in order to improve the accuracy of the test and better reflect the temperature characteristics of each test data of the semiconductor chip, different reference ranges of the test data can be set according to different test temperatures.

[0129] In addition, regardless of the reason for ending the test of the semiconductor chip, the temperature of the semiconductor chip needs to be adjusted to a preset temperature, which can be 20-30°C, before the semiconductor chip is marked by the handler 101. This is because if the semiconductor chip is marked at high temperature, the temperature of the semiconductor chip will be further increased, which can damage the chip. Of course, in some alternative specific embodiments, the temperature of the semiconductor chip needs to be adjusted to the preset temperature only when the test temperature at the end of the test is greater than the preset temperature. In this case, in order to improve the efficiency of the entire test process (including marking), the preset temperature can be set to 30°C.

[0130] Specifically, after the test of the semiconductor chip is completed, the main control board can first send an instruction to the high-low temperature device 103 to adjust the temperature to the preset temperature. After receiving the instruction, the high-low temperature device 103 adjusts the temperature to the preset temperature and sends a signal to the main control board indicating that the temperature has been adjusted to the preset temperature. After receiving the signal, the main control board sends a second test end signal to the high-low temperature device 103. After receiving the second test end signal, the high-low temperature device 103 automatically opens the upper cover of the sealed cavity of the high-low temperature device 103 to expose the semiconductor chip, facilitating subsequent marking and removal operations. Then, the main control board sends a second test end signal and a marking identifier to the handler 101.

[0131] Alternatively, after the test of the semiconductor chip is completed, the main control board can first send an instruction to the high-low temperature device 103 to adjust the temperature to the preset temperature. After receiving the instruction, the high-low temperature device 103 adjusts the temperature to the preset temperature and sends a signal to the main control board indicating that the temperature has been adjusted to the preset temperature. After receiving the signal, the main control board sends a second test end signal and a marking identifier to the handler 101. After receiving the second test end signal and the marking identifier, the handler 101 opens the upper cover of the sealed cavity of the high-low temperature device 103 by the mechanical arm to expose the semiconductor chip.

[0132] The semiconductor chip multi-temperature automatic test method described in the embodiments of the present application is described for a semiconductor chip. For testing other semiconductor chips, the above method process can be repeatedly executed, which will not be described here.

[0133] The above only describes the embodiments of the present application and is not intended to limit the present application. The present application can have various changes and modifications for those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the scope of claims of the present application.

Claims

1. A semiconductor chip multi-temperature automated test system comprising a handler and a tester, characterized in that, Further comprising: The high-low temperature device is installed in the sorting machine; wherein, The high-low temperature device is used to provide multiple different test temperatures for the semiconductor chip; The test machine is used to test the semiconductor chip under different test temperatures respectively; The sorting machine is used to sort the semiconductor chip, and the sorting is based on the test data output by the test machine; The test end condition is that the completed test temperature meets the test needs of the semiconductor chip, or the test data obtained by the completed test indicates that the semiconductor chip is unqualified; The first test temperature is greater than 20 DEG C and less than 30 DEG C; the test temperature meeting the test needs of the semiconductor chip is the highest first temperature and the lowest second temperature, and the first temperature is higher than the first test temperature and the second temperature is lower than the first test temperature; after the high-low temperature device adjusts the current test temperature to the first test temperature, it is first adjusted to the second temperature, and then adjusted to the first temperature according to the preset step temperature; The temperature between the second temperature and the first temperature is divided into at least two temperature ranges, wherein the lowest temperature of the first temperature range is the second temperature and the highest temperature is greater than or equal to the first test temperature; The sorting machine is specifically used to obtain a sorting basis and sort the semiconductor chip according to the sorting basis; the sorting basis is determined based on at least the grading result of the semiconductor chip, and the grading result is determined according to the test data obtained by the test machine testing the semiconductor chip; If the test temperature at the last test when the test of the semiconductor chip ends is not in the first temperature range, the grading result of the semiconductor chip is obtained according to the judgment result of each test of the semiconductor chip; if the test temperature at the last test when the test of the semiconductor chip ends is in the first temperature range, the grading result of the semiconductor chip is determined to be unqualified.

2. The system of claim 1, wherein, Further comprising: The main control board is used to control the high-low temperature device, the sorting machine and / or the test machine. The main control board controls the temperature of the high-low temperature device according to the first test temperature and the step temperature input from outside or preset internally to provide multiple different test temperatures for the semiconductor chip; and / or, 3. The system of claim 2, wherein, The main control board controls the test machine to test the semiconductor chip in the high-low temperature device; and / or, The main control board obtains the sorting basis of the semiconductor chip according to the test data output by the test machine, and controls the sorting machine to sort the semiconductor chip based on the sorting basis. Applied to a semiconductor chip multi-temperature automatic test system, the system comprises a sorting machine and a test machine, the system further comprises a high-low temperature device, and the high-low temperature device is installed in the sorting machine, and the method comprises:

4. A method for automated testing of semiconductor chips at multiple temperatures, the method comprising: ​ S201: The handler directly or indirectly sends a first instruction to the high-low temperature device after detecting that the semiconductor chip is located at the test site in the high-low temperature device; S202: The high-low temperature device adjusts the current test temperature to a first test temperature according to the first instruction; S203: The tester tests the semiconductor chip at the current test temperature to obtain test data at the current test temperature; S204: If the test of the semiconductor chip has not ended, the high-low temperature device adjusts the current test temperature to another new test temperature; Steps S203 and S204 are repeated until the test of the semiconductor chip ends; S205: The handler sorts the semiconductor chip, and the sorting is based on the test data obtained by the tester testing the semiconductor chip; The condition for the test ending is that the completed test temperature meets the test needs of the semiconductor chip, or the test data obtained by the completed test indicates that the semiconductor chip is unqualified; The first test temperature is greater than 20°C and less than 30°C; the test temperature that meets the test needs of the semiconductor chip is the highest first temperature and the lowest second temperature, and the first temperature is higher than the first test temperature and the second temperature is lower than the first test temperature; after the high-low temperature device adjusts the current test temperature to the first test temperature, it is first adjusted to the second temperature, and then adjusted to the first temperature according to the preset step temperature; The temperature between the second temperature and the first temperature is divided into at least two temperature ranges, wherein the lowest temperature of the first temperature range is the second temperature and the highest temperature is greater than or equal to the first test temperature; The handler sorts the semiconductor chip, including: The handler obtains a sorting basis; the sorting basis is determined based on at least a grading result of the semiconductor chip, and the grading result is determined according to the test data obtained by the tester testing the semiconductor chip; The handler sorts the semiconductor chip according to the sorting basis; If the test of the semiconductor chip ends, the test temperature at the last test is not in the first temperature range, and the grading result of the semiconductor chip is obtained according to the judgment result of each test of the semiconductor chip; if the test of the semiconductor chip ends, the test temperature at the last test is in the first temperature range, and the grading result of the semiconductor chip is determined to be unqualified.

5. The method of claim 4, wherein, The semiconductor chip multi-temperature automatic test system further comprises a main control board; The handler indirectly sends a first instruction to the high-low temperature device after detecting that the semiconductor chip is located at the test site in the high-low temperature device, including: The handler sends the corresponding first instruction to the main control board after detecting that the semiconductor chip is located at the test site in the high-low temperature device; The main control board forwards the first instruction to the high-low temperature device, or generates a new first instruction based on the first instruction and sends the new first instruction to the high-low temperature device.

6. The method of claim 4, wherein, The judgment result includes A level, B level and C level, and the levels of the A level, the B level and the C level are sequentially decreased. When the grading result of the semiconductor chip is obtained according to the judgment results of each test on the semiconductor chip: if the judgment result of at least N tests is A level, the grading result of the semiconductor chip is A level; if the judgment result of at least N tests is C level, the grading result of the semiconductor chip is C level; otherwise, the grading result of the semiconductor chip is B level. Wherein, the N is a positive integer, and the N is greater than or equal to a preset value, and the preset value is greater than or equal to half of the number of completed tests.

7. The method of claim 4, wherein, If the test temperature at the last test when the test on the semiconductor chip ends is not in the first temperature range, the sorting basis used when the semiconductor chip is sorted is determined according to the grading result of the semiconductor chip and the failure temperature, and the failure temperature is determined according to the test temperature when the test on the semiconductor chip ends and the reason for ending the test.

8. The method of claim 4, wherein, The judgment result of each test on the semiconductor chip is obtained according to the following method: For each test, it is judged whether the test data of each test item is in the corresponding reference range or not; If the test data of one test item is not in the corresponding reference range, the judgment result of the current test is unqualified; If the test data of all test items is in the corresponding reference range, the difference between the test data of each test item and the corresponding optimal reference value is calculated respectively; the score of each test item is determined according to the size of the difference, the larger the difference, the smaller the score; the sum of the scores of each test item is calculated; According to the sum of the scores, it is determined whether the judgment result of the current test is A level, B level or C level, and the sum of the scores required for A level, B level and C level is sequentially decreased.

9. The method of claim 8, wherein, The reference range is different with different test temperatures. The reference range is different with different test temperatures.

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