Electronic device and method of manufacturing the same

Abstract

The present disclosure relates to an electronic device and a manufacturing method thereof, the manufacturing method comprising: providing a first carrier; forming a first component on a first surface of the first carrier, the first component comprising an electrical connection structure; providing a second carrier; forming a first protective layer on a first surface of the second carrier; forming a second component on the first protective layer; connecting the first component and the second component together through a bonding structure; removing the second carrier; forming at least a first opening in the first protective layer to expose the electrical connection structure of the first component; forming a capping layer on the first protective layer; patterning the capping layer to form at least a second opening in the capping layer, the second opening and the first opening being mutually through, and the second opening not being prepared by a through silicon via process.

Description

Technical Field

[0001] This disclosure relates to the field of electronics, and more specifically, to an electronic device and a method of manufacturing the same. Background Technology

[0002] Various types of semiconductor devices and microelectromechanical systems (MEMS) devices can be formed on substrates. As the physical structure of semiconductor devices and MEMS devices becomes increasingly complex, cavitary semiconductor devices and MEMS devices are frequently used in the prior art.

[0003] Taking a thin-film bulk acoustic resonator as an example, Figure 1 This is a schematic diagram of a structure of an existing thin-film bulk acoustic resonator. (Example:) Figure 1 As shown, the thin-film bulk acoustic wave resonator includes a substrate 100, a cavity 101, a lower electrode 102, a piezoelectric layer 103, and an upper electrode 104. The lower electrode 102, upper electrode 104, and piezoelectric layer 103 form a "sandwich" structure. During the fabrication of the thin-film bulk acoustic wave resonator, this "sandwich" structure first covers the cavity 101 filled with sacrificial material. After subsequent manufacturing processes, the sacrificial material is removed to release the cavity 101. When filling with sacrificial material, it is typically conformally deposited on the upper surface of the substrate 100. Therefore, a planarization process, such as chemical mechanical polishing, is required on the upper surface of the substrate 100 to remove the sacrificial material outside the cavity 101. The fabrication of devices with the cavity 101 requires multiple complex process steps. The process of releasing the sacrificial material to form the cavity 101 often increases the manufacturing difficulty and carries the risk of incomplete sacrificial material removal.

[0004] In existing technologies, RF modules are generally composed of filters / duplexers, power amplifiers, low-noise amplifiers, and switches packaged together. The filters include multiple thin-film bulk acoustic wave resonators, and the duplexers include transmit and receive filters. In existing technologies, transmit and receive filters are typically mounted on a substrate in a two-dimensional direction, and often on different substrates. This significantly increases the manufacturing complexity and cost of the RF module, as well as its size.

[0005] Based on the above-mentioned technical problems, the prior art proposes to stack and package resonators or filters fabricated on different substrates using through-silicon via (TSV) and bonding processes to reduce the volume of filters or duplexers, thereby reducing the volume of RF modules.

[0006] However, through-hole processes, such as through-silicon via (TSV) processes, involve multiple process steps, such as photolithography, etching, seed layer deposition, and electrochemical plating of TSVs. These processes place high demands on manufacturing equipment and processes, and require overcoming process challenges such as consistency of TSVs during manufacturing.

[0007] It is evident that existing preparation methods suffer from problems such as complex processes, high process difficulty, high preparation costs, and low yield and output. Summary of the Invention

[0008] This disclosure addresses the aforementioned technical problems by designing a novel device including a cavity and its fabrication process, which overcomes the technical problems existing in the prior art, thereby simplifying the device fabrication process, reducing process difficulty and manufacturing cost, and improving yield and output.

[0009] A brief overview of this disclosure will be given below to provide a basic understanding of certain aspects of it. It should be understood that this overview is not an exhaustive summary of this disclosure. It is not intended to identify key or essential parts of this disclosure, nor is it intended to limit the scope of this disclosure. Its purpose is merely to present certain concepts in a simplified form as a prelude to the more detailed description that follows.

[0010] According to one aspect of this disclosure, a method for manufacturing an electronic device is provided, the method comprising: providing a first carrier; forming a first component on a first surface of the first carrier, the first component including an electrical connection structure; providing a second carrier; forming a first protective layer on a first surface of the second carrier; forming a second component on the first protective layer; connecting the first component and the second component together by a bonding structure; removing the second carrier; forming at least a first opening in the first protective layer exposing the electrical connection structure of the first component; forming a capping layer on the first protective layer; and patterning the capping layer to form at least a second opening in the capping layer, the second opening communicating with the first opening, the second opening not fabricated using a through-silicon via (TSV) process.

[0011] Furthermore, a cavity is formed between the capping layer and the back surface of the active area of ​​the second component, and the active areas of the first component and the active areas of the second component share a common sealed cavity area.

[0012] Furthermore, the graphical representation of the first protective layer is performed separately.

[0013] According to another aspect of this disclosure, a method for manufacturing an electronic device is provided, comprising: providing a first carrier; forming a first component having an active region on a first surface of the first carrier; providing a second carrier; forming a first protective layer on a first surface of the second carrier; forming a second component having an active region on the first protective layer; connecting the first component and the second component together by a bonding structure; removing the second carrier; forming a capping layer on the first protective layer; and patterning the capping layer to form a cavity between the capping layer and the back surface of the active region of the second component, wherein the active regions of the first component and the active regions of the second component have a common sealed cavity region.

[0014] Furthermore, the capping layer is made of dry film or polyimide.

[0015] Furthermore, a second protective layer is formed on the first component or the second component, and the bonding structure is formed on the second protective layer. The bonding structure covers the non-active region of the first component or the second component, and the bonding structure is not formed on the scribing area of ​​the first carrier or the second carrier.

[0016] Furthermore, the capping layer is composed of a padding layer and a sealing layer; the carrier is made of glass material.

[0017] According to another aspect of this disclosure, an electronic device is provided, comprising: a carrier, a first component, a second component, a first protective layer, and a capping layer; wherein, the first component is disposed on a first surface of the carrier, and the first component includes an electrical connection structure; the second component is stacked on the first component; a bonding structure is provided between the first component and / or the second component; the first protective layer is disposed on a surface of the second component opposite to the first component, and the first protective layer has a first opening exposing the electrical connection structure of the first component; the capping layer is disposed on the first protective layer; the capping layer has a second opening that communicates with the first opening, and the second opening is not a through-silicon via.

[0018] Furthermore, a cavity is formed between the capping layer and the back surface of the active area of ​​the second component, and the active areas of the first component and the active areas of the second component share a common sealed cavity area.

[0019] According to another aspect of this disclosure, an electronic device is provided, comprising: a carrier, a first component, a second component, a first protective layer, and a capping layer; wherein, the first component is disposed on a first surface of the carrier, and the first component includes an active region; the second component is disposed on the first component, and the second component includes an active region; a bonding structure is provided between the first component and / or the second component; a first protective layer is provided on the surface of the first component facing away from the second component; the capping layer is disposed on the first protective layer; a cavity is provided between the capping layer and the back surface of the active region of the second component, and the active regions of the first component and the second component share a common sealed cavity region.

[0020] Furthermore, the capping layer is made of dry film or polyimide.

[0021] Furthermore, the first component and / or the second component have a second protective layer.

[0022] Furthermore, the bonding structure is present on the second protective layer.

[0023] Furthermore, the bonding structure covers the non-active regions of the first component and / or the second component.

[0024] Furthermore, the bonding structure is not present in the scribe line region of the first carrier and / or the second carrier.

[0025] Furthermore, the sealing layer is composed of a padding layer and a sealing layer.

[0026] Furthermore, the carrier is made of glass.

[0027] Furthermore, the first component and the second component are selected from: a resonator, a transmit filter, or a receive filter. Attached Figure Description

[0028] The specific details of this disclosure are described below with reference to the accompanying drawings, which will facilitate a more readily understanding of the above and other objects, features, and advantages of this disclosure. The drawings are merely for illustrating the principles of this disclosure. The dimensions and relative positions of the elements are not necessarily drawn to scale in the drawings.

[0029] Figure 1 A schematic diagram of a conventional thin-film bulk acoustic resonator is shown.

[0030] Figure 2-3 A schematic diagram of the device structure of the filter disclosed herein is shown;

[0031] Figure 4-15 A schematic diagram of the structure and device fabrication process of the filter according to this disclosure is shown. Detailed Implementation

[0032] Exemplary disclosures of this disclosure will be described below with reference to the accompanying drawings. For clarity and brevity, not all features implementing this disclosure are described in the specification. However, it should be understood that many disclosure-specific decisions can be made in developing any such implementation of this disclosure to achieve the developer’s specific goals, and these decisions may vary depending on the specific disclosure.

[0033] It should also be noted that, in order to avoid obscuring this disclosure with unnecessary details, only the device structure closely related to the scheme according to this disclosure is shown in the accompanying drawings, while other details that are not closely related to this disclosure are omitted.

[0034] Generally, it should be understood that the drawings and the various elements depicted therein are not drawn to scale. Furthermore, the use of relative terms (such as "above", "below", "top", "bottom", "upper", and "lower") to describe the relationships between the various elements should be understood to cover different orientations of the device and / or element in addition to the orientations depicted in the drawings.

[0035] It should be understood that this disclosure is not limited to the described embodiments by virtue of the following description with reference to the accompanying drawings. Throughout this document, features may be substituted or borrowed between different embodiments where feasible, and one or more features may be omitted in one embodiment, wherein the same reference numerals denote the same parts. It should be understood that the manufacturing steps of this disclosure are exemplary in the embodiments, and the order of the steps may be adjusted.

[0036] <Device Structure>

[0037] This disclosure applies to devices including cavities. Although this embodiment uses a filter as an example for illustration, those skilled in the art will understand that the solutions disclosed herein are not limited to filters.

[0038] See Figure 2 , Figure 2 The present disclosure illustrates the device structure of a filter having a first substrate 1000, which may be, for example, high-resistivity silicon, gallium arsenide, indium phosphide, glass, sapphire, or aluminum oxide. 、 Materials compatible with semiconductor processes, such as SiC, are used. It should be particularly noted that when the first substrate 1000 is made of glass, it has a low dielectric constant and high resistivity, offering advantages in high-frequency performance. An acoustic wave reflecting region 1100, consisting of structures such as air cavities or Bragg reflector layers, is formed in the first substrate 1000. The Bragg reflector layer can be formed by stacking thin films with different acoustic impedances.

[0039] At least a first component is formed on the first substrate 1000. For example, the first component is a first resonator component. The first resonator component may include at least one resonator. The resonator includes a structural functional layer, which includes at least an upper electrode, a lower electrode, and a piezoelectric layer.

[0040] In one implementation, such as Figure 2 As shown, the lower electrode 1200 can be a single layer or multiple layers, and the lower electrode 1200 can completely or partially cover the first substrate 1000. The lower electrode 1200 can be formed of one or more conductive materials, such as various metals compatible with semiconductor processes including tungsten, molybdenum, iridium, aluminum, platinum, ruthenium, niobium, or hafnium.

[0041] A piezoelectric layer 1300 is formed on the lower electrode 1200. The piezoelectric layer 1300 can be formed from any piezoelectric material compatible with semiconductor processes, such as aluminum nitride, doped aluminum nitride, or zirconate titanate (PZT).

[0042] An upper electrode 1400 is formed on the piezoelectric layer 1300. The upper electrode 1400 can be formed of one or more conductive materials, such as various semiconductor-compatible metals including tungsten, molybdenum, iridium, aluminum, platinum, ruthenium, niobium, or hafnium. The materials of the upper electrode 1400 and the lower electrode 1200 can be the same or different. The location where the projections of the upper electrode 1400, the piezoelectric layer 1300, and the lower electrode 1200 overlap on the upper surface of the first substrate 1000 is defined as the active region of the first component.

[0043] It is understood that the functional layer of this structure may further include structures such as a mass load layer and a frame layer. The mass load layer and frame layer structure may be formed above the lower electrode 1200, or may be further formed on the upper electrode 1400.

[0044] A second component is disposed on the surface of a first substrate 1000 on which a structural functional layer is formed. Exemplarily, the second component is a second resonator assembly. The second resonator assembly may include at least one resonator, which includes the structural functional layer. Specifically, as... Figure 2 As shown, the structural functional layer includes at least an upper electrode 2400, a lower electrode 2200, and a piezoelectric layer 2300; the position where the upper electrode 2400, the piezoelectric layer 2300, and the lower electrode 2200 project onto the upper surface of the first substrate 1000 is defined as the active region of the second resonator assembly; the arrangement of the structural functional layer of the second resonator assembly is similar to that of the first resonator assembly, and will not be described again here.

[0045] The second resonator assembly is arranged face-to-face with the first resonator assembly. For example, the structural layers of the second and first resonator assemblies are arranged in a mirror-symmetrical manner. The first and second resonator assemblies are connected by a bonding structure 2600 disposed on the non-active regions (i.e., regions other than the active regions) of both resonator assemblies. The bonding structure 2600 can be disposed near the edge of the upper surface of the first substrate 1000. Ideally, the bonding structure 2600 substantially covers the non-active regions of both resonator assemblies, and the projection of the bonding structure 2600 onto the upper surface of the first substrate 1000 can be a closed shape, such as a ring or a frame.

[0046] Furthermore, the filter also includes a second protective layer 2500, which may be formed on at least one surface of the first resonator assembly and the second resonator assembly facing each other. The second protective layer 2500 may be silicon dioxide and is used to protect the resonator assembly. A first protective layer 2100, which may also be silicon dioxide, is formed on the surface of the second resonator assembly opposite to the first resonator assembly.

[0047] A capping layer, which does not require a through-silicon via (TSV) process, is formed on the first protective layer 2100. The capping layer may consist of a pad layer 2700 and a sealing layer 2800. A cavity, which does not need to be pre-formed, exists between the capping layer and the back surface of the second resonator assembly, thereby forming a sealed cavity region C between the capping layer and the first substrate 1000. The sealed cavity region C includes a cavity region shared by the first and second resonator assemblies. The capping layer may be formed of a dry film or polyimide, preferably a dry film. Through-holes are formed in the capping layer, the first protective layer 2100, the non-active region of the second resonator assembly, the second protective layer 2500, and the bonding structure 2600 to expose the electrical connection structure of the first resonator assembly. Conductive pillars 2900 and bumps 3000 are formed in and above the through-holes. A spacer layer 3100 may be formed between the conductive pillars 2900 and the bumps 3000. The conductive pillars 2900 are preferably made of a metal with excellent conductivity, such as copper, for better electrical signal transmission. The bumps 3000 may be made of a metal with a low melting point, such as tin, lead (Pb), or aluminum, for easy melting and forming. The spacer layer 3100 is selected from a metal that provides a spacer protection function, such as nickel, depending on the materials of the conductive pillars and bumps. The conductive pillars 2900, the spacer layer 3100, and the bumps 3000 are used to bring out the input and output signals of the filter.

[0048] Alternatively, N resonator components can be further disposed in the thickness direction of the first substrate 1000, i.e., between the first resonator component and the second resonator component, and the N resonator components can be connected by a bonding structure, wherein N is greater than or equal to 1. Figure 3 The diagram illustrates, for example, the device structure of the filter provided in this disclosure when N equals 2.

[0049] The openings in the capping layer of the filter structure disclosed herein have significant advantages over the through-silicon vias (TSVs) of existing capping layers.

[0050] First, since the capping layer of the filter disclosed herein does not employ through-silicon vias (TSVs), it avoids the inconsistency issues inherent in TSVs. Second, the capping layer in this disclosure can utilize dry film or polyimide, resulting in material costs significantly lower than those of high-resistivity silicon in existing capping layers. For example, the current cost of dry film is approximately 300-500 RMB / pcs, while the cost of high-resistivity silicon is approximately 1000 RMB / pcs. Third, the capping layer in this disclosure can ultimately form the cavity required for device operation on the back side of the second resonator assembly, eliminating the need for pre-forming the cavity structure. The cavity construction method is flexible and convenient, and from the Nth resonator to the second resonator assembly, the cavity between adjacent resonator assemblies can constitute both the back cavity of one resonator assembly and the upper cavity of another. Finally, a sealed, shared cavity region can be formed between the first and second resonator assemblies in this disclosure, achieving wafer-level packaging, reducing package size, and adapting to the trend of device miniaturization.

[0051] <Manufacturing Process>

[0052] Based on the filter structure of the embodiment of this disclosure, such as Figure 4-15 The fabrication process is further described in detail below. In the fabrication process section, this disclosure uses a filter with two resonator components as an example. Those skilled in the art can, based on the spirit and principles of the fabrication process disclosed in this disclosure, fabricate N resonator components in the thickness direction of the first substrate 1000, i.e., between the first resonator group and the second resonator component.

[0053] Step 1: Provide a supporting carrier.

[0054] The support carrier can be a substrate. (Reference) Figure 4 The first substrate 1000 is provided. The material selection of the first substrate 1000 is as described above and will not be repeated here. The first substrate 1000 mainly serves as a support carrier for the filter device to ensure that the filter is robust and reliable during processing and packaging.

[0055] Step 2: Creating the sound wave reflection area.

[0056] refer to Figure 4 An acoustic wave reflecting region 1100, consisting of a structure such as an air cavity or a Bragg reflector layer, is formed in the first substrate 1000.

[0057] In one embodiment, the fabrication of the acoustic wave reflection region 1100 formed by the air cavity includes: forming a cavity in the first substrate 1000 by photolithography etching process, and then filling the cavity with a sacrificial layer, which is used to support the deposition of subsequent device films on the first substrate 1000.

[0058] Alternatively, a support layer can be formed in the first substrate 1000, and a groove can be formed by etching the support layer, with the sacrificial layer filled in the groove. The sacrificial layer can be selected from thin film materials such as phosphosilicate glass, silicon dioxide, and amorphous silicon, which are compatible with the deposition temperature of subsequent thin films, do not contaminate the process system, and have good etching selectivity and chemical polishing properties.

[0059] In another embodiment, the fabrication of the acoustic wave reflecting region 1100 composed of the Bragg reflector layer includes: forming a multilayer of thin films with different acoustic impedances stacked along the thickness direction of the first substrate 1000 on the first substrate 1000 using thin film deposition and chemical mechanical polishing processes. The materials of the different acoustic impedance films can be, for example, SiO2 and W.

[0060] Step 3: Creating the first structural functional layer.

[0061] refer to Figure 4 A lower electrode material completely covering the acoustic wave reflection region 1100 is deposited on a first substrate 1000, and then etched to form a lower electrode 1200. The lower electrode 1200 can be a single layer or multiple layers. A piezoelectric layer 1300 is formed on the lower electrode 1200, and an upper electrode material is formed on the piezoelectric layer 1300. The upper electrode material is then etched to form an upper electrode 1400. The position where the projections of the upper electrode 1400, the piezoelectric layer 1300, and the lower electrode 1200 overlap on the upper surface of the first substrate 1000 is defined as the first active region. The lower electrode 1200, the piezoelectric layer 1300, and the upper electrode 1400 constitute the structural functional layer of the resonator. For ease of description and understanding, this structural functional layer is defined as the first structural functional layer.

[0062] Alternatively, a support layer (not shown) can be formed on the first substrate 1000, a groove can be formed by etching the support layer, a lower electrode material can be conformally deposited on the support layer, and a lower electrode 1200 can be formed in the groove by chemical mechanical polishing.

[0063] Alternatively, a mass load layer, a framework layer, or other structures can be further formed on the lower electrode 1200. Then, a piezoelectric layer 1300 and an upper electrode 1400 can be formed on it.

[0064] Alternatively, after forming the upper electrode 1400, a mass loading layer, a framework layer, and a protective layer can be further formed. The lower electrode 1200, piezoelectric layer 1300, upper electrode 1400, and the mass loading layer, framework layer, and protective layer constitute the structural functional layer. When the acoustic wave reflecting region 1100 formed in the first substrate 1000 is composed of an air cavity, the sacrificial layer material needs to be removed after forming the first structural functional layer to release the cavity.

[0065] Step 4: Fabrication of the first electrical connection component.

[0066] refer to Figure 4 The electrical connection components (not shown) of the resonator formed on the first structural functional layer are defined as the first electrical connection components, such as pads, redistribution lines, etc. Steps 3 and 4 complete the fabrication of the first component on the first substrate 1000.

[0067] Step 5: Provide a sacrificial vessel.

[0068] refer to Figure 5 A second substrate 2000 is provided. The material selection for the second substrate 2000 has been described previously and will not be repeated here. The second substrate 2000 mainly serves as a sacrificial carrier.

[0069] Step 6: Creating the first protective layer.

[0070] refer to Figure 5 A first protective layer 2100 of a certain thickness is deposited on the upper surface of the second substrate 2000. The first protective layer 2100 is exemplarily a silicon dioxide layer of 2-5 micrometers to protect the second substrate 2000 and prevent the device structure from being corroded by the etching solution used when removing the second substrate 2000.

[0071] Step 7: Creation of the second structural functional layer.

[0072] refer to Figure 6 At least a lower electrode 2200 is deposited and formed on the first protective layer 2100; a piezoelectric layer 2300 is deposited and formed on the lower electrode 2200; an upper electrode material is formed on the piezoelectric layer 2300; and the upper electrode material is etched to form an upper electrode 2400. The position where the projections of the upper electrode 2400, the piezoelectric layer 2300, and the lower electrode 2200 coincide on the upper surface of the second substrate 2000 is defined as the second active region. The lower electrode 2200, the piezoelectric layer 2300, and the upper electrode 2400 constitute the structural functional layer of the resonator, and this structural functional layer is defined as the second structural functional layer.

[0073] Alternatively, a support layer (not shown) can be formed on the second substrate 2000, a groove can be formed by etching the support layer, a lower electrode material can be conformally deposited on the support layer, and a lower electrode 2200 can be formed in the groove by chemical mechanical polishing.

[0074] It is understandable that after forming the lower electrode 2200, structures such as a mass load layer and a framework layer (not shown) can be further formed. Then, a piezoelectric layer 2300 and an upper electrode 2400 can be formed on top of it.

[0075] It is understandable that after the upper electrode 2400 is formed, structures such as a mass load layer, a frame layer, and a protective layer can be further formed. The lower electrode 2200, the piezoelectric layer 2300, the upper electrode 2400, and the mass load layer, frame layer, and protective layer constitute the second structural functional layer.

[0076] Step 8: Fabrication of the second electrical connection component.

[0077] refer to Figure 6 An electrical connection component (not shown) of the resonator is formed on the second structural functional layer. This electrical connection component is defined as the second electrical connection component, which can be a rewiring component.

[0078] By performing steps 7 and 8 above, the fabrication of the second structural functional layer on the second substrate 2000 was completed.

[0079] Step 9: Creating the second protective layer.

[0080] refer to Figure 6 A second protective layer 2500 is further conformally deposited on the second component. The second protective layer 2500 can be, for example, a silicon dioxide layer of 10-50 angstroms. Since corrosive solutions, such as TMAH solution, are inevitably used in the photolithography process, the second protective layer 2500 is used to protect the second structural functional layer in order to prevent the corrosive solution from corroding the second structural functional layer.

[0081] Step 10: Fabrication of the bonding structure.

[0082] refer to Figure 7A bonding material is further deposited on the second protective layer 2500. This bonding material can be selected from materials with photolithographic and bonding properties, and dry film materials can be used as an example. Then, the bonding material is patterned to form bonding structures 2600. The gaps between the bonding structures 2600 expose second electrical connection structures on the second structural functional layer, such as pads (not shown). The bonding structures 2600 can be located near the edge of the upper surface of the second substrate 2000; preferably, the bonding structures 2600 can be located in locations substantially covering areas other than the second active region. Furthermore, considering the warpage of the second substrate 2000, the bonding material in the dicing region of the second substrate 2000 can be removed.

[0083] The projection of the bonding structure 2600 onto the upper surface of the second substrate 2000 can be a closed shape, such as an annular or frame-shaped projection; the projection of the bonding structure 2600 onto the upper surface of the second substrate 2000 can also be a combination of an outer closed shape and an inner non-closed shape, such as an annular or bonded point projection.

[0084] Alternatively, the bonding structure 2600 can also be formed on the first substrate 1000. When the bonding structure is formed on the first substrate 1000, the second protective layer 2500 in step 9 can be formed on the first component accordingly.

[0085] Step 11: Bonding connection between the first substrate 1000 and the second substrate 2000.

[0086] refer to Figure 8 The surface of the first substrate 1000, on which the first structural functional layer is formed, is defined as the first surface of the first substrate 1000; the surface of the second substrate 2000, on which the second structural functional layer is formed, is defined as the first surface of the second substrate 2000. The first surface of the second substrate 2000 and the first surface of the first substrate 1000 are stacked in the thickness direction of the first substrate 1000, and the first substrate 1000 and the second substrate 2000 are bonded together by a bonding structure 2600.

[0087] Step 12: Remove the sacrificial carrier.

[0088] refer to Figure 9 The other surface of the second substrate 2000, which is opposite to the first surface of the second substrate 2000, is defined as the second surface of the second substrate 2000. Using the second surface of the second substrate 2000 as the starting surface, a portion of the second substrate 2000 is removed by mechanical grinding. To avoid damaging the first protective layer 2100, a residual thickness of the second substrate 2000 can be left on the first protective layer 2100. This residual second substrate 2000 is then removed by dry or wet etching to expose the first protective layer 2100.

[0089] Step 13: Graphicalize the first protective layer.

[0090] The first protective layer is graphically represented separately. Specifically, refer to... Figure 10 The first protective layer 2100 is patterned using photolithography and etching processes, and the first protective layer 2100, whose projected area overlaps with that of the second active region and the second electrical connection structure on the first surface of the first substrate, is removed. Specifically, when patterning the first protective layer 2100, the coating thickness of the photoresist is mainly set based on the thickness of the first protective layer 2100. For example, a photoresist thickness of 2-3 micrometers can be set at this time.

[0091] Step 14: Graphicalize the second structural functional layer.

[0092] refer to Figure 11 Using the patterned first protective layer 2100 as a mask, the second functional structure layer is etched to remove part of the non-second active region and part of the second protective layer 2500, thereby exposing the first electrical connection structure.

[0093] Step 15: Fabrication of the cavity and capping layer of the second functional structural layer.

[0094] refer to Figure 12-13 A padding layer 2700 is laid on a patterned first protective layer, and the padding layer 2700 can be directly bonded to the first protective layer 2100 by thermosetting. The padding layer 2700 is then patterned to expose the active region of the second functional structural layer and the first electrical connection structure. For example, the padding layer 2700 can be composed of a dry film layer, and the steps of patterning the padding layer 2700 include exposure, development, and baking processes.

[0095] Preferably, the first protective layer 2100 is not patterned at the same time as the patterned pad layer 2700. The main reason is that if the first protective layer 2100 is patterned at the same time as the patterned pad layer 2700, the thickness of the photoresist coating needs to take into account the thickness of both the pad layer 2700 and the first protective layer 2100 in order to avoid damaging the pad layer 2700. This would result in the photoresist thickness being much greater than the thickness of the photoresist used in step 13, leading to increased costs and decreased yield.

[0096] refer to Figure 14A sealing layer 2800 is laid on the padding layer 2700, and the sealing layer 2800 is directly bonded to the padding layer 2700 through thermosetting. Then, the sealing layer 2800 is patterned. The patterned sealing layer 2800, together with the padding layer 2700, forms a capping layer to seal the active area of ​​the second functional structural layer. A cavity is naturally formed on the back side of the active area of ​​the second functional structural layer, i.e., the back cavity structure of the second functional structural layer, while exposing the first electrical connection structure area. The height of the back cavity needs to be set to meet the working requirements of the piezoelectric layer 2300 in the second functional structural layer during vibration, so that the generated sound waves do not propagate to the sealing layer 2800, preventing sound wave leakage. The height of the back cavity can be adjusted flexibly and conveniently by adjusting the height of the padding layer 2700 and using additive or subtractive processes for the padding layer 2700.

[0097] Understandably, the padding layer 2700 and the sealing layer 2800 can be selected from the dry film layer, the polyimide layer, or a combination of both.

[0098] Step 16: Bring out the filter input / output terminals.

[0099] refer to Figure 15 The filter is placed in an electroplating bath, and the required first, second, and third metal layers are sequentially electroplated using the patterned capping layer as a mask. Then, as... Figure 15 As shown, a reflow process is performed, which forms conductive pillars 2900 and solder bumps 3000, thereby completing the electrical lead-out of the filter's input / output terminals. Specifically, the first metal layer is preferably a metal with excellent conductivity, such as copper, to form the conductive pillars 2900 for better electrical signal transmission. The second metal layer is selected from metals that can act as a spacer between the first and third metal layers, such as nickel, to form a spacer layer 3100. The third metal layer can be a metal material with a low melting point, such as tin, lead, or aluminum, for subsequent fabrication of the solder bumps 3000.

[0100] Understandably, the first, second, and third metal layers can be prepared, for example, by electroless plating to provide a more uniform coverage.

[0101] Alternatively, the first, second, and third metal layers can also be prepared using other electroplating methods, which are not specifically limited herein.

[0102] This disclosure, through the design of a new filter manufacturing process, has the following advantages:

[0103] First, the formation of the back cavity of the second functional structural layer in this disclosure does not require pre-fabrication of the cavity on the second substrate, nor does it require the steps of depositing sacrificial material and releasing the cavity, thus reducing the increased difficulty of the manufacturing process and decreasing the possibility of incomplete material release from the cavity. Furthermore, the height of the back cavity of the second functional structural layer in this disclosure is flexible and convenient to set.

[0104] Secondly, since silicon is not used as the material for the capping layer in this disclosure, the manufacturing process does not require the specific photolithography, etching, and cleaning steps required for through-silicon via (TSV) processes. There is no need to overcome the consistency problem in TSV manufacturing. The patterning process of the first protective layer and the second functional layer performed after bonding the first and second substrates in this disclosure is simpler and easier to remove etching gas and the polymer generated during etching compared to the etching of TSVs.

[0105] Furthermore, the capping layer of this disclosure does not present the problem of higher equipment performance requirements caused by the aspect ratio of the through-silicon vias themselves. These problems include, but are not limited to: for example, physical vapor deposition equipment used in capping layers with through-silicon vias requires an RF bias power supply; electrochemical plating equipment used in capping layers with through-silicon vias requires a vacuum wetting chamber and a specific plating chamber, etc.

[0106] Finally, stacking and packaging the resonators in the filter vertically aligns with the trend of device miniaturization, reducing packaging size while lowering manufacturing costs and increasing yield and output.

[0107] An alternative application of the specific embodiments of this disclosure is to form a receiving filter or a transmitting filter on a first substrate 1000 and a corresponding transmitting filter or receiving filter on a second substrate 2000, thereby constituting a stacked multiplexer device. The multiplexer can refer to various types of multiplexers such as duplexers, tripplexers, and quadplexers. Similarly, the multiplexer of this disclosure does not require the formation of the cavity needed for the resonator in the transmitting or receiving filter on the substrate first, avoiding the technical problems associated with manufacturing such a cavity, and avoiding the use of through-silicon via (TSV) technology, thus reducing process difficulty, manufacturing costs, and improving yield and output.

[0108] Furthermore, the structure and fabrication process disclosed herein can be applied to various semiconductor devices and microelectromechanical systems devices, including at least those with cavity structures on sacrificial carriers.

[0109] Furthermore, the resonator structure and fabrication method disclosed herein can be applied to various semiconductor devices and microelectromechanical systems devices that require three-dimensional stacking without through-silicon via (TSV) technology.

[0110] The present disclosure has been described above with reference to specific implementation schemes. However, those skilled in the art should understand that these descriptions are exemplary and not intended to limit the scope of protection of the present disclosure. Those skilled in the art can make various modifications and variations to the present disclosure based on its spirit and principles, and such modifications and variations are also within the scope of the present disclosure.

Claims

1. A method for manufacturing an electronic device, characterized in that, include: Provide a primary carrier; A first component is formed on a first surface of the first carrier, the first component including an electrical connection structure; Provide a second carrier; A first protective layer is formed on the first surface of the second carrier; A second component is formed on the first protective layer; The first component and the second component are connected together by a bonding structure; Remove the second carrier; At least one opening is formed in the first protective layer to expose the electrical connection structure of the first component; A capping layer is formed on the first protective layer; The capping layer is patterned to form at least a second opening in the capping layer, the second opening being interconnected with the first opening, and the second opening is not fabricated using a through-silicon via process; A cavity is formed between the capping layer and the back of the second component. This cavity does not need to be formed in advance. The other side of the first component and the second component has a shared sealed cavity area.

2. The manufacturing method as described in claim 1, characterized in that: The first protective layer was graphically rendered separately.

3. A method for manufacturing an electronic device, characterized in that, include: Provide a primary carrier; A first component is formed on a first surface of the first carrier. The first component includes an upper electrode, a piezoelectric layer, and a lower electrode. The position where the projections of the upper electrode, the piezoelectric layer, and the lower electrode overlap on the upper surface of the first carrier is defined as the active region of the first component. Provide a second carrier; A first protective layer is formed on the first surface of the second carrier; A second component is formed on the first protective layer. The second component includes an upper electrode, a piezoelectric layer, and a lower electrode. The position where the projections of the upper electrode, the piezoelectric layer, and the lower electrode overlap on the upper surface of the first carrier is defined as the active region of the second component. The first component and the second component are connected together by a bonding structure; Remove the second carrier; A capping layer is formed on the first protective layer; The capping layer is graphically represented to form a cavity between the capping layer and the back of the second component. This cavity does not need to be pre-formed, and the other side of the first and second components has a shared sealed cavity area.

4. The manufacturing method as described in claim 2 or 3, characterized in that: The capping layer is made of dry film or polyimide.

5. The manufacturing method as described in claim 2 or 3, characterized in that: A second protective layer is formed on the first component or the second component, and the bonding structure is formed on the second protective layer. The bonding structure covers the non-active region of the first component or the second component, and the bonding structure is not formed on the scribing area of ​​the first carrier or the second carrier.

6. The manufacturing method as described in claim 5, characterized in that: The capping layer consists of a padding layer and a sealing layer; the first carrier is made of glass material.

7. An electronic device, characterized in that, include: The carrier, the first component, the second component, the first protective layer, and the capping layer; The first component is disposed on the first surface of the carrier, and the first component includes an electrical connection structure. The second component is stacked on top of the first component; The first component and the second component have a bonding structure; The second component has a first protective layer on the surface opposite to the first component, and the first protective layer has a first opening that exposes the electrical connection structure of the first component; The capping layer is disposed on the first protective layer; the capping layer has a second opening, which is interconnected with the first opening, and the second opening is not a through-silicon via; A cavity is formed between the capping layer and the back of the second component area. This cavity does not need to be formed in advance. The other side of the first component and the second component has a shared sealed cavity area.

8. An electronic device, characterized in that, include: The carrier, the first component, the second component, the first protective layer, and the capping layer; The first component is disposed on the first surface of the carrier. The first component includes an upper electrode, a piezoelectric layer and a lower electrode. The position where the projections of the upper electrode, the piezoelectric layer and the lower electrode overlap on the upper surface of the first carrier is defined as the active region of the first component. The second component is disposed on the first component. The second component includes an upper electrode, a piezoelectric layer and a lower electrode. The position where the projections of the upper electrode, the piezoelectric layer and the lower electrode overlap on the upper surface of the first carrier is defined as the active region of the second component. The first component and the second component have a bonding structure; The first component has a first protective layer on the surface opposite to the second component; The sealing layer is disposed on the first protective layer; There is a cavity between the capping layer and the back of the active area of ​​the second component, which does not need to be formed in advance. The other side of the active area of ​​the first component and the active area of ​​the second component have a shared sealed cavity area.

9. The electronic device as described in claim 7 or 8, characterized in that: The capping layer is made of dry film or polyimide.

10. The electronic device as claimed in claim 9, characterized in that: The first component and / or the second component have a second protective layer, and the second protective layer has the bonding structure. The bonding structure covers the non-active region of the first component and / or the second component, but does not have the bonding structure on the scribing region of the first carrier and / or the second carrier.

11. The electronic device as claimed in claim 10, characterized in that: The capping layer consists of a padding layer and a sealing layer; the first carrier is made of glass material.

12. The electronic device as claimed in claim 11, characterized in that: The first component and the second component are selected from: a resonator, a transmit filter, or a receive filter.

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