Manchester decoding method and apparatus and battery management system applying the same

Abstract

The application discloses a Manchester decoding method and device and a battery management system applying the same. The Manchester decoding method comprises the following steps: obtaining a first signal and a second signal according to Manchester coding; the width of a high level pulse in the first signal is smaller than that of a high level pulse in the Manchester coding, and the width of a high level pulse in the second signal is smaller than that of a low level pulse in the Manchester coding; the transition moment of a to-be-decoded element in the Manchester coding is located between two adjacent high level pulses of the first signal and the second signal; the number of 1s and / or 0s in each first reference width before and after the transition moment is counted at a fixed frequency; and the current element is decoded according to the number of 1s and / or 0s in each first reference width before and after the transition moment. The Manchester decoding method can well cope with the situation that the received signal is distorted in pulse width and has burr distortion.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication, and more particularly, to a Manchester decoding method and device and a battery management system using the same. BACKGROUND

[0002] Manchester coding is a synchronous clock coding technology, which represents "0" or "1" by the high-low conversion of the level, and each bit has a transition action, which is both a clock signal and a data signal. The Manchester coding of "0" is low to high, and the Manchester coding of "1" is high to low. Manchester coding is widely used in battery management systems because it transmits a synchronous clock signal and does not contain a direct current component, and has good anti-interference ability.

[0003] The traditional Manchester decoding method is to perform Manchester decoding according to the transition time of the Manchester coding clock and the transition time and mode of the symbol, so that the traditional Manchester decoding method depends on the correct level transition time. However, when Manchester coding is transmitted in a battery management system, the impedance of the transmission path changes due to long-distance communication, which causes the amplitude of the received signal to attenuate and the transition edge to be not steep, and if the battery management system operates in a high-noise environment, the received signal will have random burr distortion, so that the Manchester coding level transition time is ambiguous, and thus the Manchester decoding error rate is high. SUMMARY

[0004] Therefore, the present application provides a Manchester decoding method and device and a battery management system using the same to solve the technical problem of a high error rate when the received signal amplitude attenuates and the transition edge is not steep and the received signal has random burr distortion.

[0005] In a first aspect, an embodiment of the present application provides a Manchester decoding method, comprising the following steps: obtaining a first signal and a second signal according to Manchester coding; wherein the width of a high level pulse in the first signal is less than the width of a high level pulse in the Manchester coding, the width of a high level pulse in the second signal is less than the width of a low level pulse in the Manchester coding, the first signal and the second signal are both square wave signals, and the high level pulse regions of the two signals do not overlap; the transition moment of a to-be-decoded element in the Manchester coding is located between two adjacent high level pulses of the first signal and the second signal; taking the transition moment as a reference, the number of 1s and / or 0s in each first reference width forward and backward is counted at a fixed frequency; and the current element is decoded according to the number of 1s and / or 0s in each first reference width before and after the transition moment of the current element.

[0006] In one embodiment, the number of 1s of the first signal in the first reference width counted forward is a first count; the number of 1s of the first signal in the first reference width counted backward is a second count; the number of 1s of the second signal in the first reference width counted forward is a third count; the number of 1s of the second signal in the first reference width counted backward is a fourth count; if the sum of the first count and the fourth count is greater than the second count and the third count, the current element is determined to be 1; and / or, if the sum of the first count and the fourth count is less than the second count and the third count, the current element is determined to be 0.

[0007] In one embodiment, the number of 0s of the first signal in the first reference width counted forward is a first count; the number of 0s of the first signal in the first reference width counted backward is a second count; the number of 0s of the second signal in the first reference width counted forward is a third count; the number of 0s of the second signal in the first reference width counted backward is a fourth count; if the sum of the first count and the fourth count is greater than the second count and the third count, the current element is determined to be 0; and / or, if the sum of the first count and the fourth count is less than the second count and the third count, the current element is determined to be 1.

[0008] In one embodiment, the Manchester code is differentially compared and filtered to obtain a first signal and a second signal; the first signal and the second signal are high-frequency sampled by using a high-frequency clock and stored in a first FIFO memory and a second FIFO memory respectively; a reference width representing a width of a half symbol period and each first width are obtained according to the first signal and the second signal, wherein the first width represents a distance between two pulse transition edges of the first signal and the second signal corresponding to a data code part of the Manchester code and closest to a transition time of each symbol; a transition time of a current symbol is located in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current symbol to decode the current symbol.

[0009] In one embodiment, the reference width is generated according to the first signal and the second signal corresponding to a synchronization code part of the Manchester code.

[0010] In one embodiment, the first N symbols of the Manchester code are set as synchronization codes of the same logic, and the symbols after the first N symbols are data codes, wherein the synchronization codes are Manchester codes of 0 or 1, the data codes are Manchester codes of data to be transmitted, and N is greater than zero.

[0011] In one embodiment, the sampling values of the first signal and the second signal are counted by using a first counter and a second counter; the first counter starts counting at an Nth falling edge of the first signal or the second signal corresponding to a synchronization code part, and resets and starts re-counting when a falling edge of the first signal or the second signal corresponding to a data code part and a current counting value of the first counter is not less than a product of a first coefficient and the reference width, wherein N is a number of the synchronization codes in the Manchester code; the second counter starts counting at a reset time of the first counter, and resets at a rising edge of the first signal or the second signal corresponding to the data code part; wherein the first width is configured to be equal to a counting value of the second counter.

[0012] In one embodiment, the transition time of the current symbol in the first FIFO memory and the second FIFO memory is configured to be between a first storage unit and a second storage unit; the first storage unit is configured to be a sum of half of the first width corresponding to the current symbol and the reference width; and the second storage unit is one storage unit after the first storage unit.

[0013] In one embodiment, the Manchester decoding method further comprises: if the first signal and the second signal corresponding to the current symbol have been stored in the first FIFO memory and the second FIFO memory respectively, decoding the current symbol according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition time of the current symbol in the first FIFO memory and the second FIFO memory.

[0014] In one embodiment, the Manchester decoding method further comprises: generating a first pulse after a first time delay from the reset of the second counter; decoding the current symbol according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition time of the current symbol in the first FIFO memory and the second FIFO memory each time a first pulse is generated; wherein the first time is configured to be equal to the product of the reference width and the period of the high frequency clock.

[0015] In one embodiment, when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is greater than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, the current symbol is determined to be 1; or / and when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is less than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, the current symbol is determined to be 0; wherein the first interval is configured to be the interval of the reference width storage units before the transition time, and the second interval is configured to be the interval of the reference width storage units after the transition time.

[0016] In one embodiment, the width between two adjacent rising edges or falling edges in the first signal corresponding to the synchronization code part is counted; the width between two adjacent rising edges or falling edges in the second signal corresponding to the synchronization code part is counted; the reference width is configured to be the ratio of the sum of the widths between all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part and a second coefficient, wherein the second coefficient is configured to be twice the number of all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part.

[0017] In one embodiment, the Manchester encoding is compared with a first threshold value and a second threshold value respectively to obtain a first comparison signal and a second comparison signal; the first comparison signal and the second comparison signal are filtered to obtain the first signal and the second signal.

[0018] In a second aspect, an embodiment of the present application provides a Manchester decoding device, comprising: a first FIFO memory and a second FIFO memory; a comparison and filtering module configured to perform differential comparison and filtering on an input Manchester code to obtain a first signal and a second signal; a sampling module configured to perform high-frequency sampling on the first signal and the second signal using a high-frequency clock, and store the first signal and the second signal in the first FIFO memory and the second FIFO memory respectively; a locating signal generation module configured to obtain a reference width representing a width of a half symbol period and a first width according to sampling values of the first signal and the second signal, wherein the first width is used to represent a distance between two pulse transition edges closest to a transition time of each symbol in the first signal and the second signal corresponding to a data code part of the Manchester code; and a decoding module configured to locate a transition time of a current symbol in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current symbol, so as to decode the current symbol.

[0019] In an embodiment, the locating signal generation module comprises a reference width generation module configured to generate the reference width according to the first signal and the second signal corresponding to a synchronization code part of the Manchester code.

[0020] In an embodiment, the first N symbols in the Manchester code are set as synchronization codes of the same logic, and the symbols after the first N symbols are data codes, wherein the synchronization codes are Manchester codes of 0 or 1, the data codes are Manchester codes of data to be transmitted, and N is greater than zero.

[0021] In an embodiment, the locating signal generation module comprises: a first counter configured to start counting at an Nth falling edge of the first signal or the second signal corresponding to the synchronization code part; and reset and restart counting when a falling edge of the first signal or the second signal corresponding to the data code part is detected and a current counting value of the first counter is not less than a product of a first coefficient and the reference width, wherein N is a number of the synchronization codes in the Manchester code; a second counter configured to start counting at a reset time of the first counter, and reset when a rising edge of the first signal or the second signal corresponding to the data code part is detected; wherein the first width is configured to be equal to a counting value of the second counter.

[0022] In one embodiment, the decoding module comprises a locating module configured to locate a jump time of a current symbol, the jump time of the current symbol being located between a first storage unit and a second storage unit in the first FIFO memory and the second FIFO memory; the first storage unit is configured to be a sum of a half of the first width corresponding to the current symbol and the reference width storage units; the second storage unit is one storage unit after the first storage unit.

[0023] In one embodiment, the decoding module further comprises a decoding unit configured to decode the current symbol according to a number of 1 s and / or 0 s in each of the reference width storage units before and after the jump time of the current symbol in the first FIFO memory and the second FIFO memory, if the first signal corresponding to the current symbol and the second signal have been stored in the first FIFO memory and the second FIFO memory respectively.

[0024] In one embodiment, the decoding module further comprises a decoding unit configured to generate a first pulse after a first time delay from a reset of the second counter, and decode the current symbol according to a number of 1 s and / or 0 s in each of the reference width storage units before and after the jump time of the current symbol in the first FIFO memory and the second FIFO memory, each time a first pulse is generated; wherein the first time is configured to be equal to a product of the reference width and a period of the high frequency clock.

[0025] In one embodiment, the decoding unit is configured to determine the current symbol as 1 when a sum of a number of 1 s in a first interval in the first FIFO memory and a number of 1 s in a second interval in the second FIFO memory is greater than a sum of a number of 1 s in the second interval in the first FIFO memory and a number of 1 s in the first interval in the second FIFO memory, and / or determine the current symbol as 0 when the sum of the number of 1 s in the first interval in the first FIFO memory and the number of 1 s in the second interval in the second FIFO memory is less than the sum of the number of 1 s in the second interval in the first FIFO memory and the number of 1 s in the first interval in the second FIFO memory; wherein the first interval is configured to be an interval of the reference width storage units before the jump time, and the second interval is configured to be an interval of the reference width storage units after the jump time.

[0026] In one embodiment, the reference width generating module is configured to count the width between two adjacent rising edges or falling edges in the first signal corresponding to the synchronization code part; count the width between two adjacent rising edges or falling edges in the second signal corresponding to the synchronization code part; and the reference width is configured as the ratio of the sum of the widths between all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part and a second coefficient, wherein the second coefficient is configured as twice the number of all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part.

[0027] In one embodiment, the frequency of the high-frequency clock is 16 times the transmission rate of the Manchester code.

[0028] In one embodiment, the comparison filtering module comprises: a comparison module configured to compare the input Manchester code with a first threshold and a second threshold respectively to obtain a first comparison signal and a second comparison signal; and a filtering module configured to filter the first comparison signal and the second comparison signal to obtain the first signal and the second signal.

[0029] In one embodiment, when the Manchester code is greater than the first threshold, the first comparison signal is high, otherwise the first comparison signal is low; and when the Manchester code is less than the second threshold, the second comparison signal is high, otherwise the second comparison signal is low.

[0030] In one embodiment, the first threshold is 0.5 and the second threshold is 0.5.

[0031] Compared with the prior art, the technical scheme of the present application has the following advantages: the Manchester decoding method comprises comparing the Manchester code with a first threshold and a second threshold respectively, filtering the compared signals to obtain a first signal and a second signal; high-frequency sampling the first signal and the second signal by using a high-frequency clock and storing them in a first FIFO memory and a second FIFO memory respectively; obtaining a reference width representing a half symbol period width and each first width according to the first signal and the second signal, wherein the first width is used to represent the distance between the two pulse jump edges of the first signal and the second signal corresponding to the data code part of the Manchester code closest to the jump time of each symbol; positioning the jump time of the current symbol in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current symbol to decode the current symbol. The Manchester decoding method eliminates the burr in the first signal and the second signal by using the high-frequency clock to high-frequency sample and filter the signals after differential comparison, and uses the FIFO memory, the first signal and the second signal to position the jump time of each symbol in the Manchester code, so as to restore the sampling value of each symbol in the FIFO memory to realize decoding. The Manchester decoding method does not depend on the absolute accuracy of the clock, so it does not need to use a high-precision clock, saving the cost; and under the application conditions of long-distance isolated communication and high-noise communication, it can well cope with the situation that the signal of the receiving end occurs pulse width distortion and there is random burr distortion, the error rate is small, the robustness is high, and the application scene is flexible. BRIEF DESCRIPTION OF DRAWINGS

[0032] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application taken in conjunction with the accompanying drawings, in which:

[0033] Figure 1 Flow chart of an embodiment of the Manchester decoding method of the present application;

[0034] Figure 2 Schematic diagram of an embodiment of the Manchester decoding device of the present application;

[0035] Figure 3 A working waveform diagram of the comparison and filtering module of the present application;

[0036] Figure 4 A working waveform diagram of the positioning signal generation module of the present application;

[0037] Figure 5 A working waveform diagram of the decoding module of the present application;

[0038] Figure 6 Figure 1 is a schematic diagram of an embodiment of the battery management system of the present application. DETAILED DESCRIPTION

[0039] The present application is described herein below based on examples, but the present application is not limited to only these examples. In the following detailed description of the present application, some specific details are described in detail. The present application can also be fully understood without the description of these specific details by those skilled in the art. In order to avoid confusion of the essence of the present application, well-known methods, processes, procedures, elements and circuits are not described in detail.

[0040] In addition, those of ordinary skill in the art will understand that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.

[0041] At the same time, it should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is said to be "connected to" another element or said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be intermediate elements, and the connection between elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0042] Unless the context clearly requires otherwise, throughout the description and the claims, "comprise", "comprise", and similar words such as "comprise" should be interpreted as inclusive rather than exclusive or exhaustive; that is, in the sense of "including, but not limited to".

[0043] In the description of the present application, it should be understood that the terms "first", "second" and the like are only for descriptive purposes and should not be understood as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise stated, the meaning of "multiple" is two or more.

[0044] In the present application, the Manchester decoding method comprises the following steps:

[0045] According to the Manchester encoding, a first signal and a second signal are obtained; wherein the width of the high level pulse in the first signal is less than the width of the high level pulse in the Manchester encoding, the width of the high level pulse in the second signal is less than the width of the low level pulse in the Manchester encoding, the first signal and the second signal are both square wave signals, and the high level pulse regions of the two do not overlap;

[0046] The transition time of the to-be-decoded element in the Manchester encoding is located between two adjacent high level pulses of the first signal and the second signal;

[0047] counting the number of 1s and / or 0s in each of the first reference width before and after the transition time of the current symbol at a fixed frequency;

[0048] decoding the current symbol according to the number of 1s and / or 0s in each of the first reference width before and after the transition time of the current symbol. Preferably, the first reference width is configured as a width of half a symbol period.

[0049] Optionally, the number of 1s in the first reference width counted forward is the first count, the number of 1s in the first reference width counted backward is the second count, the number of 1s in the first reference width counted forward is the third count, the number of 1s in the first reference width counted backward is the fourth count, if the sum of the first count and the fourth count is greater than the second count and the third count, the current symbol is judged as 1; and / or, if the sum of the first count and the fourth count is less than the second count and the third count, the current symbol is judged as 0.

[0050] Optionally, the number of 0s in the first reference width counted forward is the first count, the number of 0s in the first reference width counted backward is the second count, the number of 0s in the first reference width counted forward is the third count, the number of 0s in the first reference width counted backward is the fourth count, if the sum of the first count and the fourth count is greater than the second count and the third count, the current symbol is judged as 0; and / or, if the sum of the first count and the fourth count is less than the second count and the third count, the current symbol is judged as 1.

[0051] In other embodiments, the number of 1s and 0s in each of the first reference width before and after the transition time of the current symbol can also be counted, so as to judge the current symbol as “0” or “1”, and the judging method is similar to the above, which will not be described here.

[0052] Figure 1 A specific implementation of a Manchester decoding method is given, but the present application does not limit this. Figure 1 A flowchart of an embodiment of the Manchester decoding method of the present application; the Manchester decoding method comprises the following steps:

[0053] 01, differentially comparing and filtering the Manchester encoding to obtain a first signal and a second signal;

[0054] 02, high-frequency sampling the first signal and the second signal using a high-frequency clock, and storing them in a first FIFO memory and a second FIFO memory, respectively;

[0055] 03、obtaining a reference width and each first width representing half of a code element period width according to the first signal and the second signal; wherein the first width is used to represent a distance between two pulse jump edges of the first signal and the second signal corresponding to a data code part of the Manchester code, which are closest to a jump time of each code element;

[0056] 04、locating a jump time of a current code element in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current code element, so as to decode the current code element.

[0057] Further, the reference width is generated according to the first signal and the second signal corresponding to a synchronization code part of the Manchester code. Preferably, a width between two adjacent rising edges or falling edges in the first signal corresponding to the synchronization code part is counted; and a width between two adjacent rising edges or falling edges in the second signal corresponding to the synchronization code part is counted; the reference width is configured as a ratio of a sum of widths between all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part and a second coefficient, wherein the second coefficient is configured as twice of a number of all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part.

[0058] The first N code elements in the Manchester code are synchronization codes, which are set as the same logic, and the following code elements are data codes, wherein the code elements of the synchronization codes are set as Manchester codes with all 0 or all 1, the data codes are Manchester codes of data to be transmitted, and N is greater than zero. It is to be noted that the number of code elements N of the synchronization codes is not limited in the present application, and the more the synchronization codes, the more powerful the reference width obtained by the average value; and the logic of the synchronization codes is not limited in the present application, which can be all from high level to low level (i.e. representing data 1), or all from low level to high level (i.e. representing data 0).

[0059] Preferably, the sampling values of the first signal and the second signal are counted by using the first counter and the second counter; the first counter starts counting at the Nth falling edge of the first signal or the second signal corresponding to the synchronization code part, and resets and starts counting again at the falling edge of the first signal or the second signal corresponding to the data code part and when the current counting value of the first counter is not less than the product of the first coefficient and the reference width, wherein N is the number of the synchronization code in the Manchester coding; the second counter starts counting at the resetting moment of the first counter, and resets at the rising edge of the first signal or the second signal corresponding to the data code part; wherein the first width is configured to be equal to the counting value of the second counter. Optionally, the first counter and the second counter count by using the high-frequency clock.

[0060] Further, the transition moment of the current symbol in the first FIFO memory and the second FIFO memory is configured to be between the first storage unit and the second storage unit; the first storage unit is configured to be the sum of the first width corresponding to the current symbol and half of the reference width; and the second storage unit is one storage unit after the first storage unit.

[0061] The Manchester coding method further comprises: if the first signal and the second signal corresponding to the current symbol have been respectively stored in the first FIFO memory and the second FIFO memory, decoding the current symbol according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition moment of the current symbol in the first FIFO memory and the second FIFO memory.

[0062] Preferably, the Manchester coding method further comprises: generating a first pulse after delaying a first time from the resetting of the second counter; and decoding the current symbol according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition moment of the current symbol in the first FIFO memory and the second FIFO memory. Each first pulse represents that the first signal and the second signal corresponding to the current symbol have been respectively stored in the first FIFO memory and the second FIFO memory. Wherein the first time is configured to be equal to the product of the reference width and the period of the high-frequency clock.

[0063] Further, when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is greater than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, it is determined that the current symbol is 1 (1 determination); when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is less than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, it is determined that the current symbol is 0 (0 determination); wherein the first interval is configured as an interval of the reference width of storage units before the jump time, and the second interval is configured as an interval of the reference width of storage units after the jump time. It should be noted that in the embodiment, the current symbol is determined by "1 determination" and "0 determination", but the present application does not limit this. In one embodiment, only "1 determination" is performed on the current symbol, and if it is determined that the current symbol is not "1", it is considered that the current symbol is "0"; in another embodiment, only "0 determination" is performed on the current symbol, and if it is determined that the current symbol is not "0", it is considered that the current symbol is "1". In the embodiment, the number of 1s in the reference width of storage units before and after the jump time of the current symbol is used to decode the current symbol, but the present application does not limit this. In other embodiments, the number of 0s (or the number of 1s and 0s) in the reference width of storage units before and after the jump time of the current symbol is used to decode the current symbol, which will not be described here.

[0064] Preferably, the frequency of the high-frequency clock is 16 times the transmission rate of the Manchester coding. The present application does not limit this.

[0065] Preferably, the Manchester code is compared with the first threshold value and the second threshold value respectively to obtain a first comparison signal and a second comparison signal; the first comparison signal and the second comparison signal are filtered to obtain the first signal and the second signal. Specifically, when the Manchester code is greater than the first threshold value, the first comparison signal is high, otherwise the first comparison signal is low; when the Manchester code is less than the second threshold value, the second comparison signal is high, otherwise the second comparison signal is low. The first threshold value is a positive value, and the second threshold value is a negative value; optionally, the absolute values of the first threshold value and the second threshold value are equal. In this embodiment, the Manchester code is first compared differentially and then filtered digitally, which is not limited by the application, and in other embodiments, the Manchester code can be filtered first and then compared differentially. In another embodiment, the input Manchester code has fewer glitches, and the first signal and the second signal can be the first comparison signal and the second comparison signal, which is hereby stated.

[0066] Figure 2 An embodiment of the Manchester decoding device of the application is shown in the figure; Figure 3 A working waveform diagram of the comparison filtering module of the application is shown in the figure; Figure 4 A working waveform diagram of the positioning signal generation module of the application is shown in the figure;

[0067] Figure 5 A working waveform diagram of the decoding module of the application is shown in the figure. Figures 2-5 To illustrate the decoding process of the Manchester decoding device. The first N symbols in the Manchester code are set as the same logic synchronization code, and the subsequent symbols are data codes, wherein the synchronization code is set as Manchester code of 0 or 1, the data code is Manchester code of data to be transmitted, and N is greater than zero.

[0068] In this embodiment, the Manchester decoding device includes a first FIFO memory, a second FIFO memory, a comparison filtering module 1, a sampling module 2, a positioning signal generation module 3 and a decoding module 4. The comparison filtering module 1 is configured to differentially compare and filter the input Manchester code VM to obtain a first signal Fp and a second signal Fn. The comparison filtering module 1 includes a comparison module 11 and a filtering module 12.

[0069] The comparison module 11 is configured to compare the input Manchester code VM with a first threshold Vp and a second threshold Vn respectively to obtain a first comparison signal Cp and a second comparison signal Cn. The first threshold Vp is positive, and the second threshold Vn is negative; optionally, the absolute values ​​of the first threshold Vp and the second threshold Vn are equal. In a preferred embodiment, the absolute values ​​of the first threshold Vp and the second threshold Vn are equal to one-third of the amplitude of the signal transmitted by the transmitting end. Specifically, in this embodiment, as... Figure 3 As shown, when the Manchester code VM is greater than the first threshold Vp, the first comparison signal Cp is high; otherwise, the first comparison signal Cp is low. When the Manchester code VM is less than the second threshold Vn, the second comparison signal Cn is high; otherwise, the second comparison signal Cn is low. This invention does not impose any restrictions on this. By comparing the Manchester code VM with the first threshold Vp and the second threshold Vn respectively, a first comparison signal Cp and a second comparison signal Cn with clear level transition times are obtained. Then, the first comparison signal Cp and the second comparison signal Cn are used to locate the transition time of the symbol, thereby solving the technical problem of ambiguous level transition times in the Manchester encoded signal received by the receiving end.

[0070] The filtering module 12 is configured to filter the first comparison signal Cp and the second comparison signal Cn to obtain the first signal Fp and the second signal Fn. Specifically, as shown... Figure 3 As shown, the first comparison signal Cp and the second comparison signal Cn are sampled at high frequency using a high-frequency clock HCLK. If the current sampled value is the same as the previous sampled value, the output signal of the filtering module 12 is the current sampled value; otherwise, the output signal of the filtering module 12 remains unchanged (i.e., the previous output signal of the filtering module 12), thus obtaining the first signal Fp and the second signal Fn. This is only a schematic diagram of the specific operation of the filtering module 12, but the present invention does not limit this. In other embodiments, if L consecutive sampled values ​​are the same, the output signal of the filtering module 12 is the current sampled value; otherwise, the output signal of the filtering module 12 remains unchanged (i.e., the previous output signal of the filtering module 12), thus obtaining the first signal Fp and the second signal Fn. It should be understood that any digital filtering method is included within the scope of protection of the present invention. In the present invention, digital filtering of the first comparison signal Cp and the second comparison signal Cn can eliminate the problem of high bit error rate caused by glitch distortion in Manchester encoding. Figure 3 As shown, digital filtering is performed on the first comparison signal Cp and the second comparison signal Cn to eliminate the problem that the first comparison signal Cp jumps at the wrong time due to the glitch distortion in the input Manchester code VM, thereby reducing the bit error rate.

[0071] The sampling module 2 is configured to sample the first signal and the second signal at high frequency with a high frequency clock, and store the sampling values into the first FIFO memory and the second FIFO memory respectively. The positioning signal generation module 3 is configured to obtain a reference width representing a width of a half symbol period and a first width representing a distance between two pulse transition edges closest to a transition time of each symbol in the first signal and the second signal corresponding to a data code part in the Manchester code according to the sampling values of the first signal and the second signal. The positioning signal generation module 3 comprises a reference width generation module 31, a first counter CT1 and a second counter CT2.

[0072] The reference width generation module 31 is configured to generate the reference width Hbit according to the sampling values of the first signal and the second signal corresponding to a synchronization code part in the Manchester code. In this embodiment, the reference width generation module 31 comprises a third counter (not shown in the figure) and a fourth counter (not shown in the figure). The third counter counts a width between two adjacent rising edges in the first signal Fp corresponding to the synchronization code S0S1 to obtain a count value CNT3 as shown in the figure. The fourth counter counts a width between two adjacent rising edges in the second signal Fn corresponding to the synchronization code S0S1 to obtain a count value CNT4 as shown in the figure. Figure 2 Figure 2 The first counter CT1 is configured to count a width between two adjacent rising edges in the first signal Fp corresponding to the data code part in the Manchester code to obtain a count value CNT1 as shown in the figure. The second counter CT2 is configured to count a width between two adjacent rising edges in the second signal Fn corresponding to the data code part in the Manchester code to obtain a count value CNT2 as shown in the figure. Figure 4 Figure 4 ​​The count value shown is CNT4; the reference width Hbit is configured as one-quarter of the sum of the count values ​​CNT3 and CNT4, i.e., Hbit = (CNT3 + CNT4) / 4 = 8. Optionally, the third counter and the fourth counter use the high-frequency clock for counting. In this embodiment, the width between adjacent rising edges is counted to obtain the reference width, but this invention is not limited to this. In other embodiments, the width between adjacent falling edges is counted to obtain the reference width. In this embodiment, the number of synchronization codes is 2, and all synchronization codes are set to "0", but this invention is not limited to this. In one embodiment, the synchronization codes can also be all set to "1". In another embodiment, the number of synchronization codes can be N, where N is greater than zero. The function of the reference width generation module 31 can be expanded as follows: the third counter counts the width between two adjacent rising or falling edges in the first signal corresponding to the synchronization code portion; the fourth counter counts the width between two adjacent rising or falling edges in the second signal corresponding to the synchronization code portion; the reference width is configured as the ratio of the sum of the widths between all two adjacent rising or falling edges in the first and second signals corresponding to the synchronization code portion to a second coefficient, wherein the second coefficient is configured as twice the number of all two adjacent rising or falling edges in the first and second signals corresponding to the synchronization code portion.

[0073] The first counter CT1 is configured to start counting with a high-frequency clock at the Nth falling edge of the first or second signal corresponding to the synchronization code portion; when a falling edge of the first or second signal corresponding to the data code portion is detected, and the current count value of the first counter CT1 is not less than the product of the first coefficient and the reference width Hbit, it is reset to zero and starts counting again to obtain the following result: Figure 4 The count value CNT1 shown is used, where N is the number of synchronization codes in Manchester encoding, and the first coefficient is not less than 1.5 and not greater than 2, preferably 1.5. In this embodiment, the number of synchronization codes is 2, and the synchronization codes are set to "0", thus... Figure 4 As shown, the first counter CT1 starts counting using a high-frequency clock at the second falling edge of the second signal Fn corresponding to the synchronization code, but this invention does not limit this. For example, in another embodiment, the number of synchronization codes is 2, and the synchronization code is set to "1", so that the first counter CT1 starts counting at the second falling edge of the first signal Fp corresponding to the synchronization code.

[0074] The second counter CT2 is configured to count with the high frequency clock at the reset moment of the first counter CT1, and is reset and cleared when the rising edge of the first signal or the second signal corresponding to the data code part is detected; the first width GAP is configured to be equal to the count value of the second counter. As shown in Figure 4 each time the second counter CT2 is reset and cleared, the first width GAP is refreshed.

[0075] The decoding module 4 is configured to locate the jump moment of the current code symbol in the first FIFO memory and the second FIFO memory according to the reference width Hbit and the first width GAP corresponding to the current code symbol generated by the positioning signal generation module 3, so as to decode the current code symbol. The decoding module 4 includes a positioning module (not shown in the Figure 2 ) and a decoding unit (not shown in the Figure 2 ).

[0076] The positioning module locates the jump moment of the current code symbol according to the reference width Hbit and the first width GAP corresponding to the current code symbol. Specifically, the jump moment of the current code symbol in the first FIFO memory and the second FIFO memory is located between the first storage unit and the second storage unit; the first storage unit is configured to be the sum of the first half of the first width GAP corresponding to the current code symbol and the reference width, that is, the 0.5×GAP+Hbit storage unit; and the second storage unit is one storage unit after the first storage unit, that is, the 0.5×GAP+Hbit+1 storage unit. In this embodiment, one high frequency sampling value is stored in each storage unit.

[0077] The decoding unit is used to decode according to the jump moment of the current code symbol and the sampling value of each code symbol restored in the first and second FIFO memories. When the first signal and the second signal corresponding to the current code symbol have been respectively stored in the first FIFO memory and the second FIFO memory, the decoding unit decodes the current code symbol according to the number of 1 or / and 0 in each of the reference width (that is, Hbit) storage units before and after the jump moment of the current code symbol in the first FIFO memory and the second FIFO memory.

[0078] In this embodiment, the positioning signal generation module 3 is used to generate a pulse signal G1, and by default, the first signal and the second signal corresponding to the previous code symbol have been respectively stored in the first FIFO memory and the second FIFO memory each time a pulse signal is generated. As shown in Figure 4As shown, the positioning signal generating module 3 generates a first pulse after a first time to from the start of the resetting of the second counter CT2. The first time to is configured to be equal to the product of the reference width Hbit and the period of the high frequency clock. Each time a first pulse is generated, the decoding unit decodes the current symbol according to the number of 1s or / and 0s in the reference width (i.e. Hbit) storage units before and after the jump time of the current symbol in the first FIFO memory and the second FIFO memory.

[0079] In the embodiment, the first FIFO memory and the second FIFO memory are 24-bit FIFO memories, and the present application is not limited thereto.

[0080] Further, the first FIFO memory and the second FIFO memory are divided in time, and the range of the second interval RHBIT includes:

[0081] P(0.5xGAP+1)~P(0.5xGAP+Hbit)

[0082] N(0.5xGAP+1)~N(0.5xGAP+Hbit)

[0083] The range of the first interval LHBIT includes:

[0084] P(0.5xGAP+Hbit+1)~P(0.5xGAP+2xHbit)

[0085] N(0.5xGAP+Hbit+1)~N(0.5xGAP+2xHbit)

[0086] Since the FIFO memory is a first-in-first-out memory, the first interval LHBIT is the interval of the reference width storage units before the jump time, and the second interval RHBIT is the interval of the reference width storage units after the jump time.

[0087] In the embodiment, the decoding unit includes a fifth counter (not shown) and a sixth counter (not shown). Figure 2 Figure 2 ​The first pulse is generated after a first time to from the reset of the second counter CT2. The first time to is configured to be equal to the product of the reference width Hbit and the period of the high frequency clock. When the sum of the number of 1s in the first interval LHBIT in the first FIFO memory and the number of 1s in the second interval RHBIT in the second FIFO memory is greater than the sum of the number of 1s in the second interval RHBIT in the first FIFO memory and the number of 1s in the first interval LHBIT in the second FIFO memory, i.e. the value of the fifth counter is greater than the value of the sixth counter, the current symbol is determined to be 1; otherwise, the current symbol is determined to be 0.

[0088] In another embodiment, when the sum of the number of 1s in the first interval LHBIT in the first FIFO memory and the number of 1s in the second interval RHBIT in the second FIFO memory is less than the sum of the number of 1s in the second interval RHBIT in the first FIFO memory and the number of 1s in the first interval LHBIT in the second FIFO memory, i.e. the value of the fifth counter is less than the value of the sixth counter, the current symbol is determined to be 0; otherwise, the current symbol is determined to be 1. The present application is not limited in this regard.

[0089] It should be noted that in the present embodiment, the first pulse is generated after a first time to from the reset of the second counter CT2. The first time to is configured to be equal to the product of the reference width Hbit and the period of the high frequency clock. When the first signal and the second signal corresponding to the current symbol have been respectively stored in the first FIFO memory and the second FIFO memory, i.e. at the time when the first pulse is generated, the distance from the transition time of the current symbol to the time when the first pulse is generated is the product of (0.5 x GAP + Hbit) and the period of the high frequency clock. Thus, the transition time of the current symbol in the first FIFO memory and the second FIFO memory is positioned between a first storage unit and a second storage unit. The first storage unit is configured to be the sum of half of the first width corresponding to the current symbol and the reference width, i.e. the 0.5 x GAP + Hbit storage unit. The second storage unit is one storage unit after the first storage unit, i.e. the 0.5 x GAP + Hbit + 1 storage unit. Therefore, the transition time of the current symbol is related to the time when the first pulse is generated. If the time when the first pulse is generated changes, the transition time of the corresponding symbol will also change accordingly.

[0090] Figure 5Taking decoding of a data code symbol D0 as an example, Hbit=8, GAP=4, and the transition time of the current symbol is between the 0.5*GAP+Hbitth memory unit and the 0.5*GAP+Hbit+1th memory unit, i.e. between the 10th memory unit and the 11th memory unit.

[0091] Thus, in the first interval LHBIT, the number of 1s in the first interval LHBIT (i.e. P11-P18) of the first FIFO memory and the number of 1s in the second interval RHBIT (i.e. N3-N10) of the second FIFO memory are 8, and the number of 1s in the second interval RHBIT (i.e. P3-P10) of the first FIFO memory and the number of 1s in the first interval LHBIT (i.e. N11-N18) of the second FIFO memory are 0, so the value of the fifth counter is greater than the value of the sixth counter, and the symbol D0 is determined to be 1. Figure 5

[0092] The first interval LHBIT includes P11-P18 and N11-N18

[0093] The first interval LHBIT includes P11-P18 and N11-N18

[0094] The method is used to determine the data code symbols D1-D5 to be 1, 0, 1, 1, and 0, respectively.

[0095] Further, it is determined whether the number of symbols reaches the number of data to be transmitted, and if so, the decoding is completed.

[0096] In the embodiment, the number of 1s in each of the reference width memory units before and after the transition time of the current symbol is used to decode the current symbol, but the present application is not limited thereto, and in other embodiments, the number of 0s (or the number of 1s and 0s) in each of the reference width memory units before and after the transition time of the current symbol is used to decode the current symbol, which is also within the protection scope of the present application.

[0097] In the embodiment, the Manchester decoding device further includes a high-frequency clock generating unit 5 for generating a high-frequency clock, and the frequency of the high-frequency clock is 16 times of the transmission rate of the data, i.e. 16 times of the transmission rate of the Manchester code. It should be noted that theoretically, the higher the sampling frequency, the better the resolution, but the higher the sampling frequency, the greater the power consumption and the higher the requirement for the storage depth of the FIFO, so 16 times is a relatively reasonable value, but the present application is not limited thereto.

[0098] Figure 6 ​This is a schematic diagram of an embodiment of the battery management system of the present invention; the battery management system includes multiple chips 1 to N and a host computer, the host computer includes a main unit and a transceiver, and the main unit and the multiple chips 1 to N communicate through the transceiver. In another embodiment, the main unit has its own transceiver, so no additional transceiver is required, which is hereby described.

[0099] In this embodiment, the transceiver and the plurality of chips are configured to communicate with each other using an isolated daisy chain, wherein the isolation can be transformer isolation or capacitor isolation.

[0100] In this embodiment, the daisy chain uses dual-wire harnesses to transmit differential signals, which improves the ability to suppress common-mode noise, but the present invention does not limit this.

[0101] Furthermore, each chip and host computer includes a transmitter and a receiver. The transmitter is used to send Manchester encoding to the lower-level chip or host computer; the receiver is used to receive the Manchester encoding sent by the host chip or host computer, and each chip and host computer is equipped with... Figure 2 The Manchester decoding device shown is used to, upon receiving Manchester encoding, utilize... Figure 1 The Manchester decoding method shown decodes the Manchester code to obtain the transmitted data information. Manchester encoding is a bipolar return-to-zero code; the effective signal does not contain a DC component, satisfying the "volt-second balance" requirement provided by the transformer's inductance and capacitance as isolation devices. It should be noted that the "upper-level chip" here refers to the chip that transmits the signal, and the "lower-level chip" refers to the chip that receives the signal.

[0102] Although the embodiments and methods and apparatus have been described and illustrated separately above, some common technologies are involved, and those skilled in the art can replace and integrate them between the embodiments. If any content is not explicitly described in one embodiment, reference can be made to another embodiment that is described.

[0103] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method of Manchester decoding, characterized by, The method comprises the following steps: comparing the input Manchester code with a first threshold and a second threshold respectively to obtain a first signal and a second signal, wherein the first threshold is positive and the second threshold is negative; the high pulse width of the first signal is smaller than that of the Manchester code, the high pulse width of the second signal is smaller than that of the Manchester code, the first signal and the second signal are square wave signals, and the high pulse areas of the two signals do not overlap; locating the transition time of the Manchester code to be decoded, wherein the transition time of the Manchester code to be decoded is located between two adjacent high pulses of the first signal and the second signal; wherein a reference width representing half a code period width and each first width are obtained according to the first signal and the second signal, wherein the first width is used to represent the distance between the transition edges of two pulses closest to the transition time of each code in the first signal and the second signal corresponding to the data code part of the Manchester code; the transition time of the current code is located according to the reference width and the first width corresponding to the current code; counting the number of 1s and / or 0s within a first reference width forward and backward respectively from the transition time at a fixed frequency; decoding the current code according to the number of 1s and / or 0s within the first reference width before and after the transition time of the current code.

2. The Manchester decoding method of claim 1, wherein: the number of 1s in the first signal within the first reference width counted forward is a first count, and the number of 1s in the first signal within the first reference width counted backward is a second count; the number of 1s in the second signal within the first reference width counted forward is a third count, and the number of 1s in the second signal within the first reference width counted backward is a fourth count; if the sum of the first count and the fourth count is greater than the second count and the third count, the current code is determined to be 1; and / or if the sum of the first count and the fourth count is less than the second count and the third count, the current code is determined to be 0.

3. The Manchester decoding method of claim 1, wherein: the number of 0s in the first signal within the first reference width counted forward is a first count, and the number of 0s in the first signal within the first reference width counted backward is a second count; the number of 0s in the second signal within the first reference width counted forward is a third count, and the number of 0s in the second signal within the first reference width counted backward is a fourth count; if the sum of the first count and the fourth count is greater than the second count and the third count, the current code is determined to be 0; and / or if the sum of the first count and the fourth count is less than the second count and the third count, the current code is determined to be 1.

4. The Manchester decoding method of claim 1, wherein: The input Manchester code is compared with a first threshold and a second threshold to obtain a first comparison signal and a second comparison signal, and the first comparison signal and the second comparison signal are filtered to obtain a first signal and a second signal; The first signal and the second signal are high-frequency sampled by using a high-frequency clock and are stored in a first FIFO memory and a second FIFO memory, respectively; A reference width representing a width of a half symbol period is obtained according to the first signal and the second signal, and each first width is obtained, wherein the first width represents a distance between two pulse transition edges of the first signal and the second signal corresponding to a data code part of the Manchester code and closest to a transition time of each symbol; And A transition time of a current symbol is located in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current symbol, so as to decode the current symbol.

5. The Manchester decoding method of claim 4, wherein: The reference width is generated according to the first signal and the second signal corresponding to a synchronization code part of the Manchester code.

6. The Manchester decoding method of claim 5, wherein: The first N symbols in the Manchester code are set as synchronization codes with the same logic, and the symbols after the first N symbols are data codes. The synchronization code is a Manchester code with 0 or 1, and the data code is a Manchester code of data to be transmitted, and N is greater than zero.

7. The Manchester decoding method of claim 4, wherein: The first signal and the second signal are counted by using a first counter and a second counter; The first counter starts counting at an Nth falling edge of the first signal or the second signal corresponding to a synchronization code part, and is reset and starts counting again when a falling edge of the first signal or the second signal corresponding to a data code part and a current counting value of the first counter are not less than a product of a first coefficient and the reference width, wherein N is a number of synchronization codes in the Manchester code; The second counter starts counting at a reset time of the first counter, and is reset at a rising edge of the first signal or the second signal corresponding to the data code part; The first width is configured to be equal to a counting value of the second counter.

8. The Manchester decoding method of claim 4, wherein: The transition time of the current symbol in the first FIFO memory and the second FIFO memory is configured to be between a first storage unit and a second storage unit; The first storage unit is configured to be a sum of a half of the first width corresponding to the current symbol and the reference width, and the second storage unit is one storage unit after the first storage unit.

9. The Manchester decoding method of claim 4, wherein: The Manchester decoding method further comprises: If the first signal and the second signal corresponding to the current symbol have been stored in the first FIFO memory and the second FIFO memory respectively, the current symbol is decoded according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition time of the current symbol in the first FIFO memory and the second FIFO memory.

10. The Manchester decoding method of claim 7, wherein: The Manchester decoding method further comprises: generating a first pulse after a first time delay from the start of the reset of the second counter; decoding the current symbol according to the number of 1s and / or 0s in each of the reference width storage units before and after the transition time of the current symbol in the first FIFO memory and the second FIFO memory every time a first pulse is generated; wherein the first time is configured to be equal to the product of the reference width and the period of the high-frequency clock.

11. The Manchester decoding method according to claim 9 or 10, wherein: when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is greater than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, the current symbol is determined to be 1; or / and when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is less than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory, the current symbol is determined to be 0; wherein the first interval is configured to be the interval of the reference width storage units before the transition time, and the second interval is configured to be the interval of the reference width storage units after the transition time.

12. The Manchester decoding method according to claim 5, wherein: counting the width between two adjacent rising edges or falling edges in the first signal corresponding to the synchronization code portion; counting the width between two adjacent rising edges or falling edges in the second signal corresponding to the synchronization code portion; the reference width is configured to be equal to the ratio of the sum of the widths between all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code portion and a second coefficient, wherein the second coefficient is configured to be twice the number of all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code portion.

13. The Manchester decoding method according to claim 4, wherein: comparing the Manchester code with a first threshold value and a second threshold value respectively to obtain a first comparison signal and a second comparison signal; and filtering the first comparison signal and the second comparison signal to obtain the first signal and the second signal. comprising:

14. A Manchester decoding apparatus, characterized by comprising: a first FIFO memory and a second FIFO memory; ​ The comparison filtering module is configured to compare the input Manchester code with a first threshold and a second threshold respectively to obtain a first signal and a second signal, wherein the first threshold is a positive value and the second threshold is a negative value. The sampling module is configured to sample the first signal and the second signal at a high frequency by using a high frequency clock and store them into the first FIFO memory and the second FIFO memory respectively. The locating signal generation module is configured to obtain a reference width representing a width of a half code element period and a first width according to sampling values of the first signal and the second signal, wherein the first width is used to represent a distance between two pulse transition edges of the first signal and the second signal corresponding to a data code part of the Manchester code and closest to a transition time of each code element. The decoding module is configured to locate a transition time of a current code element in the first FIFO memory and the second FIFO memory according to the reference width and the first width corresponding to the current code element, and decode the current code element.

15. The Manchester decoding apparatus of claim 14, wherein: The locating signal generation module comprises a reference width generation module configured to generate the reference width according to the first signal and the second signal corresponding to a synchronization code part of the Manchester code.

16. The Manchester decoding apparatus of claim 15, wherein: The first N code elements in the Manchester code are set as synchronization codes with the same logic, and the following code elements are data codes. The synchronization code is set as Manchester code with 0 or 1, the data code is Manchester code of data to be transmitted, and N is greater than zero.

17. The Manchester decoding apparatus of claim 14, wherein: The locating signal generation module comprises: A first counter configured to start counting at an Nth falling edge of the first signal or the second signal corresponding to the synchronization code part, and reset and restart counting when a falling edge of the first signal or the second signal corresponding to the data code part is detected and a current counting value of the first counter is not less than a product of a first coefficient and the reference width, wherein N is a number of the synchronization code in the Manchester code; and A second counter configured to start counting at a reset time of the first counter and reset when a rising edge of the first signal or the second signal corresponding to the data code part is detected. The first width is configured to be equal to a counting value of the second counter.

18. The Manchester decoding apparatus of claim 14, wherein: The decoding module comprises a locating module configured to locate a transition time of a current code element, The transition time of the current code element in the first FIFO memory and the second FIFO memory is located between a first storage unit and a second storage unit. The first storage unit is configured to be a sum of half of the first width corresponding to the current code element and the reference width, and the second storage unit is one storage unit after the first storage unit.

19. The Manchester decoding apparatus of claim 14, wherein: The decoding module further comprises a decoding unit, which decodes the current symbol according to the number of 1s and / or 0s in each of the reference width of storage units before and after the jump time of the current symbol in the first FIFO memory and the second FIFO memory when the first signal and the second signal corresponding to the current symbol have been stored in the first FIFO memory and the second FIFO memory respectively.

20. The Manchester decoding apparatus of claim 17, wherein: The decoding module further comprises a decoding unit, which generates a first pulse after delaying for a first time from the reset of the second counter; and decodes the current symbol according to the number of 1s and / or 0s in each of the reference width of storage units before and after the jump time of the current symbol in the first FIFO memory and the second FIFO memory every time a first pulse is generated; wherein the first time is configured to be equal to the product of the reference width and the period of the high-frequency clock.

21. The Manchester decoding apparatus of claim 19 or 20, wherein: The decoding unit is configured to: determine the current symbol as 1 when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is greater than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory; and / or determine the current symbol as 0 when the sum of the number of 1s in the first interval in the first FIFO memory and the number of 1s in the second interval in the second FIFO memory is less than the sum of the number of 1s in the second interval in the first FIFO memory and the number of 1s in the first interval in the second FIFO memory; wherein the first interval is configured as the interval of the reference width of storage units before the jump time, and the second interval is configured as the interval of the reference width of storage units after the jump time.

22. The Manchester decoding apparatus of claim 15, wherein: The reference width generating module is configured to: count the width between two adjacent rising edges or falling edges in the first signal corresponding to the synchronization code part; and count the width between two adjacent rising edges or falling edges in the second signal corresponding to the synchronization code part. The reference width is configured to be equal to the ratio of the sum of the widths between all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part and a second coefficient, wherein the second coefficient is configured to be twice the number of all adjacent rising edges or falling edges in the first signal and the second signal corresponding to the synchronization code part.

23. The Manchester decoding apparatus of claim 14, wherein: The frequency of the high-frequency clock is 16 times the transmission rate of the Manchester code.

24. The Manchester decoding apparatus of claim 14, wherein, The comparison filtering module comprises: a comparison module configured to compare the input Manchester code with a first threshold value and a second threshold value respectively to obtain a first comparison signal and a second comparison signal; and a filtering module configured to filter the first comparison signal and the second comparison signal to obtain the first signal and the second signal.

25. The Manchester decoding device according to claim 24, wherein: When the Manchester code is greater than the first threshold, then the first comparison signal is high, otherwise the first comparison signal is low; When the Manchester code is less than the second threshold, then the second comparison signal is high, otherwise the second comparison signal is low.

26. A battery management system, comprising: The method comprises: a plurality of chips and a host computer configured to communicate with each other using an isolated daisy chain, each chip and the host computer comprises: a transmitting end for transmitting a Manchester code to a lower chip or a host computer; a receiving end for receiving the Manchester code transmitted by the upper chip or the host computer, and decoding the Manchester code using the Manchester decoding method of claims 1-13.

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