A system and method, apparatus, medium for testing gallium nitride transistors

By designing a test system that includes switching modules for both static DC and dynamic application testing, the problem of limited testing items for gallium nitride transistors has been solved, achieving higher coverage and reliability testing, and enabling the screening of potentially failed products.

CN115598484BActive Publication Date: 2025-12-05SHENZHEN NITROGEN CORE TECH CO LTD
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Patent Information

Application Number
CN202211150760.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-21
Publication Date
2025-12-05
Estimated Expiration
2042-09-21

AI Technical Summary

Technical Problem

Existing technologies for gallium nitride transistors have limited testing options, making it impossible to test products that most closely resemble real-world application scenarios and effectively screen for potential failure risks.

Method used

A testing system was designed, comprising a first testing module for static DC parameter testing and a second testing module for dynamic application testing. A switching module allows switching between the two modules. By combining static DC parameter and dynamic application testing data, potential failure products are screened through calculation.

Benefits of technology

This enables more comprehensive testing, allowing for more reliable screening of potentially failing gallium nitride transistors and improving test reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the field of transistor testing, in particular to a system and method for testing a gallium nitride transistor, equipment and a medium, which comprise a first test module, a double-pole double-throw switch first test module used for testing the static direct current parameters of the gallium nitride transistor; a second test module, a double-pole double-throw switch second test module used for dynamic application testing of the gallium nitride transistor; and a switching module, a double-pole double-throw switch switching module used for switching between two connection modes of connecting the gallium nitride transistor with the first test module or connecting the gallium nitride transistor with the second test module. The application combines the conventional direct current parameter testing and dynamic testing in the application scene, achieves higher testing type coverage, and has good screening capability for potential failure of the product through the dynamic application testing after the switching module switches the application test circuit and the calculation according to the direct current parameter testing data before and after.
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Description

Technical Field

[0001] This invention relates to the field of transistor testing technology, and more specifically, to a system, method, apparatus, and medium for testing gallium nitride transistors. Background Technology

[0002] Gallium nitride (GaN) transistors have seen a gradual increase in market usage in recent years, and their application scenarios have expanded accordingly. Thanks to their superior performance, they are beginning to replace traditional silicon (Si) transistors in several areas. However, due to the relatively short research period on their materials, some defects may exist during the manufacturing process. The following two methods are generally used for testing:

[0003] 1. Use a conventional ATE to test static DC (direct current) parameters. This is the most basic testing method. The test is conducted according to the test method for SiMOS transistors. It can be completed using a regular ATE. The process is as follows: write a test program - feed materials for testing - distinguish PASSorFAIL based on the test results (DC parameters).

[0004] 2. Application-level dynamic testing is performed using ATE (Automatic Test Equipment). This testing method is based on an application circuit, where the GaN transistor operates in dynamic mode and is maintained for a period of time (100ms-2s). The circuit status is then checked to determine whether the product passes the test. The process is as follows: write a test program—conduct the test—determine whether the product passes or fails based on the individual test results (detection voltage).

[0005] ATE stands for semiconductor testing machine, but existing technologies have drawbacks such as limited testing capabilities, inability to test products that are closest to real-world application scenarios, and inability to effectively screen products with potential failure risks. Summary of the Invention

[0006] The purpose of this invention is to provide a system, method, device, and medium for testing gallium nitride transistors, in order to solve the problem of limited testing items in the prior art.

[0007] The embodiments of the present invention are achieved through the following technical solutions:

[0008] A system for testing gallium nitride transistors, comprising:

[0009] The first test module is used to test the static DC parameters of gallium nitride transistors.

[0010] The second test module is used for dynamic application testing of gallium nitride transistors;

[0011] The switching module is used to connect and power on the gallium nitride transistor with the first test module.

[0012] or,

[0013] Switch between the two connection methods for connecting to the second test module.

[0014] In one embodiment of the present invention, the switching module includes a first relay, a second relay, and a third relay;

[0015] The first relay is used to connect to the drain of the gallium nitride transistor, the second relay is used to connect to the source and gate of the gallium nitride transistor, and the third relay is used to connect to the gate of the gallium nitride transistor.

[0016] One end of the first test module and the second test module are connected to the first relay, and the other end of the first test module and the second test module are connected to the third relay.

[0017] The ground terminal of the second test module is connected to the source of the gallium nitride transistor.

[0018] In one embodiment of the present invention, the first relay, the second relay, and the third relay each include six contacts and a control terminal. The six contacts of the first relay are used to connect to the drain of the gallium nitride transistor, the first test module, and the second test module, respectively. The six contacts of the second relay are used to connect to the gate and the source of the gallium nitride transistor, respectively. The six contacts of the third relay are used to connect to the gate of the gallium nitride transistor, the first test module, and the second test module, respectively.

[0019] In one embodiment of the present invention, a double-pole double-throw switch is provided on the contact connected to the gallium nitride crystal. The double-pole double-throw switch is used to connect the corresponding terminal of the gallium nitride crystal to the first test module or the second test module.

[0020] In one embodiment of the present invention, the first module is a DC test circuit and the second module is an application test circuit.

[0021] A method for testing gallium nitride transistors includes:

[0022] The static DC parameters of gallium nitride (GaN) transistors were tested under power-on conditions.

[0023] After testing the static DC parameters, dynamic application tests were performed on the gallium nitride transistors.

[0024] After the dynamic application test is completed, the static DC parameters of the gallium nitride transistor are tested again by powering it on.

[0025] The static DC parameters obtained twice were used to determine whether gallium nitride transistors had potential risks.

[0026] In one embodiment of the present invention, the step of determining whether a gallium nitride transistor has a potential hazard by using the static DC parameters obtained twice also includes:

[0027] The static DC parameters obtained from the two tests are calculated, and the pass range is set based on the calculation results.

[0028] An electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor executes the computer program to implement the above-described method for testing gallium nitride transistors.

[0029] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method for testing gallium nitride transistors.

[0030] The technical solutions of the embodiments of the present invention have at least the following advantages and beneficial effects:

[0031] This invention innovatively places application dynamic testing within the testing process, and the two types of testing can be performed without interference. It integrates conventional DC parameter testing with dynamic testing under application scenarios, achieving a higher coverage of test types. By switching the application test circuit through the switching module and performing dynamic application testing, as well as calculating based on the DC parameter test data before and after, it also has a good screening ability for potential product failures, ultimately making GaN transistor testing more reliable. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a connection diagram of the test system of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0035] Please refer to Figure 1The present invention provides a system for testing gallium nitride transistors, which mainly includes a first test module, a second test module and a switching module.

[0036] In this invention, the first test module and the second test module can be a DC test circuit and an application test circuit, respectively.

[0037] The DC test circuit module is used to test the static DC parameters of gallium nitride transistors. The test is performed according to the test method of SiMOS transistors and can be completed using a regular ATE. The process is as follows: write a test program, feed materials for testing, and distinguish between PASS or FAIL (pass or fail) based on the test results (DC parameters).

[0038] Specifically, the DC test circuit module performs tests on the standard DC parameters of GaN transistors, including Vth (threshold voltage), IGSS (gate leakage current), Rdson (on-resistance), IDSS (drain leakage current), VSD (reverse conduction voltage), etc. Connected to the ATE (Automatic Test Equipment), the program controls the ATE to test and save these parameters; this part of the program forms the foundation of the test.

[0039] The application test circuit module is used for dynamic application testing of gallium nitride transistors (GaN transistors). It operates the GaN transistor in dynamic mode and maintains this state for a period of time (100ms-2s). The test status is then checked by the detection circuit to determine if the product passes the test. The process involves writing a test program, performing the test, and determining whether the result (detection voltage) is PASS or FAIL.

[0040] The system includes a switching module, primarily used to switch the test circuits connected to the gallium nitride (GaN) transistor, allowing the GaN transistor to undergo different tests. The GaN transistor is typically housed in an equipment tester (ATE), through which it is connected to the test circuits. For example, by default, the GaN transistor is connected to a DC test circuit module via the ATE. When switching is needed, the switching module can change the connection from the DC test circuit module to the application test circuit module, or vice versa.

[0041] This invention integrates conventional DC parameter testing with dynamic testing under application scenarios, achieving a higher coverage of test types. It switches between the two schemes in a single test, simultaneously realizing static parameter testing and application dynamic testing. By switching the application test circuit through the switching module and performing dynamic application testing, as well as calculating based on the DC parameter test data before and after, it also has a good screening capability for potential product failures, ultimately making GaN transistor testing more reliable.

[0042] In one exemplary embodiment of the present invention, the switching module includes a first relay, a second relay, and a third relay, which respectively control the connection of the source, drain, and gate of the transistor.

[0043] The first relay is used to connect to the drain of the gallium nitride transistor, the second relay is used to connect to the source and gate of the gallium nitride transistor, and the third relay is used to connect to the gate of the gallium nitride transistor.

[0044] One end of the first test module and the second test module are connected to the first relay, and the other end of the first test module and the second test module are connected to the third relay.

[0045] In one embodiment of the present invention, the first relay, the second relay, and the third relay each include six contacts and a control terminal. The six contacts of the first relay are used to connect to the drain of the gallium nitride transistor, the first test module, and the second test module, respectively. The six contacts of the second relay are used to connect to the gate and source of the gallium nitride transistor, respectively. The six contacts of the third relay are used to connect to the gate of the gallium nitride transistor, the first test module, and the second test module, respectively. A double-pole double-throw switch is provided on the contact connected to the gallium nitride transistor. The double-pole double-throw switch is used to connect the corresponding terminal of the gallium nitride transistor to the first test module or the second test module.

[0046] More specifically, the first, second, and third relays are all identical double-pole double-throw relays. In this embodiment, the relays have six connection points and control terminals, such as... Figure 1 As shown, to better illustrate the connection positions, the DC test circuit is labeled with connection terminals COM1 and COM2, and the application test circuit is labeled with connection terminals COM3 and COM4. In the transistor diagram, D is the drain, S is the source, and G is the gate. To ensure a high-energy path under dynamic application testing, a high-power mechanical relay is used.

[0047] Two of the six contacts of the first relay are connected to the drain of the gallium nitride transistor via a semiconductor testing equipment (ATE). Figure 1 Connect to terminal D shown in the diagram. The two connection points in the middle are the connection points for the application test circuit and the DC test circuit, respectively, COM2 and COM4. Figure 1 The first relay is marked with COM2 and COM4 contacts, which are connected to the COM2 terminal on the DC test circuit and the COM4 terminal on the application test circuit, respectively.

[0048] Two of the six contacts of the second relay are connected to the gate of the gallium nitride transistor via a semiconductor test equipment (ATE). Figure 1The two connection points are connected to the source of the gallium nitride transistor via a semiconductor test equipment (ATE). Figure 1 The S terminal shown) and the gate ( Figure 1 Connect via the G terminal shown in the diagram.

[0049] The third relay has six contacts, with the two middle contacts connected to the gate of a gallium nitride transistor via a semiconductor test equipment (ATE). Figure 1 The connection is made to the G terminal shown in the diagram. The two connection points in the middle are the connection points for the application test circuit and the DC test circuit, respectively, COM1 and COM3. Figure 1 The third relay is marked with COM1 and COM3 contacts, which are connected to the COM1 connection terminal on the DC test circuit and the COM3 connection terminal on the application test circuit, respectively.

[0050] It should be noted that this solution adds a second relay to connect the source and gate, and removes the relay connecting the source to the GND (ground terminal) of the application test circuit, so that the source is directly connected to the GND (ground terminal) of the application test circuit, effectively eliminating product damage caused by voltage oscillations during gate-source switching in the existing solution.

[0051] In the initial state, the double-pole double-throw switch of the first relay is closed, connecting the drain contact with the DC test circuit contact, which is normally closed. The test circuit contact is open, which is normally open.

[0052] The double-pole double-throw switch of the second relay is closed to connect the gate and the unused contact of the second relay, which is normally closed. The contact connected to the source is open, which is normally open.

[0053] The contacts of the double-pole double-throw switch of the third relay, which close the gate, and the contacts of the DC test circuit are normally closed, while the contacts of the application test circuit are open and normally open.

[0054] In use, the source of the transistor is always connected to the ground terminal of the application test circuit. By default, the drain and gate of the transistor are connected to the DC test circuit through the first and third relays, respectively. The double-pole double-throw switches of the first, second, and third relays are in the normally closed position, while the normally open application test circuit is not connected. During switching, the switching double-pole double-throw switches of the first, second, and third relays change their closing direction, opening the normally closed position and connecting the normally open position, thus completing the switch to the application test circuit. During switching, it is only necessary to wait for the action time of the double-pole double-throw switches to close or open to achieve circuit switching, and the circuit is always connected.

[0055] The present invention also provides a method for testing gallium nitride transistors, comprising:

[0056] The static DC parameters of gallium nitride (GaN) transistors were tested under power-on conditions.

[0057] After testing the static DC parameters, dynamic application tests were performed on the gallium nitride transistors.

[0058] After the dynamic application test is completed, the static DC parameters of the gallium nitride transistor are tested again by powering it on.

[0059] The static DC parameters obtained twice were used to determine whether gallium nitride transistors had potential risks.

[0060] Secondly, determining whether gallium nitride transistors have potential risks based on the static DC parameters obtained twice also includes:

[0061] The static DC parameters obtained from the two calculations are processed. The calculations can be performed by division, subtraction, or other methods. Specifically, the static DC parameters obtained from the two calculations are subtracted or compared. The pass range is then set based on the calculation results.

[0062] The above method will be explained through a specific example. The overall hardware structure adopts the system described above. The transistor under test is connected to the semiconductor tester (ATE) via a test circuit board and a "test fixture" using a dedicated cable. The ATE and the DC test circuit are connected together by default through the normally closed terminals of the first, second, and third relays. The test process begins by powering on the transistor to test its static DC parameters, referred to as FT1 test. After obtaining the required data, the control switching module immediately switches to the application test circuit and then controls the application circuit to power on to complete the test, referred to as AT (Application Test). Afterward, the relay module switches back to the DC test circuit to test the DC parameters after AT, referred to as FT2 test. The final result obtained from the FT1-AT-FT2 test is the dynamic test.

[0063] Regarding data calculation, corresponding DC data were obtained from the two FT tests conducted before and after AT. The data obtained from the two tests were compared or subtracted by the semiconductor test equipment (ATE) software (e.g., Vth2 / Vth1, Rdson2 / Rdson1, IGSS2 / IGSS1, Vth2-Vth1, Rdson2-Rdson1, IGSS2-IGSS1, etc.). The pass range was set according to the calculation results. In the test calculation of abnormal products, it is often found that their Vth2 and other FT2 test results are not obviously abnormal, but the calculated results show a significant difference from other normal products. Therefore, products with potential abnormalities can be identified based on this result.

[0064] For example, the IGSS of the first FT test is denoted as IGSS1, and the IGSS of the second test is denoted as IGSS2. The ratio of IGSS2 / IGSS1 is calculated, and the test data shows that it is usually less than 1.0 to 1.05.

[0065] An electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor executes the computer program to implement the above-described method for testing gallium nitride transistors.

[0066] A computer-readable storage medium storing a computer program, which, when executed by a processor, implements the above-described method for testing gallium nitride transistors.

[0067] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A system for testing gallium nitride transistors, comprising: include; The first test module is used to test the static DC parameters of gallium nitride transistors. The second test module is used for dynamic application testing of gallium nitride transistors; A switching module, which is used to connect and turn on a gallium nitride transistor with a first test module or a second test module; The switching module includes a first relay, a second relay, and a third relay; The first relay is used to connect to the drain of the gallium nitride transistor, the second relay is used to connect to the source and gate of the gallium nitride transistor, and the third relay is used to connect to the gate of the gallium nitride transistor. One end of the first test module and the second test module are connected to the first relay, and the other end of the first test module and the second test module are connected to the third relay. The ground terminal of the second test module is connected to the source of the gallium nitride transistor; The first relay, the second relay, and the third relay each include six contacts and a control terminal. The six contacts of the first relay are used to connect to the drain of the gallium nitride transistor, the first test module, and the second test module, respectively. The six contacts of the second relay are used to connect to the gate and the source of the gallium nitride transistor, respectively. The six contacts of the third relay are used to connect to the gate of the gallium nitride transistor, the first test module, and the second test module, respectively. A double-pole double-throw switch is provided on the contact point connected to the gallium nitride crystal. The double-pole double-throw switch is used to connect the corresponding terminal of the gallium nitride crystal to the first test module or the second test module.

2. A system for testing gallium nitride transistors as defined in claim 1, wherein, The first test module is a DC test circuit, and the second test module is an application test circuit.

3. A method for testing a GaN transistor, for a system for testing a GaN transistor according to any one of claims 1-2, characterized in that, include; The static DC parameters of gallium nitride (GaN) transistors were tested under power-on conditions. After testing the static DC parameters, dynamic application tests were performed on the gallium nitride transistors. After the dynamic application test is completed, the static DC parameters of the gallium nitride transistor are tested again by powering it on. The static DC parameters obtained twice were used to determine whether gallium nitride transistors had potential risks.

4. The method of testing a gallium nitride transistor of claim 3, wherein, The method of determining whether a gallium nitride transistor has potential hazards by obtaining static DC parameters twice also includes: The static DC parameters obtained from the two tests are calculated, and the pass range is set based on the calculation results.

5. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements a method for testing gallium nitride transistors as described in any one of claims 3 to 4.

6. A computer readable storage medium characterized by, A computer program is stored on the computer-readable storage medium, which, when executed by a processor, implements a method for testing gallium nitride transistors as described in any one of claims 3 to 4.

Citation Information

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