A gallium nitride-based diode device, a method of manufacture and a gallium nitride HEMT

Abstract

The application belongs to the technical field of semiconductors, and provides a gallium nitride-based diode device, a preparation method and a gallium nitride HEMT. In the gallium nitride-based diode device, the channel layer is in a convex structure, the barrier layer is arranged on the convex part of the channel layer, the first bottom dielectric layer and the second bottom dielectric layer with low dielectric constant are arranged on the base part of the channel layer and are in contact with the cathode electrode layer and the convex part of the channel layer, the first top dielectric layer and the second top dielectric layer with high dielectric constant are arranged on the first bottom dielectric layer and the second bottom dielectric layer respectively, and the anode electrode layer is arranged on the top dielectric layer and is in contact with the barrier layer, so that the charge amount of the diode device is improved through the top dielectric layer, the electric field at the corner of the device is improved through the bottom dielectric layer, the breakdown voltage of the parasitic diode is improved, and the problem that the gallium nitride-based HEMT device is unstable in a high inductive application scenario due to the lack of a body diode is solved.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and in particular relates to a gallium nitride-based diode device, its fabrication method, and a gallium nitride HEMT. Background Technology

[0002] As a representative of third-generation semiconductor materials, gallium nitride (GaN) has many excellent properties, such as high critical breakdown electric field, high electron mobility, high two-dimensional electron gas concentration, and good high-temperature operation capability.

[0003] However, compared to silicon-based metal-oxide-semiconductor field-effect transistors (Si-MOSFETs), gallium nitride-based high electron mobility transistors (HEMTs) do not have a body diode. In high-inductance applications, the reverse current generated can cause the gate voltage of the device to rise, leading to device damage. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides a gallium nitride-based diode device, a fabrication method, and a gallium nitride HEMT, aiming to solve the problem of instability in high-inductance applications caused by the lack of a body diode in existing gallium nitride-based HEMT devices.

[0005] A first aspect of this application provides a gallium nitride-based diode device, the gallium nitride-based diode device comprising:

[0006] Semiconductor substrate;

[0007] A channel layer is disposed on the semiconductor substrate, wherein the channel layer has a convex structure;

[0008] A barrier layer is disposed on the protrusion of the channel layer;

[0009] A first cathode electrode layer and a second cathode electrode layer, wherein the first cathode electrode layer is disposed on the left base of the channel layer and the second cathode electrode layer is disposed on the right base of the channel layer;

[0010] A first bottom dielectric layer and a second bottom dielectric layer, wherein the first bottom dielectric layer is disposed on the left base of the channel layer and contacts the protrusion of the first cathode electrode layer and the channel layer, and the second bottom dielectric layer is disposed on the right base of the channel layer and contacts the protrusion of the second cathode electrode layer and the channel layer;

[0011] A first top dielectric layer and a second top dielectric layer, wherein the first top dielectric layer is disposed on the first bottom dielectric layer and contacts the protrusion of the channel layer and the barrier layer, and the second top dielectric layer is disposed on the second bottom dielectric layer and contacts the protrusion of the channel layer and the barrier layer; wherein the dielectric constant of the first top dielectric layer is greater than the dielectric constant of the first bottom dielectric layer, and the dielectric constant of the second top dielectric layer is greater than the dielectric constant of the second bottom dielectric layer.

[0012] An anode electrode layer covers the first top dielectric layer and the second top dielectric layer, and is in contact with the barrier layer.

[0013] In one embodiment, the first top dielectric layer and the second top dielectric layer have an L-shaped structure;

[0014] The vertical portion of the first top dielectric layer is disposed on the first bottom dielectric layer, and the horizontal portion of the first top dielectric layer is disposed on the barrier layer;

[0015] The vertical portion of the second top dielectric layer is disposed on the second bottom dielectric layer, and the horizontal portion of the second top dielectric layer is disposed on the barrier layer.

[0016] In one embodiment, the anode electrode layer has a T-shaped structure;

[0017] The protrusion of the anode electrode layer is located between the horizontal portion of the first top dielectric layer and the horizontal portion of the second top dielectric layer, and the protrusion of the anode electrode layer is in contact with the barrier layer.

[0018] In one embodiment, the horizontal portion of the first top dielectric layer has the same thickness as the horizontal portion of the second top dielectric layer.

[0019] In one embodiment, the thickness of the horizontal portion of the first top dielectric layer and the horizontal portion of the second top dielectric layer is less than the thickness of the barrier layer.

[0020] In one embodiment, the thickness of the first top dielectric layer is equal to the thickness of the first bottom dielectric layer, and the thickness of the second top dielectric layer is equal to the thickness of the second bottom dielectric layer.

[0021] In one embodiment, the first top dielectric layer and the second top dielectric layer are lanthanum oxide.

[0022] A second aspect of this application also provides a method for fabricating a gallium nitride-based diode device, comprising:

[0023] A channel layer and a barrier layer are sequentially formed on a semiconductor substrate;

[0024] The channel layer and the barrier layer are etched to make the channel layer have a convex structure, and the barrier layer is disposed on the convex portion of the channel layer;

[0025] A first cathode electrode layer is formed on the left base of the channel layer, and a second cathode electrode layer is formed on the right base of the channel layer;

[0026] A first bottom dielectric layer is formed on the left base of the channel layer, and a second bottom dielectric layer is formed on the right base of the channel layer; wherein the first bottom dielectric layer is in contact with the protrusions of the first cathode electrode layer and the channel layer, and the second bottom dielectric layer is in contact with the protrusions of the second cathode electrode layer and the channel layer.

[0027] A top dielectric layer is formed on the first bottom dielectric layer, the second bottom dielectric layer, and the barrier layer;

[0028] The top dielectric layer is etched by slotting to divide it into a first top dielectric layer and a second top dielectric layer;

[0029] A deposited anode electrode material covers the first top dielectric layer and the second top dielectric layer to form an anode electrode layer; wherein the anode electrode layer is in contact with the barrier layer.

[0030] A third aspect of this application also provides a gallium nitride HEMT, wherein the gallium nitride HEMT integrates a gallium nitride-based diode device as described in any of the above embodiments; or the gallium nitride HEMT integrates a gallium nitride-based diode device fabricated by the fabrication method described in the above embodiments.

[0031] In one embodiment, the gallium nitride-based diode device is disposed below the gate, drain, or source of the gallium nitride HEMT, and the anode electrode layer is connected to the source of the gallium nitride HEMT, and the cathode electrode layer is connected to the drain of the gallium nitride HEMT.

[0032] The beneficial effects of this application embodiment compared with the prior art are as follows: the channel layer has a convex structure, the barrier layer is disposed on the protrusion of the channel layer, by disposing the first bottom dielectric layer and the second bottom dielectric layer with low dielectric constant on the base of the channel layer and in contact with the cathode electrode layer and the protrusion of the channel layer, and disposing the first top dielectric layer and the second top dielectric layer with high dielectric constant on the first bottom dielectric layer and the second bottom dielectric layer respectively, and the anode electrode layer covers the top dielectric layer and is in contact with the barrier layer, thereby increasing the charge of the diode device through the top dielectric layer, improving the electric field at the corner of the device through the bottom dielectric layer, increasing the breakdown voltage of the parasitic diode, and solving the problem of instability of gallium nitride-based HEMT devices in high-inductive application scenarios due to the lack of a body diode. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the vertical cross-sectional structure of a gallium nitride-based diode device provided in one embodiment of this application;

[0034] Figure 2 This is a schematic flowchart of a method for fabricating a gallium nitride-based diode device according to an embodiment of this application;

[0035] Figure 3 This is a schematic diagram of a structure in which a channel layer 200 and a barrier layer 300 are sequentially formed on a semiconductor substrate 100, according to an embodiment of this application;

[0036] Figure 4 This is a schematic diagram of the structure for etching the channel layer 200 and the barrier layer 300 according to an embodiment of this application;

[0037] Figure 5 This is a schematic diagram of the structure of forming the first cathode electrode layer 410 and the second cathode electrode layer 420 according to an embodiment of this application;

[0038] Figure 6 This is a schematic diagram of the structure after forming the first bottom dielectric layer 510 and the second bottom dielectric layer 520 according to an embodiment of this application;

[0039] Figure 7 This is a schematic diagram of the top dielectric layer 600 after being grooved and etched to form the anode electrode layer 700, according to one embodiment of this application. Detailed Implementation

[0040] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0041] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0042] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0043] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means one or more, unless otherwise explicitly specified.

[0044] In this specification, references to "one embodiment," "some embodiments," or simply "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," "in a particular embodiment," and "in a particular application," appearing in various parts of this specification, do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0045] As a representative of third-generation semiconductor materials, gallium nitride (GaN) possesses many excellent properties, including a high critical breakdown electric field, high electron mobility, high two-dimensional electron gas concentration, and good high-temperature operating capability. Third-generation semiconductor devices based on gallium nitride, such as high electron mobility transistors (HEMTs) and heterostructure field-effect transistors (HFETs), have already been applied, showing significant advantages, especially in radio frequency and microwave applications requiring high power and high frequency.

[0046] Compared to MOSFETs, GaN HEMTs do not have a body diode. In high-inductance applications, reverse current can cause the gate voltage to rise, leading to device damage.

[0047] To address the aforementioned technical problems, this application provides a gallium nitride-based diode device that can be integrated into a HEMT, such as a forked HEMT device. A large amount of space is reserved below the drain, source, or gate of the device. Using the same gallium nitride process, the gallium nitride-based diode device described in this embodiment can be integrated into the space below the drain, source, or gate of the device, preventing accidental opening of the device gate under high inductance and thus preventing device damage.

[0048] In one embodiment, combined Figure 1 As shown, the gallium nitride-based diode device in this embodiment includes: a semiconductor substrate 100, a channel layer (including a base 210 and a protrusion 220), a barrier layer 300, a first cathode electrode layer 410, a second cathode electrode layer 420, a first bottom dielectric layer 510, a second bottom dielectric layer 520, a first top dielectric layer 610, a second top dielectric layer 620, and an anode electrode layer 700.

[0049] Specifically, a channel layer is disposed on a semiconductor substrate 100. The channel layer has a convex structure and consists of a base 210 and a protrusion 220. The base and the protrusion 220 are arranged perpendicularly, and a barrier layer 300 is disposed on the protrusion 220 of the channel layer.

[0050] The first cathode electrode layer 410 is disposed on the left base of the channel layer, and the second cathode electrode layer 420 is disposed on the right base of the channel layer.

[0051] The first bottom dielectric layer 510 is disposed on the left base of the channel layer and contacts the first cathode electrode layer 410 and the protrusion 220 of the channel layer. The second bottom dielectric layer 520 is disposed on the right base of the channel layer and contacts the second cathode electrode layer 420 and the protrusion 220 of the channel layer.

[0052] A first top dielectric layer 610 is disposed on a first bottom dielectric layer 510 and contacts the protrusion 220 of the channel layer and the barrier layer 300. A second top dielectric layer 620 is disposed on a second bottom dielectric layer 520 and contacts the protrusion 220 of the channel layer and the barrier layer 300. The dielectric constant of the first top dielectric layer 610 is greater than that of the first bottom dielectric layer 510, and the dielectric constant of the second top dielectric layer 620 is greater than that of the second bottom dielectric layer 520. An anode electrode layer 700 covers the first top dielectric layer 610 and the second top dielectric layer 620 and contacts the barrier layer 300.

[0053] In this embodiment, by providing a top dielectric layer (first top dielectric layer 610 and second top dielectric layer 620) with a high dielectric constant below the anode electrode layer 700, the two-dimensional electron gas channel of the channel layer is depleted to a certain extent due to its high work function. At this time, the gate structure of the anode electrode portion depletes the two-dimensional electron gas under zero bias voltage or reverse bias voltage, and then recovers the two-dimensional electron gas under positive bias voltage, thereby improving the withstand voltage of the device without affecting the on-resistance of the device. On the other hand, since the dielectric constant is directly proportional to the capacitance, by setting a top dielectric layer with a higher dielectric constant between the anode electrode layer 700 and the cathode electrode layer (first cathode electrode layer 410 and second cathode electrode layer 420), the parasitic capacitance formed in the device can store a higher amount of charge. At this time, there is a higher uniform electric field inside the capacitor formed by the high dielectric constant. When the bottom dielectric layer with a low dielectric constant (first bottom dielectric layer 510 and second bottom dielectric layer 520) and the top dielectric layer with a high dielectric constant come into contact, according to the Gaussian flux theorem, there is a higher electric field inside the bottom dielectric layer with a low dielectric constant. This improves the situation where the electric field at the corner between the base 210 and the protrusion 220 is no longer too dense, thereby providing a higher withstand voltage.

[0054] In one embodiment, the aforementioned quasi-vertical gallium nitride-based diode device can be fabricated based on the channel layer and barrier layer of the HEMT device.

[0055] In one embodiment, the channel layer can be N-type gallium nitride.

[0056] In one embodiment, the barrier layer can be prepared from AlGaN material.

[0057] In one embodiment, combined Figure 1 As shown, the first top dielectric layer 610 and the second top dielectric layer 620 have an L-shaped structure.

[0058] In this embodiment, the vertical portion of the first top dielectric layer 610 is disposed on the first bottom dielectric layer 510, and the horizontal portion of the first top dielectric layer 610 is disposed on the barrier layer 300; the vertical portion of the second top dielectric layer 620 is disposed on the second bottom dielectric layer 520, and the horizontal portion of the second top dielectric layer 620 is disposed on the barrier layer 300.

[0059] In this embodiment, the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620 are disposed between the barrier layer 300 and the anode electrode layer 700. The anode electrode layer 700 also contacts the barrier layer 300 through a through hole between the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620.

[0060] In one embodiment, combined Figure 1As shown, the anode electrode layer 700 has a T-shaped structure.

[0061] The protrusion of the anode electrode layer 700 is located between the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620, and the protrusion of the anode electrode layer 700 is in contact with the barrier layer 300.

[0062] In one embodiment, the horizontal portion of the first top dielectric layer 610 has the same thickness as the horizontal portion of the second top dielectric layer 620.

[0063] In one embodiment, the thickness of the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620 is less than the thickness of the barrier layer 300.

[0064] In one embodiment, the thickness of the first top dielectric layer 610 is equal to the thickness of the first bottom dielectric layer 510, and the thickness of the second top dielectric layer 620 is equal to the thickness of the second bottom dielectric layer 520.

[0065] In one embodiment, the first top dielectric layer 610 and the second top dielectric layer 620 are lanthanum oxide.

[0066] In one embodiment, the first cathode electrode layer 410 and the second cathode electrode layer 420 are co-connected.

[0067] In one embodiment, the horizontal cross-section of the gallium nitride-based diode device is circular, and the cathode electrode layer is annular. The first cathode electrode layer 410 and the second cathode electrode layer 420 together form an annular cathode electrode layer. At this time, the cathode electrode layer is disposed on the base 210 of the channel layer, and the protrusion 220 of the channel layer is located inside the annular cathode electrode layer. The distance between the protrusion 220 and the cathode electrode layer is greater than the width of the cathode electrode layer.

[0068] In one embodiment, the horizontal cross-section of the gallium nitride-based diode device is circular. The first top dielectric layer 610 and the second top dielectric layer 620 together form an annular top dielectric layer. The protrusion 220 of the channel layer is located inside the annular top dielectric layer and is in contact with the top dielectric layer.

[0069] In one embodiment, the horizontal cross-section of the gallium nitride-based diode device is circular. The first bottom dielectric layer 510 and the second bottom dielectric layer 520 together form an annular bottom dielectric layer. The protrusion 220 of the channel layer is located inside the annular bottom dielectric layer and is in contact with the bottom dielectric layer.

[0070] In one embodiment, the thickness of the barrier layer 300 is less than half the thickness of the first bottom dielectric layer 510 and the second bottom dielectric layer 520.

[0071] In one embodiment, the thickness of the barrier layer 300 is one-third the thickness of the first bottom dielectric layer 510 and the second bottom dielectric layer 520.

[0072] In one embodiment, the thickness of the cathode electrode layer is less than half the thickness of the first bottom dielectric layer 510 and the second bottom dielectric layer 520.

[0073] In one embodiment, the thickness of the cathode electrode layer is one-third the thickness of the first bottom dielectric layer 510 and the second bottom dielectric layer 520.

[0074] In one embodiment, the semiconductor substrate 100 may be a silicon-based substrate or a silicon carbide substrate.

[0075] This application also provides a method for fabricating a gallium nitride-based diode device, see [link to relevant documentation]. Figure 2 As shown, the preparation method in this embodiment includes steps S10 to S70.

[0076] In step S10, a channel layer 200 and a barrier layer 300 are sequentially formed on the semiconductor substrate 100.

[0077] In this embodiment, combined with Figure 3 The channel layer 200 is disposed on the semiconductor substrate 100, and the barrier layer 300 is formed on the channel layer 200. The thickness of the channel layer 200 is greater than the thickness of the barrier layer 300, and the thickness of the channel layer 200 is at least three times the thickness of the barrier layer 300.

[0078] In one embodiment, the quasi-vertical gallium nitride-based diode device described above can be fabricated based on the channel layer and barrier layer of the HEMT device.

[0079] In one embodiment, the channel layer 200 can be N-type gallium nitride.

[0080] In one embodiment, the barrier layer 300 can be made of AlGaN material.

[0081] In step S20, combined Figure 4 As shown, the channel layer 200 and the barrier layer 300 are etched to make the channel layer 200 have a convex structure, and the barrier layer 300 is disposed on the protrusion 220 of the channel layer 200.

[0082] Combination Figure 4 As shown, after etching, the channel layer 200 is disposed on the semiconductor substrate 100. The channel layer 200 has a convex structure and is composed of a base 210 and a protrusion 220. The base and the protrusion 220 are arranged vertically, and the barrier layer 300 is disposed on the protrusion 220 of the channel layer.

[0083] In step S30, combined Figure 5 As shown, a first cathode electrode layer 410 is formed on the left base of the channel layer 200, and a second cathode electrode layer 420 is formed on the right base of the channel layer 200.

[0084] In this embodiment, the first cathode electrode layer 410 is disposed on the left base of the channel layer 200, and the first cathode electrode layer 410 is located at the edge of the left base of the channel layer 200. The distance between the first cathode electrode layer 410 and the protrusion 220 is at least greater than the width of the first cathode electrode layer 410. The second cathode electrode layer 420 is disposed on the right base of the channel layer 200, and the second cathode electrode layer 420 is located at the edge of the right base of the channel layer 200. The distance between the second cathode electrode layer 420 and the protrusion 220 is at least greater than the width of the second cathode electrode layer 420.

[0085] In step S40, combined Figure 6 As shown, a first bottom dielectric layer 510 is formed on the left base of the channel layer 200, and a second bottom dielectric layer 520 is formed on the right base of the channel layer 200.

[0086] In this embodiment, the first bottom dielectric layer 510 is disposed on the left base of the channel layer and contacts the first cathode electrode layer 410 and the protrusion 220 of the channel layer 200. The second bottom dielectric layer 520 is disposed on the right base of the channel layer 200 and contacts the second cathode electrode layer 420 and the protrusion 220 of the channel layer 200.

[0087] In step S50, combined Figure 6 As shown, a top dielectric layer 600 is formed on the first bottom dielectric layer 510, the second bottom dielectric layer 520, and the barrier layer 300.

[0088] In this embodiment, a top dielectric layer 600 is formed on a first bottom dielectric layer 510, a second bottom dielectric layer 520, and a barrier layer 300, which are dielectric materials with high dielectric constants. The top dielectric layer 600 has a concave structure, and the barrier layer 300 is located in the groove of the barrier layer 300.

[0089] The dielectric constant of the top dielectric layer 600 is greater than that of the first bottom dielectric layer 510 and the second bottom dielectric layer 520.

[0090] In one embodiment, the top dielectric layer 600 is lanthanum oxide.

[0091] In one embodiment, the dielectric constant of the first bottom dielectric layer 510 and the second bottom dielectric layer 520 is less than 3.

[0092] In one embodiment, the first bottom dielectric layer 510 and the second bottom dielectric layer 520 may be polymers with low dielectric constants such as polyimide, polybenzoxazine, polysiloxane, and polyamide.

[0093] In step S60, combined Figure 7 As shown, the top dielectric layer 600 is etched with grooves to divide the top dielectric layer 600 into a first top dielectric layer 610 and a second top dielectric layer 620.

[0094] In this embodiment, the top dielectric layer includes a first top dielectric layer 610 and a second top dielectric layer 620. The first top dielectric layer 610 is disposed on the first bottom dielectric layer 510 and contacts the protrusion 220 of the channel layer and the barrier layer 300. The second top dielectric layer 620 is disposed on the second bottom dielectric layer 520 and contacts the protrusion 220 of the channel layer and the barrier layer 300.

[0095] In this embodiment, the first top dielectric layer 610 and the second top dielectric layer 620 have an L-shaped structure. The vertical portion of the first top dielectric layer 610 is disposed on the first bottom dielectric layer 510, and the horizontal portion of the first top dielectric layer 610 is disposed on the barrier layer 300. The vertical portion of the second top dielectric layer 620 is disposed on the second bottom dielectric layer 520, and the horizontal portion of the second top dielectric layer 620 is disposed on the barrier layer 300.

[0096] In one embodiment, the horizontal portion of the first top dielectric layer 610 has the same thickness as the horizontal portion of the second top dielectric layer 620.

[0097] In one embodiment, the thickness of the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620 is less than the thickness of the barrier layer 300.

[0098] In step S70, combined Figure 7 As shown, deposited anode electrode material covers the first top dielectric layer 610 and the second top dielectric layer 620 to form an anode electrode layer 700.

[0099] In this embodiment, the anode electrode layer 700 covers the first top dielectric layer 610 and the second top dielectric layer 620, and is in contact with the barrier layer 300. The anode electrode layer 700 has a T-shaped structure, and the protrusion of the anode electrode layer 700 is disposed between the horizontal portion of the first top dielectric layer 610 and the horizontal portion of the second top dielectric layer 620, and the protrusion of the anode electrode layer 700 is in contact with the barrier layer 300.

[0100] In this embodiment, by providing a top dielectric layer (first top dielectric layer 610 and second top dielectric layer 620) with a high dielectric constant below the anode electrode layer 700, the two-dimensional electron gas channel of the channel layer is depleted to a certain extent due to its high work function. At this time, the gate structure of the anode electrode portion depletes the two-dimensional electron gas under zero bias voltage or reverse bias voltage, and then recovers the two-dimensional electron gas under positive bias voltage, thereby improving the withstand voltage of the device without affecting the on-resistance of the device. On the other hand, since the dielectric constant is directly proportional to the capacitance, by setting a top dielectric layer with a higher dielectric constant between the anode electrode layer 700 and the cathode electrode layer (first cathode electrode layer 410 and second cathode electrode layer 420), the parasitic capacitance formed in the device can store a higher amount of charge. At this time, there is a higher uniform electric field inside the capacitor formed by the high dielectric constant. When the bottom dielectric layer with a low dielectric constant (first bottom dielectric layer 510 and second bottom dielectric layer 520) and the top dielectric layer with a high dielectric constant come into contact, according to the Gaussian flux theorem, there is a higher electric field inside the bottom dielectric layer with a low dielectric constant. This improves the situation where the electric field at the corner between the base 210 and the protrusion 220 is no longer too dense, thereby providing a higher withstand voltage.

[0101] This application also provides a gallium nitride HEMT, which integrates a gallium nitride-based diode device as described in any of the above embodiments.

[0102] This application also provides a gallium nitride HEMT, which integrates a gallium nitride-based diode device fabricated by the fabrication method described in the above embodiments.

[0103] In specific applications, the gallium nitride-based diode device in the above embodiments shares the channel layer, barrier layer, and semiconductor substrate with the gallium nitride HEMT.

[0104] In one embodiment, a gallium nitride-based diode device is disposed below the gate, drain, or source of a gallium nitride HEMT, and the anode electrode layer is connected to the source of the gallium nitride HEMT, and the cathode electrode layer is connected to the drain of the gallium nitride HEMT.

[0105] The beneficial effects of this application embodiment compared with the prior art are as follows: the channel layer has a convex structure, the barrier layer is disposed on the protrusion of the channel layer, by disposing the first bottom dielectric layer and the second bottom dielectric layer with low dielectric constant on the base of the channel layer and in contact with the cathode electrode layer and the protrusion of the channel layer, and disposing the first top dielectric layer and the second top dielectric layer with high dielectric constant on the first bottom dielectric layer and the second bottom dielectric layer respectively, and the anode electrode layer covers the top dielectric layer and is in contact with the barrier layer, thereby increasing the charge of the diode device through the top dielectric layer, improving the electric field at the corner of the device through the bottom dielectric layer, increasing the breakdown voltage of the parasitic diode, and solving the problem of instability of gallium nitride-based HEMT devices in high-inductive application scenarios due to the lack of a body diode.

[0106] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of doped regions is used as an example. In practical applications, the above-described functional areas can be assigned to different doped regions as needed, that is, the internal structure of the device can be divided into different doped regions to complete all or part of the functions described above.

[0107] In the embodiments, the doped regions can be integrated into one functional region, or each doped region can exist independently, or two or more doped regions can be integrated into one functional region. The integrated functional region can be implemented using the same type of dopant ion or multiple types of dopant ions. Furthermore, the specific names of each doped region are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the doped region in the fabrication method of the above device can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0108] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A gallium nitride-based diode device, characterized in that, The gallium nitride-based diode device includes: Semiconductor substrate; A channel layer is disposed on the semiconductor substrate, wherein the channel layer has a convex structure; A barrier layer is disposed on the protrusion of the channel layer; A first cathode electrode layer and a second cathode electrode layer, wherein the first cathode electrode layer is disposed on the left base of the channel layer and the second cathode electrode layer is disposed on the right base of the channel layer; A first bottom dielectric layer and a second bottom dielectric layer, wherein the first bottom dielectric layer is disposed on the left base of the channel layer and contacts the protrusion of the first cathode electrode layer and the channel layer, and the second bottom dielectric layer is disposed on the right base of the channel layer and contacts the protrusion of the second cathode electrode layer and the channel layer; A first top dielectric layer and a second top dielectric layer, wherein the first top dielectric layer is disposed on the first bottom dielectric layer and contacts the protrusion of the channel layer and the barrier layer, and the second top dielectric layer is disposed on the second bottom dielectric layer and contacts the protrusion of the channel layer and the barrier layer; wherein the dielectric constant of the first top dielectric layer is greater than the dielectric constant of the first bottom dielectric layer, and the dielectric constant of the second top dielectric layer is greater than the dielectric constant of the second bottom dielectric layer. An anode electrode layer covers the first top dielectric layer and the second top dielectric layer, and is in contact with the barrier layer; the first top dielectric layer and the second top dielectric layer have an L-shaped structure; The vertical portion of the first top dielectric layer is disposed on the first bottom dielectric layer, and the horizontal portion of the first top dielectric layer is disposed on the barrier layer; The vertical portion of the second top dielectric layer is disposed on the second bottom dielectric layer, and the horizontal portion of the second top dielectric layer is disposed on the barrier layer.

2. The gallium nitride-based diode device as described in claim 1, characterized in that, The anode electrode layer has a T-shaped structure; The protrusion of the anode electrode layer is located between the horizontal portion of the first top dielectric layer and the horizontal portion of the second top dielectric layer, and the protrusion of the anode electrode layer is in contact with the barrier layer.

3. The gallium nitride-based diode device as described in claim 1, characterized in that, The horizontal portion of the first top dielectric layer has the same thickness as the horizontal portion of the second top dielectric layer.

4. The gallium nitride-based diode device as described in claim 1, characterized in that, The thickness of the horizontal portion of the first top dielectric layer and the horizontal portion of the second top dielectric layer is less than the thickness of the barrier layer.

5. The gallium nitride-based diode device according to any one of claims 1-4, characterized in that, The thickness of the first top dielectric layer is equal to the thickness of the first bottom dielectric layer, and the thickness of the second top dielectric layer is equal to the thickness of the second bottom dielectric layer.

6. The gallium nitride-based diode device according to any one of claims 1-4, characterized in that, The first top dielectric layer and the second top dielectric layer are lanthanum oxide.

7. A method for fabricating a gallium nitride-based diode device, characterized in that, include: A channel layer and a barrier layer are sequentially formed on a semiconductor substrate; The channel layer and the barrier layer are etched to make the channel layer have a convex structure, and the barrier layer is disposed on the convex portion of the channel layer; A first cathode electrode layer is formed on the left base of the channel layer, and a second cathode electrode layer is formed on the right base of the channel layer; A first bottom dielectric layer is formed on the left base of the channel layer, and a second bottom dielectric layer is formed on the right base of the channel layer; wherein the first bottom dielectric layer is in contact with the protrusions of the first cathode electrode layer and the channel layer, and the second bottom dielectric layer is in contact with the protrusions of the second cathode electrode layer and the channel layer. A top dielectric layer is formed on the first bottom dielectric layer, the second bottom dielectric layer, and the barrier layer; The top dielectric layer is etched by slotting to divide it into a first top dielectric layer and a second top dielectric layer; An anode electrode material is deposited over the first top dielectric layer and the second top dielectric layer to form an anode electrode layer; wherein the anode electrode layer is in contact with the barrier layer; the first top dielectric layer and the second top dielectric layer have an L-shaped structure; The vertical portion of the first top dielectric layer is disposed on the first bottom dielectric layer, and the horizontal portion of the first top dielectric layer is disposed on the barrier layer; The vertical portion of the second top dielectric layer is disposed on the second bottom dielectric layer, and the horizontal portion of the second top dielectric layer is disposed on the barrier layer.

8. A gallium nitride HEMT, characterized in that, The gallium nitride HEMT integrates a gallium nitride-based diode device as described in any one of claims 1-6; or the gallium nitride HEMT integrates a gallium nitride-based diode device fabricated by the method described in claim 7.

9. The gallium nitride HEMT as described in claim 8, characterized in that, The gallium nitride-based diode device is disposed below the gate, drain, or source of the gallium nitride HEMT, and the anode electrode layer is connected to the source of the gallium nitride HEMT, and the cathode electrode layer is connected to the drain of the gallium nitride HEMT.

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