Motor control device

Abstract

This invention provides a motor control device. The motor control device includes: an inverter circuit that converts a DC power supply voltage into a three-phase AC voltage and supplies it to a three-phase motor; and a control unit that generates a three-phase PWM signal based on three-phase duty cycle command values ​​updated at a predetermined update cycle, and controls the inverter circuit based on the three-phase PWM signal. The control unit performs the following operations: when at least two of the three-phase duty cycle command values ​​updated at a first update time are the same, shifting the duty cycle command value of one of the two phases by a predetermined shift amount; and shifting the duty cycle command value of one of the three-phase duty cycle command values ​​updated at a second update time in the opposite direction to the shift direction of the first update time by a shift amount.

Description

TECHNICAL FIELD

[0001] The present application relates to a motor control device. BACKGROUND

[0002] In Patent Literature 1, there is disclosed a technology in which, in an inverter device that supplies a three-phase motor with a three-phase alternating voltage, three basic voltage vectors are used to generate three-phase PWM (Pulse Width Modulation) signals, and switching signals that are respectively supplied to at least six switching elements included in the inverter device are generated in accordance with the three-phase PWM signals.

[0003] Patent Literature 1: Japanese Patent No. 3447366

[0004] For example, at an instant at which the switching timings of the PWM signals of two phases among the three-phase PWM signals coincide with each other, the shaft voltage sometimes varies in a spike-like manner. This can possibly become a cause of noise. In addition, in other words, the rotor bearing of the motor sometimes generates electrical erosion due to a potential difference (shaft voltage) between the output shaft of the motor and the motor housing. As a result of the inventors' studies, it has been particularly clarified that the noise can possibly have an influence on the generation of electrical erosion. SUMMARY

[0005] One embodiment of the present application is a motor control device that controls a three-phase motor, in which the motor control device has: an inverter circuit that converts a direct-current power supply voltage into a three-phase alternating voltage and supplies the three-phase motor with the three-phase alternating voltage; and a control section that generates three-phase PWM signals in accordance with three-phase duty command values that are updated at a prescribed update cycle, and controls the inverter circuit in accordance with the three-phase PWM signals, the control section performing: when duty command values of at least two phases among the three-phase duty command values that are updated at a first update timing are the same, shifting a duty command value of one phase among the duty command values of the two phases by a prescribed shift amount; and shifting the duty command value of the one phase among the three-phase duty command values that are updated at a second update timing, which is a next update timing to the first update timing, in a direction opposite to a shift direction of the first update timing by the shift amount.

[0006] According to the above-described embodiment of the present application, there is provided a motor control device that can reduce noise. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 FIG. 1 is a circuit block diagram that schematically shows the structure of a motor control device in one embodiment of the present application.

[0008] Figure 2 FIG. 6 is a flowchart showing each process included in the main routine of the spike voltage suppression process executed by the MCU core.

[0009] Figure 3 This is a flowchart showing the processes included in the duty cycle shifting process of the subroutine as a spike voltage suppression process.

[0010] Figure 4 This is a schematic diagram illustrating the principle of generating a three-phase PWM signal based on the three-phase duty cycle command value.

[0011] Figure 5 This is the first explanatory diagram used to illustrate duty cycle shifting.

[0012] Figure 6 This is the second explanatory diagram used to illustrate the duty cycle shifting process.

[0013] Figure 7 This is the third explanatory diagram used to illustrate the duty cycle shifting process.

[0014] Label Explanation

[0015] 10: Motor control device; 11: Inverter circuit; 12: MCU (control unit); 12a: MCU core; 12b: PWM module; 20: Three-phase motor; 30: DC power supply. Detailed Implementation

[0016] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0017] Figure 1 This is a circuit block diagram schematically illustrating the structure of the motor control device 10 in this embodiment. For example... Figure 1 As shown, the motor control device 10 controls the three-phase motor 20. As an example, the three-phase motor 20 is an internal rotor type three-phase brushless DC motor. Alternatively, the three-phase motor 20 may be a drive motor (traction motor) used in hybrid vehicles.

[0018] The three-phase motor 20 has an A-phase terminal 21A, a B-phase terminal 21B, a C-phase terminal 21C, an A-phase coil 22A, a B-phase coil 22B, and a C-phase coil 22C. Although in Figure 1 The diagram is omitted, but the three-phase motor 20 has a motor housing and a rotor and stator housed within the motor housing. The rotor is a rotating body supported by bearing components such as rotor bearings inside the motor housing. The rotor has an output shaft that is coaxially engaged with the rotor in a radially inward manner that extends through the rotor axially. The stator is fixed inside the motor housing in a manner that surrounds the outer circumference of the rotor, generating the electromagnetic force required to rotate the rotor.

[0019] The A-phase terminal 21A, the B-phase terminal 21B, and the C-phase terminal 21C are metal terminals that are exposed from the surface of the motor housing. The A-phase terminal 21A, the B-phase terminal 21B, and the C-phase terminal 21C are electrically connected to the inverter circuit 11 of the motor control device 10, the details of which will be described later. The A-phase coil 22A, the B-phase coil 22B, and the C-phase coil 22C are field coils provided to the stator. For example, the A-phase coil 22A, the B-phase coil 22B, and the C-phase coil 22C are star-connected inside the three-phase motor 20.

[0020] The A-phase coil 22A is electrically connected between the A-phase terminal 21A and the neutral point N. The B-phase coil 22B is electrically connected between the B-phase terminal 21B and the neutral point N. The C-phase coil 22C is electrically connected between the C-phase terminal 21C and the neutral point N. By controlling the energization state of the A-phase coil 22A, the B-phase coil 22B, and the C-phase coil 22C by the motor control device 10, an electromagnetic force required to rotate the rotor is generated. By the rotation of the rotor, the output shaft also rotates in synchronization with the rotor.

[0021] The motor control device 10 has the inverter circuit 11 and an MCU (Microcontroller Unit) 12. The inverter circuit 11 is a three-phase full-bridge circuit that converts a direct-current power supply voltage into a three-phase alternating-current voltage and supplies it to the three-phase motor 20. The inverter circuit 11 converts a direct-current power supply voltage supplied from a direct-current power supply 30 into a three-phase alternating-current voltage and outputs it to the three-phase motor 20. As an example, the direct-current power supply 30 is one of a plurality of batteries mounted on a hybrid vehicle.

[0022] The inverter circuit 11 has an A-phase upper arm switch Q AH , a B-phase upper arm switch Q BH , a C-phase upper arm switch Q CH , an A-phase lower arm switch Q AL , a B-phase lower arm switch Q BL , and a C-phase lower arm switch Q CL In the present embodiment, each of the arm switches is, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0023] The collector terminal of the A-phase upper arm switch Q AH , the collector terminal of the B-phase upper arm switch Q BH , and the collector terminal of the C-phase upper arm switch Q CH are electrically connected to the positive terminal of the direct-current power supply 30. The emitter terminal of the A-phase lower arm switch Q AL , the emitter terminal of the B-phase lower arm switch Q BL , and the emitter terminal of the C-phase lower arm switch Q CLThe emitter terminal of the upper arm switch Q

[0024] The collector terminal of the upper arm switch Q AH The emitter terminal of the upper arm switch Q AL The collector terminal of the upper arm switch Q BH The emitter terminal of the upper arm switch Q BL The collector terminal of the upper arm switch Q CH The emitter terminal of the upper arm switch Q CL The collector terminal of the upper arm switch Q

[0025] The gate terminal of the upper arm switch Q AH The gate terminal of the upper arm switch Q BH The gate terminal of the upper arm switch Q CH The gate terminal of the upper arm switch Q AL The gate terminal of the upper arm switch Q BL The gate terminal of the upper arm switch Q CL The gate terminal of the upper arm switch Q

[0026] As described above, the inverter circuit 11 is configured of a three-phase full-bridge circuit having three upper arm switches and three lower arm switches. The inverter circuit 11 configured in this way converts the direct-current power supply voltage supplied from the direct-current power supply 30 into a three-phase alternating-current voltage and outputs the three-phase alternating-current voltage to the three-phase motor 20 by switching control of the arm switches by the MCU 12.

[0027] The MCU 12 is a control section that generates three-phase PWM signals in accordance with three-phase duty command values updated at a prescribed update cycle, and controls the inverter circuit 11 in accordance with the generated three-phase PWM signals. The three-phase duty command values include an A-phase duty command value DA, a B-phase duty command value DB, and a C-phase duty command value DC. The three-phase PWM signals include an A-phase PWM signal PA, a B-phase PWM signal PB, and a C-phase PWM signal PC. The MCU 12 has an MCU core 12a and a PWM module 12b.

[0028] The MCU core 12a performs a duty calculation process of calculating at least the three-phase duty command values in accordance with a program stored in advance in a memory not shown. Although the MCU core 12a is configured to calculate the three-phase duty command values in the present embodiment, the MCU core 12a may be configured to calculate only the A-phase duty command value DA, the B-phase duty command value DB, and the C-phase duty command value DC. Figure 1The three-phase duty command values are updated at the start time tO of the nth PWM control period and the start time t6 of the (n+l)th PWM control period. That is, the update period of the three-phase duty command values coincides with the PWM control period. In the inside of the PWM module 12b, three duty command values included in the three-phase duty command values are respectively assigned to a buffer register and an update register. The three-phase duty command values calculated by the MCU core 12a are first saved in the buffer register. Then, when the update timing of the time tO and the time t6, and the like come, the three-phase duty command values saved in the buffer register are transferred to the update register. In this way, the "updating the three-phase duty command values" means transferring the three-phase duty command values from the buffer register to the update register at the update timing.

[0029] The PWM module 12b generates the three-phase PWM signals in accordance with the three-phase duty command values updated at a prescribed update period. Figure 4 is a diagram schematically showing the principle of generating the three-phase PWM signals in accordance with the three-phase duty command values. As shown in Figure 4 In the PWM module 12b, a triangular wave TW having a prescribed period is generated. Hereinafter, the period of the triangular wave TW is sometimes referred to as a PWM control period.

[0030] Specifically, the triangular wave TW is constituted by a count value of a PWM timer. The incremental counting of the PWM timer is started from the start time tO of the nth PWM control period. At the time t3 corresponding to the 1 / 2 period of the PWM control period, the incremental counting of the PWM timer is ended, and the decremental counting of the PWM timer is started. The decremental counting of the PWM timer is ended at the end time t6 of the nth PWM control period. The time t6 is also the start time of the next PWM control period, that is, the (n+l)th PWM control period. Therefore, the incremental counting of the PWM timer is started again from the start time t6 of the (n+l)th PWM control period.

[0031] The three-phase duty command values are updated at the start time tO of the nth PWM control period and the start time t6 of the (n+l)th PWM control period. That is, the update period of the three-phase duty command values coincides with the PWM control period. In the inside of the PWM module 12b, three duty command values included in the three-phase duty command values are respectively assigned to a buffer register and an update register. The three-phase duty command values calculated by the MCU core 12a are first saved in the buffer register. Then, when the update timing of the time tO and the time t6, and the like come, the three-phase duty command values saved in the buffer register are transferred to the update register. In this way, the "updating the three-phase duty command values" means transferring the three-phase duty command values from the buffer register to the update register at the update timing.

[0032] This means that the MCU core 12a needs to calculate the three-phase duty ratio command values at an earlier timing than the update timing. That is, the MCU core 12a calculates the three-phase duty ratio command values to be used in the nth PWM control period at a timing earlier than the start timing to of the nth PWM control period (the nth update timing) and outputs the values to the PWM module 12b. Also, the MCU core 12a calculates the three-phase duty ratio command values to be used in the (n+1)th PWM control period at a timing (for example, timing t3) earlier than the start timing t6 of the (n+1)th PWM control period (the (n+1)th update timing) and outputs the values to the PWM module 12b.

[0033] As shown in FIG. 10, it is assumed that the A-phase duty ratio command value DA is updated to "DA1", the B-phase duty ratio command value DB is updated to "DB1", and the C-phase duty ratio command value DC is updated to "DC1" at the start timing to of the nth PWM control period (the nth update timing). The B-phase duty ratio command value DB1 and the C-phase duty ratio command value DC1 are the same value. The A-phase duty ratio command value DA1 is a higher value than the B-phase duty ratio command value DB1 and the C-phase duty ratio command value DC1. "DA1", "DB1", and "DC1" are the values in the update registers assigned to the respective duty ratio command values as described above. Figure 4

[0034] In the rising process of the triangular wave TW, the level of the three-phase PWM signal is set to the low level when the triangular wave TW reaches the three-phase duty ratio command value. On the other hand, in the falling process of the triangular wave TW, the level of the three-phase PWM signal is set to the high level when the triangular wave TW reaches the three-phase duty ratio command value. In other words, in the up-counting process of the PWM timer, the level of the three-phase PWM signal is set to the low level when the count value of the PWM timer coincides with the three-phase duty ratio command value. On the other hand, in the down-counting process of the PWM timer, the level of the three-phase PWM signal is set to the high level when the count value of the PWM timer coincides with the three-phase duty ratio command value.

[0035] In the example shown in FIG. 10, in the up-counting process of the PWM timer, the count value of the PWM timer coincides with the B-phase duty ratio command value DB1 and the C-phase duty ratio command value DC1 at timing t1 and coincides with the A-phase duty ratio command value DA1 at timing t2. On the other hand, in the down-counting process of the PWM timer, the count value of the PWM timer coincides with the A-phase duty ratio command value DA1 at timing t4 and coincides with the B-phase duty ratio command value DB1 and the C-phase duty ratio command value DC1 at timing t5. Figure 4

[0036] Therefore, in the example shown in FIG. 10, the level of the A-phase PWM signal is set to the low level at timing t1 and set to the high level at timing t2. The level of the B-phase PWM signal is set to the low level at timing t3 and set to the high level at timing t4. The level of the C-phase PWM signal is set to the low level at timing t3 and set to the high level at timing t5. Figure 4 ​​In the example shown, in the n-th PWM control period, the levels of the B-phase PWM signal PB and the C-phase PWM signal PC are set to the low level at time t1, and the level of the A-phase PWM signal PA is set to the low level at time t2. Also, in the n-th PWM control period, the level of the A-phase PWM signal PA is set to the high level at time t4, and the levels of the B-phase PWM signal PB and the C-phase PWM signal PC are set to the high level at time t5.

[0037] In Figure 4 , the three-phase PWM signals after the start time t6 of the n+1-th PWM control period (the n+1-th update timing) are indicated by broken lines. This is because, at the time point of the n-th update timing, it is not determined what values the three-phase duty command values are updated to at the n+1-th update timing. In Figure 4 , it is assumed that the three-phase duty command values are updated to the same values as those updated at the n-th update timing at the n+1-th update timing, and the broken lines of the three-phase PWM signals are depicted.

[0038] As described above, the duty of the three-phase PWM signals generated by the PWM module 12b is controlled by the three-phase duty command values updated at a prescribed update period. The PWM module 12b generates gate control signals supplied to the gate terminals of the respective arm switches included in the inverter circuit 11 in accordance with the three-phase PWM signals generated as described above.

[0039] The gate control signals include an A-phase upper gate control signal G1 supplied to the gate terminal of the A-phase upper arm switch Q AH , and an A-phase lower gate control signal G2 supplied to the gate terminal of the A-phase lower arm switch Q AL . Also, the gate control signals include a B-phase upper gate control signal G3 supplied to the gate terminal of the B-phase upper arm switch Q BH , and a B-phase lower gate control signal G4 supplied to the gate terminal of the B-phase lower arm switch Q BL . Furthermore, the gate control signals include a C-phase upper gate control signal G5 supplied to the gate terminal of the C-phase upper arm switch Q CH , and a C-phase lower gate control signal G6 supplied to the gate terminal of the C-phase lower arm switch Q CL .

[0040] Also, in order to prevent the upper arm switch and the lower arm switch of the same phase from being switched to the on state at the same time, a dead time is inserted in each gate control signal.

[0041] As already explained, sometimes, the rotor bearing of the three-phase motor 20 is caused to generate electrical erosion due to the potential difference (shaft voltage) between the output shaft of the three-phase motor 20 and the motor housing. In Figure 4In the example shown, in the n-th PWM control period, the turn-off timing of the B-phase PWM signal PB coincides with the turn-off timing of the C-phase PWM signal PC. As a result of the inventors' research, it was ascertained that in the case where the switching timing of the PWM signals of two of the three-phase PWM signals coincides at the instant, the shaft voltage varies in a spike-like manner, and this can have an influence on the generation of electric erosion. In the example shown, in the case where the B-phase and C-phase currents are positive (in the case where the currents flow from the inverter circuit 11 to the three-phase motor 20), if the switching timing of the B-phase PWM signal PB and the C-phase PWM signal PC overlap, a sharp variation in the shaft voltage occurs. On the other hand, in the same state, in the case where the B-phase current is positive and the C-phase current is negative, in the case where the turn-off of the B-phase high side overlaps with the turn-on of the C-phase low side, or in the case where the turn-on of the B-phase high side overlaps with the turn-off of the C-phase low side, a sharp variation in the shaft voltage occurs. Figure 4 Figure 2 In the example shown, in the n-th PWM control period, the turn-off timing of the B-phase PWM signal PB coincides with the turn-off timing of the C-phase PWM signal PC. As a result of the inventors' research, it was ascertained that in the case where the switching timing of the PWM signals of two of the three-phase PWM signals coincides at the instant, the shaft voltage varies in a spike-like manner, and this can have an influence on the generation of electric erosion. In the example shown, in the case where the B-phase and C-phase currents are positive (in the case where the currents flow from the inverter circuit 11 to the three-phase motor 20), if the switching timing of the B-phase PWM signal PB and the C-phase PWM signal PC overlap, a sharp variation in the shaft voltage occurs. On the other hand, in the same state, in the case where the B-phase current is positive and the C-phase current is negative, in the case where the turn-off of the B-phase high side overlaps with the turn-on of the C-phase low side, or in the case where the turn-on of the B-phase high side overlaps with the turn-off of the C-phase low side, a sharp variation in the shaft voltage occurs.

[0042] To solve the technical problem described above, the MCU core 12a of the MCU 12 in the present embodiment performs a spike voltage suppression process that includes, in the case where the duty command values of at least two of the three-phase duty command values that are updated at a first update timing are the same, a process of shifting the duty command value of one of the two-phase duty command values by a prescribed shift amount, and a process of shifting the duty command value of one of the three-phase duty command values that are updated at a second update timing that is the next update timing from the first update timing, in the opposite direction from the shift direction of the first update timing, by a prescribed shift amount. Hereinafter, the spike voltage suppression process performed by the MCU core 12a will be described in detail.

[0043] Figure 3 is a flowchart showing each process included in the main routine of the spike voltage suppression process performed by the MCU core 12a. Figure 4 is a flowchart showing each process included in the duty shift process that is a subroutine of the spike voltage suppression process. The MCU core 12a performs the spike voltage suppression process after calculating the three-phase duty command values at a timing earlier than the update timing, before outputting the three-phase duty command values to the PWM module 12b.

[0044] For example, the MCU core 12a performs the spike voltage suppression process at a timing earlier than the start timing t0 of the n-th PWM control period (the n-th update timing) shown in Figure 2

[0045] As shown in Figure 4 ​​As shown, the MCU core 12a first determines whether the calculated three-phase duty command values, i.e., the three-phase duty command values updated at the nth update timing, are in a saturated state at the start of the spike voltage suppression process (step S1). Specifically, the MCU core 12a determines that the three-phase duty command values are in a saturated state when at least one of the following first and second saturation conditions is satisfied.

[0046] (The first saturation condition) The largest value among the three-phase duty command values is “+1” or more.

[0047] (The second saturation condition) The smallest value among the three-phase duty command values is “-1” or less.

[0048] In addition, “+1” is a value corresponding to a duty of 100%, and “-1” is a value corresponding to a duty of 0%.

[0049] In the case where the first saturation condition is satisfied, the MCU core 12a does not perform the duty shift process for the largest three-phase duty command value. However, even if the largest value is “+1” or more, if the remaining two smaller values are repeated, for example, with a value of “-0.9” or the like, the MCU core 12a performs the duty shift process.

[0050] On the other hand, in the case where the second saturation condition is satisfied, the MCU core 12a does not perform the duty shift process for the smallest three-phase duty command value. However, even if the smallest value is “-1” or less, if the remaining two larger values are repeated, for example, with a value of “+0.9” or the like, the MCU core 12a performs the duty shift process.

[0051] In the case where the answer in the above step S1 is “yes”, i.e., in the case where the three-phase duty command values updated at the nth update timing are in a saturated state, the MCU core 12a does not branch to the duty shift process as a subroutine, and ends the spike voltage suppression process. On the other hand, in the case where the answer in the above step S1 is “no”, i.e., in the case where the three-phase duty command values updated at the nth update timing are not in a saturated state, the MCU core 12a branches to the duty shift process as a subroutine (step S2).

[0052] In the case where the answer in the above step S1 is “yes”, i.e., in the case where the three-phase duty command values updated at the nth update timing are in a saturated state, the MCU core 12a does not branch to the duty shift process as a subroutine, and ends the spike voltage suppression process. On the other hand, in the case where the answer in the above step S1 is “no”, i.e., in the case where the three-phase duty command values updated at the nth update timing are not in a saturated state, the MCU core 12a branches to the duty shift process as a subroutine (step S2). Figure 3In the example shown, the duty cycle command values ​​DA1 (phase A), DB1 (phase B), and DC1 (phase C) are calculated as the three-phase duty cycle command values ​​updated at the nth update time (time t0). The duty cycle command values ​​DB1 and DC1 are the same. The duty cycle command value DA1 (phase A) is higher than both DB1 (phase B) and DC1 (phase C). In this case, since neither the first nor the second saturation condition is satisfied, the MCU core 12a switches to... Figure 3 The duty cycle shifting process is shown.

[0053] like Figure 4 As shown, when the MCU core 12a begins the duty cycle shifting process, it first sorts the three-phase duty cycle instruction values ​​updated at the nth update opportunity (time t0) in ascending order (step S11). Figure 4 In the example shown, since the duty cycle instruction value DA1 for phase A is higher than the duty cycle instruction values ​​DB1 for phase B and DC1 for phase C, they are sorted in the order of DA1 (number 1), DB1 (number 2), and DC1 (number 3). Furthermore, the basic order of the three-phase duty cycle instruction values ​​is set to the order of duty cycle instruction value DA (number 1) for phase A, DB (number 2) for phase B, and DC (number 3) for phase C. When at least two of the three-phase duty cycle instruction values ​​are identical, the MCU core 12a sorts the three-phase duty cycle instruction values ​​according to the basic order.

[0054] Next, the MCU core 12a determines whether the first and second duty cycle instruction values ​​in the ascending order of the three-phase duty cycle instruction values ​​are the same (step S12). Figure 4 In the example shown, the MCU core 12a determines in step S12 whether the first A-phase duty cycle instruction value DA1 and the second B-phase duty cycle instruction value DB1 are the same.

[0055] If step S12 is "yes" (i.e., the first duty cycle instruction value and the second duty cycle instruction value are the same), the MCU core 12a shifts the first duty cycle instruction value downwards by a predetermined shift amount (step S13). This predetermined shift amount is determined beforehand through experimentation or simulation and is stored in advance in the memory of the MCU 12. That is, in step S13, the MCU core 12a reads the shift amount from the memory and shifts the first duty cycle instruction value downwards by that amount.

[0056] On the other hand, in the case where the determination in step S12 is "No", i.e., in the case where the first duty command value and the second duty command value are different, the MCU core 12a determines whether the second duty command value and the third duty command value in the ascending order of the three-phase duty command values are the same (step S16). In the example shown in FIG. 6, since the first A-phase duty command value DA1 and the second B-phase duty command value DB1 are different, the MCU core 12a shifts the process from step S12 to step S16. Figure 4 In the case where the determination in step S16 is "Yes", i.e., in the case where the second duty command value and the third duty command value are the same, the MCU core 12a shifts the third duty command value in the high direction by a prescribed shift amount (step S17). In the example shown in FIG. 6, since the second B-phase duty command value DB1 and the third C-phase duty command value DC1 are the same, the MCU core 12a shifts the process from step S16 to step S17, and shifts the third C-phase duty command value DC1 in the high direction by a prescribed shift amount. Hereinafter, the shifted C-phase duty command value DC will be referred to as "DC2". That is, by shifting the third C-phase duty command value DC1 in the high direction by a prescribed shift amount, the C-phase duty command value DC is adjusted to DC2 which is a value higher than DC1 by the shift amount.

[0057] In the case where the determination in step S18 is "No", i.e., in the case where the shifted third duty command value is not in the saturated state, the MCU core 12a determines whether the three-phase duty command values are all the same (step S20). In the example shown in FIG. 6, since the shifted third C-phase duty command value DC2 does not reach "+1", the MCU core 12a shifts the process from step S18 to step S20, and determines whether the three-phase duty command values are all the same. Figure 5 In the case where the determination in step S20 is "No", i.e., in the case where the three-phase duty command values are not all the same, the MCU core 12a shifts the process to step S22, and shifts the duty command value in the high direction by a prescribed shift amount (step S22). In the example shown in FIG. 6, since the three-phase duty command values are not all the same, the MCU core 12a shifts the process from step S20 to step S22, and shifts the A-phase duty command value DA1 in the high direction by a prescribed shift amount. Hereinafter, the shifted A-phase duty command value DA will be referred to as "DA2". That is, by shifting the A-phase duty command value DA1 in the high direction by a prescribed shift amount, the A-phase duty command value DA is adjusted to DA2 which is a value higher than DA1 by the shift amount.

[0058] Next, the MCU core 12a determines whether the shifted third duty command value is in the saturated state (step S18). In the case where the shifted third duty command value is "+1" or more, the MCU core 12a determines that the shifted third duty command value is in the saturated state.

[0059] In the case where the determination in step S18 is "No", i.e., in the case where the shifted third duty command value is not in the saturated state, the MCU core 12a determines whether the three-phase duty command values are all the same (step S20). In the example shown in FIG. 6, since the shifted third C-phase duty command value DC2 does not reach "+1", the MCU core 12a shifts the process from step S18 to step S20, and determines whether the three-phase duty command values are all the same.

[0060] If step S20 is "No," meaning the three-phase duty cycle command values ​​are not all identical, the MCU core 12a, after outputting all three-phase duty cycle command values ​​to the PWM module 12b, performs a subtraction operation at the next update time (second update time) (step S22). In the example above, at the time point of step S20, the MCU core 12a holds the A-phase duty cycle command value DA1, the B-phase duty cycle command value DB1, and the C-phase duty cycle command value DC2 as the three-phase duty cycle command values. In this case, since the three-phase duty cycle command values ​​are not all identical, the MCU core 12a outputs the A-phase duty cycle command value DA1, the B-phase duty cycle command value DB1, and the C-phase duty cycle command value DC2 to the PWM module 12b.

[0061] In this case, such as Figure 4 As shown, within the PWM module 12b, at the nth update time (time t0), the A-phase duty cycle command value DA is updated to "DA1", the B-phase duty cycle command value DB is updated to "DB1", and the C-phase duty cycle command value DC is updated to "DC2". Figure 5 and Figure 5 A comparison shows that by performing the duty cycle shifting process described above by the MCU core 12a, the duty cycle instruction value DC of phase C is updated to "DC2" at the nth update time (time t0). This "DC2" is a value that is higher than the initially calculated "DC1" by the shift amount.

[0062] exist Figure 5 In the example shown, during the nth PWM control cycle, during the incrementing count of the PWM timer, the PWM timer's count value matches the B-phase duty cycle command value DB1 at time t1, matches the C-phase duty cycle command value DC2 at time t1', and matches the A-phase duty cycle command value DA1 at time t2. Time t1' is the time between time t1 and time t2. On the other hand, during the decrementing count of the PWM timer, the PWM timer's count value matches the A-phase duty cycle command value DA1 at time t4, matches the C-phase duty cycle command value DC2 at time t4', and matches the B-phase duty cycle command value DB1 at time t5. Time t4' is the time between time t4 and time t5.

[0063] Therefore, in Figure 4In the example shown, in the nth PWM control cycle, at time t1, the level of the B-phase PWM signal PB is set to low; at time t1', the level of the C-phase PWM signal PC is set to low; and at time t2, the level of the A-phase PWM signal PA is set to low. Furthermore, in the nth PWM control cycle, at time t4, the level of the A-phase PWM signal PA is set to high; at time t4', the level of the C-phase PWM signal PC is set to high; and at time t5, the level of the B-phase PWM signal PB is set to high.

[0064] right Figure 5 and Figure 6 A comparison reveals that by executing the duty cycle shifting process described above by the MCU core 12a, the cutoff timing of the B-phase PWM signal PB is prevented from coinciding with the cutoff timing of the C-phase PWM signal PC in the nth PWM control cycle. Thus, when at least two of the three-phase duty cycle command values ​​updated in the nth update cycle are the same, shifting the duty cycle command value of one of the two phases by a predetermined shift amount can suppress spike-like fluctuations in the shaft voltage.

[0065] However, by performing the duty cycle shifting process described above by the MCU core 12a, the duty cycle of the C-phase PWM signal PC generated in the nth PWM control cycle becomes a value obtained by adding a predetermined shift amount to the originally required duty cycle, i.e., the duty cycle corresponding to the initially calculated C-phase duty cycle command value DC1. In this state, it is impossible to control the drive current supplied from the inverter circuit 11 to the three-phase motor 20 to the originally required current.

[0066] Therefore, in this embodiment, the MCU core 12a performs a subtraction process that shifts the duty cycle instruction value of one phase of the three-phase duty cycle instruction value that is updated at the second update timing, which is the next update timing after the first update timing, by a predetermined shift amount in the direction opposite to the shift direction of the first update timing.

[0067] like Figure 6 As shown, the MCU core 12a calculates the three-phase duty cycle instruction value used in the (n+1)th PWM control cycle at a time earlier than the start time t6 (the (n+1)th update time). The (n+1)th update time is equivalent to the second update time.

[0068] exist Figure 6In the example shown, assume that the duty cycle command values ​​for phase A (DA1), phase B (DB1), and phase C (DC1) are calculated as the three-phase duty cycle command values ​​updated at the (n+1)th update time (time t6). The duty cycle command values ​​for phase B (DB1) and phase C (DC1) are the same. The duty cycle command value for phase A (DA1) is higher than both the duty cycle command values ​​for phase B (DB1) and phase C (DC1).

[0069] Furthermore, at the time point when the three-phase duty cycle command value used in the (n+1)th PWM control cycle is calculated, since the three-phase duty cycle command value has not yet been updated at the (n+1)th update timing, the three-phase PWM signal after the (n+1)th update timing should ideally be in an undetermined state. However, for ease of understanding the subtraction process, in Figure 6 In the example, assuming that the three-phase duty cycle command values ​​are updated to DA1, DB1, and DC1 at the (n+1)th update time (time t6), the waveforms of the three-phase PWM signals are depicted.

[0070] exist Figure 6 In the example shown, during the (n+1)th PWM control cycle, during the incrementing count of the PWM timer, the PWM timer's count value is consistent with the duty cycle command values ​​DB1 for phase B and DC1 for phase C at time t7, and consistent with the duty cycle command value DA1 for phase A at time t8. On the other hand, during the decrementing count of the PWM timer, the PWM timer's count value is consistent with the duty cycle command value DA1 for phase A at time t10, and consistent with the duty cycle command values ​​DB1 for phase B and DC1 for phase C at time t11.

[0071] Therefore, in Figure 6 In the example shown, during the (n+1)th PWM control cycle, at time t7, the levels of the B-phase PWM signal PB and the C-phase PWM signal PC are set to low, and at time t8, the level of the A-phase PWM signal PA is set to low. Furthermore, during the (n+1)th PWM control cycle, at time t10, the level of the A-phase PWM signal PA is set to high, and at time t11, the levels of the B-phase PWM signal PB and the C-phase PWM signal PC are set to high.

[0072] exist Figure 7In the example shown, the MCU core 12a shifts the C-phase duty command value DC1, which was calculated before the (n+1)th update timing, by a prescribed shift amount in the direction opposite to the shift direction of the n-th update timing (t0). That is, the MCU core 12a shifts the C-phase duty command value DC1 by a prescribed shift amount in the low direction. Hereinafter, the shifted C-phase duty command value DC will be referred to as "DC3". That is, by shifting the C-phase duty command value DC1 by a prescribed shift amount in the low direction, the C-phase duty command value DC is adjusted to DC3, which is a value lower than DC1 by the prescribed shift amount.

[0073] In this case, as shown in Figure 6 inside the PWM module 12b, at the (n+1)th update timing (time t6), the A-phase duty command value DA is updated to "DA1", the B-phase duty command value DB is updated to "DB1", and the C-phase duty command value DC is updated to "DC3". Comparing Figure 7 and Figure 7 it is found that, by the subtraction processing performed by the MCU core 12a, at the (n+1)th update timing (time t6), the C-phase duty command value DC is updated to "DC3", which is a value lower than the initially calculated "DC1" by the prescribed shift amount.

[0074] In the example shown in Figure 7 In the (n+1)th PWM control period, during the up-counting of the PWM timer, the count value of the PWM timer coincides with the C-phase duty command value DC3 at time t6', coincides with the B-phase duty command value DB1 at time t7, and coincides with the A-phase duty command value DA1 at time t8. Time t6' is a time between time t6 and time t7. On the other hand, during the down-counting of the PWM timer, the count value of the PWM timer coincides with the A-phase duty command value DA1 at time t10, coincides with the B-phase duty command value DB1 at time t11, and coincides with the C-phase duty command value DC3 at time t11'. Time t11' is a time between time t11 and time t12.

[0075] Therefore, in the example shown in Figure 6 In the (n+1)th PWM control period, at time t6', the level of the C-phase PWM signal PC is set to the low level, at time t7, the level of the B-phase PWM signal PB is set to the low level, and at time t8, the level of the A-phase PWM signal PA is set to the low level. Also, in the (n+1)th PWM control period, at time t10, the level of the A-phase PWM signal PA is set to the high level, at time t11, the level of the B-phase PWM signal PB is set to the high level, and at time t11', the level of the C-phase PWM signal PC is set to the high level.

[0076] Comparing Figure 7 and ​ By the above-described subtraction processing performed by the MCU core 12a, the duty ratio of the C-phase PWM signal PC generated in the n+1th PWM control period becomes a value obtained by reducing the originally required duty ratio, i.e., the duty ratio corresponding to the initially calculated C-phase duty ratio command value DC1, by the prescribed shift amount. Therefore, by performing the above-described subtraction processing, when the control period including the n-th PWM control period and the n+1th PWM control period is viewed as a whole, the duty ratio of the C-phase PWM signal PC is controlled to the originally required duty ratio. As a result, when the control period including the n-th PWM control period and the n+1th PWM control period is viewed as a whole, it is possible to control the drive current supplied from the inverter circuit 11 to the three-phase motor 20 to the originally required current.

[0077] As described above, the motor control device 10 in the present embodiment has the MCU 12 that generates the three-phase PWM signal in accordance with the three-phase duty ratio command values updated at the prescribed update period, and controls the inverter circuit 11 in accordance with the generated three-phase PWM signal. In the case where the duty ratio command values of at least two phases among the three-phase duty ratio command values updated at the first update timing are the same, the MCU 12 shifts the duty ratio command value of one phase among the duty ratio command values of the two phases by the prescribed shift amount.

[0078] According to such a present embodiment, it is possible to avoid the switching timings of the PWM signals of at least two phases among the three-phase PWM signals generated in accordance with the three-phase duty ratio command values updated at the first update timing from coinciding, and thus it is possible to suppress the shaft voltage of the three-phase motor 20 from varying in a spike shape. That is, according to the present embodiment, it is possible to reduce the noise caused by the shaft voltage varying in a spike shape. As a result, according to the present embodiment, it is possible to suppress the rotor bearing of the three-phase motor 20 from being electrically eroded.

[0079] In addition, the MCU 12 in the present embodiment shifts the duty ratio command value of the one phase among the three-phase duty ratio command values updated at a second update timing that is the next update timing of the first update timing, in a direction opposite to the shift direction of the first update timing, by the prescribed shift amount.

[0080] Thus, when the PWM control period is viewed as a whole, the duty ratios of the three-phase PWM signals are controlled to the originally required duty ratios. As a result, when the PWM control period is viewed as a whole, it is possible to control the drive current supplied from the inverter circuit 11 to the three-phase motor 20 to the originally required current.

[0081] The present application is not limited to the above-described embodiments, and each structure described in the present specification can be appropriately combined within a range not contradictory to each other.

Claims

1. A motor control device that controls a three-phase motor, wherein the motor control device has: an inverter circuit that converts a direct-current power supply voltage into a three-phase alternating-current voltage and supplies the three-phase alternating-current voltage to the three-phase motor; and a control section that generates three-phase PWM signals in accordance with three-phase duty command values that are updated at a prescribed update cycle, and controls the inverter circuit in accordance with the three-phase PWM signals, the control section is capable of performing a shift process that includes: in a case where duty command values of at least two phases among the three-phase duty command values that are updated at a first update timing are the same, shifting the duty command value of one phase among the duty command values of the two phases by a prescribed shift amount; and shifting the duty command value of the one phase among the three-phase duty command values that are updated at a second update timing that is a next update timing to the first update timing, in a direction opposite to a shift direction of the first update timing, by the shift amount, the update cycle coincides with a PWM control cycle, the shift process includes: sorting the three-phase duty command values that are updated at the first update timing in ascending order; in a case where a first duty command value and a second duty command value among the three-phase duty command values that are updated at the first update timing after being sorted in ascending order are the same, shifting the first duty command value in a low direction by the shift amount, in a case where the first duty command value after being shifted does not become a saturated state, maintaining the first duty command value that is updated at the first update timing at a value after being shifted in the low direction by the shift amount, in a case where the first duty command value after being shifted becomes the saturated state, restoring the first duty command value that is updated at the first update timing to a value before being shifted in the low direction by the shift amount, and shifting the second duty command value in a high direction by the shift amount; in a case where the second duty command value and a third duty command value among the three-phase duty command values that are sorted in ascending order are the same, shifting the third duty command value in the high direction by the shift amount, in a case where the third duty command value after being shifted does not become the saturated state, maintaining the third duty command value that is updated at the first update timing at a value after being shifted in the high direction by the shift amount, in a case where the third duty command value after being shifted becomes the saturated state, restoring the third duty command value that is updated at the first update timing to a value before being shifted in the high direction by the shift amount, and shifting the second duty command value in the low direction by the shift amount.

2. The motor control device according to claim 1, wherein the shift process includes: in a case where the three-phase duty command values after being sorted in ascending order are all the same, shifting the first duty command value in the low direction by the shift amount and shifting the third duty command value in the high direction by the shift amount; and in a case where the three-phase duty command values after being sorted in ascending order are not all the same, shifting the first duty command value in the low direction by the shift amount and shifting the third duty command value in the high direction by the shift amount, in a case where the three-phase duty command values that are updated at the first update timing are all the same. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ the first one of the three-phase duty command values updated at the second update timing is shifted in a high direction by the shift amount and the third one of the three-phase duty command values is shifted in a low direction by the shift amount.

3. The motor control device according to claim 1 or 2, wherein when the three-phase duty command value updated at the first update timing is in a saturated state, the control section does not perform the shift processing of the three-phase duty command value updated at the first update timing.

4. The motor control device according to claim 1 or 2, wherein the three-phase motor has: a rotor; and a rotor bearing that is a bearing member of the rotor.

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