Display Substrate and Display Device

Abstract

Embodiments of the present disclosure provide a display substrate and a display device, relating to the field of display technologies, and are used to improve the display effect of the display substrate on the basis of ensuring a high light transmittance in a first display area. The display substrate has a first display area and a second display area; the display substrate includes: a plurality of first light-emitting devices located in the first display area and a plurality of second light-emitting devices located in the second display area; a plurality of first pixel circuits and a plurality of second pixel circuits located in the second display area; wherein, in the pixel circuit rows including the first pixel circuits and the second pixel circuits, an even number of first pixel circuits are arranged between some adjacent two second pixel circuits; among the even number of first pixel circuits, the (2m - 1)-th first pixel circuit and the 2m-th first pixel circuit are mirror-symmetrical about a first center line located between them and extending in the column direction; m is a positive integer. The above display substrate is used to display an image.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display substrate and a display device. Background Art

[0002] With the development of display technologies, full-screen display devices have gradually become one of the mainstream designs of display devices due to their many advantages such as a large screen-to-body ratio, good visualization effects, being conducive to split-screen display, and a higher sense of technology. Among them, a display device with an under-screen camera design is a type of full-screen display device. Since the camera is disposed under the display panel of the display device, the visual image of the display device is less affected, making it a relatively promising display device design at present.

[0003] However, for a display device with an under-screen camera, the light transmittance requirement for the display panel area corresponding to the camera is very high. How to improve the light transmittance of the area corresponding to the camera while improving the display effect of the display panel has become a technical problem to be solved. Summary of the Invention

[0004] The purpose of the embodiments of the present disclosure is to provide a display substrate and a display device, which are used to improve the display effect of the display substrate on the basis of ensuring a high light transmittance in a first display area.

[0005] To achieve the above purpose, the embodiments of the present disclosure provide the following technical solutions:

[0006] On the one hand, a display substrate is provided. The display substrate has a first display area and a second display area, and the second display area at least partially surrounds the first display area. The display substrate includes: a plurality of light-emitting devices and a plurality of pixel circuits. The plurality of light-emitting devices include a plurality of first light-emitting devices located in the first display area and a plurality of second light-emitting devices located in the second display area; the plurality of pixel circuits include a plurality of first pixel circuits and a plurality of second pixel circuits located in the second display area; the plurality of first light-emitting devices are respectively electrically connected to the plurality of first pixel circuits, and the plurality of second light-emitting devices are respectively electrically connected to the plurality of second pixel circuits; wherein, the plurality of pixel circuits are arranged in an array. In a pixel circuit row including the first pixel circuit and the second pixel circuit, an even number of first pixel circuits are provided between some adjacent two second pixel circuits; among the even number of first pixel circuits, the (2m - 1)-th first pixel circuit and the 2m-th first pixel circuit are mirror-symmetrical about a first center line located between them and extending in the column direction; m is a positive integer.

[0007] In the above display substrate, by arranging an even number of first pixel circuits between some adjacent second pixel circuits, and in the even number of first pixel circuits, the (2m - 1)-th first pixel circuit and the 2m-th first pixel circuit are mirror-symmetrical about a first center line located between them and extending in the column direction, the characteristic differences between different first pixel circuits caused by the differences in the layouts of the first pixel circuits can be reduced. The even number of first pixel circuits can share some signal lines (for example, power signal lines), and the differences in the driving signals provided by the even number of first pixel circuits can be further reduced, further improving the display effect of the display substrate.

[0008] In some embodiments, the first pixel circuit is an LTPO type pixel circuit.

[0009] In some embodiments, in the pixel circuit row, an even number of second pixel circuits are arranged between some adjacent first pixel circuits; in the even number of second pixel circuits, the (2n - 1)-th second pixel circuit and the 2n-th second pixel circuit are mirror-symmetrical about a second center line located between them and extending in the column direction; n is a positive integer.

[0010] In some embodiments, the second pixel circuit is an LTPO type pixel circuit.

[0011] In some embodiments, the pixel circuit row includes a plurality of pixel circuit groups arranged in sequence. The pixel circuit group includes 2i first pixel circuits and 2j second pixel circuits, where j - i ≥ 1, and both i and j are positive integers.

[0012] In some embodiments, the display substrate further includes: a plurality of connection lines. One first light-emitting device is electrically connected to one first pixel circuit through one connection line;

[0013] At least some of the plurality of connection lines are transparent connection lines.

[0014] In some embodiments, the plurality of first light-emitting devices are arranged in an array; one row of the first light-emitting devices and the plurality of first pixel circuits electrically connected to the first light-emitting devices in that row are arranged in the same row.

[0015] In some embodiments, a plurality of first pixel circuits electrically connected to one row of the first light-emitting devices are located on the same side of the first display area; along the direction from the plurality of first pixel circuits to one row of the first light-emitting devices, the first light-emitting devices in one row are the 1st to the Nth first light-emitting devices respectively; along the direction from one row of the first light-emitting devices to the plurality of first pixel circuits, the first pixel circuits in one row are the 1st to the Nth first pixel circuits respectively; the a-th first light-emitting device is electrically connected to the a-th first pixel circuit through one of the connection lines; wherein, N≥2, and N is an integer, and a = 1 to N.

[0016] In some embodiments, a plurality of first pixel circuits electrically connected to one row of the first light-emitting devices are located on opposite sides of the first display area; along the row direction and from the first side of the first display area to the direction of the first display area, the first light-emitting devices in one row are the 1st to the 2Nth first light-emitting devices respectively; along the row direction and from the first display area to the first side of the first display area, part of the first pixel circuits located on the first side of the first display area are the 1st to the Nth first pixel circuits respectively, and along the row direction and from the first side of the first display area to the direction of the first display area, part of the first pixel circuits located on the second side of the first display area are the (N + 1)th to the 2Nth first pixel circuits respectively; the a-th first light-emitting device is electrically connected to the a-th first pixel circuit through one of the connection lines; wherein, N≥1, and N is an integer, and a = 1 to 2N.

[0017] In some embodiments, the orthographic projections of the plurality of connection lines electrically connected to one row of the first light-emitting devices on the reference plane do not overlap; the reference plane is the plane where the display substrate is located.

[0018] In some embodiments, the second display area includes a normal area and a compressed area; a plurality of the first pixel circuits are located in the compressed area, a part of the second pixel circuits among the plurality of second pixel circuits are located in the normal area, and another part of the second pixel circuits are located in the compressed area; the width of the column area where the first pixel circuits or the second pixel circuits located in the compressed area are located is smaller than the width of the column area where the second pixel circuits located in the normal area are located.

[0019] In some embodiments, the display substrate includes: a substrate; a pixel circuit layer disposed on the substrate, the first pixel circuit and the second pixel circuit are located in the pixel circuit layer; a light-emitting device layer disposed on the side of the pixel circuit layer away from the substrate, the first light-emitting device and the second light-emitting device are located in the light-emitting device layer; and a lead layer disposed between the pixel circuit layer and the light-emitting device layer, the plurality of connection lines are located in the lead layer.

[0020] On the other hand, a display device is provided. The display device includes: a display module, the display module including a display substrate as described in any of the above embodiments; and an optical element disposed on the non-light-emitting side of the display substrate, the optical element being located in a first display area of the display substrate.

[0021] The above display module and display device have the same structure and beneficial technical effects as the display substrate provided in some of the above embodiments, and will not be elaborated here. Description of the Drawings

[0022] In order to more clearly illustrate the technical solutions in the present disclosure, the drawings required to be used in some embodiments of the present disclosure will be briefly introduced below. Obviously, the drawings in the following description are only the drawings of some embodiments of the present disclosure, and those of ordinary skill in the art can also obtain other drawings based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams and do not limit the actual sizes of the products involved in the embodiments of the present disclosure.

[0023] Figure 1 Structural diagram of a display device according to some embodiments;

[0024] Figure 2 Structural diagram of a display module according to some embodiments;

[0025] Figure 3 Structural diagram of a display substrate according to some embodiments;

[0026] Figure 4 Structural diagram of a display substrate according to some embodiments;

[0027] Figure 5 Along Figure 3 Cross-sectional structural diagram of the cross-section line D-D' in;

[0028] Figure 6A Partial enlarged view of another display substrate according to some embodiments;

[0029] Figure 6B Partial enlarged view of another display substrate according to some embodiments;

[0030] Figure 6C Partial enlarged view of another display substrate according to some embodiments;

[0031] Figure 6D Partial enlarged view of another display substrate according to some embodiments;

[0032] Figure 7 Partial enlarged view of another display substrate according to some embodiments;

[0033] Figure 8 A partial enlarged view of another display substrate according to some embodiments. Detailed implementation manners

[0034] The technical solutions in some embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are only a part rather than all of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the embodiments provided in the present disclosure fall within the protection scope of the present disclosure.

[0035] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is interpreted in an open, inclusive sense, i.e., "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples", etc., are intended to indicate that the specific features, structures, materials or characteristics related to the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any suitable manner.

[0036] Hereinafter, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality" is two or more.

[0037] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical contact or electrical contact with each other. Another example is that when describing some embodiments, the term "coupled" may be used to indicate that two or more components have direct physical contact or electrical contact. However, the term "coupled" or "communicatively coupled" may also mean that two or more components do not have direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.

[0038] Hereinafter, the terms "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise specified, the meaning of "a plurality" is two or more.

[0039] When describing some embodiments, the expressions "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical contact or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.

[0040] "A and / or B" includes the following three combinations: only A, only B, and the combination of A and B.

[0041] As used herein, depending on the context, the term "if" is optionally construed to mean "when" or "at the time of" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if it is determined that..." or "if [the stated condition or event] is detected" is optionally construed to mean "when it is determined that..." or "in response to determining..." or "at the time of detecting [the stated condition or event]" or "in response to detecting [the stated condition or event]".

[0042] The use of "suitable for" or "configured to" herein means open and inclusive language, which does not exclude a device that is suitable for or configured to perform additional tasks or steps.

[0043] In addition, the use of "based on" means open and inclusive because a process, step, calculation, or other action "based on" one or more of the stated conditions or values may, in practice, be based on additional conditions or values beyond those stated.

[0044] It should be understood that when a layer or element is referred to as being on another layer or substrate, it may be that the layer or element is directly on the other layer or substrate, or there may be an intermediate layer between the layer or element and the other layer or substrate.

[0045] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Thus, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Accordingly, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include shape deviations resulting from, for example, manufacturing. For example, an etched region shown as rectangular will typically have curved features. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to depict the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0046] Some embodiments of the present disclosure provide a display device 2000, such as Figure 1 shown, the type of the display device 2000 is not limited. For example, it may be an electroluminescent display device or a photoluminescent display device.

[0047] In some examples, the above display device 2000 may be any device that displays both moving (e.g., video) and stationary (e.g., still images) and whether text or images. More specifically, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants, handheld or portable computers, global positioning system receivers / navigators, cameras, video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0048] In some embodiments, as Figure 1 shown, the above display device 2000 includes: a display module 1000.

[0049] Exemplarily, the above display module 1000 may be: an Organic Light Emitting Diode (OLED) display module, a Quantum Dot Light Emitting Diodes (QLED) display module, a Micro Light Emitting Diodes (Micro LED) display module, or a Mini Light Emitting Diodes (Mini LED) display module, etc. The present disclosure does not make specific limitations thereto.

[0050] Exemplarily, the display device 2000 further includes a frame, a display driving IC (Integrated Circuit), and other electronic accessories, etc.

[0051] Taking the above display module 1000 as an OLED display module as an example below, some embodiments of the present disclosure will be schematically described.

[0052] In some embodiments, as Figure 2 shown, the display module 1000 includes: a display substrate 100.

[0053] In some examples, as Figure 2 and Figure 3 shown, the display substrate 100 has a first display area A1 and a second display area A2, and the second display area A2 at least partially surrounds the first display area A1.

[0054] Here, the number of the first display areas A1 may be at least one, and the number of the second display areas A2 may be, for example, one. Below, as Figure 2 and Figure 3 shown, taking the number of the first display areas A1 as one as an example, the structure of the display substrate 100 will be schematically described.

[0055] Exemplarily, the second display area A2 may surround the first display area A1. At this time, the shape of the first display area A1 may be, for example, circular, oval, or rectangular, etc.

[0056] Exemplarily, the second display area A2 may surround a part of the first display area A1, that is, a part of the boundary of the second display area A2 overlaps with a part of the boundary of the first display area A1. At this time, the shape of the first display area A1 may be, for example, rectangular, rounded rectangular, water droplet-shaped, or semi-circular, etc.

[0057] Exemplarily, both the part of the display substrate 100 located in the first display area A1 and the part located in the second display area A2 can be used for displaying images.

[0058] Exemplarily, the light transmittance of the portion of the display substrate 100 located in the first display area A1 is greater than that of the portion of the display substrate 100 located in the second display area A2. External light can pass through the portion of the display substrate 100 located in the first display area A1 from one side of the display substrate 100 and be incident on the other side of the display substrate 100.

[0059] In some examples, as Figure 2 shown, the display module 1000 further includes an optical element 200 disposed on the non-light-emitting side of the display substrate 100.

[0060] In some examples, the optical element 200 is located in the first display area A1 of the display substrate 100. Thus, external light can pass through the portion of the display substrate 100 located in the first display area A1, be incident on the optical element 200, and be collected by the optical element 200, so that the optical element 200 can operate normally.

[0061] It should be noted that the display side of the display substrate 100 is used for displaying images, and the non-light-emitting side of the display substrate 100 refers to the other side opposite to the display side of the display substrate 100.

[0062] Exemplarily, the above optical element 200 can be a camera, a fingerprint recognition sensor, an infrared sensor, etc.

[0063] Here, the number of the optical elements 200 provided can be selected according to actual needs.

[0064] Exemplarily, when the optical element 200 is not working, the portion of the display substrate 100 located in the first display area A1 can display, so that the entire display substrate 100 can display an image. Or, when the optical element 200 is working, the portion of the display substrate 100 located in the first display area A1 can still display, so that the entire display substrate 100 can display an image.

[0065] Exemplarily, when the optical element 200 (such as a camera) is working (such as when the user takes a selfie), the above first display area A1 can present a black screen, and the second display area A2 presents the image of the user's selfie. Or, the first display area A1 and the second display area A2 as a whole present the image of the user's selfie.

[0066] By setting the light transmittance of the portion of the display substrate 100 located in the first display area A1 and disposing the optical element 200 in the first display area A1, the present disclosure can not only ensure that the optical element 200 can operate normally, but also increase the display area of the display substrate 100, the display module 1000 and the display device 2000, and improve the screen-to-body ratio.

[0067] In some embodiments, asFigure 4 As shown, the above display substrate 100 may include: a substrate 1.

[0068] The type of the above substrate 1 includes various types and can be selected and set according to actual needs.

[0069] Exemplarily, the above substrate 1 may be a rigid substrate. Among them, the rigid substrate may be a glass substrate or a PMMA (Polymethyl methacrylate) substrate, etc.

[0070] Exemplarily, the above substrate 1 may be a flexible substrate. Among them, the flexible substrate may be a PET (Polyethylene terephthalate) substrate, a PEN (Polyethylenenaphthalate two formic acid glycol ester) substrate or a PI (Polyimide) substrate, etc. At this time, the above display substrate 100 can realize flexible display, for example.

[0071] In some examples, as Figure 4 shown, the above display substrate 100 may further include: a pixel circuit layer 2 disposed on the substrate 1.

[0072] Exemplarily, the above pixel circuit layer 2 may include a plurality of pixel circuits 20.

[0073] Exemplarily, the plurality of pixel circuits 20 includes a plurality of first pixel circuits 21 and a plurality of second pixel circuits 22.

[0074] The structures of the above first pixel circuit 21 and second pixel circuit 22 include various types and can be selected and set according to actual needs. For example, the structure of the first pixel circuit 21 or the second pixel circuit 22 may include structures such as "2T1C", "6T1C", "7T1C", "6T2C" or "7T2C", etc. Here, "T" represents a transistor, the number in front of "T" represents the number of transistors, "C" represents a storage capacitor, and the number in front of "C" represents the number of storage capacitors.

[0075] Exemplarily, the structures of the first pixel circuit 21 and the second pixel circuit 22 may be the same, for example. For example, the structures of both are 7T1C structures.

[0076] In some examples, as Figure 4 shown, the above display substrate 100 may further include: a light-emitting device layer 3 disposed on the side of the pixel circuit layer 2 away from the substrate 1.

[0077] Exemplarily, the above light-emitting device layer 3 may include a plurality of light-emitting devices 30.

[0078] Exemplarily, the plurality of light-emitting devices 30 includes a plurality of first light-emitting devices 31 and a plurality of second light-emitting devices 32. Among them, the structures of the first light-emitting devices 31 and the second light-emitting devices 32 may be the same, for example.

[0079] Exemplarily, as Figure 5 shown, the plurality of first light-emitting devices 31 are respectively electrically connected to the plurality of first pixel circuits 21, and the plurality of second light-emitting devices 32 are respectively electrically connected to the plurality of second pixel circuits 22.

[0080] Among them, the electrical connection relationship between the first light-emitting device 31 and the first pixel circuit 21 includes various types, which can be specifically selected and set according to actual needs, and the present disclosure does not limit this.

[0081] For example, the first light-emitting device 31 and the first pixel circuit 21 may be electrically connected in a one-to-one correspondence. Another example is that one first pixel circuit 21 may be electrically connected to a plurality of first light-emitting devices 31. Another example is that a plurality of first pixel circuits 21 may be electrically connected to one first light-emitting device 31.

[0082] The electrical connection relationship between the second light-emitting device 32 and the second pixel circuit 22 includes various types, which can be specifically selected and set according to actual needs, and the present disclosure does not limit this.

[0083] For example, the second light-emitting device 32 and the second pixel circuit 22 may be electrically connected in a one-to-one correspondence. Another example is that one second pixel circuit 22 may be electrically connected to a plurality of second light-emitting devices 32. Another example is that a plurality of second pixel circuits 22 may be electrically connected to one second light-emitting device 32.

[0084] Next, as Figure 5 shown, taking the first light-emitting device 31 and the first pixel circuit 21 being electrically connected in a one-to-one correspondence and the second light-emitting device 32 and the second pixel circuit 22 being electrically connected in a one-to-one correspondence as an example, the structure of the display substrate 100 will be schematically described.

[0085] Exemplarily, the first pixel circuit 21 may provide a driving signal for the corresponding first light-emitting device 31 to drive the first light-emitting device 31 to emit light. The second pixel circuit 22 may provide a driving signal for the corresponding second light-emitting device 32 to drive the second light-emitting device 32 to emit light. The light emitted by the plurality of first light-emitting devices 31 and the plurality of second light-emitting devices 32 cooperate with each other, so that the display substrate 100 can realize image display.

[0086] In some examples, as Figure 5As shown, multiple first pixel circuits 21 and multiple second pixel circuits 22 in the above-mentioned pixel circuit layer 2 can all be located in the second display area A2. Multiple first light-emitting devices 31 in the above-mentioned light-emitting device layer 3 can all be located in the first display area A1, and multiple second light-emitting devices 32 can all be located in the second display area A2.

[0087] Here, the first pixel circuit 21 and the second pixel circuit 22 in the pixel circuit layer 2 need to transmit electrical signals well. Based on this, a part of the first pixel circuit 21 and a part of the second pixel circuit 22 are formed of a metal material. It can be understood that the metal material can block light.

[0088] In some examples of the present disclosure, after the first pixel circuit 21 that provides a driving signal for the first light-emitting device 31 is arranged in the second display area A2, the structure that can block light in the first display area A1 is reduced, and external light can then pass through the gap between any two adjacent first light-emitting devices 31 from one side (e.g., the light-emitting side) of the portion of the display substrate 100 located in the first display area A1 and exit from the other side (e.g., the non-light-emitting side) of the portion of the display substrate 100 located in the first display area A1, so that the portion of the display substrate 100 located in the first display area A1 has a high transmittance.

[0089] In this way, when the display substrate 100 is applied to the display module 1000 and an optical element 200 is arranged on the non-light-emitting side of the display substrate 100 and in the first display area A1, external light can pass through the portion of the display substrate 100 located in the first display area A1 and enter the optical element 200, be collected by the optical element 200, and enable the optical element 200 to work properly.

[0090] Exemplarily, the distribution density of the above-mentioned multiple first light-emitting devices 31 is the same as the distribution density of the above-mentioned multiple second light-emitting devices 32. This can not only enable the display substrate 100 to achieve full-screen display, but also help ensure that the display substrate 100 has good image display quality.

[0091] Another example is that the distribution density of the above-mentioned multiple first light-emitting devices 31 is less than the distribution density of the above-mentioned multiple second light-emitting devices 32. This can increase the distance between any two adjacent first light-emitting devices 31, reduce the blockage of external light by the first light-emitting devices 31, increase the area of the light-transmitting part in the portion of the display substrate 100 located in the first display area A1, and thus can further increase the amount of external light that can pass through the portion of the display substrate 100 located in the first display area A1. After the display substrate 100 is applied to the display module 1000, it is beneficial to increase the amount of external light collected by the optical element 200 and improve the working performance of the optical element 200.

[0092] In some examples, such as Figure 5 shown, multiple pixel circuits 20 are arranged in an array.

[0093] Exemplarily, the multiple pixel circuits 20 can be arranged in multiple columns along a first direction X and in multiple rows along a second direction Y. Among them, each column of pixel circuits 20 can include multiple pixel circuits 20, and the multiple pixel circuits 20 are arranged in sequence along the second direction Y. Each row of pixel circuits 20 can include multiple pixel circuits 20, and the multiple pixel circuits 20 are arranged in sequence along the first direction X.

[0094] For example, the first direction X intersects with the second direction Y.

[0095] Here, the included angle between the first direction X and the second direction Y can be selected and set according to actual needs. For example, the included angle between the first direction X and the second direction Y is 85°, 88°, or 90°, etc.

[0096] In some embodiments, in a row of pixel circuits including a first pixel circuit 21 and a second pixel circuit 22, an even number of first pixel circuits 21 are arranged between some adjacent two second pixel circuits 22.

[0097] It should be noted that the statement "an even number of first pixel circuits 21 are arranged between some adjacent two second pixel circuits 22" means that in addition to an even number of first pixel circuits 21 being arranged between some adjacent two second pixel circuits 22, there is also a situation where no first pixel circuit 21 is arranged between some adjacent two second pixel circuits 22.

[0098] Exemplarily, two first pixel circuits 21, four first pixel circuits 21, etc. are arranged between some adjacent two second pixel circuits 22, and the embodiments of the present disclosure do not limit this.

[0099] Exemplarily, among the above-mentioned even number of first pixel circuits 21, the (2m - 1)-th first pixel circuit 21 and the 2m-th first pixel circuit 21 are mirror-symmetrical about a first center line located between them and extending along the column direction; m is a positive integer.

[0100] It should be noted that the above "mirror symmetry" is not strict symmetry, and the shapes of the (2m - 1)-th first pixel circuit 21 and the 2m-th first pixel circuit 21 can fluctuate within an error range. As Figure 6A shown, the above "mirror symmetry" is illustrated.

[0101] Exemplarily, two first pixel circuits 21 are provided between two adjacent second pixel circuits 22. The two first pixel circuits 21 are adjacent to each other, and the two first pixel circuits 21 are mirror-symmetrical about a first center line AA' located between them and extending in the column direction (i.e., the second direction Y). That is, the shapes of the two first pixel circuits 21 are symmetrical with respect to the first center line AA'.

[0102] In this embodiment, by providing an even number of first pixel circuits 21 between two adjacent second pixel circuits 22, and in the even number of first pixel circuits 21, the (2m - 1)th first pixel circuit 21 and the 2mth first pixel circuit 21 are mirror-symmetrical about a first center line extending in the column direction and located between them, the characteristic differences between different first pixel circuits 21 caused by the differences in the layouts of the first pixel circuits 21 can be reduced. The even number of first pixel circuits 21 can share some signal lines (for example, the power supply signal line VDD), and the differences in the driving signals provided by the even number of first pixel circuits 21 can be further reduced, further improving the display effect of the display substrate 100.

[0103] In some embodiments, the first pixel circuit 21 is an LTPO type pixel circuit.

[0104] An LTPO (Low Temperature Polycrystalline Oxide) type pixel circuit refers to a pixel circuit that includes both a low temperature poly-silicon thin film transistor (abbreviated as LTPS TFT) and an oxide thin film transistor (Oxide TFT).

[0105] Exemplarily, for an LTPO type pixel circuit, the high mobility characteristic of the low temperature poly-silicon thin film transistor can be utilized to accelerate the charging speed of the pixel capacitor, and the characteristic of the oxide thin film transistor having lower leakage current can be utilized to improve phenomena such as image flicker, crosstalk, and afterimage of the display panel. Combining the advantages of these two types of transistors helps in the development of display products with high resolution, low power consumption, and high image quality.

[0106] Exemplarily, when the first pixel circuit 21 is an LTPO pixel circuit, and the even number of LTPO pixel circuits are mirror-symmetrical about the first center line AA' located between them and extending in the column direction (i.e., the second direction Y above), the even number of pixel circuits can share some signal lines (e.g., the power signal line VDD, etc.). Thereby, the difference between the even number of first pixel circuits 21 can be further reduced, the difference between the driving signals provided by the even number of first pixel circuits 21 can be further reduced, and the display effect of the display substrate 100 can be further improved; on this basis, the number of signal lines is reduced, the area of the region occupied by the first pixel circuit 21 in the second display area A2 can be reduced, so as to improve the problem that the pixel density in the second display area A2 may be reduced due to the arrangement of the first pixel circuit 21 in the second display area A2, thereby ensuring the display effect of the display substrate 100 on the basis of ensuring a high light transmittance in the first display area A1.

[0107] In some implementation manners, as Figure 6B shown, one first pixel circuit 21 is provided between two adjacent second pixel circuits 22.

[0108] At this time, a single first pixel circuit 21 provided between two adjacent second pixel circuits 22 cannot be made into a mirror-symmetrical structure.

[0109] It should be noted that both the first pixel circuit 21 and the second pixel circuit 22 are connected to multiple signal lines. Since there is partial overlap between the multiple signal lines connected by the first pixel circuit 21, parasitic capacitance will be formed between the signal lines; since there is partial overlap between the multiple signal lines connected by the second pixel circuit 22, parasitic capacitance will be formed between the signal lines. The existence of the parasitic capacitance easily affects the accuracy of the driving signals generated by the first pixel circuit 21 and the second pixel circuit 22.

[0110] A first pixel circuit 21 is disposed between two adjacent second pixel circuits 22. When the first pixel circuit 21 is an LTPO type pixel circuit, due to the difference in the layout between the first pixel circuit 21 and the second pixel circuit 22, the parasitic capacitance formed between the multiple signal lines connected to the second pixel circuit 22 is quite different from the parasitic capacitance formed between the multiple signal lines connected to the first pixel circuit 21, which will affect the display effect of the display substrate 100 (for example, the phenomenon of horizontal mura (display moiré) occurs), resulting in a decrease in the quality of the display screen. In the technical solution of the present application, an even number of first pixel circuits 21 are disposed between some adjacent second pixel circuits 22, and some signal lines (such as the power signal line VDD, etc.) can be shared between two adjacent first pixel circuits 21. Thus, the difference between two adjacent first pixel circuits 21 can be further reduced, the difference between the driving signals provided by two adjacent first pixel circuits 21 can be further reduced, and the display effect of the display substrate 100 can be further improved.

[0111] In some embodiments, as Figure 5 shown, in the above row of pixel circuits, an even number of second pixel circuits 22 are disposed between some adjacent first pixel circuits 21.

[0112] It should be noted that the statement "an even number of second pixel circuits 22 are disposed between some adjacent first pixel circuits 21" means that in addition to an even number of second pixel circuits 22 being disposed between some adjacent first pixel circuits 21, there is also a situation where no first pixel circuit 21 is disposed between some adjacent first pixel circuits 21.

[0113] Exemplarily, four second pixel circuits 22, eight second pixel circuits 22, etc. are disposed between some adjacent first pixel circuits 21, and the embodiments of the present disclosure do not limit this.

[0114] In some examples, among the above even number of second pixel circuits 22, the (2n - 1)-th second pixel circuit 22 and the 2n-th second pixel circuit 22 are mirror symmetric about a second center line located between them and extending in the column direction; n is a positive integer.

[0115] It should be noted that the above "mirror symmetry" is not strict symmetry, and the shapes of the (2n - 1)-th second pixel circuit 22 and the 2n-th second pixel circuit 22 can fluctuate within an error range.

[0116] As Figure 6A shown, the above "mirror symmetry" is described.

[0117] Exemplarily, four second pixel circuits 22 are provided between two adjacent first pixel circuits 21. The first second pixel circuit 22 and the second second pixel circuit 22 are mirror-symmetrical about a second center line BB' located between them and extending in the column direction. That is, the first second pixel circuit 22 and the second second pixel circuit 22 are symmetrical with respect to the second center line BB'. The third second pixel circuit 22 and the fourth second pixel circuit 22 are mirror-symmetrical about a second center line BB' located between them and extending in the column direction. That is, the third second pixel circuit 22 and the fourth second pixel circuit 22 are symmetrical with respect to the second center line BB'.

[0118] With the above arrangement, the characteristic differences between different second pixel circuits 22 caused by the differences in the layouts of the second pixel circuits 22 can be reduced. The (2n - 1)th second pixel circuit 22 and the 2nth second pixel circuit 22 can share some signal lines (for example, the power supply signal line VDD), which can further reduce the differences in the driving signals provided by the (2n - 1)th second pixel circuit 22 and the 2nth second pixel circuit 22, and further improve the display effect of the display substrate 100.

[0119] In some embodiments, the second pixel circuit 22 is an LTPO type pixel circuit.

[0120] Exemplarily, when the second pixel circuit 22 is an LTPO type pixel circuit, the high mobility of the low-temperature polysilicon thin-film transistor can be utilized to accelerate the charging speed of the pixel capacitor, and the characteristic of the metal-oxide thin-film transistor having a lower leakage current can be utilized to improve phenomena such as image flicker, crosstalk, and afterimage of the display panel. At the same time, combining the advantages of these two types of transistors contributes to the development of high-resolution, low-power, and high-quality display products.

[0121] Exemplarily, when the second pixel circuit 22 is an LTPO type pixel circuit, and two LTPO type pixel circuits are mirror symmetric with respect to a second center line BB' located therebetween and extending in the column direction (i.e., the above-mentioned second direction Y), two adjacent second pixel circuits 22 can share some signal lines (e.g., the power supply signal line VDD, etc.). Thus, the difference between two adjacent second pixel circuits 22 can be further reduced, the difference between the driving signals provided by two adjacent second pixel circuits 22 can be further reduced, and the display effect of the display substrate 100 can be further improved; on this basis, the number of signal lines is reduced, the area of the region occupied by the second pixel circuit 22 can be reduced, and space is reserved for the first pixel circuit 21, so that on the one hand, the number of second pixel circuits 22 can be ensured not to decrease, and on the other hand, the first pixel circuit 21 that provides a driving signal for the first light-emitting device 31 can be arranged in the second display area A2, thereby ensuring the display effect of the display substrate 100 on the basis of ensuring a high light transmittance of the first display area A1.

[0122] In some embodiments, as Figure 6A 、 Figure 6C - Figure 6D shown, the above-mentioned pixel circuit row includes a plurality of pixel circuit groups 201 arranged in sequence. The pixel circuit group 201 includes 2i first pixel circuits 21 and 2j second pixel circuits 22, where j - i ≥ 1, and both i and j are positive integers.

[0123] Exemplarily, the number of second pixel circuits 22 included in different pixel circuit groups 201 may be equal or unequal; the number of first pixel circuits 21 included in different pixel circuit groups 201 may be equal or unequal. For example, the number of first pixel circuits 21 and the number of second pixel circuits 22 included in different pixel circuit groups 201 are both equal, which can simplify the manufacturing process of the display substrate 100.

[0124] In some examples, every 2 second pixel circuits 22 are compressed to reserve space for 1 first pixel circuit 21. For example, as Figure 6A shown, the pixel circuit group 201 includes 4 second pixel circuits 22 and 2 first pixel circuits 21. At this time, by compressing 4 adjacent second pixel circuits 22, space is reserved for 2 first pixel circuits 21. At this time, in addition to the situation as Figure 6A shown, it may also be that each pixel circuit group 201 includes 8 second pixel circuits 22 and 4 first pixel circuits 21.

[0125] In some examples, every 3 second pixel circuits 22 are compressed to reserve space for 1 first pixel circuit 21. For example, as Figure 6CAs shown, the pixel circuit group 201 includes 12 second pixel circuits 22 and 4 first pixel circuits 21. At this time, by compressing 12 adjacent second pixel circuits 22, space is reserved for 4 first pixel circuits 21. At this time, except for the case as Figure 6C shown, it may also be that each pixel circuit group 201 includes 6 second pixel circuits 22 and 2 first pixel circuits 21.

[0126] In some examples, every 4 second pixel circuits 22 are compressed to reserve space for 1 first pixel circuit 21. For example, as Figure 6D shown, the pixel circuit group 201 includes 8 second pixel circuits 22 and 2 first pixel circuits 21. At this time, by compressing 8 adjacent second pixel circuits 22, space is reserved for 2 first pixel circuits 21. At this time, except for the case as Figure 6D shown, it may also be that each pixel circuit group 201 includes 16 second pixel circuits 22 and 4 first pixel circuits 21.

[0127] In addition to the above exemplary illustrations, it may also be that every 5 second pixel circuits 22 are compressed to reserve space for 1 first pixel circuit 21; at this time, the pixel circuit group 201 may include 10 second pixel circuits 22 and 2 first pixel circuits 21. It may also be that every 6 second pixel circuits 22 are compressed to reserve space for 1 first pixel circuit 21; at this time, the pixel circuit group 201 includes 12 second pixel circuits 22 and 2 first pixel circuits 21. Embodiments of the present disclosure do not limit this, as long as it satisfies that the pixel circuit group 201 includes 2i first pixel circuits 21 and 2j second pixel circuits 22.

[0128] With the above settings, by compressing 2j second pixel circuits 22, space is reserved for 2i first pixel circuits 21, so that both the number of second pixel circuits 22 can be ensured not to decrease, and the first pixel circuits 21 that provide drive signals for the first light-emitting devices 31 can be arranged in the second display area A2, thereby ensuring the display effect of the display substrate 100 on the basis of ensuring a high light transmittance of the first display area A1; on this basis, the pixel circuit group includes 2i first pixel circuits 21 and 2j second pixel circuits 22, and a mirror structure design of multiple first pixel circuits 21 and a mirror structure design of multiple second pixel circuits 22 in the display substrate 100 can be realized, thereby facilitating improving the uniformity of changes in parasitic capacitance formed between multiple signal lines connected to the first pixel circuits 21 and parasitic capacitance formed in multiple signal lines connected in the second pixel circuits 22, and further improving the display effect of the display substrate 100.

[0129] In some embodiments, as Figure 5 andFigure 6A As shown, the display substrate 100 further includes: a plurality of connection lines 41.

[0130] Exemplarily, one end of each connection line 41 can be electrically connected to the first pixel circuit 21, and the other end can be electrically connected to the first light-emitting device 31. In this way, the electrical connection between the first pixel circuit 21 and the first light-emitting device 31 can be realized by using the connection lines 41, and the first pixel circuit 21 can transmit a driving signal to the corresponding first light-emitting device 31 through the connection lines 41.

[0131] In some examples, at least some of the plurality of connection lines 41 are transparent connection lines.

[0132] It should be noted that the above "at least some of the plurality of connection lines 41 are transparent connection lines" includes two cases: all of the plurality of connection lines 41 are transparent connection lines; and some of the plurality of connection lines 41 are transparent connection lines and some are non-transparent traces.

[0133] In some examples, as Figure 4 shown, the above display substrate 100 may further include: a lead layer 4 disposed between the pixel circuit layer 2 and the light-emitting device layer 3. The plurality of connection lines 41 are located in the lead layer 4.

[0134] Among them, the number of the lead layers 4 can be one layer, two layers, or three layers, etc. When the number of the lead layers 4 is two or more layers, the plurality of lead layers 4 can be stacked in sequence in a direction perpendicular to the substrate 1.

[0135] It can be understood that an insulating layer may be provided between the pixel circuit layer 2 and the plurality of lead layers 4, an insulating layer may be provided between any two adjacent lead layers 4, and an insulating layer may be provided between the plurality of lead layers 4 and the light-emitting device layer 3.

[0136] Exemplarily, when at least some of the plurality of connection lines 41 are transparent connection lines, at least one layer of the lead layer 4 is a transparent lead layer, and the transparent lead layer can be made of a transparent material such as indium tin oxide (ITO) or indium gallium zinc oxide (IGZO).

[0137] In this embodiment, the electrical connection between the first pixel circuit 21 and the first light-emitting device 31 is achieved through the connection line 41. On this basis, at least some of the multiple connection lines 41 are transparent connection lines, which can also reduce the blockage of light by the connection lines 41, enabling the light to pass through the gap between any two adjacent first light-emitting devices 31 from one side (such as the light-emitting side) of the part of the display substrate 100 located in the first display area A1 and exit from the other side (such as the non-light-emitting side) of the part of the display substrate 100 located in the first display area A1, so that the part of the display substrate 100 located in the first display area A1 has a high transmittance.

[0138] In some embodiments, as Figure 5 and Figure 6A shown, multiple first light-emitting devices 31 are arranged in an array.

[0139] In some examples, as Figure 5 and Figure 6A shown, a row of first light-emitting devices 31 and multiple first pixel circuits 21 electrically connected to the first light-emitting devices 31 in this row are arranged in the same row. That is, along the first direction X, a row of first light-emitting devices 31 and multiple first pixel circuits 21 electrically connected to the first light-emitting devices 31 in this row are located in the same row.

[0140] Exemplarily, one first light-emitting device 31 is electrically connected to one first pixel circuit 21 through one connection line 41; at this time, multiple connection lines 41 can extend along the first direction X.

[0141] In this embodiment, by arranging a row of first light-emitting devices 31 and multiple first pixel circuits 21 electrically connected to the first light-emitting devices 31 in this row in the same row, it is convenient for the routing of signal lines (such as gate lines) in the pixel circuit layer 2, facilitating the driving of the first pixel circuit 21, and reducing the design and preparation difficulty of the display substrate 100.

[0142] In some embodiments, as Figure 5 shown, multiple first pixel circuits 21 electrically connected to a row of first light-emitting devices 31 are located on the same side of the first display area A1.

[0143] In some examples, along the direction from multiple first pixel circuits 21 to a row of first light-emitting devices 31, the first light-emitting devices 31 in a row are the 1st to the Nth first light-emitting devices respectively.

[0144] Exemplarily, along the direction from multiple first pixel circuits 21 to a row of first light-emitting devices 31, the 1st first light-emitting device 31 is closest to the second display area A2. The 2nd, 3rd, 4th... (N - 1)th, and Nth first light-emitting devices 31 are successively farther away from the second display area A2.

[0145] In some examples, along the direction in which the first light-emitting device 31 in a row points to a plurality of first pixel circuits 21, the first pixel circuits 21 in a row are respectively the 1st to the Nth first pixel circuits.

[0146] Exemplarily, along the direction in which the first light-emitting device 31 in a row points to a plurality of first pixel circuits 21, the 1st first pixel circuit 21 is closest to the first display area A1. The 2nd, 3rd, 4th... (N - 1)th, and Nth first pixel circuits 21 are successively farther away from the first display area A1.

[0147] In some examples, the a-th first light-emitting device 31 is electrically connected to the a-th first pixel circuit 21 through a connection line 41.

[0148] Exemplarily, N≥2 and N is an integer, and a = 1 to N.

[0149] Exemplarily, the lengths of the connection lines 41 connected to the 1st to the Nth first light-emitting devices 31 gradually increase.

[0150] It can be understood that the 1st to the Nth first pixel circuits 21 are successively farther away from the first light-emitting device 31 along the direction in which the first light-emitting device 31 in a row points to a plurality of first pixel circuits 21. This means that the distances between the 1st, 2nd, 3rd... (N - 1)th, and Nth first pixel circuits 21 and the plurality of first light-emitting devices 31 gradually increase. Correspondingly, the distance between the 1st first pixel circuit 21 and the 1st first light-emitting device 31, the distance between the 2nd first pixel circuit 21 and the 2nd first light-emitting device 31... the distance between the (N - 1)th first pixel circuit 21 and the (N - 1)th first light-emitting device 31, and the distance between the Nth first pixel circuit and the Nth first light-emitting device gradually increase. In this way, the length of the 1st connection line 41 connecting the 1st first pixel circuit and the 1st first light-emitting device, the length of the 2nd connection line 41 connecting the 2nd first pixel circuit and the 2nd first light-emitting device... the length of the (N - 1)th connection line 41 connecting the (N - 1)th first pixel circuit and the (N - 1)th first light-emitting device, and the length of the Nth connection line 41 connecting the Nth first pixel circuit and the Nth first light-emitting device also gradually increase.

[0151] For example, the portion of each connection line 41 located between the corresponding first pixel circuit 21 and the corresponding first light-emitting device 31 is linear. At this time, the length of the connection line 41, for example, refers to the distance between the corresponding first pixel circuit 21 and the corresponding first light-emitting device 31. This not only facilitates the preparation and formation of the connection line 41 but also can avoid forming corners or tips in the connection line 41, ensuring good transmission of the driving signal in the connection line 41.

[0152] With the above settings and connection methods, it is not only convenient to plan the routing path of the connection line 41, improve the regularity of the length difference between any two adjacent connection lines 41, but also reduce the number of connection lines 41 required, simplify the structure of the display substrate 100, and reduce the difficulty of manufacturing the display substrate 100.

[0153] In some embodiments, as Figure 7 shown, a plurality of first pixel circuits 21 electrically connected to a row of first light-emitting devices 31 are located on opposite sides of the first display area A1.

[0154] In some examples, along the row direction and from the first side A1' of the first display area A1 towards the first display area A1, a row of first light-emitting devices 31 are respectively the 1st to the 2Nth first light-emitting devices.

[0155] Exemplarily, along the row direction and from the first side A1' of the first display area A1 towards the first display area A1, the 1st first light-emitting device 31 is closest to the first side A1' of the first display area A1. The 2nd, 3rd, 4th... 2N-1th, 2Nth first light-emitting devices 31 are successively farther away from the first side A1' of the first display area A1.

[0156] In some examples, along the row direction and from the first display area A1 towards the first side A1' of the first display area A1, some of the first pixel circuits 21 located on the first side A1' of the first display area A1 are respectively the 1st to the Nth first pixel circuits 21, and along the row direction and from the first side A1' of the first display area A1 towards the first display area A1, some of the first pixel circuits 21 located on the second side A1” of the first display area A1 are respectively the N+1th to the 2Nth first pixel circuits.

[0157] Exemplarily, along the row direction and from the first display area A1 towards the first side A1' of the first display area A1, the 1st first pixel circuit 21 is closest to the first display area A1. The 2nd, 3rd, 4th... N-1th, Nth first pixel circuits 21 are successively farther away from the first display area A1.

[0158] Exemplarily, along the row direction and from the first side A1' of the first display area A1 towards the first display area A1, the N+1th first pixel circuit 21 is closest to the first display area A1. The N+2th, N+3th, N+4th... 2N-1th, 2Nth first pixel circuits 21 are successively farther away from the first display area A1.

[0159] In some examples, the a-th first light-emitting device 31 is electrically connected to the a-th first pixel circuit 21 through a connection line 41.

[0160] Exemplarily, N≥1, N is an integer, and a = 1 to 2N.

[0161] Exemplarily, the lengths of the connection lines 41 connected to the first to the Nth first light-emitting devices 31 gradually increase.

[0162] Exemplarily, the lengths of the connection lines 41 connected to the (N + 1)th to the 2Nth first light-emitting devices 31 gradually decrease.

[0163] With the above settings and connection methods, it is not only convenient to plan the routing path of the connection lines 41, improve the regularity of the length difference between any two adjacent connection lines 41, but also can reduce the number of connection lines 41 to be used, simplify the structure of the display substrate 100, and reduce the difficulty of fabricating the display substrate 100.

[0164] In some embodiments, as Figure 5 , Figure 6A and Figure 8 shown, the orthographic projections of the multiple connection lines 41 electrically connected to a row of first light-emitting devices 31 on the reference plane do not overlap; the reference plane is the plane where the display substrate 100 is located.

[0165] In some examples, the multiple connection lines 41 electrically connected to a row of first light-emitting devices 31 are located on the same side of the first light-emitting devices 31 in that row, as Figure 5 , Figure 6A and Figure 7 shown. In still other examples, the multiple connection lines 41 electrically connected to a row of first light-emitting devices 31 are located on opposite sides of the first light-emitting devices 31 in that row. The embodiments of the present disclosure do not limit this.

[0166] Exemplarily, the multiple connection lines 41 electrically connected to a row of first light-emitting devices 31 are located on the same side of the first light-emitting devices 31 in that row, and the connection lines 41 connected to the first to the Nth first light-emitting devices 31 are successively away from the first light-emitting devices 31 in that row, as Figure 5 , Figure 6A and Figure 7 shown.

[0167] With the above settings and connection methods, it is convenient to plan the routing path of the connection lines 41, improve the regularity of the length difference between any two adjacent connection lines 41, simplify the structure of the display substrate 100, and reduce the difficulty of fabricating the display substrate 100.

[0168] In some embodiments, as Figure 7 shown, the display substrate 100 has a plurality of light-emitting regions Q corresponding to a plurality of light-emitting devices 30, and the plurality of light-emitting regions include a light-emitting region Q1 that emits red light, a light-emitting region Q2 that emits green light, and a light-emitting region Q3 that emits blue light.

[0169] In some examples, such as Figure 8 shown, along the row direction, the light-emitting region Q1 that emits red light, the light-emitting region Q2 that emits green light, the light-emitting region Q3 that emits blue light, and the light-emitting region Q2 that emits green light are arranged periodically in sequence.

[0170] Exemplarily, the light-emitting region Q1 that emits red light can be correspondingly provided with a light-emitting device 30 that emits red light; the light-emitting region Q2 that emits green light can be correspondingly provided with a light-emitting device 30 that emits green light; the light-emitting region Q3 that emits blue light can be correspondingly provided with a light-emitting device 30 that emits blue light.

[0171] Exemplarily, the red light emitted by the light-emitting device 30 that emits red light, the green light emitted by the light-emitting device 30 that emits green light, and the blue light emitted by the light-emitting device 30 that emits blue light are perfectly combined to form various colors, thereby realizing the color display of the display substrate 100.

[0172] In some embodiments, the second pixel circuit 22 in the second display area A2 can be compressed along the first direction X to provide sufficient space for the arrangement of the first pixel circuit 21, so as to place the first pixel circuit 21 in the second display area A2.

[0173] In some examples, such as Figure 8 shown, the second display area A2 includes a regular area A21 and a compressed area A22.

[0174] Exemplarily, a plurality of first pixel circuits 21 are located in the compressed area A22, a part of the second pixel circuits 22 among the plurality of second pixel circuits 22 are located in the regular area A21, and the other part of the second pixel circuits 22 are located in the compressed area A22.

[0175] In some examples, the width of the column area where the first pixel circuit 21 or the second pixel circuit 22 located in the compressed area A22 is less than the width of the column area where the second pixel circuit 22 located in the regular area A21.

[0176] Exemplarily, the width of the column area where the first pixel circuit 21 is located refers to the size of the area occupied by the pixel circuit column where the first pixel circuit 21 is located in the first direction X. The width of the column area where the second pixel circuit 22 is located refers to the size of the area occupied by the pixel circuit column where the second pixel circuit 22 is located in the first direction X.

[0177] The width of the column region where the first pixel circuit 21 or the second pixel circuit 22 in the compression region A22 is located is smaller than the width of the column region where the second pixel circuit 22 in the normal region A21 is located. That is to say, the width of the column region where the first pixel circuit 21 or the second pixel circuit 22 in the compression region A22 is located is compressed, while the width of the column region where the second pixel circuit 22 in the normal region A21 is located is not compressed.

[0178] By compressing the width of the column region where the first pixel circuit 21 or the second pixel circuit 22 in the compression region A22 is located, space can be vacated in the compression region A22 for placing the first pixel circuit 21.

[0179] In some other embodiments, the second display area A2 is compressed as a whole. That is, in the first direction X, the widths of the column regions where the first pixel circuit 21 or the second pixel circuit 22 is located are all compressed.

[0180] This is beneficial to further increase the available space for placing the first pixel circuit 21 and facilitate placing more first pixel circuits in the second display area A2.

[0181] As described above, the above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure, thinking of changes or substitutions, should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display substrate, characterized in that, it has a first display area and a second display area, and at least part of the second display area surrounds the first display area; the display substrate includes: a plurality of light-emitting devices and a plurality of pixel circuits, the plurality of light-emitting devices include a plurality of first light-emitting devices located in the first display area and a plurality of second light-emitting devices located in the second display area; the plurality of light-emitting devices are arranged in multiple rows; along the row direction, the light-emitting devices emitting red light, the light-emitting devices emitting green light, the light-emitting devices emitting blue light, and the light-emitting devices emitting green light are arranged periodically in sequence; the plurality of pixel circuits include a plurality of first pixel circuits and a plurality of second pixel circuits located in the second display area; the plurality of first light-emitting devices are respectively electrically connected to the plurality of first pixel circuits, and the plurality of second light-emitting devices are respectively electrically connected to the plurality of second pixel circuits; wherein, the plurality of pixel circuits are arranged in an array, and in the pixel circuit rows including the first pixel circuits and the second pixel circuits, among the plurality of second pixel circuits on one side of the first display area, an even number of first pixel circuits are arranged between some adjacent two second pixel circuits; among the even number of first pixel circuits, the shape of the (2m - 1)-th first pixel circuit and the shape of the 2m-th first pixel circuit are mirror-symmetrical about a first center line located between them and extending along the column direction; m is a positive integer.

2. The display substrate according to claim 1, characterized in that, the first pixel circuit is an LTPO type pixel circuit.

3. The display substrate according to claim 1, characterized in that, among the pixel circuit rows, an even number of second pixel circuits are arranged between some adjacent two first pixel circuits; among the even number of second pixel circuits, the (2n - 1)-th second pixel circuit and the 2n-th second pixel circuit are mirror-symmetrical about a second center line located between them and extending along the column direction; n is a positive integer.

4. The display substrate according to claim 3, characterized in that, the second pixel circuit is an LTPO type pixel circuit.

5. The display substrate according to claim 3, characterized in that, the pixel circuit row includes a plurality of pixel circuit groups arranged in sequence, the pixel circuit group includes 2i first pixel circuits and 2j second pixel circuits, wherein, j - i ≥ 1, and both i and j are positive integers.

6. The display substrate according to any one of claims 1 to 5, characterized in that, the display substrate further includes: a plurality of connection lines, and one first light-emitting device is electrically connected to one first pixel circuit through one connection line; at least part of the plurality of connection lines are transparent connection lines.

7. The display substrate according to any one of claims 1 to 5, characterized in that, the display substrate further includes: a plurality of connection lines, and one first light-emitting device is electrically connected to one first pixel circuit through one connection line; the plurality of first light-emitting devices are arranged in an array; one row of the first light-emitting devices and the plurality of first pixel circuits electrically connected to the first light-emitting devices in the same row are arranged in the same row.

8. The display substrate according to claim 7, wherein, a plurality of first pixel circuits electrically connected to one row of the first light-emitting devices are located on the same side of the first display area; along the direction from the plurality of first pixel circuits to one row of the first light-emitting devices, one row of the first light-emitting devices are respectively the 1st to the Nth first light-emitting devices; along the direction from one row of the first light-emitting devices to the plurality of first pixel circuits, one row of the first pixel circuits are respectively the 1st to the Nth first pixel circuits; the a-th first light-emitting device is electrically connected to the a-th first pixel circuit through one of the connection lines; wherein, N≥2, and N is an integer, and a = 1 to N.

9. The display substrate according to claim 7, wherein, a plurality of first pixel circuits electrically connected to one row of the first light-emitting devices are located on opposite sides of the first display area; along the row direction and from the first side of the first display area to the direction of the first display area, one row of the first light-emitting devices are respectively the 1st to the 2Nth first light-emitting devices; along the row direction and from the direction of the first display area to the first side of the first display area, part of the first pixel circuits located on the first side of the first display area are respectively the 1st to the Nth first pixel circuits, and along the row direction and from the first side of the first display area to the direction of the first display area, part of the first pixel circuits located on the second side of the first display area are respectively the (N + 1)th to the 2Nth first pixel circuits; the a-th first light-emitting device is electrically connected to the a-th first pixel circuit through one of the connection lines; wherein, N≥1, and N is an integer, and a = 1 to 2N.

10. The display substrate according to claim 8 or 9, wherein, the orthographic projections of a plurality of connection lines electrically connected to one row of the first light-emitting devices on the reference plane do not overlap; the reference plane is the plane where the display substrate is located.

11. The display substrate according to any one of claims 1 to 5, wherein, the second display area includes a regular area and a compressed area; a plurality of the first pixel circuits are located in the compressed area, and part of the second pixel circuits among the plurality of second pixel circuits are located in the regular area, and the other part of the second pixel circuits are located in the compressed area; the width of the column area where the first pixel circuit or the second pixel circuit located in the compressed area is less than the width of the column area where the second pixel circuit located in the regular area is.

12. The display substrate according to claim 3, wherein, the display substrate includes: a substrate; a pixel circuit layer disposed on the substrate, and the first pixel circuit and the second pixel circuit are located in the pixel circuit layer; a light-emitting device layer disposed on the side of the pixel circuit layer away from the substrate, and the first light-emitting device and the second light-emitting device are located in the light-emitting device layer; and, a lead layer disposed between the pixel circuit layer and the light-emitting device layer, and a plurality of connection lines are located in the lead layer.

13. A display device, wherein, comprising: A display module, the display module includes a display substrate as described in any one of claims 1 to 12; And, An optical element disposed on a non-light-emitting side of the display substrate, the optical element being located in a first display area of the display substrate.

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