Control Circuit and Control Method with Current Limiting Protection for a Switching Converter

Abstract

The present application discloses a control circuit and a control method with current limiting protection for a switching converter. The control circuit includes an overcurrent comparator, a voltage stabilizing circuit, a decoding circuit, a digital soft start circuit, and a delay circuit. The overcurrent comparator compares a current sampling signal representing the inductor current of the switching converter with a current reference signal, and outputs a judgment signal representing whether the current is too large. When the judgment signal represents that the current sampling signal is greater than the current reference signal, the voltage stabilizing circuit and the decoding circuit pull down the soft start output signal of the digital soft start circuit to a predetermined voltage to trigger cycle-by-cycle current limiting protection. At the same time, the delay circuit generates a delay control signal according to the judgment signal, and delays a predetermined time to restore the pull-up of the soft start output signal when the current sampling signal is lower than the current reference signal, so that the output voltage slowly recovers to the normal value following the soft start output signal, avoiding the non-linear overshoot of the output voltage during the overcurrent recovery process.

Description

Technical Field

[0001] The present invention relates to the field of electronic technologies, and more particularly, to a control circuit and a control method with current limiting protection for a switching converter. Background Art

[0002] With the demand for power electronic products and the development of semiconductor technologies, power management chips are more widely used in portable computers, mobile phones, personal digital assistants, and other portable or non-portable electronic devices. Switching converters in switched-mode power supplies are widely used due to their advantages such as high conversion efficiency, large output current, small quiescent current, and wide output load range. In portable devices, the efficiency of the switching converter at light load largely determines the standby time of the portable product system. Therefore, in recent years, the design of low-power, high-efficiency switching converters has become one of the research hotspots in portable devices.

[0003] Existing switching converters usually adopt cycle-by-cycle current limiting protection or hiccup protection when the load is too heavy. Hiccup protection means that when the current of the power transistor of the switching converter exceeds the specified current limiting value, the switching converter works for a period of time (Ton) to try to resume startup, and then enters the sleep state and stops working for a period of time (Toff). If the load does not recover, it enters the Ton state again, and this process repeats continuously until the load recovers. Among them, cycle-by-cycle current limiting protection can quickly recover the output voltage after the load recovers, but it is prone to non-linear recovery of the output voltage, and even cause a large output overshoot, directly triggering the output voltage overshoot protection; while hiccup protection needs to wait for a long time to establish the output voltage when the load recovers, which is not conducive to the stable operation of the backend load. Summary of the Invention

[0004] In view of the above problems, an object of the present invention is to provide a control circuit and a control method with current limiting protection for a switching converter, which can achieve linear recovery of the output voltage in case of overcurrent and avoid overshoot of the output voltage.

[0005] According to one aspect of an embodiment of the present invention, there is provided a control circuit with current limiting protection for a switching converter. The switching converter has at least one power switch for converting an input voltage into an output voltage. The control circuit includes: an overcurrent comparator for comparing a current sampling signal representing the inductor current of the switching converter with a current reference signal and outputting a judgment signal representing whether the current is excessive; a voltage stabilizing circuit for generating a first voltage signal according to an output voltage sampling signal of the switching converter when the judgment signal represents that the current sampling signal is greater than the current reference signal; a decoding circuit for converting the first voltage signal into a digital signal; a digital soft-start circuit for pulling down a soft-start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection; and a delay circuit for generating a delay control signal according to the judgment signal. The delay control signal is used to delay the pull-up of the soft-start output signal for a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage of the switching converter follows the soft-start output signal and returns to a normal value.

[0006] Optionally, the control circuit further includes: an error amplifier having an inverting input terminal for receiving the output voltage sampling signal, a first non-inverting input terminal for receiving a reference signal, a second non-inverting input terminal for receiving the soft-start output signal, and an output terminal for outputting an error signal; and a PWM comparator for comparing the current sampling signal with the error signal to obtain a turn-off signal for representing the turn-off moment of the power switch. Wherein, the predetermined voltage is higher than the output voltage sampling signal. When the soft-start output signal is pulled down to the predetermined voltage, the error signal remains at a logic high level to trigger the cycle-by-cycle current limiting protection.

[0007] Optionally, the control circuit further includes: an oscillator for generating a clock signal representing a switching period. The delay control signal is further used to reduce the frequency of the clock signal when the current sampling signal is greater than the current reference signal.

[0008] Optionally, the control circuit further includes: an AND gate for performing an AND operation on the turn-off signal and a minimum on-time to obtain a reset signal for controlling the turn-off of the power switch; an RS flip-flop whose two input terminals are respectively used for receiving the clock signal and the reset signal and outputting a pulse width modulation signal; and a driving circuit for driving the power switch according to the pulse width modulation signal.

[0009] Optionally, the control circuit further includes: a current sampling circuit for obtaining the current sampling signal by sampling the current flowing through the power switch and inputting the current sampling signal into the overcurrent comparator and the PWM comparator respectively.

[0010] Optionally, the voltage stabilizing circuit is implemented by a low dropout linear regulator.

[0011] Optionally, the voltage stabilizing circuit includes: a first resistor, a first switching transistor, a second resistor, and a third resistor connected in sequence between a power supply voltage and ground; and a first comparator having a first non-inverting input terminal for receiving the output voltage sampling signal, a second non-inverting input terminal for receiving the determination signal, an inverting input terminal connected to an intermediate node between the second resistor and the third resistor, and an output terminal connected to a control terminal of the first switching transistor, wherein the first switching transistor and the second resistor are used to output the first voltage signal.

[0012] According to another aspect of an embodiment of the present invention, there is provided a control method for a switching converter, the switching converter having at least one power switch for converting an input voltage into an output voltage, the control method including: comparing a current sampling signal representing an inductor current of the switching converter with a current reference signal to output a determination signal representing whether the current is excessive; generating a first voltage signal according to the output voltage sampling signal of the switching converter when the determination signal represents that the current sampling signal is greater than the current reference signal; converting the first voltage signal into a digital signal; pulling down a soft start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection; and generating a delay control signal according to the determination signal, the delay control signal being used to delay pulling up the soft start output signal for a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage of the switching converter follows the soft start output signal and returns to a normal value.

[0013] Optionally, pulling down the soft start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection includes: comparing the output voltage sampling signal with a reference signal or the soft start output signal to output the error signal; and comparing the current sampling signal with the error signal to obtain a turn-off signal for representing a turn-off moment of the power switch, wherein the predetermined voltage is higher than the output voltage sampling signal, and when the soft start output signal is pulled down to the predetermined voltage, the error signal remains at a logic high level to trigger the cycle-by-cycle current limiting protection.

[0014] Optionally, the control method further includes: generating a clock signal representing a switching period, and the delay control signal is further used to reduce the frequency of the clock signal when the current sampling signal is greater than the current reference signal.

[0015] Optionally, the control method further includes: performing an AND operation on the turn-off signal and a minimum turn-off time to obtain a reset signal for controlling the turn-off of the power switch; obtaining a pulse width modulation signal according to the clock signal and the reset signal; and driving the power switch according to the pulse width modulation signal.

[0016] In the control circuit and control method with current limiting protection for a switching converter according to an embodiment of the present invention, the control circuit includes an overcurrent comparator, a voltage stabilizing circuit, a decoding circuit, a digital soft start circuit, and a delay circuit. The overcurrent comparator compares a current sampling signal representing the inductor current of the switching converter with a current reference signal, and outputs a judgment signal representing whether the current is too large. When the judgment signal represents that the current sampling signal is greater than the current reference signal, the voltage stabilizing circuit generates a first voltage signal according to the output voltage sampling signal of the switching converter, converts the first voltage signal into a digital signal through the decoding circuit, and pulls down the soft start output signal of the digital soft start circuit to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection. At the same time, the delay circuit generates a delay control signal according to the judgment signal, and the delay control signal restores the pull-up of the soft start output signal after a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage slowly recovers to the normal value following the soft start output signal, avoiding the non-linear overshoot of the output voltage during the overcurrent recovery process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Through the following description of the embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features, and advantages of the present invention will become more apparent. In the drawings:

[0018] Figure 1 shows a circuit schematic diagram of a switching converter according to an embodiment of the present invention;

[0019] Figure 2 shows Figure 1 a circuit schematic diagram of the voltage stabilizing circuit in;

[0020] Figure 3 shows a schematic waveform diagram during overcurrent and recovery of the switching converter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the respective drawings, the same elements are denoted by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0022] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuits. When an element or circuit is said to be "connected to" another element or when an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there may be intermediate elements, and the connection between the elements can be physical, logical, or a combination thereof. In contrast, when an element is said to be "directly coupled to" or "directly connected to" another element, it means there are no intermediate elements between the two.

[0023] In the context of the present application, when a transistor is in the "off state" or "off", the transistor blocks current and / or substantially does not conduct current. In contrast, when the transistor is in the "on state" or "on", the transistor is capable of significantly conducting current. For example, in one embodiment, a high-voltage transistor includes an N-channel metal-oxide-semiconductor (NMOS) field-effect transistor (FET), where a high voltage is provided between a first terminal (i.e., the drain) and a second terminal (i.e., the source) of the transistor. In some embodiments, when adjusting the energy supplied to a load, an integrated controller circuit can be used to drive a power switch. Additionally, for the purposes of the present disclosure, "ground" or "ground potential" in this application refers to the following reference voltage or potential, relative to which all other voltages or potentials of an electronic circuit or an integrated circuit (IC) are defined or measured.

[0024] Figure 2 A circuit schematic diagram of a switching converter according to an embodiment of the present invention is shown. As Figure 2 shown, the switching converter 100 includes an inductor Lx, a power switch M0, and a rectifier diode D0. The first end of the power switch M0 receives an input voltage Vin, and the second end is connected to one end of the inductor Lx. The other end of the inductor L is connected to the output end of the switching converter 100, and the output end of the switching converter 100 is used to provide an output voltage Vout. An output capacitor Co is connected between the output end of the switching converter 100 and the ground terminal. The first end of the rectifier diode D0 is connected to the other end of the inductor Lx, and the second end is connected to the ground terminal. However, those skilled in the art can understand that without departing from the principles of the present invention, the rectifier diode D0 can be replaced by a synchronous switching element, and the result is usually a reduction in the power loss of the switching converter.

[0025] At the common terminal of the power switch M0 and the inductor Lx, the current flowing through the power switch M0 is sampled by the current sampling circuit 111 to obtain a current sampling signal IL_sen. The voltage sampling circuit consists of a resistor RH and a resistor RL and is used to obtain an output voltage sampling signal FB. The output voltage sampling signal FB, the reference voltage REF, and the soft start output signal Vss are respectively input to the inverting input terminal and two non-inverting input terminals of the error amplifier 112, and an error signal Vea is obtained through comparison. The PWM comparator 113 compares the error signal Vea with the current sampling signal IL_sen to obtain a turn-off signal characterizing the turn-off moment of the power switch M0. The AND gate 114 performs an AND operation on the turn-off signal and the minimum on-time to obtain a final reset signal Rst, which is used to turn off the power switch M0. The power switch M0 is, for example, an N-type MOS transistor. Those skilled in the art can understand that the power switch M0 can also be various other types of transistors, such as P-type MOS transistors, NPN Darlington transistors, NPN bipolar transistors, PNP bipolar transistors, etc.

[0026] Optionally, the control circuit 110 of this embodiment further includes a minimum on-time control circuit 115, and the minimum on-time control circuit 115 is used to generate the minimum on-time.

[0027] The oscillator 116 is used to generate a clock signal CLK characterizing the switching period. This clock signal ultimately serves as a turn-on signal for controlling the conduction of the power switch M0. The clock signal CLK and the reset signal Rst are respectively input to the set terminal and the reset terminal of the RS flip-flop 117, and a PWM signal (Pulse width modulation signal) is output to the drive circuit 118. The drive circuit 118 drives the power switch M0 according to the received PWM signal.

[0028] The control circuit 110 of the present invention further includes an overcurrent comparator 119, a voltage regulation circuit 121, a decoding circuit 122, a digital soft-start circuit 123, and a delay circuit 124 to implement overcurrent protection for the inductor current and linearly restore the output voltage after overcurrent recovery. Among them, the overcurrent comparator 119 receives the current sampling signal IL_sen, compares the current sampling signal IL_sen with the current reference signal Vth, and outputs a judgment signal Vj indicating whether the current is too large. When the current sampling signal IL_sen is greater than the overcurrent reference signal Vth, the judgment signal Vj is in an effective state. The voltage regulation circuit 121 is configured to generate a first voltage signal V1 according to the output voltage signal FB when the judgment signal Vj is in an effective state, and provide it to the decoding circuit 122. The decoding circuit 122 converts the received first voltage signal V1 into a digital signal, and this digital signal is used to set the soft-start output signal Vss output by the digital soft-start circuit 123, and pull down the soft-start output signal Vss to a predetermined voltage to trigger cycle-by-cycle current limiting protection.

[0029] The specific implementation is as follows: This predetermined voltage is higher than the output voltage sampling signal FB of the switching converter by a fixed voltage. Therefore, when the soft-start output signal is pulled down to the predetermined voltage, the error signal Vea remains at a logic high level. When the current sampling signal IL_sen rises to the error signal Vea, the power switch M0 is turned off. Until the next turn-on moment arrives, the power switch M0 is turned on again. If the current sampling signal IL_sen is greater than the error signal Vea again, the power switch M0 is turned off again. The above process is continuously repeated until the current sampling signal IL_sen is less than the current reference signal Vth.

[0030] In addition, when the load recovers, the error signal Vea needs to release the residual voltage, which will cause a non-linear overshoot of the output voltage Vout. Therefore, the delay circuit 124 of this embodiment also generates a delay control signal ocl_d according to the effective state of the judgment signal Vj to reduce the frequency of the clock signal CLK of the oscillator 116, and delay for a period of time before restoring the pull-up of the soft-start output signal Vss when the current sampling signal IL_sen is lower than the current reference signal Vth, so that the soft-start output signal Vss slowly climbs back to the normal operating voltage from the predetermined voltage, so that the output voltage Vout of the switching converter follows the soft-start output signal Vss and slowly recovers to the normal value.

[0031] Optionally, the voltage regulation circuit 121 is implemented by, for example, a low-dropout linear regulator, refer to Figure 2, in one embodiment, the voltage stabilizing circuit 121 includes resistors R1 - R3, a switching transistor M1, and a comparator 201. Among them, resistor R1, switching transistor M1, resistor R2, and resistor R3 are sequentially connected between the power supply voltage VCC and the ground terminal. Two non-inverting input terminals of the comparator 201 respectively receive the output voltage sampling signal FB and the judgment signal Vj, the inverting input terminal is connected to the intermediate node of resistor R2 and R3, and the output terminal is connected to the control terminal of the switching transistor M1. The intermediate node of the switching transistor M1 and resistor R2 is used to output the first voltage signal V1. When the judgment signal Vj is in the valid state, the voltage stabilizing circuit 121 is turned on, and the first voltage signal V1 can be obtained through the following formula:

[0032]

[0033] Wherein, VFB in the formula represents the voltage value of the output voltage sampling signal FB, R2 and R3 respectively represent the resistance values of resistor R2 and R3, and the voltage value of the first voltage signal V1 always changes following the output voltage sampling signal FB.

[0034] Figure 3 Fig. shows a schematic waveform diagram during overcurrent and recovery of the switching converter according to an embodiment of the present invention. The following combines Figure 1 and Figure 3 to describe in detail the current limiting principle of the switching converter according to an embodiment of the present invention.

[0035] As Figure 3 shown, at time t1, the load ILoad is too heavy, and the judgment signal Vj output by the overcurrent comparator 119 flips to the logic high level (i.e., the valid state). The voltage stabilizing circuit 121 and the decoding circuit 122 set the soft start output signal Vss output by the digital soft start circuit 123 to a predetermined voltage according to the judgment signal Vj in this valid state, thereby pulling down the soft start output signal Vss. Since this predetermined voltage is higher than the output voltage sampling signal FB of the switching converter by a fixed voltage, the error signal Vea output by the error amplifier 112 is pulled up to the logic high level at this time, triggering cycle-by-cycle current limiting protection. At the same time, the delay control signal Ocl_d flips to the logic high level, reducing the operating frequency of the system; at time t2, the load ILoad returns to normal. At this time, the voltage of the error signal Vea needs to be released, which will cause a non-linear overshoot of the output voltage Vout. Therefore, after the delay control signal Ocl_d delays for a predetermined time, the pull-up of the soft start output signal Vss is restored at time t3, so that the soft start output signal Vss slowly climbs from the predetermined voltage to the normal operating voltage again, so that the output voltage Vout follows the soft start output signal Vss and slowly returns to the normal value, avoiding overshoot of the output voltage Vout.

[0036] In the above embodiment, although combined with Figure 1A buck - type topology switching converter is described. However, it can be understood that the control circuit with current - limiting protection in the embodiments of the present invention can also be applied to switching converters of other topologies, including but not limited to buck - type, boost - type, buck - boost - type, non - inverter buck - boost - type, forward - type, flyback - type and other topologies.

[0037] In summary, in the control circuit and control method with current - limiting protection for a switching converter in the embodiments of the present invention, the control circuit includes an over - current comparator, a voltage - stabilizing circuit, a decoding circuit, a digital soft - start circuit and a delay circuit. The over - current comparator compares a current sampling signal representing the inductor current of the switching converter with a current reference signal and outputs a judgment signal indicating whether the current is too large. When the judgment signal indicates that the current sampling signal is greater than the current reference signal, the voltage - stabilizing circuit generates a first voltage signal according to the output voltage sampling signal of the switching converter, converts the first voltage signal into a digital signal through the decoding circuit, and pulls down the soft - start output signal of the digital soft - start circuit to a predetermined voltage according to the digital signal to trigger cycle - by - cycle current - limiting protection. At the same time, the delay circuit generates a delay control signal according to the judgment signal, and the delay control signal restores the pull - up of the soft - start output signal after a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage slowly recovers to the normal value following the soft - start output signal, avoiding the non - linear overshoot of the output voltage during the over - current recovery process.

[0038] It should be noted that although in this text, a device is described as a certain N-channel or P-channel device, or a certain N-type or P-type doped region, those of ordinary skill in the art can understand that according to the present invention, complementary devices can also be realized. Those of ordinary skill in the art can understand that the conduction type refers to the mechanism by which conduction occurs, such as through hole or electron conduction. Therefore, the conduction type does not involve doping concentration but doping type, such as P-type or N-type. Those of ordinary skill in the art can understand that the words "during", "when", and "while" used in this text in relation to circuit operation are not strict terms indicating an action that occurs immediately at the start of an initiating action, but there may be some small but reasonable one or more delays between it and the reaction action initiated by the initiating action, such as various transmission delays, etc. The words "about" or "substantially" used in this text mean that an element value has a parameter that is expected to be close to the stated value or position. However, as is well known in the art, there are always small deviations that make it difficult for the value or position to be strictly the stated value. It has been appropriately determined in the art that a deviation of at least ten percent (10%) (for semiconductor doping concentration, at least twenty percent (20%)) is a reasonable deviation from the accurately described ideal target. When used in combination with a signal state, the actual voltage value or logical state of a signal (such as ")" or ")") depends on whether positive logic or negative logic is used.

[0039] In addition, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article, or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the existence of additional identical elements in the process, method, article, or device comprising the said element.

[0040] As described above with reference to the embodiments of the present invention, these embodiments do not describe all the details in detail, nor do they limit the invention to only the specific embodiments. Obviously, based on the above description, many modifications and variations can be made. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and its modifications. The protection scope of the present invention should be determined by the scope defined by the claims of the present invention.

Claims

1. A control circuit with current-limiting protection for a switching converter, the switching converter having at least one power switch for converting an input voltage into an output voltage, the control circuit comprising: An overcurrent comparator for comparing a current sampling signal representing the inductor current of the switching converter with a current reference signal and outputting a judgment signal representing whether the current is excessive; A voltage stabilizing circuit for generating a first voltage signal according to the output voltage sampling signal of the switching converter when the judgment signal represents that the current sampling signal is greater than the current reference signal; A decoding circuit for converting the first voltage signal into a digital signal; A digital soft-start circuit for pulling down a soft-start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current-limiting protection; And A delay circuit for generating a delay control signal according to the judgment signal, the delay control signal being used to delay the pull-up of the soft-start output signal for a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage of the switching converter follows the soft-start output signal and returns to a normal value.

2. The control circuit according to claim 1, wherein, Further comprising: An error amplifier having an inverting input terminal for receiving the output voltage sampling signal, a first non-inverting input terminal for receiving a reference signal, a second non-inverting input terminal for receiving the soft-start output signal, and an output terminal for outputting an error signal; And A PWM comparator for comparing the current sampling signal with the error signal to obtain a turn-off signal for representing the turn-off moment of the power switch, wherein the predetermined voltage is higher than the output voltage sampling signal, and when the soft-start output signal is pulled down to the predetermined voltage, the error signal remains at a logic high level to trigger the cycle-by-cycle current-limiting protection.

3. The control circuit according to claim 2, further comprising: An oscillator for generating a clock signal representing a switching period, and the delay control signal is further used to reduce the frequency of the clock signal when the current sampling signal is greater than the current reference signal.

4. The control circuit according to claim 3, further comprising: An AND gate for ANDing the turn-off signal with a minimum on-time to obtain a reset signal for controlling the turn-off of the power switch; An RS flip-flop having two input terminals respectively for receiving the clock signal and the reset signal and outputting a pulse width modulation signal; And A driving circuit for driving the power switch according to the pulse width modulation signal.

5. The control circuit according to claim 4, further comprising: A current sampling circuit for obtaining the current sampling signal by sampling the current flowing through the power switch and inputting the current sampling signal into the overcurrent comparator and the PWM comparator respectively.

6. The control circuit according to claim 1, wherein The voltage stabilizing circuit is implemented by a low-dropout linear regulator.

7. The voltage stabilizing circuit of the control circuit according to claim 6, comprising: A first resistor, a first switching transistor, a second resistor, and a third resistor connected in sequence between a power supply voltage and ground; And A first comparator having a first non-inverting input terminal for receiving the output voltage sampling signal, a second non-inverting input terminal for receiving the judgment signal, an inverting input terminal connected to an intermediate node of the second resistor and the third resistor, and an output terminal connected to a control terminal of the first switching transistor, wherein the first switching transistor and the second resistor are used to output the first voltage signal.

8. A control method for a switching converter, the switching converter having at least one power switch for converting an input voltage into an output voltage, the control method comprising: comparing a current sampling signal representing the inductor current of the switching converter with a current reference signal to output a judgment signal representing whether the current is too large; generating a first voltage signal according to the output voltage sampling signal of the switching converter when the judgment signal represents that the current sampling signal is greater than the current reference signal; converting the first voltage signal into a digital signal; pulling down a soft start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection; and generating a delay control signal according to the judgment signal, the delay control signal being used to delay the pull-up of the soft start output signal for a predetermined time when the current sampling signal is lower than the current reference signal, so that the output voltage of the switching converter follows the soft start output signal and returns to a normal value.

9. The control method according to claim 8, wherein, The pulling down the soft start output signal to a predetermined voltage according to the digital signal to trigger cycle-by-cycle current limiting protection includes: comparing the output voltage sampling signal with a reference signal or the soft start output signal to output an error signal; and comparing the current sampling signal with the error signal to obtain a turn-off signal for representing the turn-off moment of the power switch, wherein the predetermined voltage is higher than the output voltage sampling signal, and when the soft start output signal is pulled down to the predetermined voltage, the error signal remains at a logic high level to trigger the cycle-by-cycle current limiting protection.

10. The control method according to claim 9, further comprising: generating a clock signal representing a switching period, and the delay control signal is further used to reduce the frequency of the clock signal when the current sampling signal is greater than the current reference signal.

11. The control method according to claim 10, further comprising: performing an AND operation on the turn-off signal and a minimum turn-off time to obtain a reset signal for controlling the turn-off of the power switch; obtaining a pulse width modulation signal according to the clock signal and the reset signal; and driving the power switch according to the pulse width modulation signal.

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