Antenna status detection circuit and electronic equipment

Abstract

This invention provides an antenna state detection circuit and electronic device, relating to the antenna field. The antenna state detection circuit includes a gating circuit, a switching circuit, and a voltage divider circuit. The antenna under test is electrically connected sequentially to the gating circuit, the switching circuit, and the voltage divider circuit. One end of the switching circuit and the gating circuit form a first detection node. One end of the voltage divider circuit is connected to a first DC power supply, and the other end is electrically connected to the other end of the switching circuit to form a second detection node. When the antenna under test is short-circuited, the voltage difference between the first DC power supply and the first detection node is less than a preset value, causing the switching circuit to turn off and the second detection node to be at a high level. Therefore, when a high-level signal is detected at the second detection node, it can be determined that the antenna under test is in a short-circuit state.

Description

Technical Field

[0001] This invention relates to the field of antennas, and more specifically, to an antenna status detection circuit and electronic device. Background Technology

[0002] An antenna is a metal device used to transmit and receive radio waves; simply put, it's an arrangement of rods and wires. Antennas have a wide range of applications; they are needed wherever electromagnetic waves are used to transmit information, such as in broadcasting, television, remote sensing toys, mobile communications, wireless internet access, logistics and express delivery tracking services, and electronic warfare.

[0003] Sometimes, due to external factors, the antenna in a device may short-circuit, which can easily prevent the antenna from functioning properly. Therefore, it is necessary to perform short-circuit testing on the antenna.

[0004] In the existing technology, short-circuit detection of antennas is achieved by using the short-circuit detection function built into the low dropout regulator (LDO). This type of LDO with detection function is not only expensive, but also increases the static power consumption of the circuit. Summary of the Invention

[0005] The purpose of this invention is to provide an antenna status detection circuit and electronic device that can improve the problems existing in the prior art.

[0006] The embodiments of the present invention can be implemented as follows:

[0007] In a first aspect, the present invention provides an antenna state detection circuit, including a gating circuit, a switching circuit, and a voltage divider circuit;

[0008] The antenna under test is electrically connected in sequence to the gating circuit, the switching circuit, and the voltage divider circuit; one end of the switching circuit and the gating circuit form a first detection node; one end of the voltage divider circuit is connected to a first DC power supply, and the other end is electrically connected to the other end of the switching circuit to form a second detection node;

[0009] When the antenna under test is short-circuited, the voltage difference between the first DC power supply and the first detection node is less than a preset value, causing the switching circuit to be turned off and the second detection node to be at a high level.

[0010] In an optional embodiment, the gating circuit includes a first gating circuit and a second gating circuit; the first gating circuit and the second gating circuit are connected in parallel between the antenna under test and the switching circuit, and the first gating circuit and the second gating circuit together with the switching circuit form the first detection node;

[0011] When the antenna under test is short-circuited to ground, the first gating circuit is in the off state, and the second gating circuit outputs a first level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switching circuit is off, and the second detection node is at a high level.

[0012] In an optional embodiment, the gating circuit includes a first gating circuit and a second gating circuit; the first gating circuit and the second gating circuit are connected in parallel between the antenna under test and the switching circuit, and the first gating circuit and the second gating circuit together with the switching circuit form the first detection node;

[0013] When the antenna under test is short-circuited by the external power supply voltage, the second gating circuit is in the off state, and the first gating circuit outputs a second level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switching circuit is off, and the second detection node is at a high level.

[0014] In an optional embodiment, the gating circuit includes a first gating circuit and a second gating circuit; the first gating circuit and the second gating circuit are connected in parallel between the antenna under test and the switching circuit, and the first gating circuit and the second gating circuit together with the switching circuit form the first detection node;

[0015] When the antenna under test is open, the second gating circuit is in the off state, and the first gating circuit outputs a third level at the first detection node; the voltage difference between the first detection node and the first DC power supply is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at a low level.

[0016] In an optional embodiment, the gating circuit includes a first gating circuit and a second gating circuit; the first gating circuit and the second gating circuit are connected in parallel between the antenna under test and the switching circuit, and the first gating circuit and the second gating circuit together with the switching circuit form the first detection node;

[0017] When the antenna under test is connected normally, the first gating circuit is in the off state, and the second gating circuit outputs the fourth level at the first detection node; the voltage difference between the first DC power supply and the first detection node is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at the intermediate level.

[0018] In an optional embodiment, the first gating circuit includes a first voltage divider unit and a first switching unit, and the second gating circuit includes a second voltage divider unit and a second switching unit;

[0019] The first voltage divider unit and the first switch unit are connected in series between the antenna under test and the switch circuit; the second voltage divider unit and the second switch unit are connected in series between the antenna under test and the switch circuit; the first switch unit and the second switch unit together with the switch circuit form the first detection node.

[0020] In an optional embodiment, when the antenna under test is short-circuited to ground, the first switching unit is in the off state, and the second switching unit outputs the first level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switching circuit is off, and the second detection node is at the high level.

[0021] In an optional embodiment, when the antenna under test is short-circuited to the external power supply voltage, the second switching unit is in the off state, and the first switching unit outputs the second level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switching circuit is off, and the second detection node is at a high level.

[0022] In an optional embodiment, when the antenna under test is open-circuited, the second switching unit is in the off state, and the first switching unit outputs the third level at the first detection node; the voltage difference between the first DC power supply and the first detection node is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at a low level.

[0023] In an optional embodiment, when the antenna under test is normally connected, the first switching unit is in the off state, and the second switching unit outputs the fourth level at the first detection node; the voltage difference between the first DC power supply and the first detection node is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at the intermediate level.

[0024] In an optional embodiment, the antenna under test is grounded through a ground detection resistor; the first voltage divider unit includes a first resistor and a second resistor, and the first switching unit includes a third resistor and a first transistor;

[0025] One end of the first resistor is electrically connected between the antenna under test and the ground detection resistor, and the other end is grounded through the second resistor;

[0026] The base of the first transistor is electrically connected between the first resistor and the second resistor, the collector of the first transistor is connected to the second DC power supply through the third resistor, and the emitter of the first transistor is electrically connected to the second switching unit and the switching circuit to form the first detection node.

[0027] In an optional embodiment, the first transistor is an NPN transistor.

[0028] In an optional embodiment, the second voltage divider unit includes a fourth resistor and a fifth resistor, and the second switching unit includes a sixth resistor and a second transistor;

[0029] One end of the fourth resistor is connected between the antenna under test and the ground detection resistor, and the other end is connected to the first DC power supply through the fifth resistor.

[0030] The base of the second transistor is electrically connected between the fourth and fifth resistors through the sixth resistor. The emitter of the second transistor is connected to the first DC power supply. The collector of the second transistor is electrically connected to the emitter of the first transistor and the switching circuit to form the first detection node.

[0031] In an optional embodiment, the second transistor is a PNP transistor.

[0032] In an optional embodiment, the switching circuit includes a seventh resistor and a diode, and the voltage divider circuit includes an eighth resistor;

[0033] The cathode of the diode is grounded through the seventh resistor, and the emitter of the first transistor, the collector of the second transistor, and the cathode of the diode are electrically connected to form the first detection node; the first DC power supply is electrically connected to the anode of the diode through the eighth resistor to form the second detection node.

[0034] In an optional embodiment, when the antenna under test is short-circuited to ground, the base voltage of the first transistor is zero, causing the first transistor to be in a cutoff state; the voltage of the first DC power supply is divided by the fifth resistor and the sixth resistor, and the base voltage of the second transistor is pulled down, causing the second transistor to saturate and conduct.

[0035] The collector of the second transistor outputs the first level to the first detection node;

[0036] The difference between the anode voltage of the diode and the first level is lower than the forward voltage of the diode, causing the diode to be turned off and the second detection node to output a high level.

[0037] In an optional embodiment, when the antenna under test is short-circuited to the external power supply voltage, the external power supply voltage pulls up the base voltage of the second transistor, causing the second transistor to turn off; the base voltage of the first transistor is pulled up by the external power supply voltage, causing the first transistor to saturate and conduct.

[0038] The emitter of the first transistor outputs the second voltage level to the first detection node;

[0039] The difference between the anode voltage of the diode and the second level is lower than the forward voltage of the diode, causing the diode to be turned off and the second detection node to output a high level.

[0040] In an optional embodiment, when the antenna under test is open-circuited, the base current of the second transistor is less than the on-state current of the second transistor, and the second transistor is turned off.

[0041] The voltage of the first DC power supply is divided by the fifth resistor, the fourth resistor, the first resistor and the second resistor to obtain the base voltage of the first transistor. After voltage clamping, the emitter of the first transistor outputs the third level to the first detection node.

[0042] The difference between the anode voltage of the diode and the third level is greater than the forward voltage of the diode, causing the diode to conduct and the second detection node to output a low level.

[0043] In an optional embodiment, when the antenna under test is normally connected, the second transistor is saturated and turned on, and the collector of the second transistor outputs the fourth level to the first detection node;

[0044] The voltage of the first DC power supply is divided by the fifth resistor, the fourth resistor, the first resistor, the second resistor and the ground detection resistor to obtain the base voltage of the first transistor. The difference between the base voltage of the first transistor and the fourth level is lower than the turn-on voltage of the first transistor, so the first transistor is turned off.

[0045] The difference between the anode voltage of the diode and the fourth level is greater than the forward voltage of the diode, causing the diode to conduct and the second detection node to output an intermediate level.

[0046] Secondly, the present invention also provides an electronic device including the antenna state detection circuit described in any of the above embodiments.

[0047] Compared with the prior art, this invention provides an antenna state detection circuit and electronic device. The antenna state detection circuit includes a gating circuit, a switching circuit, and a voltage divider circuit. The antenna under test is electrically connected to the gating circuit, the switching circuit, and the voltage divider circuit in sequence. One end of the switching circuit and the gating circuit form a first detection node. One end of the voltage divider circuit is connected to a first DC power supply, and the other end is electrically connected to the other end of the switching circuit to form a second detection node. When the antenna under test is short-circuited, the voltage difference between the first DC power supply and the first detection node is less than a preset value, causing the switching circuit to be turned off, and the second detection node to be at a high level. Therefore, when a high-level signal is detected at the second detection node, it can be determined that the antenna under test is in a short-circuit state. Attached Figure Description

[0048] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0049] Figure 1 This is one of the structural schematic diagrams of an antenna state detection circuit provided in an embodiment of the present invention.

[0050] Figure 2 This is a second schematic diagram of an antenna state detection circuit provided in an embodiment of the present invention.

[0051] Figure 3 This is the third schematic diagram of an antenna state detection circuit provided in an embodiment of the present invention.

[0052] Figure 4 This is the fourth schematic diagram of an antenna state detection circuit provided in an embodiment of the present invention.

[0053] Figure 5 This is the fifth schematic diagram of an antenna state detection circuit provided in an embodiment of the present invention.

[0054] Icons: 1000 - Antenna status detection circuit; 10 - Antenna under test; 20 - Gating circuit; 210 - First gating circuit; 220 - Second gating circuit; 211 - First voltage divider unit; 212 - First switching unit; 221 - Second voltage divider unit; 222 - Second switching unit; 30 - Switching circuit; 40 - Voltage divider circuit. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0056] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0057] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0058] In the description of this invention, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used to facilitate the description of this invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0059] Furthermore, the terms "first," "second," and "third" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0060] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0061] As mentioned above, using the built-in short-circuit detection function of the LDO to detect short circuits in the antenna increases the static power consumption of the circuit, and the cost of LDOs with short-circuit detection is also relatively high. Furthermore, integrated circuits are subject to procurement risks; if a component is unavailable, the PCB (Printed Circuit Board) needs to be modified to use a different LDO as a replacement, resulting in poor versatility.

[0062] Please see Figure 1 , Figure 1 This is a schematic diagram of the antenna state detection circuit provided in this embodiment. The antenna state detection circuit 1000 includes a gating circuit 20, a switching circuit 30, and a voltage divider circuit 40.

[0063] The antenna under test (ANT) 10 is electrically connected in sequence to the gating circuit 20, the switching circuit 30 and the voltage divider circuit 40; one end of the switching circuit 30 and the gating circuit 20 form the first detection node T1; one end of the voltage divider circuit 40 is connected to the first DC power supply VCC1, and the other end is electrically connected to the other end of the switching circuit 30 to form the second detection node T2.

[0064] When the antenna under test 10 is short-circuited, the voltage difference between the first DC power supply VCC1 and the first detection node T1 is less than the preset value, which causes the switching circuit 30 to be cut off and the second detection node T2 to be at a high level.

[0065] It is understandable that the preset value can represent the conduction threshold of the switching circuit 30.

[0066] The antenna state detection circuit provided in this embodiment of the invention, when the antenna under test 10 is short-circuited, the voltage difference between the first DC power supply VCC1 and the first detection node T1 will be less than a preset value, causing the switching circuit 30 to be turned off and the second detection node T2 to be at a high level. Therefore, when a high-level signal is detected at the second detection node T2, it can be determined that the antenna under test 10 is in a short-circuit state.

[0067] Typically, the antenna under test 10 of the device will exist in three states: short circuit, open circuit, and normal connection. The short circuit state can be caused by two situations: a ground short circuit and connection to an external power supply voltage. The working principle of the antenna state detection circuit 1000 when the antenna under test 10 is in different states is described below.

[0068] In an optional implementation, please refer to Figure 2 The gating circuit 20 may include a first gating circuit 210 and a second gating circuit 220; the first gating circuit 210 and the second gating circuit 220 are connected in parallel between the antenna under test 10 and the switching circuit 30, and the first gating circuit 210 and the second gating circuit 220 and the switching circuit 30 form a first detection node T1.

[0069] When the antenna under test 10 is short-circuited to ground, the first gating circuit 210 is in the off state, and the second gating circuit 220 outputs the first level at the first detection node T1; the voltage difference between the first DC power supply VCC1 and the first detection node T1 is less than the preset value, so that the switching circuit 30 is turned off, and the second detection node T2 is at the high level.

[0070] When the antenna under test 10 is short-circuited by the external power supply voltage, the second gating circuit 220 is in the off state, and the first gating circuit 210 outputs the second level at the first detection node T1; the voltage difference between the first DC power supply VCC1 and the first detection node T1 is less than the preset value, so that the switching circuit 30 is cut off, and the second detection node T2 is at the high level.

[0071] When the antenna under test 10 is open, the second gating circuit 220 is in the off state, and the first gating circuit 210 outputs the third level at the first detection node T1. The voltage difference between the first detection node T1 and the first DC power supply VCC1 is greater than the preset value, which makes the switching circuit 30 conduct and the second detection node T2 is at a low level.

[0072] When the antenna under test 10 is connected normally, the first gating circuit 210 is in the off state, and the second gating circuit 220 outputs the fourth level at the first detection node T1; the voltage difference between the first DC power supply VCC1 and the first detection node T1 is greater than the preset value, so that the switching circuit 30 is turned on, and the second detection node T2 is at the intermediate level.

[0073] Therefore, when a high-level signal is detected at the second detection node T2, it can be determined that the antenna under test 10 is in a short-circuit state; when a low-level signal is detected at the second detection node T2, it can be determined that the antenna under test 10 is in an open-circuit state; when an intermediate-level signal is detected at the second detection node T2, it can be determined that the antenna under test 10 is in a normal connection state.

[0074] In an optional implementation, please refer to Figure 3 The first gating circuit 210 includes a first voltage divider unit 211 and a first switching unit 212, and the second gating circuit 220 includes a second voltage divider unit 221 and a second switching unit 222.

[0075] The first voltage divider unit 211 and the first switch unit 212 are connected in series between the antenna under test 10 and the switch circuit 30; the second voltage divider unit 221 and the second switch unit 222 are connected in series between the antenna under test 10 and the switch circuit 30; the first switch unit 212 and the second switch unit 222 together with the switch circuit 30 form the first detection node T1.

[0076] When the antenna under test 10 is short-circuited to ground, the first switching unit 212 is in the off state, and the second switching unit 222 outputs the first level at the first detection node T1; the voltage difference between the first DC power supply VCC1 and the first detection node T1 is less than the preset value, so that the switching circuit 30 is cut off, and the second detection node T2 is at the high level.

[0077] When the antenna under test 10 is short-circuited by the external power supply voltage, the second switch unit 222 is in the off state, and the first switch unit 212 outputs the second level at the first detection node T1; the voltage difference between the first DC power supply VCC1 and the first detection node T1 is less than the preset value, so that the switch circuit 30 is cut off, and the second detection node T2 is at the high level.

[0078] When the antenna under test 10 is open, the second switch unit 222 is in the off state, and the first switch unit 212 outputs the third level at the first detection node T1. The voltage difference between the first DC power supply VCC1 and the first detection node T1 is greater than the preset value, which makes the switch circuit 30 conduct and the second detection node T2 is at a low level.

[0079] When the antenna under test 10 is connected normally, the first switch unit 212 is in the off state, and the second switch unit 222 outputs the fourth level at the first detection node T1. The voltage difference between the first DC power supply VCC1 and the first detection node T1 is greater than the preset value, which makes the switch circuit 30 conduct, and the second detection node T2 is at the intermediate level.

[0080] In an optional implementation, please refer to Figure 4 , Figure 4 The specific circuit configuration of the antenna status detection circuit 1000 is shown. The antenna under test 10 is usually connected to a ground detection resistor Rt, and the antenna under test 10 is grounded through the ground detection resistor Rt.

[0081] The first voltage divider unit 211 includes a first resistor R1 and a second resistor R2, and the first switching unit 212 includes a third resistor R3 and a first transistor Q1. One end of the first resistor R1 is electrically connected between the antenna under test 10 and the ground detection resistor Rt, and the other end is grounded through the second resistor R2. The base of the first transistor Q1 is electrically connected between the first resistor R1 and the second resistor R2, the collector of the first transistor Q1 is connected to the second DC power supply VCC2 through the third resistor R3, and the emitter of the first transistor Q1 is electrically connected to the second switching unit 222 and the switching circuit 30 to form the first detection node T1.

[0082] Optionally, the first transistor Q1 can be an NPN transistor.

[0083] The second voltage divider unit 221 includes a fourth resistor R4 and a fifth resistor R5, and the second switching unit 222 includes a sixth resistor R6 and a second transistor Q2. One end of the fourth resistor R4 is connected between the antenna under test 10 and the ground detection resistor Rt, and the other end is connected to the first DC power supply VCC1 through the fifth resistor R5. The base of the second transistor Q2 is electrically connected between the fourth resistor R4 and the fifth resistor R5 through the sixth resistor R6. The emitter of the second transistor Q2 is connected to the first DC power supply VCC1. The collector of the second transistor Q2 is electrically connected to the emitter of the first transistor Q1 and the switching circuit 30 to form the first detection node T1.

[0084] Optionally, the second transistor Q2 is a PNP type transistor.

[0085] In one optional example, the switching circuit 30 includes a seventh resistor R7 and a diode D1, and the voltage divider circuit 40 includes an eighth resistor R8; the cathode of the diode D1 is grounded through the seventh resistor R7, and the emitter of the first transistor Q1, the collector of the second transistor Q2, and the cathode of the diode D1 are electrically connected to form a first detection node T1; the first DC power supply VCC1 is electrically connected to the anode of the diode D1 through the eighth resistor R8 to form a second detection node T2.

[0086] In another alternative example, the switching circuit 30 can also be composed of a transistor and its peripheral circuitry.

[0087] At this point, the preset value is the forward voltage of diode D1, combined with... Figure 5 The working principle of the antenna status detection circuit 1000 is described below.

[0088] When the antenna under test 10 is short-circuited to ground, the base voltage of the first transistor Q1 is zero, causing it to be in the off state. The voltage of the first DC power supply VCC1 is divided by the fifth resistor R5 and the sixth resistor R6, pulling down the base voltage of the second transistor Q2, causing it to saturate and conduct. At this time, the collector of the second transistor Q2 outputs a first level to the first detection node T1. The difference between the anode voltage of diode D1 and the first level is lower than the forward voltage of diode D1, causing diode D1 to be cut off and the second detection node T2 to output a high level.

[0089] When the antenna under test 10 is short-circuited by the external power supply voltage, the external power supply voltage pulls up the base voltage of the second transistor Q2, causing the second transistor Q2 to be cut off; the base voltage of the first transistor Q1 is pulled up by the external power supply voltage, causing the first transistor 2Q to be saturated and turned on; the emitter of the first transistor Q1 outputs the second level to the first detection node T1; the difference between the anode voltage of diode D1 and the second level is lower than the forward voltage of diode D1, causing diode D1 to be cut off and the second detection node T2 outputs a high level.

[0090] When the antenna under test 10 is open, the base current of the second transistor Q2 is less than the conduction current of the second transistor Q2, and the second transistor is cut off. The voltage of the first DC power supply VCC1 is divided by the fifth resistor R5, the fourth resistor R4, the first resistor R1 and the second resistor R2 to obtain the base voltage of the first transistor Q1. After voltage clamping, the emitter of the first transistor Q1 outputs the third level to the first detection node T1. The difference between the anode voltage of diode D1 and the third level is greater than the conduction voltage of diode D1, causing diode D1 to conduct and the second detection node T2 to output a low level.

[0091] When the antenna under test 10 is connected normally, the second transistor Q2 is saturated and conducts, and the collector of the second transistor Q2 outputs the fourth level to the first detection node T1; the voltage of the first DC power supply VCC1 is divided by the fifth resistor R5, the fourth resistor R4, the first resistor R1, the second resistor R2 and the ground detection resistor Rt to obtain the base voltage of the first transistor Q1. The difference between the base voltage of the first transistor Q1 and the fourth level is lower than the conduction voltage of the first transistor Q1, so the first transistor Q1 is cut off; the difference between the anode voltage of diode D1 and the fourth level is greater than the conduction voltage of diode D1, so diode D1 conducts and the second detection node T2 outputs the intermediate level.

[0092] Combination Figure 4 Please see Figure 5 The following is an example of the various circuit elements used in the antenna state detection circuit 1000, and the working principle of the antenna state detection circuit 1000 is introduced in conjunction with this example.

[0093] The resistance values ​​of R1 to R8 are 100K, 60.4K, 100K, 10K, 20K, 10K, 1K, and 100K respectively, and Rt is 60.4K. Assume VCC1 = 3.3V and VCC2 = 5V. The second detection node T2 can also be connected to the GPIO_ADC interface of the GPIO interface with analog voltage detection function on the MCU (Microcontroller Unit). The MCU can be a dedicated MCU for detecting the status of the antenna under test 10, or it can be said that the MCU is integrated inside the device containing the antenna under test 10.

[0094] ① When the antenna under test 10 is short-circuited to GND for some reason (i.e., the antenna under test 10 is short-circuited to ground), Figure 5Taking the annotation parameters as an example, the voltage of 3.3V is divided by R5 and R6. The base voltage of Q2 will be pulled down. The voltage difference between E and B is 0.7V, and the voltage difference between E and C is 0.2V. U2E > U2B, U2C > U2B. At this time, Q2 is saturated and conducting. At this time, the base current IB of Q2 is about 90uA, and the emitter current IE is about 3.3mA. And the grounding of the待测 antenna 10 will cause the base level UIB of Q1 to be 0V. U1B < U1C. At this time, Q1 is cut off.

[0095] Therefore, the saturation current (emitter current) of Q2 flows through R7, and the first level at the second detection node (which is also the cathode voltage of D1) is 3.2V. At this time, the voltage difference between the anode voltage and the cathode voltage of D1 is not enough to reach the conduction voltage of D1, which is 0.2V. D1 is cut off, and the level at T2 (the anode voltage of D1) is the high level of 3.3V. That is, at this time, the MCU can measure a voltage of 3.3V at T2, identify it as a high level, and determine that the待测 antenna 10 is short-circuited.

[0096] ② When the antenna ANT is short-circuited to the external power supply voltage due to some reason (for example: the metal tip of the待测 antenna 10 touches the positive electrode of the battery due to installation operation errors), assume that the external power supply voltage VBAT is 12V. VBAT will pull up the base voltage U2B of Q2 to 9V. At this time, U2B > U2E, resulting in Q2 being cut off. VBAT will pull up the base level U1B of Q1 to 4V. Because of the B-E voltage clamping effect of Q1 (voltage clamping of 0.7V), the emitter voltage UIE of Q1 is clamped to 3.3V.

[0097] At this time, the second level at the first detection node (which is also the cathode voltage of D1) is 3.3V. At this time, the voltage difference between the anode voltage and the cathode voltage of D1 is not enough to reach the conduction voltage of D1, which is 0.2V. D1 is cut off, and the level at T2 (the anode voltage of D1) is the high level of 3.3V. That is, at this time, the MCU can measure a voltage of 3.3V at T2, identify it as a high level, and determine that the待测 antenna 10 is short-circuited.

[0098] ③ When the antenna is open-circuited, the connection between the待测 antenna 10 and Rt and the antenna status detection circuit 1000 is disconnected. The base current IB of Q2 is about 40pA, which is less than the conduction current of Q2, which is 50nA. Q2 is cut off. The voltage of 3.3V is divided by R5, R4, R1, and R2 to obtain the base voltage U1B of the first triode Q1 as 1V. After the voltage clamping effect, the emitter output of the first triode Q1 to the third level at the first detection node T1 is 0.3V.

[0099] At this time, the third level of the first detection node (which is also the cathode voltage of D1) is 0.3V. At this time, the difference between the anode voltage and the cathode voltage of D1 can reach the conduction voltage of D1, which is 0.2V. D1 conducts, and the level at T2 (the anode voltage of D1) is the low level of 0.5V. That is, at this time, the MCU can measure a voltage of 0.5V at T2, identify it as the low level, and determine that the antenna under test 10 is open.

[0100] ④ When the antenna is normally connected, the connection between the antenna under test 10 and Rt and the antenna status detection circuit 1000 is normal. After the 3.3V voltage is divided by R5, R4, R1, R2, and Rt, the base voltage U1B of Q1 is 0.7V, and U1B < U1C = U2C. At this time, Q1 is cut off; the base current IB of Q2 is 9uA, and the collector current IC is 1.8mA. Q2 is in the saturated conduction state. The fourth level at the first detection node T1 where the collector current IC of Q2 flows through R7 is 1.8V.

[0101] At this time, the fourth level of the first detection node (which is also the cathode voltage of D1) is 1.8V. At this time, the difference between the anode voltage and the cathode voltage of D1 can reach the conduction voltage of D1, which is 0.2V. D1 conducts, and the level at T2 (the anode voltage of D1) is the intermediate level of 2V. That is, at this time, the MCU can measure a voltage of 2V at T2, identify it as the intermediate level, and determine that the antenna under test 10 is normally connected.

[0102] The embodiment of the present invention also provides an electronic device, which may include the antenna status detection circuit 1000 in any one of the above embodiments.

[0103] In summary, the embodiment of the present invention provides an antenna status detection circuit and an electronic device. When the antenna under test is in different states, the first gating circuit or the second gating circuit will output a level at the first detection node. Based on the level of the first detection node, it can be determined whether the diode is in the conduction or cut-off state, so that the level of the second detection node is the high level when the antenna under test is short-circuited, the low level when the antenna under test is open, and the intermediate level when the antenna under test is normally connected. At the same time, the antenna status detection circuit has a simple composition, low cost, strong versatility, no risk of material shortage, and is convenient for realizing the open and short circuit detection of the antenna.

[0104] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An antenna state detection circuit, characterized by, The first gating circuit and the second gating circuit, a switching circuit and a voltage dividing circuit are included. The first gating circuit and the second gating circuit are connected in parallel between the antenna to be tested and the switching circuit, and the first gating circuit and the second gating circuit form a first detection node with one end of the switching circuit; one end of the voltage dividing circuit is connected to a first direct current power supply, and the other end is electrically connected to the other end of the switching circuit and forms a second detection node. When the antenna to be tested is short-circuited to ground, the first gating circuit is in a cut-off state, the second gating circuit outputs a first level at the first detection node; the voltage difference between the first direct current power supply and the first detection node is less than a preset value, so that the switching circuit is cut off, and the second detection node is at a high level. When the antenna to be tested is short-circuited to an external power supply voltage, the second gating circuit is in a cut-off state, the first gating circuit outputs a second level at the first detection node; the voltage difference between the first direct current power supply and the first detection node is less than the preset value, so that the switching circuit is cut off, and the second detection node is at a high level. The first gating circuit includes a first voltage dividing unit and a first switching unit, and the second gating circuit includes a second voltage dividing unit and a second switching unit; the first voltage dividing unit and the first switching unit are connected in series between the antenna to be tested and the switching circuit; the second voltage dividing unit and the second switching unit are connected in series between the antenna to be tested and the switching circuit; the first switching unit and the second switching unit form the first detection node with the switching circuit. The antenna to be tested is connected to ground through a ground detection resistor; the first voltage dividing unit includes a first resistor and a second resistor, and the first switching unit includes a third resistor and a first triode; one end of the first resistor is electrically connected between the antenna to be tested and the ground detection resistor, and the other end is connected to ground through the second resistor; the base of the first triode is electrically connected between the first resistor and the second resistor, the collector of the first triode is connected to a second direct current power supply through the third resistor, and the emitter of the first triode is electrically connected to the second switching unit and the switching circuit to form the first detection node.

2. The antenna status detection circuit of claim 1, wherein, When the antenna to be tested is open, the second gating circuit is in a cut-off state, the first gating circuit outputs a third level at the first detection node; the voltage difference between the first detection node and the first direct current power supply is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at a low level.

3. The antenna status detection circuit of claim 1, wherein, When the antenna to be tested is normally connected, the first gating circuit is in a cut-off state, the second gating circuit outputs a fourth level at the first detection node; the voltage difference between the first direct current power supply and the first detection node is greater than the preset value, so that the switching circuit is turned on, and the second detection node is at an intermediate level.

4. The antenna status detection circuit of claim 1, wherein, When the antenna under test is short-circuited to ground, the first switch unit is in an off state, the second switch unit outputs the first level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switch circuit is off, and the second detection node is in the high level.

5. The antenna status detection circuit of claim 1, wherein, When the antenna under test is short-circuited to the external power supply voltage, the second switch unit is in an off state, the first switch unit outputs the second level at the first detection node; the voltage difference between the first DC power supply and the first detection node is less than the preset value, so that the switch circuit is off, and the second detection node is in the high level.

6. The antenna status detection circuit of claim 1, wherein, When the antenna under test is open, the second switch unit is in an off state, the first switch unit outputs the third level at the first detection node; the voltage difference between the first DC power supply and the first detection node is greater than the preset value, so that the switch circuit is on, and the second detection node is in the low level.

7. The antenna status detection circuit of claim 1, wherein, When the antenna under test is normally connected, the first switch unit is in an off state, the second switch unit outputs the fourth level at the first detection node; the voltage difference between the first DC power supply and the first detection node is greater than the preset value, so that the switch circuit is on, and the second detection node is in the intermediate level.

8. The antenna status detection circuit of claim 1, wherein, The first transistor is an NPN type transistor.

9. The antenna status detection circuit of claim 1, wherein, The second voltage dividing unit comprises a fourth resistor and a fifth resistor, and the second switch unit comprises a sixth resistor and a second transistor; One end of the fourth resistor is connected between the antenna under test and the ground detection resistor, and the other end is connected to the first DC power supply through the fifth resistor; The base of the second transistor is electrically connected between the fourth resistor and the fifth resistor through the sixth resistor, the emitter of the second transistor is connected to the first DC power supply, and the collector of the second transistor is electrically connected to the emitter of the first transistor and the switch circuit to form the first detection node.

10. The antenna status detection circuit of claim 9, wherein, The second transistor is a PNP type transistor.

11. The antenna status detection circuit of claim 9, wherein, The switch circuit comprises a seventh resistor and a diode, and the voltage dividing circuit comprises an eighth resistor; The cathode of the diode is connected to ground through the seventh resistor, and the emitter of the first transistor, the collector of the second transistor and the cathode of the diode are electrically connected to form the first detection node; the first DC power supply is electrically connected to the anode of the diode through the eighth resistor and forms the second detection node.

12. The antenna status detection circuit of claim 11, wherein, When the antenna under test is short-circuited to ground, the base voltage of the first transistor is zero, so that the first transistor is in an off state; the voltage of the first DC power supply is divided by the fifth resistor and the sixth resistor, and the base voltage of the second transistor is pulled down, so that the second transistor is saturated and on; The collector of the second transistor outputs the first level to the first detection node; The difference between the anode voltage of the diode and the first level is lower than the conduction voltage of the diode, so that the diode is off and the second detection node outputs the high level.

13. The antenna status detection circuit of claim 11, wherein, When the antenna under test is short-circuited with the external power supply voltage, the external power supply voltage pulls up the base voltage of the second transistor so that the second transistor is cut off; the base voltage of the first transistor is pulled up by the external power supply voltage so that the first transistor is saturated and turned on; The emitter of the first transistor outputs the second level to the first detection node; The difference between the anode voltage of the diode and the second level is lower than the conduction voltage of the diode so that the diode is cut off and the second detection node outputs a high level.

14. The antenna status detection circuit of claim 11, wherein, When the antenna under test is open, the base current of the second transistor is less than the conduction current of the second transistor, and the second transistor is cut off; The voltage of the first DC power supply is divided by the fifth resistor, the fourth resistor, the first resistor and the second resistor to obtain the base voltage of the first transistor, and the emitter of the first transistor outputs a third level to the first detection node through voltage clamping; The difference between the anode voltage of the diode and the third level is greater than the conduction voltage of the diode so that the diode is turned on and the second detection node outputs a low level.

15. The antenna status detection circuit of claim 11, wherein, When the antenna under test is normally connected, the second transistor is saturated and turned on, and the collector of the second transistor outputs a fourth level to the first detection node; The voltage of the first DC power supply is divided by the fifth resistor, the fourth resistor, the first resistor, the second resistor and the ground detection resistor to obtain the base voltage of the first transistor, and the difference between the base voltage of the first transistor and the fourth level is lower than the conduction voltage of the first transistor, so that the first transistor is cut off; The difference between the anode voltage of the diode and the fourth level is greater than the conduction voltage of the diode so that the diode is turned on and the second detection node outputs an intermediate level.

16. An electronic device, comprising: The antenna state detection circuit of any one of claims 1-15. The antenna state detection circuit of any one of claims 1-15.

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