A high power efficiency ring oscillator that is insensitive to power supply disturbances
By adopting an inverter structure design in the ring oscillator, using the power supply sensitivity adjustment unit and switching current source, combined with the compensation mechanism of the varactor tube, the area and noise of the traditional ring oscillator under power supply noise and disturbance are solved. Problem, high power efficiency and small area ring oscillator is realized, expanding its application range.
Patent Information
- Application Number
- CN202211294541.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-21
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2042-10-21
AI Technical Summary
When traditional ring oscillators face power supply noise and disturbances, they usually lead to increased chip area, deterioration of phase noise and increased power consumption, and existing compensation methods cannot effectively solve these problems.
A ring oscillator based on an inverter structure is designed, using an odd number of unit circuits, each unit consisting of a power supply sensitivity adjustment unit, a gain unit, a switching current source and a varactor tube, through PMOS and NMOS common source amplifiers and Switch current source to adjust the power supply sensitivity, reduce the sensitivity to power supply noise, and compensate for the oscillation frequency changes through the varactor tube to avoid deterioration of phase noise.
A high-power efficiency ring oscillator is realized that is insensitive to power supply noise and disturbance, avoiding additional chip area and deteriorating phase noise, making full use of the advantages of the small area of the ring oscillator and insensitive to electromagnetic coupling, expanding its Application scope.
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Figure CN115632634B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of electronic circuits, and in particular to a low-power consumption clock amplifier circuit. Background Art
[0002] Traditional ring oscillators that are insensitive to power supply are generally implemented using linear regulators or power supply sensitivity compensation technologies. If a voltage stabilizer is used to implement this, a large capacitor is generally required for filtering, which greatly increases the area of the voltage stabilizer. At the same time, the voltage stabilizer requires an additional power supply voltage, which greatly increases the design complexity of the system and increases power consumption. If power supply sensitivity compensation is used, the existing compensation methods will deteriorate the phase noise or power consumption of the oscillator. There are also ring oscillators that use N-tube followers as the load of the N-tube common source stage to isolate the oscillation signal of the power supply and the oscillator. Similarly, the phase noise or power consumption of the oscillator will also deteriorate because of the inevitable waste of power consumption of the follower. The above methods will inevitably lead to an increase in the chip area, a reduction in the voltage margin of the oscillator, a deterioration of the oscillator phase noise, or a reduction in the power efficiency of the oscillator. Summary of the invention
[0003] In view of the shortcomings of the prior art, the present invention proposes a ring oscillator based on an inverter structure which is insensitive to power supply noise and disturbance. The specific technical solution is as follows:
[0004] A high power efficiency ring oscillator which is insensitive to power supply disturbances comprises an odd number of unit circuits, each unit gain circuit comprises a power supply sensitivity adjustment unit, a gain unit, an N-type switch current source and a varactor;
[0005] The gain unit comprises a PMOS common-source amplifier, the gate end of the PMOS common-source amplifier is connected to the input end of the unit gain circuit, the source end is connected to the power supply, and the drain end is connected to the output end of the unit gain circuit;
[0006] The power sensitivity adjustment unit comprises an NMOS common source amplifier with adjustable source degeneration resistance, wherein the gate terminal of the NMOS common source amplifier is connected to the input terminal of the unit gain circuit, the source terminal is connected to one end of the adjustable degeneration resistance, and the drain terminal is connected to the output terminal of the unit gain circuit; the other end of the adjustable degeneration resistance is grounded;
[0007] One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to a power supply. The capacitance value of the varactor increases continuously as the control voltage increases.
[0008] The input oscillation clock signal of the unit gain circuit is used as the switching signal of the N-type switching current source; the current output end of the N-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the N-type switching current source is connected to the control voltage of the ring oscillator; and the ground end of the N-type switching current source is grounded.
[0009] Furthermore, the N-type switch current source also includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
[0010] A high power efficiency ring oscillator which is insensitive to power supply disturbances comprises an odd number of unit circuits, each unit gain circuit comprises a power supply sensitivity adjustment unit, a gain unit, a P-type switching current source and a varactor;
[0011] The gain unit comprises an NMOS common-source amplifier, the gate end of the NMOS common-source amplifier is connected to the input end of the unit gain circuit, the source end is connected to the ground, and the drain end is connected to the output end of the unit gain circuit;
[0012] The power sensitivity adjustment unit comprises a PMOS common source amplifier with adjustable source degeneration resistance, wherein the gate end of the PMOS common source amplifier is connected to the input end of the unit gain circuit, the source end is connected to one end of the adjustable degeneration resistance, and the drain end is connected to the output end of the unit gain circuit; the other end of the adjustable degeneration resistance is connected to the power supply;
[0013] One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to a power supply. The capacitance value of the varactor increases continuously as the control voltage increases.
[0014] The input oscillation clock signal of the unit gain circuit is used as the switching signal of the P-type switching current source; the current output end of the P-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the P-type switching current source is connected to the control voltage of the ring oscillator; and the power supply end of the P-type switching current source is connected to the power supply.
[0015] Furthermore, the P-type switching current source also includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
[0016] The beneficial effects of the present invention are as follows:
[0017] The present invention proposes a ring oscillator based on an inverter structure that is insensitive to power supply noise and disturbance. In addition, the ring oscillator does not increase the chip area and does not deteriorate the phase noise and power consumption of the oscillator. Therefore, the oscillator of this structure fully utilizes the advantages of the ring oscillator's small area, insensitivity to electromagnetic coupling, and ability to output multi-phase clock signals, greatly expanding the application of the ring oscillator, making it possible to use the ring oscillator in some applications that require both the ability to suppress power supply disturbances and relatively good phase noise. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 FIG. 1 is a circuit diagram of one embodiment of a high power efficiency ring oscillator that is insensitive to power supply disturbances according to the present invention.
[0019] Figure 2 This is the circuit diagram of an N-type switching current source.
[0020] Figure 3 is the voltage and capacitance curve of the varactor.
[0021] Figure 4 It is a schematic diagram of a unit circuit of a P-type switching current source of the present invention. DETAILED DESCRIPTION
[0022] The present invention will be described in detail below based on the accompanying drawings and preferred embodiments, and the purpose and effects of the present invention will become more clear. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0023] As is known to all, the oscillation frequency of a ring oscillator is mainly determined by the number of stages of the ring oscillator, the pull-up and pull-down currents, and the load capacitance of each stage. As the power supply voltage increases, the pull-up and pull-down currents of the ring oscillator based on the inverter structure also increase, so the oscillation frequency of the ring oscillator based on the inverter structure increases with the increase of the power supply voltage. The power supply sensitivity is defined as the ratio of the oscillation frequency to the power supply voltage.
[0024] Among them, the pull-up current is realized by the PM1 single-tube common-source amplifier, so that the size of the pull-up current increases with the increase of the power supply voltage, that is, the positive power supply sensitivity. The capacitance of the varactor generally increases with the increase of the control voltage at the gate end of the varactor, that is, the negative power supply sensitivity. Therefore, the varactor can compensate for the power supply sensitivity of the ring oscillator based on the inverter structure, and reduce the change of the oscillation frequency of the ring oscillator caused by the change of the power supply voltage. By using the varactor as the load capacitor of the ring oscillator, the phase noise of the oscillator will not deteriorate. Assuming that the pull-down current is realized by an ideal current source, then as the power supply voltage increases, the current source needs to charge more current to pull the output node to the ground, that is, the negative power supply sensitivity. However, if the current source is always working, it will cause useless power consumption and reduce the power efficiency of the ring oscillator. Therefore, a switching current source is used in the present invention to achieve it, such as Figure 1 As shown, the high power efficiency ring oscillator circuit of the present invention which is insensitive to power supply disturbances, has a unit circuit comprising a power supply sensitivity adjustment unit, a gain unit, a switching current source and a varactor. Figure 1 The switching current source in is an N-type switching current source. Figure 1 As shown, the gain unit includes a PMOS common-source amplifier, a gate end of the PMOS common-source amplifier is connected to the input end of the unit gain circuit, a source end is connected to a power supply, and a drain end is connected to the output end of the unit gain circuit.
[0025] The power supply sensitivity adjustment unit comprises an NMOS common source amplifier with adjustable source degeneration resistance, wherein the gate end of the NMOS common source amplifier is connected to the input end of the unit gain circuit, the source end is connected to one end of the adjustable degeneration resistance, and the drain end is connected to the output end of the unit gain circuit; the other end of the adjustable degeneration resistance is grounded.
[0026] One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to the power supply. The capacitance value of the varactor increases continuously as the control voltage increases.
[0027] The input oscillation clock signal of the unit gain circuit is used as the switching signal of the N-type switching current source; the current output end of the N-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the N-type switching current source is connected to the control voltage of the ring oscillator; and the ground end of the N-type switching current source is grounded.
[0028] Preferably, the N-type switch current source further includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
[0029] Figure 2 The specific circuit diagram of the switching current source is shown in Figure 2. VC It realizes the effect of current source tube and frequency tuning control tube, NM SWIt is a switch tube, which ensures that the current source only works on the rising and falling edges, avoiding power consumption. VC The source end of the connection NM SW Drain terminal, NM VC The gate terminal is connected to the voltage controlled oscillator control signal, NM VC The drain end of the unit gain circuit is connected to the output end, NM SW The gate terminal of the unit gain circuit is connected to the input oscillation signal terminal, NM SW The drain terminal is connected to ground.
[0030] Figure 3 This is a typical voltage and capacitance curve of a varactor. As the control voltage of the varactor increases, the capacitance of the varactor also increases.
[0031] Figure 4 Another implementation example of a unit gain circuit of a ring oscillator is disclosed, wherein the unit gain circuit of the ring oscillator includes a power supply sensitivity adjustment unit, a gain unit, a P-type switching current source and a varactor.
[0032] The gain unit comprises an NMOS common source amplifier, the gate end of the NMOS common source amplifier is connected to the input end of the unit gain circuit, the source end is connected to the ground, and the drain end is connected to the output end of the unit gain circuit;
[0033] The power sensitivity adjustment unit includes a PMOS common source amplifier with adjustable source degeneration resistance, the gate end of the PMOS common source amplifier is connected to the input end of the unit gain circuit, the source end is connected to one end of the adjustable degeneration resistance, and the drain end is connected to the output end of the unit gain circuit; the other end of the adjustable degeneration resistance is connected to the power supply;
[0034] One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to the power supply. The capacitance value of the varactor increases continuously as the control voltage increases.
[0035] The input oscillation clock signal of the unit gain circuit is used as the switching signal of the P-type switching current source; the current output end of the P-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the P-type switching current source is connected to the control voltage of the ring oscillator; and the power supply end of the P-type switching current source is connected to the power supply.
[0036] Preferably, the P-type switching current source further includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
[0037] Ideally, the single-tube common-source amplifier NM1 with source-level degeneration has positive power supply sensitivity. By adjusting the single-tube common-source amplifier NM1 with controllable source-level degeneration resistance, the current size of the NM tube, that is, its weight in the pull-down current, can be finely adjusted, so that the power supply sensitivity can be fine-tuned, and finally the power supply sensitivity of the oscillator can be close to zero.
[0038] Those skilled in the art can understand that the above are only preferred examples of the invention and are not intended to limit the invention. Although the invention is described in detail with reference to the above examples, those skilled in the art can still modify the technical solutions recorded in the above examples or replace some of the technical features therein with equivalents. Any modification, equivalent replacement, etc. made within the spirit and principle of the invention shall be included in the protection scope of the invention.
Claims
1. A high power efficiency ring oscillator which is insensitive to power supply disturbances, characterized in that: It includes an odd number of unit circuits, each unit gain circuit includes a power supply sensitivity adjustment unit, a gain unit, an N-type switch current source and a varactor; The gain unit comprises a PMOS common-source amplifier, the gate end of the PMOS common-source amplifier is connected to the input end of the unit gain circuit, the source end is connected to the power supply, and the drain end is connected to the output end of the unit gain circuit; The power sensitivity adjustment unit comprises an NMOS common source amplifier with adjustable source degeneration resistance, wherein the gate terminal of the NMOS common source amplifier is connected to the input terminal of the unit gain circuit, the source terminal is connected to one end of the adjustable degeneration resistance, and the drain terminal is connected to the output terminal of the unit gain circuit; the other end of the adjustable degeneration resistance is grounded; One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to a power supply. The capacitance value of the varactor increases continuously as the control voltage increases. The input oscillation clock signal of the unit gain circuit is used as the switching signal of the N-type switching current source; the current output end of the N-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the N-type switching current source is connected to the control voltage of the ring oscillator; and the ground end of the N-type switching current source is grounded.
2. The high power efficiency ring oscillator insensitive to power supply disturbances according to claim 1, characterized in that: The N-type switch current source further includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
3. A high power efficiency ring oscillator which is insensitive to power supply disturbances, characterized in that: It includes an odd number of unit circuits, each unit gain circuit includes a power supply sensitivity adjustment unit, a gain unit, a P-type switch current source and a varactor; The gain unit comprises an NMOS common-source amplifier, the gate end of the NMOS common-source amplifier is connected to the input end of the unit gain circuit, the source end is connected to the ground, and the drain end is connected to the output end of the unit gain circuit; The power sensitivity adjustment unit comprises a PMOS common source amplifier with adjustable source degeneration resistance, wherein the gate end of the PMOS common source amplifier is connected to the input end of the unit gain circuit, the source end is connected to one end of the adjustable degeneration resistance, and the drain end is connected to the output end of the unit gain circuit; the other end of the adjustable degeneration resistance is connected to the power supply; One end of the varactor is connected to the output end of the unit gain circuit, and the other end is grounded or connected to a power supply. The capacitance value of the varactor increases continuously as the control voltage increases. The input oscillation clock signal of the unit gain circuit is used as the switching signal of the P-type switching current source; the current output end of the P-type switching current source is connected to the output end of the unit gain circuit; the voltage control end of the P-type switching current source is connected to the control voltage of the ring oscillator; and the power supply end of the P-type switching current source is connected to the power supply.
4. The high power efficiency ring oscillator insensitive to power supply disturbances according to claim 3, characterized in that: The P-type switch current source also includes a current bias terminal, and the current bias terminal is connected to a current bias voltage.
Citation Information
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