Structural assisted electromagnetic MEMS mirror processing method
By combining selective silicon-silicon bonding with local roughening and laser cutting, an electromagnetic MEMS micromirror fabrication method has been developed, which solves the problems of complexity and high cost in large-size wafer processing and realizes efficient and low-cost electromagnetic MEMS micromirror manufacturing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XI AN ZHISENSOR TECH CO LTD
- Filing Date
- 2022-11-10
- Publication Date
- 2026-06-26
AI Technical Summary
Existing electromagnetic MEMS micromirror fabrication processes are highly complex and costly, especially in large-size wafer fabrication where there are problems such as complex support and protection of thin silicon wafers, low efficiency of dry etching, and fragile and easily failed suspended torsion beam structures.
By employing selective silicon-silicon bonding with local roughening and thick silicon MEMS processing technology based on conventional silicon-silicon bonding, combined with high-precision laser cutting and heat dissipation structure, the reliance on temporary bonding and debonding equipment is reduced, the machine time occupation of dry etching equipment is reduced, and heat dissipation and vertical support are improved through three-layer structure design and laser cutting, so as to achieve compatibility of each single-step process.
This reduces the processing cost and complexity of electromagnetic MEMS micromirrors, improves manufacturability, ensures stable processing and mass production of large-size wafers, and enhances processing efficiency while reducing costs.
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Figure CN115650155B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor MEMS device fabrication, and particularly relates to a structure-assisted electromagnetic MEMS micromirror fabrication method. Background Technology
[0002] MEMS micromirrors are microelectromechanical system chips based on semiconductor microfabrication technology. They belong to the category of microactuators and can achieve precise reflection and manipulation of laser beams, finding wide application in laser scanning, laser projection displays, lidar, and optical communication. Based on their driving method, MEMS micromirrors can be mainly classified into electrostatic driving, electromagnetic driving, electrothermal driving, and piezoelectric driving.
[0003] MEMS micromirrors, as a solution for laser scanning in LiDAR, require increasingly larger optical mirror surfaces as LiDAR extends its detection range. Larger mirror surfaces mean larger chip areas, necessitating the use of larger wafers (e.g., 6-inch, 8-inch, or even larger) to effectively reduce the cost of MEMS micromirror chips. Larger wafer sizes mean the wafer thickness cannot be too thin during processing; otherwise, more auxiliary and protective processes are needed to ensure a smooth workflow, increasing process complexity. For example, thin wafer processing requires temporary bonding and removal of the carrier sheet. Therefore, large-size MEMS micromirror wafer processing typically uses silicon wafers with a certain initial thickness, or thin wafers are initially processed and then bonded to form a wafer of a certain thickness, ensuring good processing results throughout the process. However, current conventional processes for thick silicon wafers significantly increase processing costs, especially in the dry plasma etching process for thick silicon wafers.
[0004] Electromagnetically driven MEMS micromirrors (EMMs) offer advantages in applications requiring large mirror sizes, such as lidar. There are three common driving layout schemes for EEMs. The first scheme involves an additional permanent magnet bonded to the MEMS micromirror chip interacting with the magnetic field generated by an externally placed energized coil, thus driving the EEM to rotate. The second scheme, the opposite of the first, integrates a matching microcoil structure onto the MEMS micromirror structure using semiconductor fabrication techniques. When energized, the microcoil generates a magnetic field that interacts with the external permanent magnet's magnetic field, driving the MEMS micromirror. The third scheme further improves upon the first by directly depositing a magnetic thin film onto the MEMS micromirror using semiconductor processes, replacing the external permanent magnet. The soft magnetic film on the MEMS micromirror structure attracts the external energized coil, thus driving the MEMS micromirror. The assembly precision and process requirements for bonding permanent magnets onto MEMS micromirrors are high. Furthermore, the added magnets increase the overall mass of the torsional structure of the MEMS micromirror, reducing its impact resistance or causing mass asymmetry in the movable structure, further affecting motion stability. Depositing a soft magnetic film on the MEMS micromirror, however, only generates attraction, not repulsion, between the film and the external energized coil, making drive control relatively difficult and resulting in lower driving force. Comparatively, the second approach is a better choice. However, although the individual semiconductor processing steps involved in the second approach are relatively mature, and there are several relatively mature structural designs, the entire processing flow still needs improvement. For example, the temporary bonding and debonding processes required for supporting and protecting thin silicon wafers are complex and require specialized equipment; dry etching of large-size suspended torsion beam mirror structures faces challenges in heat accumulation and dissipation; large-size suspended structures are fragile and prone to failure under stress during microfabrication and assembly; and large-area etching of thick silicon wafers suffers from low efficiency. Only by improving and resolving these issues can we better achieve good manufacturability and low cost of electromagnetic MEMS micromirror chips. Summary of the Invention
[0005] The purpose of this invention is to provide a structure-assisted method for fabricating electromagnetic MEMS micromirrors, addressing the problems of high process complexity and high cost associated with existing methods. This invention utilizes selective silicon-silicon bonding after local roughening, thick silicon MEMS fabrication based on conventional silicon-silicon bonding, integration of high-precision laser cutting into the MEMS fabrication process, and the addition of temporary support and heat dissipation structures. These measures reduce the reliance on temporary bonding and debonding equipment and processes required for thin-film fabrication, reduce machine time usage of single-crystal silicon dry etching equipment to control processing costs, and improve the compatibility of individual processes within the workflow. Fabrication can be achieved using only a combination of conventional equipment and processes, reducing process complexity and cost, and enabling electromagnetic MEMS micromirrors to have good manufacturability.
[0006] The technical solution of this invention is:
[0007] A structure-assisted fabrication method for electromagnetic MEMS micromirrors, wherein the electromagnetic MEMS micromirror includes a reflector, an inner frame, and an outer frame, the reflector being connected to the inner frame via a torsion beam, and the inner frame being connected to the outer frame via a torsion beam; the method is characterized by including the following steps:
[0008] Step 1: Fabrication of the supporting load-bearing layer;
[0009] A patterned bonding surface is fabricated on the surface of the first silicon wafer to serve as a support and bearing layer;
[0010] Step 2: Bond the intermediate layer to obtain SOI wafer-A;
[0011] The second silicon wafer is bonded to the bonding surface of the supporting carrier layer as an intermediate layer to obtain SOI wafer-A;
[0012] Step 3: Fabrication of reinforcing ribs;
[0013] Photolithography and deep silicon etching are performed on the intermediate layer of SOI wafer-A to the bonding silicon oxide layer to form a reinforcing rib assembly; the reinforcing rib assembly includes permanent reinforcing ribs and temporary reinforcing ribs, the permanent reinforcing ribs are arranged at positions corresponding to the bottom of the mirror and the inner frame; the temporary reinforcing ribs are arranged at positions corresponding to the space between the mirror and the inner frame and between the inner frame and the outer frame.
[0014] Step 4: Bond the top silicon layer to obtain SOI wafer-B;
[0015] The surface of the third silicon wafer with a silicon oxide layer is patterned and etched to create a selective thinning effect for specific microstructure regions, such as torsion beams or the back of mirror surfaces. The thinning thickness is determined according to design requirements. This is used as the top silicon layer and bonded to the SOI wafer-A fabricated in step 3 using silicon-to-silicon bonding. The top silicon layer is then ground and thinned to obtain an SOI wafer-B containing three layers of single-crystal silicon with a pre-fabricated partial structure.
[0016] Step 5: Fabrication of the SOI wafer-B top silicon layer and its associated multilayer structure;
[0017] An SOI wafer-B top silicon layer, a first silicon oxide or silicon nitride insulating layer, a metal conductor layer, a second silicon oxide or silicon nitride insulating layer, and a metal coil layer are fabricated on the top silicon layer of the SOI wafer-B.
[0018] Step 6: Fabrication of internal and external frame structures, torsion beam structures, temporary heat dissipation, and fixing beams;
[0019] On the surface of the SOI wafer-B top silicon layer and its associated multilayer structure fabricated in step 5, the main inner and outer frame structure, torsion beam structure, temporary heat dissipation and fixing beam of the MEMS micromirror are fabricated, with the etching depth reaching the bonding silicon oxide layer; some torsion beam structures can also be fabricated in step 3; the temporary heat dissipation and fixing beams are located between the mirror and the inner frame and between the inner frame and the outer frame, and correspond to the top of the temporary reinforcing ribs; the mirror, inner frame and outer frame are connected into a whole, thereby increasing the heat dissipation channel and providing an auxiliary temporary fixing effect for the movable structure.
[0020] Step 7: Release the movable structure of the MEMS micromirror;
[0021] The support and bearing layer of the SOI wafer-B is fabricated in step 6 using a laser ablation cutting process to extract the motion and torsion cavity required for a single chip.
[0022] Using the torsional cavity as a plasma etching window, the bonded silicon oxide layer between the intermediate layer and the top silicon layer is removed by dry etching silicon oxide process, thus releasing the movable structure of the MEMS micromirror.
[0023] Step 8: Making the reflector;
[0024] The mirror is fabricated in the area corresponding to the top silicon layer mirror of the SOI wafer-B fabricated in step 7 using a hard mask-assisted metal deposition process.
[0025] Step 9: By laser ablation cutting of temporary heat dissipation and fixing beams and temporary reinforcing ribs, SOI wafer-B is cut into independent MEMS micromirror chips by laser stealth cutting.
[0026] Alternatively, SOI wafer-B can be cut into independent MEMS micromirror chips using laser stealth cutting, and then temporary heat dissipation and fixing beams and temporary reinforcing ribs in individual chips can be cut by laser ablation.
[0027] In some scenarios, the temporary structure is cut after the packaging of a single MEMS chip is completed, because the temporary structure can also play a protective role in the packaging process, but the cutting efficiency is low.
[0028] Furthermore, in order to prevent the non-bonded areas of the first silicon wafer bonding surface from being bonded, the non-bonded areas are surface-treated in step 1 to roughen the surface of the non-bonded areas of the bonding surface. In step 7, the cut structure can be directly removed from the bottom due to the assistance of selective bonding.
[0029] Furthermore, in step 7, during the dry etching of silicon oxide, a film needs to be applied to the front side of the SOI wafer-B to ensure that the wafer, which has already been etched through, will not be unable to undergo the etching process due to back helium leakage within the etching cavity. After etching is completed, the film is removed. The film is generally selected as a UV film that can withstand a certain temperature and can be peeled off without damage after the etching process is completed by reducing viscosity.
[0030] This invention also provides another structure-assisted electromagnetic MEMS micromirror fabrication method, which is characterized by including the following steps:
[0031] Step 1: Fabrication of the top silicon layer;
[0032] The surface of the third silicon wafer with the required silicon oxide layer for bonding is patterned and etched to form a selective thinning effect on specific microstructure regions, such as torsion beams or the back of mirrors, with the thinning thickness determined according to design requirements; this is used as the top silicon layer.
[0033] Step 2: Bonding the top silicon layer and the intermediate layer;
[0034] The silicon oxide surface of the top silicon layer is bonded to the second silicon wafer, which serves as the intermediate layer, using silicon-silicon bonding.
[0035] Step 3: Grind and thin the intermediate layer and create reinforcing ribs;
[0036] The intermediate layer is thinned by grinding, and then photolithography and deep silicon etching are performed to the bonded silicon oxide layer to form a reinforcing rib. In addition to the permanent reinforcing ribs that are conventionally arranged at the bottom of the mirror and the inner frame structure to enhance rigidity and prevent mirror deformation, temporary reinforcing ribs that provide vertical support during the processing are added at the bottom of the temporary heat dissipation structure according to the structural characteristics.
[0037] Step 4: Grind the top silicon layer to fabricate SOI wafer-C;
[0038] The bonded silicon oxide layer exposed after the deep silicon etching of the intermediate layer in step 3 is removed by dry etching; the wafer is flipped and the top silicon layer is thinned and polished to a thickness of 30-200μm. The SOI wafer containing the intermediate layer and the top silicon layer is defined as SOI wafer-C.
[0039] Step 5: Fabrication of the supporting load-bearing layer;
[0040] A patterned bonding surface is fabricated on the surface of the first silicon wafer to serve as a support and bearing layer;
[0041] The cavity required for the torsional motion of the mirror is fabricated on the first silicon wafer by using laser precision cutting, laser drilling, or wet single-crystal silicon etching processes.
[0042] Step 6: Bond the support layer to obtain SOI wafer-D;
[0043] The support layer fabricated in step 5 is bonded to the intermediate layer of SOI wafer-C to obtain SOI wafer-D;
[0044] Step 7: Fabrication of SOI wafer-D top silicon layer and its associated multilayer structure;
[0045] The top silicon layer of the SOI wafer-D is fabricated as follows: a first silicon oxide or silicon nitride insulating layer, a metal conductor layer, a second silicon oxide or silicon nitride insulating layer, and a metal coil layer.
[0046] Step 8: Fabrication of internal and external frame structures, torsion beam structures, temporary heat dissipation, and fixing beams;
[0047] On the surface of the SOI wafer-D top silicon layer and its associated multilayer structure completed in step 7, the main inner and outer frame structure, torsion beam structure, temporary heat dissipation and fixing beam of the MEMS micromirror are fabricated, and the etching depth is up to the bonding silicon oxide layer; some torsion beam structures can also be fabricated in step 3; the temporary heat dissipation and fixing beam is located on the periphery of the mirror and the periphery of the inner frame, connecting the mirror, inner frame and outer frame into a whole, thereby increasing the heat dissipation channel and providing an auxiliary temporary fixing effect for the movable structure;
[0048] Step 9: Making the reflector;
[0049] The mirror is fabricated in the area corresponding to the top silicon layer mirror of the SOI wafer-D fabricated in step 8 using a hard mask-assisted metal deposition process.
[0050] Step 10: The SOI wafer-D is cut into independent MEMS micromirror chips by laser stealth dicing.
[0051] Furthermore, in step 5, the non-bonded areas undergo surface treatment to roughen the surface of the non-bonded areas on the bonding surface. In step 5, a cavity required for the torsional movement of the mirror is fabricated on the first silicon wafer, preferably a blind via. There are two reasons for this: First, the bottom support layer of the blind via remains a complete, flat, and closed silicon surface on the back side during subsequent processes, providing good thermal conductivity and dissipation. It also eliminates the need for temporary wafers during etching and withstands vacuum adsorption during adhesive application, preventing the vacuum adsorption force from being transferred to the middle and top silicon layers and causing damage or cracks. Second, the bottom silicon layer of the blind via can provide some protection for the upper chip structure. The bottom support layer can also use a glass wafer, and the bonding and etching processes of glass wafers can be used to achieve the desired processing effect.
[0052] The beneficial effects of this invention are:
[0053] The overall process flow is based on the three-layer structure of electromagnetic MEMS micromirrors. The auxiliary structures made for each layer in relation to the process flow can produce the following beneficial effects.
[0054] 1. The top silicon layer serves as the reflective surface of the MEMS micromirror, the coil support layer, the torsion beam, and the frame layer. Because the reflective surface or frame on the top silicon layer has a relatively large area, but is only connected to the external structure through a heat dissipation channel formed by two symmetrical thin torsion beams, heat dissipation during dry etching is poor, severely affecting the photoresist masking effect and etching process. This invention utilizes several temporarily added connecting structures around the mirror or frame to significantly improve heat dissipation and ensure process performance. Furthermore, these structures can be removed by laser cutting after the process is completed without affecting the function of the electromagnetic MEMS chip.
[0055] The thickness of the intermediate single-crystal silicon layer can be adjusted according to the design. Its structure is prefabricated before bonding to form the three-layer stack, primarily serving as reinforcing ribs for the electromagnetic MEMS micromirror to increase device rigidity and reliability. Since the entire movable structure of the electromagnetic MEMS micromirror is suspended within the entire chip, deformation of the suspended structure area can easily occur in the later stages of processing due to factors such as vacuum adsorption during the process flow and pressure differences inside and outside the process cavity. By rationally adjusting the layout of the reinforcing rib structure, a certain density of vertical support layers for the entire movable suspended structure can be provided during chip processing, ensuring the smooth progress of the preceding and following processes.
[0056] The bottom layer primarily serves as the support and carrier layer for the entire electromagnetic MEMS chip, providing excellent support for the wafer during various processing steps. It facilitates vacuum adsorption and fixation of the wafer during coating and etching processes, avoiding the temporary bonding and debonding processes required for large-size thin-film processing. This reduces process complexity and risks, and is more conducive to stable batch processing of large-size wafers on the fabrication line while effectively controlling costs. Pre-fabricated locally roughened selective bonding surfaces on the bottom silicon bonding surface allow for smooth cavity opening after the bottom silicon fulfills its support and carrier function, thus providing space for the movable structure of the reflector.
[0057] 2. Considering the thickness of the supporting substrate, conventional dry etching processes are inefficient and costly. Replacing dry etching with laser precision cutting, laser drilling, or wet etching can significantly reduce processing costs and improve efficiency, especially for electromagnetic MEMS micromirror chips with large mirror dimensions. Furthermore, laser cutting eliminates the need for photolithography and etching, achieving precise alignment through machine vision. This non-contact optical processing reduces limitations on the entire process flow, enhancing flexibility and compatibility. Attached Figure Description
[0058] Figure 1 This is a schematic diagram of an existing two-dimensional electromagnetic MEMS micromirror structure.
[0059] Figure 2 This is a schematic diagram of the two-dimensional electromagnetic MEMS micromirror structure of the present invention; where a is a top view and b is a cross-sectional view;
[0060] Figure 3 This is a schematic diagram of local roughening for patterned bonding in the two-dimensional electromagnetic MEMS micromirror of the present invention.
[0061] Figure 4 This is a schematic diagram of the temporary heat dissipation and fixing beam of the two-dimensional electromagnetic MEMS micromirror surface and frame of the present invention.
[0062] Figure 5 This is a schematic diagram illustrating the optimized layout of the reinforcing ribs in the two-dimensional electromagnetic MEMS micromirror of this invention to improve the support effect.
[0063] Figure 6 This is a schematic diagram showing the layout of temporary and permanent reinforcing ribs in the two-dimensional electromagnetic MEMS micromirror of the present invention.
[0064] Figure 7 and Figure 8 This is a schematic diagram corresponding to step 1 of the preparation process in Embodiment 1 of the present invention;
[0065] Figure 9 This is a schematic diagram corresponding to step 2 of embodiment 1 of the present invention;
[0066] Figure 10 This is a schematic diagram corresponding to step 3 of embodiment 1 of the present invention;
[0067] Figure 11 This is a schematic diagram showing the preparation process corresponding to steps 4 and 5 in Embodiment 1 of the present invention;
[0068] Figure 12 This is a schematic diagram showing the preparation process corresponding to steps 6 and 7 in Embodiment 1 of the present invention;
[0069] Figure 13 and Figure 14 This is a schematic diagram corresponding to step 8 of embodiment 1 of the present invention;
[0070] Figure 15 This is a schematic diagram corresponding to step 9 of the preparation process in Embodiment 1 of the present invention;
[0071] Figure 16 and Figure 17 This is a schematic diagram corresponding to step 10 of Embodiment 1 of the present invention;
[0072] Figure 18 This is a schematic diagram corresponding to step 11 of Embodiment 1 of the present invention;
[0073] Figure 19 and Figure 20 This is a schematic diagram corresponding to step 12 of the preparation process in Embodiment 1 of the present invention;
[0074] Figure 21 This is a schematic diagram showing the preparation process corresponding to steps 13 and 14 in Embodiment 1 of the present invention;
[0075] Figure 22 This is a schematic diagram corresponding to step 15 of Embodiment 1 of the present invention;
[0076] Figure 23 This is a schematic diagram corresponding to step 16 of embodiment 1 of the present invention;
[0077] Figure 24 This is a schematic diagram corresponding to step 17 of Embodiment 1 of the present invention;
[0078] Figure 25 This is a schematic diagram showing the preparation process corresponding to steps 18 and 19 in Embodiment 1 of the present invention;
[0079] Figure 26 and Figure 27 This is a schematic diagram corresponding to step 1 of embodiment 2 of the present invention;
[0080] Figure 28 This is a schematic diagram corresponding to step 2 of the preparation process in Embodiment 2 of the present invention;
[0081] Figure 29 and Figure 30 This is a schematic diagram corresponding to step 3 of embodiment 2 of the present invention;
[0082] Figure 31 This is a schematic diagram corresponding to step 4 of embodiment 2 of the present invention;
[0083] Figure 32 This is a schematic diagram corresponding to step 5 of embodiment 2 of the present invention;
[0084] Figure 33 This is a schematic diagram corresponding to step 6 of embodiment 2 of the present invention;
[0085] Figure 34 and Figure 35 This is a schematic diagram corresponding to step 7 of embodiment 2 of the present invention;
[0086] Figure 36 This is a schematic diagram corresponding to step 8 of embodiment 2 of the present invention;
[0087] Figure 37 This is a schematic diagram corresponding to step 9 of embodiment 2 of the present invention;
[0088] Figure 38 This is a schematic diagram corresponding to step 10 of Embodiment 2 of the present invention;
[0089] Figure 39 This is a schematic diagram corresponding to step 11 of embodiment 2 of the present invention;
[0090] Figure 40 and Figure 41 This is a schematic diagram corresponding to step 12 of embodiment 2 of the present invention;
[0091] Figure 42 This is a schematic diagram corresponding to step 13 of embodiment 2 of the present invention;
[0092] Figure 43 and Figure 44 This is a schematic diagram corresponding to step 14 of embodiment 2 of the present invention;
[0093] Figure 45 This is a schematic diagram corresponding to steps 15 and 16 of the preparation process in Embodiment 2 of the present invention;
[0094] Figure 46 This is a schematic diagram corresponding to step 17 of embodiment 2 of the present invention;
[0095] Figure 47 This is a schematic diagram of the preparation process corresponding to steps 18 and 19 in Embodiment 2 of the present invention.
[0096] The attached figures are labeled as follows:
[0097] 01. Mirror; 011. Metal layer of mirror; 02. Inner frame; 03. Outer frame; 04. Torsion beam; 5. Supporting layer; 51. Laser-cut area of supporting layer; 52. First bonded oxide layer; 521. Non-bonded area; 522. Bonded area; 53. Moving torsional cavity; 6. Intermediate layer; 61. Second bonded oxide layer; 7. Top silicon layer; 71. Ion implantation area; 73. Coil; 74. First silicon oxide or silicon nitride insulating layer; 75. Second silicon oxide or silicon nitride insulating layer; 78. Metal wire layer; 8. Temporary heat dissipation and fixing beam; 9. Temporary reinforcing rib; 10. Permanent reinforcing rib; 110. First double-polished silicon wafer; 111. Second double-polished silicon wafer; 112. Third double-polished silicon wafer; 1121. Torsion beam or back surface area of mirror. Detailed Implementation
[0098] like Figure 1 The diagram shows a two-dimensional electromagnetic MEMS micromirror structure, including a reflector 01, an inner frame 02, and an outer frame 03. The reflector 01 is connected to the inner frame 02 via a torsion beam 04, and the inner frame 02 is connected to the outer frame 03 via a torsion beam 04.
[0099] The structure-assisted process proposed in this invention is reflected in four aspects:
[0100] First, an additional underlying structural layer (referred to as the support layer 5) is introduced to provide pure support. Figure 2 As shown, the support structure layer is used to support the fabrication of the movable structure layer of the upper MEMS micromirror. With the simple assistance of the support structure layer, the structural strength of the entire wafer is increased, so that the fabrication of the electromagnetic MEMS micromirror wafer can be successfully completed on a larger size (such as 8 inches and above) wafer. Ultimately, the cost of larger MEMS micromirror chips is effectively reduced, and the fabrication cost of MEMS micromirror chips is also reduced.
[0101] Secondly, to address the issue of poor heat dissipation during the etching process of the thin layer of the movable structure in MEMS micromirrors, a temporary heat dissipation and fixing beam 8 is introduced to enhance heat dissipation and provide fixation. Figure 4 As shown, this helps ensure good heat dissipation and operability of the large-size suspended movable structure (including the reflector 01 surface, the inner frame 02 and the torsion beam 04) unique to MEMS micromirrors during dry etching.
[0102] Thirdly, temporary reinforcing ribs 9 are introduced, such as... Figure 5 and Figure 6 As shown, in addition to ensuring the strength of the mirror structure, it also ensures that the suspended MEMS micromirror movable structure thin layer has a sufficient density of bottom vertical support points in the microfabrication process, such as cavity bonding, adhesive adsorption, and grinding thinning, thereby enhancing the manufacturability of the process.
[0103] Fourthly, such as Figure 3 As shown, a rough bonding surface is introduced into the support layer 5 as a non-bonded region 521 to achieve patterned selective bonding.
[0104] Building upon the structural assistance, laser precision cutting or drilling is further introduced into the micromachining process of MEMS micromirrors. Laser precision cutting or drilling is used to process the thickest support layer, single-crystal silicon, in a three-layer structure. This improves the process compatibility issues caused by wet solution etching of thick silicon, and also addresses the high efficiency and cost problems associated with dry plasma etching of thick silicon wafers. The machine vision-assisted positioning laser cutting process is also used after chip processing to release heat dissipation channels and temporary structures that provide fixation for the thin, movable structure layers of the MEMS micromirror.
[0105] Selective bonding with localized roughening of the bonding surface ensures, on the one hand, the bottom support layer 5 provides sufficient support for the upper silicon layer, and on the other hand, it meets the requirement of subsequent laser precision cutting to remove part of the bottom silicon layer to form a moving cavity.
[0106] Based on a complete processing flow formed by structure assistance and the introduction of laser precision cutting, it integrates semiconductor micromachining and laser precision machining processes, makes full use of the advantages of each single-step process, and enhances the compatibility between each single-step process. Ultimately, it realizes a cost-controllable, simple and reliable electromagnetic MEMS micromirror processing technology.
[0107] The present invention will be further described below with reference to specific embodiments;
[0108] Example 1
[0109] Combined with appendix Figures 1 to 25 The process of this embodiment will be described in detail:
[0110] 1. For example Figure 7 and Figure 8 As shown, using a first double-polished silicon wafer 110 with a thickness of 300-600μm as the starting point of the process, a 50-500nm silicon oxide bonding layer is deposited on one surface using dry oxidation, wet oxidation, or PECVD. The other side does not require an oxide layer; if an oxide layer is present, it can be removed by wet etching. Then, the silicon oxide bonding layer is patterned using photolithography, wet etching, or dry etching to form a patterned bonding surface.
[0111] 2. For example Figure 3 and Figure 9As shown, to prevent the non-bonded area 521 of the bonding surface of the first double-polished silicon wafer 110 from being bonded, plasma etching or wet etching can be performed on the non-bonded area 521 to roughen the surface, with the etching or etching depth controlled between 50-500 nm. The bottom support layer 5 is then fabricated.
[0112] 3. For example Figure 10 Another 300-600μm second double-polished silicon wafer 111 is bonded to the patterned bonding surface of the first double-polished silicon wafer 110 to obtain a patterned bonded SOI wafer.
[0113] 4. Grinding, thinning, and polishing the second double-polished silicon wafer 111 layer of the patterned bonded SOI wafer until the layer thickness is reduced to the range of 50-300 μm, and defining this layer as intermediate layer 6. The SOI wafer containing intermediate layer 6 and bottom support carrier layer 5 is defined as SOI wafer-A.
[0114] 5. For example Figure 11 and Figure 6 The intermediate layer 6 of the SOI wafer-A is further subjected to photolithography and deep silicon etching down to the bonding silicon oxide layer, forming the reinforcing ribs and torsion beam 04 structure. The specific locations of the reinforcing ribs are as follows: Figure 6 As shown, in addition to the permanent reinforcing ribs 10 conventionally arranged at the bottom of the reflector 01 and inner frame 02 to enhance rigidity and prevent mirror deformation, temporary reinforcing ribs 9 are added between the reflector 01 and inner frame 02, and between the inner frame 02 and outer frame 03, to provide vertical support during processing, based on structural characteristics. (The temporary reinforcing ribs 9 are only added in...) Figure 6 As shown in the figure, Figure 11 (Not shown in the image).
[0115] 6. For example Figure 12 Take a third double-polished silicon wafer 112 with a thickness of 300-600μm and deposit a silicon dioxide layer of 50-500nm using dry oxidation, wet oxidation or PECVD deposition process. No oxide layer is required on the other side. If there is an oxide layer, it can be removed by wet etching.
[0116] 7. The silicon oxide on the surface of the third double-polished silicon wafer 112 is patterned by photolithography, and then the silicon oxide is dry etched. After the silicon oxide layer is etched, deep silicon etching is performed. Deep silicon etching is used to selectively thin specific microstructure areas, such as the torsion beam or the back area 1121 of the mirror. The thinning thickness is determined according to the design requirements.
[0117] 8. For example Figure 13 and Figure 14The silicon oxide surface of the third double-polished silicon wafer 112 is bonded to the intermediate layer 6 of SOI wafer-A with silicon-silicon bonding. Then, the top silicon layer 7 (the layer of the third double-polished silicon wafer 112) after bonding is ground, thinned and polished to 30-200μm to obtain SOI wafer-B containing three layers of single crystal silicon with a pre-fabricated partial structure.
[0118] 9. For example Figure 15 On the surface of the top silicon layer 7 of the SOI wafer-B, a silicon oxide or silicon nitride layer with a thickness of 30-100 nm is deposited by PECVD as needed, and then patterned silicon oxide or silicon nitride layers are obtained through photolithography and etching (because the silicon oxide or silicon nitride mask is removed after deposition, so...). Figure 15 (Not marked in the text). Using this as a mask, the piezoresistive sensor and the ohmic contact area (ion implantation region 71) around the sensor area are then fabricated using ion implantation and annealing processes. After the ion implantation process is completed, the entire silicon oxide or silicon nitride mask is removed by wet etching.
[0119] 10. For example Figure 16 and 17 A 100-1000 nm thick first silicon dioxide or silicon nitride insulating layer 74 is deposited on the surface of the top silicon layer 7 of the SOI wafer using PECVD to ensure good density for better insulation and withstand voltage characteristics. Then, local silicon dioxide or silicon nitride is removed by photolithography and dry etching or wet etching to ensure that the ohmic contact area of the piezoresistive sensor is exposed so that it can be connected and led out by metal wires in subsequent process steps. The remaining part is covered and protected by a silicon dioxide or silicon nitride film to achieve surface insulation.
[0120] 11. For example Figure 18 On the surface of the first silicon oxide or silicon nitride insulating layer 74 of the top silicon layer 7 of the SOI wafer, a layer of Al or Ti / Au / Ti or Cr / Au / Cr with a thickness of 100-200nm is further fabricated by vapor deposition or physical vapor deposition process as a metal wire layer 78 and a metal pad. Then, the metal layer is patterned by photolithography, dry etching or wet etching process to realize the connection and lead-out of the electrical signal of the piezoresistive sensor. The thickness of Ti or Cr is 10-30nm, the thickness of Au is 100-200nm, and Ti or Cr sandwiches Au in the middle.
[0121] 12. For example Figure 19 and Figure 20A second silicon dioxide or silicon nitride insulating layer 75, 100-1000 nm thick, is deposited on the metal conductive layer 78 and the metal pad layer on the surface of the SOI wafer-B top silicon layer 7 to ensure good density for better insulation and withstand voltage characteristics. Then, the local silicon dioxide or silicon nitride insulating film is removed by photolithography, dry etching, or wet etching to ensure that the metal conductive layer 78 is well covered, protected, and insulated.
[0122] 13. For example Figure 21 Following the second silicon oxide or silicon nitride insulating layer 75, a 50-150 nm thick Ti / Au or Cr / Au electroplated seed layer (not shown in the figure) is deposited on the insulating film by vapor deposition or physical vapor deposition. The thickness of Ti or Cr is 10-30 nm, and the thickness of Au is 40-120 nm. Then, the photoresist in the area where the coil 73 is located is removed by thick photoresist lithography and development, exposing the seed layer in the area of the electroplated coil 73.
[0123] 14. An Au-plated coil 73 with a thickness of 10-20 μm is fabricated on the top silicon layer 7 of the SOI wafer using an electroplating process. Then, the photoresist is removed, and excess seed layer metal is removed by dry or wet etching to ensure that the coil 73 is connected in series without short circuits. At this point, the top silicon layer 7, the first silicon oxide or silicon nitride insulating layer 74, the metal conductor layer 78, the second silicon oxide or silicon nitride insulating layer 75, and the metal coil 73 layers of the SOI wafer have been fabricated and are interconnected.
[0124] 15. For example Figure 22 On the surface of the top silicon layer 7 and its associated multilayer structure on the SOI wafer, the main inner frame 02, outer frame 03, torsion beam 04 structure, and temporary heat dissipation and fixing beam 8 (not shown in the figure) of the MEMS micromirror are fabricated by spraying photoresist, proximity lithography, and dry plasma deep silicon etching. The etching depth reaches the bonding silicon oxide layer. The temporary heat dissipation and fixing beam 8 is shown in [the figure]. Figure 4 As shown, it is mainly located between the reflector 01 and the inner frame 02, and between the inner frame 02 and the outer frame 03, connecting the reflector 01 and the inner frame 02, and the inner frame 02 and the outer frame 03. It is a temporary connection structure with planar and thickness dimensions that meet certain heat dissipation channel requirements.
[0125] 16. For example Figure 23 The necessary motion and torsional cavity 53 for a single chip is carved out from the support layer 5 at the bottom layer of the SOI wafer-B using a laser cutting process. With the assistance of the aforementioned selective bonding, the cut structure can be directly detached from the bottom and removed.
[0126] 17. For example Figure 24The moving torsion cavity 53 at the bottom of the SOI wafer-B serves as a plasma etching window. Without photolithography, a dry etching process is used to remove the second bonding oxide layer 61 between the intermediate layer 6 and the top silicon layer 7, thereby releasing the movable structure of the MEMS micromirror. During the dry etching of silicon dioxide, a film needs to be applied to the front side of the SOI wafer-B to ensure that the etched wafer will not be unable to proceed with the etching process due to back helium leakage within the etching cavity. After etching, the film is removed. The applied film is generally a UV film that can withstand a certain temperature and can be peeled off without damage after the etching process is completed by reducing viscosity.
[0127] 18. For example Figure 25 The SOI wafer-B is aligned and fixed with the hard mask of the mirror metal layer 011. Al or Ti / Au mirror 01 is deposited on the top silicon layer 7 by physical vapor deposition or evaporation assisted by the hard mask. The hard mask is removed after the process is completed.
[0128] 19. By laser ablation cutting of temporary heat dissipation and fixing beams and temporary reinforcing ribs, SOI wafer-B is cut into independent MEMS micromirror chips by laser stealth cutting.
[0129] Alternatively, SOI wafer-B can be cut into independent MEMS micromirror chips using laser stealth cutting, and then temporary heat dissipation and fixing beams and temporary reinforcing ribs in individual chips can be cut by laser ablation.
[0130] In some scenarios, the temporary structure is cut after the packaging of a single MEMS chip is completed, because the temporary structure can also play a protective role in the packaging process, but the cutting efficiency is low.
[0131] Example 2
[0132] In Embodiment 1, the bonding sequence of the bottom layer (first double-polished silicon wafer 110) and the intermediate layer 6 (second double-polished silicon wafer 111) is changed to first bonding the bottom layer (first double-polished silicon wafer 110) and the intermediate layer 6 (second double-polished silicon wafer 111) to the top silicon layer 7 (third double-polished silicon wafer 112). Instead, the top silicon layer 7 and the intermediate layer 6 are bonded first, and then the top silicon layer 6 is bonded to the bottom layer. The cavity of the bottom support layer 5 is fabricated before bonding.
[0133] 1. For example Figure 26 and Figure 27 Take a third double-polished silicon wafer 112 with a thickness of 300-600μm, and fabricate a second bonding oxide layer 61 of 50-500nm by dry oxidation, wet oxidation or PECVD deposition of silicon dioxide. No oxide layer is required on the other side. If there is an oxide layer, it can be removed by wet etching.
[0134] 2. For example Figure 28The silicon oxide on the surface of the third double-polished silicon wafer 112 is patterned by photolithography, and then the silicon oxide is dry etched. After the silicon oxide layer is etched, deep silicon etching is performed. Deep silicon etching is used to selectively thin specific microstructure areas, such as the torsion beam or the back area 1121 of the mirror. The thinning thickness is determined according to the design requirements.
[0135] 3. For example Figure 29 and Figure 30 The silicon oxide surface of the third double-polished silicon wafer 112 is bonded to the 300-600μm second double-polished silicon wafer 111 via silicon-silicon bonding.
[0136] 4. For example Figure 31 The second double-polished silicon wafer 111 of the patterned bonded SOI wafer is ground, thinned and polished until the layer thickness is reduced to the range of 50-300μm, and this layer is defined as the intermediate layer 6.
[0137] 5. For example Figure 32 The intermediate layer 6 of the second double-polished silicon wafer 111 is photolithographically and deeply etched to the bonded silicon oxide layer to form a permanent reinforcing rib 10 and a torsion beam 04 (not shown in the figure).
[0138] 6. For example Figure 33 The bonded silicon oxide layer exposed after the deep silicon etching of the second double-polished silicon wafer 111 in the previous step is removed by dry etching.
[0139] 7. For example Figure 34 and Figure 35 The wafer is flipped, and the third double-polished silicon wafer 112 is ground, thinned and polished to a thickness of 30-200μm and defined as the top silicon layer 7. The SOI wafer containing the intermediate layer 6 and the top silicon layer 7 is defined as SOI wafer-C.
[0140] 8. For example Figure 36 A first double-polished silicon wafer 110 with a thickness of 300-600μm is selected. A first bonding oxide layer 52 of 50-500nm is deposited on one surface using dry oxidation, wet oxidation, or PECVD. The other side does not require an oxide layer; if an oxide layer is present, it can be removed by wet etching. Then, the silicon oxide layer is patterned by photolithography, wet etching, or dry etching to form a patterned bonding surface.
[0141] 9. For example Figure 37The process employs laser precision cutting, laser drilling, or wet single-crystal silicon etching to fabricate a moving torsion cavity 53 for the reflector 01 on the first double-polished silicon wafer 110. This moving torsion cavity 53 can penetrate the entire thickness of the first double-polished silicon wafer 110 to create a through-hole, or leave a portion of its thickness to create a blind hole, thus completing the processing of the bottom support layer 5. This step allows the cavity required for movement to be opened earlier because the grinding and thinning of the intermediate layer 6 and the top silicon layer 7 have already been completed. The bottom silicon layer primarily serves as the strength support for the entire large wafer, while the intermediate layer 6 and the top silicon layer 7 can already be supported by the optimized layout of the reinforcing rib structure. It is important to note that the cavity is preferably fabricated as a blind hole for two reasons: firstly, the bottom support layer 5 of the blind hole remains a complete, flat, and closed silicon surface on the back side during subsequent processes, providing good thermal conductivity and dissipation; secondly, it eliminates the need for temporary wafers during etching; and thirdly, it can withstand vacuum adsorption during the adhesive coating process, preventing the vacuum adsorption force from being transferred to the thin layers of the intermediate layer 6 and the top silicon layer 7, causing damage and cracks. Secondly, the blind via bottom silicon layer can provide some protection for the upper chip structure. The bottom support layer 5 can also be made of glass wafers, and the bonding and etching processes of glass wafers can achieve the corresponding processing effects.
[0142] 10. For example Figure 38 The first double-polished silicon wafer 110, after the blind via cavity has been fabricated, is aligned and bonded to the intermediate layer 6 of the SOI wafer-C. During the bonding process, the pressure inside the bonded cavity is maintained at a level comparable to the cavity pressure of the deep silicon etching process. The three-layer single-crystal silicon structure formed by bonding is defined as SOI wafer-D.
[0143] 11. For example Figure 39 On the top silicon layer 7 of the SOI wafer-D, a silicon oxide or silicon nitride layer with a thickness of 30-100 nm is deposited on the silicon surface as needed using PECVD. This layer is then patterned using photolithography and etching (and subsequently completely removed, not shown in the figure). This layer serves as a mask, and then piezoresistive sensors and their ohmic contact regions (ion implantation region 71) are fabricated using ion implantation and annealing processes. After the ion implantation process, the entire silicon oxide or silicon nitride mask is removed by wet etching.
[0144] 12. For example Figure 40 and Figure 41A 100-1000 nm thick first silicon dioxide or silicon nitride insulating layer 74 is deposited on the surface of the SOI wafer-D top silicon layer 7 using a PECVD process to ensure good density for better insulation and withstand voltage characteristics. Then, local silicon dioxide or silicon nitride is removed by photolithography and dry etching or wet etching to ensure that the ohmic contact area of the piezoresistive sensor is exposed so that it can be connected and led out by metal wires in subsequent process steps. The remaining part is covered and protected by the first silicon dioxide or silicon nitride insulating protective layer 74 to achieve surface insulation isolation.
[0145] 13. For example Figure 42 On the surface of the first silicon oxide or silicon nitride insulating layer 74 of the SOI wafer-D top silicon layer 7, a layer of Al or Ti / Au / Ti or Cr / Au / Cr with a thickness of 100-200nm is further fabricated by vapor deposition or physical vapor deposition process as a metal wire layer 78 and a metal pad. Then, the metal layer is patterned by photolithography, dry etching or wet etching process to realize the connection and lead-out of the electrical signal of the piezoresistive sensor. The thickness of Ti or Cr is 10-30nm, the thickness of Au is 100-200nm, and Ti or Cr sandwiches Au in the middle.
[0146] 14. For example Figure 43 and Figure 44 A second silicon dioxide or silicon nitride insulating layer 75, 100-1000 nm thick, is deposited on the metal conductive layer 78 and metal pad layer on the surface of the SOI wafer-D top silicon layer 7 to ensure good density for better insulation and withstand voltage characteristics. Then, the second silicon dioxide or silicon nitride insulating layer 75 is partially removed by photolithography, dry etching, or wet etching to ensure that the metal conductive layer 78 is well covered, protected, and insulated.
[0147] 15. For example Figure 45 Following the second silicon oxide or silicon nitride insulating layer 75, a 50-150 nm thick Ti / Au or Cr / Au electroplated seed layer (not shown in the figure) is deposited on the insulating film by vapor deposition or physical vapor deposition. The thickness of Ti or Cr is 10-30 nm, and the thickness of Au is 40-120 nm. Then, the photoresist in the area where the coil 73 is located is removed by thick photoresist lithography and development, exposing the seed layer in the area of the electroplated coil 73.
[0148] 16. An Au-plated coil 73 with a thickness of 10-20 μm is fabricated on the SOI wafer-D top silicon layer 7 using an electroplating process. Then, the photoresist is removed, and excess seed layer metal is removed by dry or wet etching to ensure that the coil 73 is connected in series without short circuits. At this point, the SOI wafer-B top silicon layer 7, the first silicon oxide or silicon nitride insulating layer 74, the metal conductive layer 78, the second silicon oxide or silicon nitride insulating layer 75, and the metal coil 73 layers have been fabricated and are interconnected.
[0149] 17. For example Figure 46 On the surface of the top silicon layer 7 and its associated multilayer structure of the SOI wafer-D, the main internal and external frame structure, torsion beam, permanent reinforcing rib 10 structure, temporary heat dissipation and fixing beam of the MEMS micromirror are fabricated by spraying photoresist, proximity lithography and dry plasma deep silicon etching process, with the etching depth reaching the bonding silicon oxide layer.
[0150] 18. For example Figure 47 The SOI wafer-D is aligned and fixed with the hard mask of the mirror metal layer 011. Al or Ti / Au mirror 01 is deposited on the top silicon layer 7 by physical vapor deposition or evaporation assisted by the hard mask. The hard mask is removed after the process is completed.
[0151] 19. SOI wafer-D is cut into independent MEMS micromirror chips by laser stealth dicing.
Claims
1. A structure-assisted fabrication method for an electromagnetic MEMS micromirror, the electromagnetic MEMS micromirror comprising a reflector (01), an inner frame (02), and an outer frame (03), wherein the reflector (01) is connected to the inner frame (02) via a torsion beam (04), and the inner frame (02) is connected to the outer frame (03) via a torsion beam (04); characterized in that, Includes the following steps: Step 1: Fabrication of the supporting load-bearing layer (5); A patterned bonding surface is fabricated on the surface of the first silicon wafer as a support carrier layer (5); Step 2: Bond the intermediate layer (6) to obtain SOI wafer-A; The second silicon wafer is bonded to the bonding surface of the intermediate layer (6) and the supporting carrier layer (5) to obtain SOI wafer-A; Step 3: Fabrication of reinforcing ribs; Photolithography and deep silicon etching are performed on the intermediate layer (6) of SOI wafer-A to the bonding silicon oxide layer to form a reinforcing rib assembly; the reinforcing rib assembly includes permanent reinforcing ribs (10) and temporary reinforcing ribs (9), the permanent reinforcing ribs (10) are arranged at positions corresponding to the bottom of the mirror (01) and the inner frame (02); the temporary reinforcing ribs (9) are arranged at positions corresponding to the space between the mirror (01) and the inner frame (02) and between the inner frame (02) and the outer frame (03); Step 4: Bond the top silicon layer (7) to obtain SOI wafer-B; The surface of the third silicon wafer with a silicon oxide layer is patterned and etched to form a torsion beam or the back area of a reflective mirror (1121); it is used as the top silicon layer (7) and bonded to the SOI wafer-A fabricated in step 3 with silicon-silicon bonding; the top silicon layer (7) is ground and thinned to obtain an SOI wafer-B containing three layers of single-crystal silicon with a pre-fabricated partial structure. Step 5: Fabrication of SOI wafer-B top silicon layer (7) and its associated multilayer structure; A first silicon oxide or silicon nitride insulating layer (74), a metal wire layer (78), a second silicon oxide or silicon nitride insulating layer (75), and a metal coil (73) layer are fabricated on the top silicon layer (7) of the SOI wafer-B. Step 6: Fabrication of the inner frame (02), outer frame (03) structure, torsion beam (04) structure, temporary heat dissipation and fixing beam (8); On the surface of the SOI wafer-B top silicon layer (7) and its associated multilayer structure completed in step 5, a MEMS micromirror inner frame (02), outer frame (03) structure, torsion beam (04) structure, and temporary heat dissipation and fixing beam (8) are fabricated, and the etching depth is up to the bonding silicon oxide layer; the temporary heat dissipation and fixing beam (8) is located between the mirror (01) and the inner frame (02) and between the inner frame (02) and the outer frame (03), and corresponds to the top of the temporary reinforcing rib (9); Step 7: Release the movable structure of the MEMS micromirror; The support and bearing layer of SOI wafer-B is fabricated in step 6 by laser ablation cutting process (5), and the motion torsion cavity (53) required for a single chip is extracted. Using the torsional cavity (53) as a plasma etching window, the bonded silicon oxide layer between the intermediate layer (6) and the top silicon layer (7) is removed by dry etching silicon oxide process, releasing the movable structure of the MEMS micromirror. Step 8: Fabrication of the reflector (01); The mirror (01) is fabricated in the area corresponding to the top silicon layer (7) of the SOI wafer-B fabricated in step 7 using a hard mask-assisted metal deposition process. Step 9: By laser ablation cutting of temporary heat dissipation and fixing beam (8) and temporary reinforcing rib (9), SOI wafer-B is cut into independent MEMS micro mirror chips by laser stealth cutting. Alternatively, SOI wafer-B can be cut into independent MEMS micromirror chips by laser stealth cutting, and then temporary heat dissipation and fixing beams (8) and temporary reinforcing ribs (9) in individual chips can be cut by laser ablation.
2. The structure-assisted electromagnetic MEMS micromirror fabrication method according to claim 1, characterized in that: Step 1 also includes surface treatment of the non-bonded region (521) to roughen the surface of the non-bonded region (521) of the bonded surface.
3. The structure-assisted electromagnetic MEMS micromirror fabrication method according to claim 2, characterized in that: In step 7, during the dry etching of silicon oxide, a film is applied to the front side of the SOI wafer-B.
4. A structure-assisted method for fabricating electromagnetic MEMS micromirrors, characterized in that, Includes the following steps: Step 1: Fabrication of the top silicon layer (7); The surface of the third silicon wafer with the required silicon oxide layer for bonding is patterned and etched to form the back area of the torsion beam or the reflector (1121) to obtain the top silicon layer (7). Step 2: Bonding of the top silicon layer (7) and the intermediate layer (6); The second silicon wafer is used as the intermediate layer (6), and the silicon oxide surface of the top silicon layer (7) is bonded to the intermediate layer (6) with silicon-silicon bonding. Step 3: Grind and thin the intermediate layer (6), and make reinforcing ribs; The intermediate layer (6) is thinned by grinding, and then photolithography and deep silicon etching are performed to the bonded silicon oxide layer to form a reinforcing rib; the reinforcing rib includes a permanent reinforcing rib (10) and a temporary reinforcing rib (9), the permanent reinforcing rib (10) is arranged at the bottom of the mirror (01) and the inner frame (02); the temporary reinforcing rib (9) is arranged at the position between the mirror (01) and the inner frame (02) and between the inner frame (02) and the outer frame (03); Step 4: Grind the top silicon layer (7) to fabricate SOI wafer-C; The bonded silicon oxide layer exposed after deep silicon etching of the intermediate layer (6) in step 3 is removed by dry etching; flipping The top silicon layer (7) of the wafer is ground and thinned to a thickness of 30-200 μm. The SOI wafer containing the intermediate layer (6) and the top silicon layer (7) is defined as SOI wafer-C. Step 5: Fabrication of the supporting load-bearing layer (5); A patterned bonding surface is fabricated on the surface of the first silicon wafer as a support carrier layer (5); The cavity required for the torsional motion of the reflector (01) is fabricated on the first silicon wafer by using laser precision cutting, laser drilling, or wet single-crystal silicon etching processes. Step 6: Bond the support layer (5) to obtain SOI wafer-D; The support layer (5) fabricated in step 5 is bonded to the intermediate layer (6) of SOI wafer-C to obtain SOI wafer-D; Step 7: Fabrication of SOI wafer - D-top silicon layer (7) and its associated multilayer structure; A first silicon oxide or silicon nitride insulating layer (74), a metal wire layer (78), a second silicon oxide or silicon nitride insulating layer (75), and a metal coil layer (73) are fabricated on the top silicon layer (7) of the SOI wafer-D. Step 8: Fabrication of the inner frame (02), outer frame (03) structure, torsion beam (04) structure, temporary heat dissipation and fixing beam (8); On the surface of the SOI wafer-D top silicon layer (7) and its associated multilayer structure completed in step 7, the main inner frame (02), outer frame (03) structure, torsion beam (04) structure, and temporary heat dissipation and fixing beam (8) of the MEMS micromirror are fabricated, and the etching depth is up to the bonding silicon oxide layer; the temporary heat dissipation and fixing beam (8) is located between the mirror (01) and the inner frame (02) and between the inner frame (02) and the outer frame (03), and corresponds to the top of the temporary reinforcing rib (9); Step 9: Fabrication of the reflector (01); The mirror (01) is fabricated in the area corresponding to the top silicon layer (7) of the SOI wafer-D fabricated in step 8 using a hard mask-assisted metal deposition process. Step 10: The SOI wafer-D is cut into independent MEMS micromirror chips by laser stealth dicing.
5. The structure-assisted electromagnetic MEMS micromirror fabrication method according to claim 4, characterized in that: In step 5, the surface of the non-bonded region (521) is roughened.