Method and device for determining driving resistance, testing machine and storage medium

Abstract

Embodiments of the present application provide a method and device for determining a driving resistance, a testing machine and a storage medium. The method is applied to the testing machine and includes: obtaining a first output voltage value of a first driving circuit in the memory when the driving resistance is turned on while outputting data from an output pin of the memory; the first driving circuit includes a pull-up resistor and a pull-down resistor, and the driving resistance includes the pull-up resistor or the pull-down resistor; obtaining a test resistance value of a test circuit of the testing machine, a power voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistance is turned on; the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistance is turned on; and determining the resistance value of the driving resistance according to a voltage division law of the series circuit based on the first output voltage value, the test resistance value of the test circuit, the first voltage value and the power voltage value.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and relates to, but is not limited to, a determination method and device of driving resistance, a test machine and a storage medium. BACKGROUND

[0002] When an output pin of a memory, for example, a dynamic random access memory (DRAM), outputs data, a driving circuit is used, and the driving circuit includes a pull-up resistor and a pull-down resistor. The resistance values of the pull-up resistor and the pull-down resistor affect the output characteristics of the driving circuit. A method for measuring the pull-up resistor and the pull-down resistor provided in a standard formulated by the Joint Electron Device Engineering Council (JEDEC) is as follows: a single path in which the pull-up resistor or the pull-down resistor is turned on is fixed, and the measurement of the pull-up resistor and the pull-down resistor is achieved by measuring the electrical properties of the output pin. It can be seen that, in the above method, the single path in which the pull-up resistor or the pull-down resistor of the driving circuit is turned on needs to be maintained to be continuously turned on, so as to measure the resistance on the path. However, a data signal such as a data strobe signal (DQS) is normally output in a high-low level continuous switching mode, and cannot maintain the single path to be continuously turned on. Therefore, the traditional method cannot measure the resistance of the driving circuit of such a pin. SUMMARY

[0003] In view of this, the present application provides a determination method and device of driving resistance, a test machine and a storage medium.

[0004] In a first aspect, an embodiment of the present application provides a determination method of driving resistance in a memory, applied to a test machine, and including: obtaining a first output voltage value of a first driving circuit in the memory when a driving resistance is turned on while the memory outputs data; wherein the first driving circuit includes a pull-up resistor and a pull-down resistor, and the driving resistance includes the pull-up resistor or the pull-down resistor; obtaining a test resistance value of a test circuit of the test machine, a power voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistance is turned on; wherein the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistance is turned on; and determining a resistance value of the driving resistance according to a voltage division law of the series circuit based on the first output voltage value, the test resistance value of the test circuit, the first voltage value and the power voltage value.

[0005] In some embodiments, based on the first output voltage value, a test resistance value of the test circuit, the first voltage value and the power supply voltage value, the resistance value of the driving resistance is determined according to a voltage division law of the series circuit, including: determining a first voltage difference between the first output voltage value and the first voltage value; determining a second voltage difference between the first output voltage value and the power supply voltage value or zero voltage; determining a ratio between the first voltage difference and the second voltage difference; and determining a product between the ratio and the test resistance value of the test circuit as the resistance value of the driving resistance.

[0006] In some embodiments, the test machine further includes a first data receiver, and the obtaining the first output voltage value of the first driving circuit when the driving resistance is turned on while the output pin of the memory outputs data includes: applying the first voltage value to the test circuit to turn on the driving resistance and output data of the output pin of the memory; controlling the first data receiver to collect first output waveform data output by the output pin when the output pin of the memory outputs data; and determining the first output voltage value of the first driving circuit when the driving resistance is turned on based on the first voltage value and the first output waveform data.

[0007] In some embodiments, before the first voltage value is applied to the test circuit, the method further includes: issuing a read instruction to the memory to trigger the output pin of the memory to output data.

[0008] In some embodiments, when the output pin of the memory outputs data, controlling the first data receiver to collect first output waveform data output by the output pin includes: starting timing after the read instruction is issued to the memory; and controlling the first data receiver to collect first output waveform data output by the output pin after a timing duration reaches a preset duration, wherein the preset duration is used to make the output pin of the memory output data.

[0009] In some embodiments, before the read instruction is issued to the memory, the method further includes: in the case that the output pin is a DQ pin, writing preset data into a storage capacitor of the memory.

[0010] In some embodiments, the first output waveform includes a second voltage value and a third voltage value greater than the second voltage value, and determining the first output voltage value of the first driving circuit when the driving resistor is turned on based on the first voltage value and the first output waveform data includes: in a case where the first voltage value is not equal to a power voltage value of the first driving circuit and a zero voltage, determining the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistor is turned on; and determining the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistor is turned on.

[0011] In some embodiments, the first output waveform includes a second voltage value and a third voltage value greater than the second voltage value, and determining the first output voltage value of the first driving circuit when the driving resistor is turned on based on the first voltage value and the first output waveform includes: in a case where the first voltage value is equal to a power voltage value of the first driving circuit, determining the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistor is turned on; and in a case where the first voltage value is equal to a zero voltage, determining the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistor is turned on.

[0012] In some embodiments, the test circuit includes a second driving circuit, and obtaining the test resistance value of the test circuit includes: determining a terminal resistance of the second driving circuit of the test circuit; and determining the terminal resistance as the test resistance value of the test circuit.

[0013] In some embodiments, the output pin includes an input-output data (DQ) pin, a DQS pin, or an alert (Alert) pin.

[0014] In some embodiments, the memory is a dynamic random access memory (DRAM) chip.

[0015] In a second aspect, the embodiments of the present application further provide a test machine, including:

[0016] a test circuit, configured to be connected with a first driving circuit in a to-be-tested memory, and when a driving resistor of the first driving circuit is turned on, a test resistor of the test circuit and the driving resistor of the first driving circuit form a series circuit; wherein the first driving circuit includes a pull-up resistor and a pull-down resistor, and the driving resistor includes the pull-up resistor or the pull-down resistor.

[0017] The first controller is configured to acquire a first output voltage value of the first driving circuit when the driving resistor is turned on during output of data by the output pin of the to-be-tested memory; acquire a test resistor value of a test circuit of the test machine, a power supply voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on; and determine the resistance value of the driving resistor according to a voltage division law of the series circuit based on the first output voltage value, the test resistor value of the test circuit, the first voltage value, and the power supply voltage value.

[0018] In a third aspect, the embodiments of the present application further provide a determination apparatus of a driving resistor in a memory, applied to a test machine, comprising:

[0019] The first acquisition module is configured to acquire a first output voltage value of the first driving circuit when the driving resistor is turned on during output of data by the output pin of the memory; wherein the first driving circuit comprises a pull-up resistor and a pull-down resistor, and the driving resistor comprises the pull-up resistor or the pull-down resistor.

[0020] The second acquisition module is configured to acquire a test resistor value of a test circuit of the test machine, a power supply voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on; wherein the test resistor of the test circuit and the driving resistor of the first driving circuit form a series circuit when the driving resistor is turned on.

[0021] The determination module is configured to determine the resistance value of the driving resistor according to a voltage division law of the series circuit based on the first output voltage value, the test resistor value of the test circuit, the first voltage value, and the power supply voltage value.

[0022] In a fourth aspect, the embodiments of the present application provide a computer readable storage medium having a computer program stored thereon, which, when executed by a processor, implements some or all of the steps of the above method.

[0023] In the embodiments of the present application, first, a first output voltage value of the first driving circuit in the memory when the driving resistor is turned on during output of data by the output pin of the memory is acquired; then, a test resistor value of a test circuit of the test machine, a power supply voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on are acquired, wherein the test resistor of the test circuit and the driving resistor of the first driving circuit form a series circuit when the driving resistor is turned on; finally, the resistance value of the driving resistor is determined according to a voltage division law of the series circuit by using the first output voltage value, the test resistor value of the test circuit, the first voltage value, and the power supply voltage value.

[0024] It can be seen that the application constructs a voltage division circuit by connecting the test circuit of the test machine with the first driving circuit, so that the test resistor of the test circuit and the driving resistor of the first driving circuit form a series circuit when the driving resistor is turned on; then by using the voltage division law of the series circuit, according to the voltage ratio equal to the resistance ratio, on the basis of obtaining the first output voltage value of the first driving circuit when the driving resistor is turned on, the first voltage value applied to the test circuit when the driving resistor is turned on, the power supply voltage value of the first driving circuit and the test resistor value of the test circuit, the determination of the resistance value of the driving resistor is realized. Compared with the method of determining the driving resistor by fixing the single-path conduction and determining the current in the single path in the related art, the application determines the size of the driving resistor by determining the voltage when the driving resistor is turned on, so there is no problem of being unable to integrate to obtain the current due to the continuous switching of the high and low levels in the related art, and the driving circuit with the output data being the continuous switching of the high and low levels cannot be applied. Therefore, the method provided by the application solves the problems in the related art and expands the application range. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 A circuit diagram for determining the resistance values of the pull-up resistor RON Pu and the pull-down resistor RON Pd in the driving circuit in the related art provided by the embodiment of the application.

[0026] Figure 2A An implementation flowchart of the determination method of the driving resistor in the memory provided by the embodiment of the application;

[0027] Figure 2B A schematic diagram of the connection of the first driving circuit and the test circuit provided by the embodiment of the application;

[0028] Figure 2C A schematic diagram of the on-circuit when the pull-down resistor is turned on in the first driving circuit provided by the embodiment of the application;

[0029] Figure 2D A schematic diagram of the on-circuit when the pull-up resistor is turned on in the first driving circuit provided by the embodiment of the application;

[0030] Figure 2E An implementation flowchart of step S103 provided by the embodiment of the application;

[0031] Figure 3 An implementation flowchart of another determination method of the driving resistor in the memory provided by the embodiment of the application;

[0032] Figure 4 A schematic diagram of the determination circuit of the driving resistor provided by the embodiment of the application;

[0033] Figure 5A The schematic diagram of output waveform of pin when tester VT is set as VDDQ is provided for the embodiment of the present application;

[0034] Figure 5B The schematic diagram of output waveform of pin when tester VT is set as 0 is provided for the embodiment of the present application;

[0035] Figure 6 The schematic diagram of the composition structure of a determination device of driving resistance in a memory is provided for the embodiment of the present application. DETAILED DESCRIPTION

[0036] Exemplary embodiments of the present application will be described herein below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it is to be understood that the present application can be embodied in various forms without being limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present application to those skilled in the art.

[0037] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one skilled in the art that the present application can be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail in order to avoid unnecessarily complicating this disclosure. As used herein, the term "exemplary" means "an example of."

[0038] In the drawings, the size of layers, regions, elements, and the relative sizes of the same can be exaggerated for clarity. Like reference numbers in different drawings can indicate the same or similar elements.

[0039] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0040] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “compose” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0041] Figure 1 In related technologies, the pull-up resistor RON in the driver circuit is measured via the input / output data (DQ) pin. Pu and pull-down resistor RON Pd Circuit diagram showing resistance values. In implementation, the DQ pin of the drive circuit 101 is connected to the DC unit in the tester 102, and the DC unit provides power as shown. Figure 1 The voltage V shown out and detection current I out .

[0042] When the pull-up resistor RON in the drive circuit 101 Pu When on, pull-down resistor RON Pd It is in the off state. That is to say, at this time only the pull-up resistor RON is in the off state. Pu The single-path circuit is conducting. This is due to the pull-up resistor RON. Puone end of the RON is connected to the power supply voltage VDDQ of the driving circuit 101, and the other end is connected to the voltage V provided by the DC unit in the test machine 102 out Therefore, RON Pu = (VDDQ-V out ) / |I out |.

[0043] When the pull-down resistance RON Pd in the driving circuit 101 is turned on, the pull-up resistance RON Pu is in an off state. That is, at this time, only the single path in which the pull-down resistance RON Pd is located is turned on. Since one end of the pull-down resistance RON Pd is connected to the ground VSSQ, and the other end is connected to the voltage V provided by the DC unit in the test machine 102 out , therefore, RON Pd = V out / |I out |.

[0044] In the above method, since the determination of the current I out requires integration of the current value in a unit of time, it is necessary to maintain the persistent conduction of the single path in which the pull-up resistance or the pull-down resistance in the driving circuit is located. When implemented, the persistent conduction of the single path is realized by artificially making the DQ pin continuously output data 1 or 0. For pins such as DQS, the output is a continuously switched high and low level, and it is impossible to artificially realize the persistent conduction of the single path. The current corresponding to the path of the continuously switched high and low level is also switched positively and negatively, so that when the current I out is determined by integration, the current value is offset, so that the current I out cannot be obtained, and the driving resistance of the driving circuit corresponding to the pin with continuously switched high and low levels cannot be determined.

[0045] Based on this, the embodiment of the application provides a determination method of driving resistance in a memory, which is applied to a test machine, and the method can be executed by a processor of the test machine. Figure 2A The implementation flowchart of the determination method of driving resistance in a memory provided by the embodiment of the application is shown in FIG. 1, and the method comprises the following steps S101 to S103: Figure 2A

[0046] Step S101: obtaining a first output voltage value of a first driving circuit in a memory when a driving resistance is turned on during output of data by an output pin of the memory; wherein the first driving circuit comprises a pull-up resistance and a pull-down resistance, and the driving resistance comprises the pull-up resistance or the pull-down resistance;

[0047] ​The memory can be DRAM, static random-access memory (SRAM), or the like. The output pin refers to a pin for outputting data. In some embodiments, the output pin can include a DQ pin, a DQS pin, or an Alert pin.

[0048] The first driving circuit is used to make the data output by the output pin meet the requirements. Each output pin has a driving circuit. That is, the first driving circuit can be a driving circuit for a DQ pin, a driving circuit for a DQS pin, or a driving circuit for an Alert pin. Generally, the first driving circuit includes a pull-up resistor and a pull-down resistor. The first end of the pull-up resistor is connected to the power supply voltage of the first driving circuit, the second end is connected to the first end of the pull-down resistor, and the second end of the pull-down resistor is connected to the ground. In the case that the pull-up resistor is turned on, the output pin outputs high level; in the case that the pull-down resistor is turned on, the output pin outputs low level.

[0049] The driving resistor includes a pull-up resistor or a pull-down resistor, that is, step S101 is used to determine the first output voltage value of the first driving circuit when the pull-down resistor is turned on or the first output voltage value of the first driving circuit when the pull-up resistor is turned on.

[0050] In some embodiments, the first output voltage value of the first driving circuit when the driving resistor is turned on can be obtained by a data receiver. The data receiver can be a component internally provided in the tester, or can exist independently of the tester. After the data receiver collects the first output voltage value of the first driving circuit when the driving resistor is turned on, the first output voltage value can be sent to the tester for use by the tester. The embodiments of the present application do not limit the way of obtaining the first output voltage value of the first driving circuit when the driving resistor is turned on.

[0051] Step S102: obtaining a test resistance value of a test circuit of the tester, a power supply voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on; wherein the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistor is turned on;

[0052] Here, since the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistor is turned on, the test circuit and the first driving circuit are connected to each other. In order to turn on the driving resistance of the first driving circuit, a first voltage can be applied to the test circuit to form a closed loop between the first driving circuit and the test circuit, thereby generating a current to form a series circuit.

[0053] The power supply voltage of the first driving circuit is a voltage applied to the first driving circuit. The test resistance value is a resistance value of the test circuit. In some embodiments, the test circuit can include a second driving circuit, and correspondingly, the implementation of the step S102 of acquiring the test resistance value of the test circuit can include the following steps S1021 and S1022:

[0054] The step S1021: determining a terminal resistance of the second driving circuit of the test circuit.

[0055] Here, according to the standard formulated by JEDEC, the terminal resistance of the second driving circuit can be 50 ohms. In some embodiments, the terminal resistance of the second driving circuit can also be other values.

[0056] The step S1022: determining the terminal resistance as the test resistance value of the test circuit.

[0057] Here, in the case where the test circuit only includes the second driving circuit, the terminal resistance of the second driving circuit is the test resistance value of the test circuit.

[0058] Of course, in the case where the test circuit includes other components such as the first resistance in addition to the second driving circuit, the test resistance value of the test circuit can be equal to the sum of the terminal resistance and the resistance value of the other components such as the first resistance.

[0059] Figure 2B The schematic diagram for connecting the first driving circuit and the test circuit. As can be seen, the test circuit 1021 in the tester 102 (in the case where the test circuit 1021 includes the second driving circuit DR2 as shown in the figure) is connected with the input and output (IO) pins of the first driving circuit DR1, so as to realize the mutual connection of the test circuit 1021 and the first driving circuit DR1.

[0060] Figure 2C The schematic diagram for the conduction circuit when the pull-down resistance in the first driving circuit is turned on. As can be seen, in the case where the pull-down resistance RON Pd in the first driving circuit is turned on, the pull-down resistance RON Pd forms a series circuit with the test resistance Rc in the test circuit. Figure 2D The schematic diagram for the conduction circuit when the pull-up resistance in the first driving circuit is turned on. As can be seen, in the case where the pull-up resistance RON Pu in the first driving circuit is turned on, the pull-up resistance RON Pu forms a series circuit with the test resistance Rc in the test circuit.

[0061] The step S103: based on the first output voltage value, the test resistance value of the test circuit, the first voltage value and the power supply voltage value, determining the resistance value of the driving resistance according to the voltage division law of the series circuit.

[0062] Here, since the test resistor of the test circuit and the drive resistor of the first drive circuit form a series circuit when the drive resistor is turned on, the resistance value of the drive resistor can be obtained according to the voltage division law of the series circuit, i.e., the ratio of the voltage values at both ends of the test resistor and the drive resistor is equal to the ratio of the resistance values of the test resistor and the drive resistor, when the voltage values at both ends of the test resistor and the drive resistor are obtained. The voltage value at both ends of the test resistor can be obtained by the difference between the first output voltage value and the first voltage value, and the voltage value at both ends of the drive resistor can be obtained by the difference between the first output voltage value and the power supply voltage value (when the drive resistor is a pull-up resistor) or zero voltage (when the drive resistor is a pull-down resistor). Therefore, the resistance value of the drive resistor can be obtained when the test resistor value is obtained.

[0063] Correspondingly, as shown in Figure 2E , the implementation of step S103 can include the following steps S1031 to S1034:

[0064] Step S1031: determining a first voltage difference between the first output voltage value and the first voltage value;

[0065] As shown in Figure 2C and Figure 2D , the first voltage difference between the first output voltage value and the first voltage value is the voltage difference between the IO pin and the first voltage value VT.

[0066] Step S1032: determining a second voltage difference between the first output voltage value and the power supply voltage value or zero voltage;

[0067] Here, in the case of a pull-down resistor, the second voltage difference is the difference between the first output voltage value and zero voltage. Since the first output voltage value can be the voltage at the output pin of the first drive circuit, as shown in Figure 2C , the second voltage difference is the voltage difference between the IO pin and VSSQ (i.e., zero voltage).

[0068] In the case of a pull-up resistor, the second voltage difference is the difference between the first output voltage value and the power supply voltage value. Similarly, as shown in Figure 2D , the second voltage difference is the voltage difference between the IO pin and VDDQ (i.e., the power supply voltage).

[0069] Step S1033: determining the ratio between the first voltage difference and the second voltage difference;

[0070] Step S1034: determining the product of the ratio and the test resistor value of the test circuit as the resistance value of the drive resistor.

[0071] Here, according to the voltage division law of the series circuit, the resistance value of the driving resistor / test resistance value = voltage across the driving resistor / voltage across the test resistor, and the voltage across the driving resistor / voltage across the test resistor = first pressure difference / second pressure difference = ratio. Therefore, the resistance value of the driving resistor = ratio * test resistance value, so as to obtain the resistance value of the driving resistor.

[0072] In some embodiments, the implementation of step S103 can also be determined according to the ratio of the voltage value across the test resistor and the total voltage value across the test resistor and the driving resistor, which is equal to the ratio of the resistance value of the test resistor and the total resistance value of the test resistor and the driving resistor; and the resistance value of the driving resistor can also be determined according to the ratio of the voltage value across the driving resistor and the total voltage value across the test resistor and the driving resistor, which is equal to the ratio of the resistance value of the driving resistor and the total resistance value of the test resistor and the driving resistor. The implementation can refer to the above method, which will not be described here.

[0073] In the embodiments of the present application, first, the first output voltage value of the first driving circuit when the driving resistor is turned on is obtained when the output pin of the memory outputs data; then the test resistance value of the test circuit of the test machine, the power voltage value of the first driving circuit, and the first voltage value applied to the test circuit when the driving resistor is turned on are obtained, wherein the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistor is turned on; finally, according to the voltage division law of the series circuit, the resistance value of the driving resistor is determined by using the first output voltage value, the test resistance value of the test circuit, the first voltage value and the power voltage value. As can be seen, the present application connects the test circuit of the test machine with the first driving circuit to construct a voltage division circuit, so that the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistor is turned on; then according to the voltage ratio equal to the resistance ratio, the determination of the resistance value of the driving resistor is realized on the basis of the first output voltage value of the first driving circuit when the driving resistor is turned on, the first voltage value applied to the test circuit when the driving resistor is turned on, the power voltage value of the first driving circuit and the test resistance value of the test circuit. Compared with the method of determining the driving resistor by fixing the single path conduction and determining the current in the single path in the related art, the present application determines the size of the driving resistor by determining the voltage when the driving resistor is turned on, so there is no problem of being unable to integrate to obtain the current due to the continuous switching of high and low levels, and being unable to be applied to the driving circuit with the output data being continuous switching of high and low levels. Therefore, the method provided by the present application solves the problems in the related art and expands the application range.

[0074] In some embodiments, the test machine further comprises a first data receiver, and correspondingly, the implementation of step S101 "obtaining the first output voltage value of the first driving circuit in the memory when the driving resistor is turned on while the memory outputs data through the output pin" can comprise the following steps S1011-S1013:

[0075] Step S1011: applying a first voltage value to the test circuit to turn on the driving resistor and make the output pin of the memory output data;

[0076] Here, since the driving resistor in the first driving circuit is in the on state and outputs the first output voltage value in step S101, the first voltage value needs to be applied to the test circuit to form a closed loop between the test circuit and the first driving circuit, so that the driving resistor is turned on and the first driving circuit outputs the first output voltage value.

[0077] In some embodiments, before step S1011, the following step S1010 can also be included:

[0078] Step S1010: issuing a read instruction to the memory to trigger the output pin of the memory to output data;

[0079] In some embodiments, the test machine can further comprise a first controller and a command bus. Correspondingly, the implementation of step S1010 can comprise: issuing a read instruction to the memory by the first controller of the test machine through the command bus to trigger the output pin of the memory to output data. In some embodiments, the memory can further comprise a second data receiver and a second controller, the second controller being configured to receive the read instruction sent by the test machine and send the read instruction to the second data receiver, and being configured to control the output pin of the memory to output data through the second controller.

[0080] In the embodiments of the present application, the read instruction is first issued to the memory to trigger the output pin of the memory to output data, thereby facilitating the subsequent obtaining of the first output voltage value of the first driving circuit when the driving resistor is turned on through the output pin.

[0081] In the case where the output pin is a DQ pin, before step S1010 "issuing a read instruction to the memory", the following step can also be included: writing preset data into the storage capacitor of the memory.

[0082] Here, the preset data can be set according to requirements. For example, if the resistance value of the pull-up resistor needs to be tested, the data "1" can be written into the storage capacitor of the memory; if the resistance value of the pull-down resistor needs to be tested, the data "0" can be written into the storage capacitor of the memory. Thus, in the case that no data is stored in the memory, the tester can write data into the storage capacitor of the memory to facilitate the determination of the resistance value of the driving resistor in the driving circuit.

[0083] Step S1012: When the memory outputs data through the output pin, control the first data receiver to collect the first output waveform data output by the output pin.

[0084] Here, since the first data receiver is used to collect the first output waveform data output by the output pin, the first data receiver is connected to the output pin of the first driving circuit.

[0085] In some embodiments, since the memory outputs data through the output pin after receiving the read instruction issued by the tester, a certain time is required from the issuance of the read instruction by the tester to the reception of the read instruction by the memory and the response of the memory to output data. Therefore, in some embodiments, the implementation of step S1012 can control the first data receiver to collect the first output waveform data output by the output pin after a preset delay.

[0086] Correspondingly, the implementation of step S1012 can include the following steps S121 and S122:

[0087] Step S121: Start timing after issuing the read instruction to the memory.

[0088] Step S122: Control the first data receiver to collect the first output waveform data output by the output pin after the timing duration reaches a preset duration, wherein the preset duration is used to make the output pin of the memory output data.

[0089] Here, the preset duration can be determined according to the model of the memory and the standard formulated by JEDEC. After the preset duration, the output pin of the memory has started to output data, so that the first data receiver can collect the first output waveform data output by the output pin at this moment.

[0090] Step S1013: Determine the first output voltage value of the first driving circuit when the driving resistor is turned on based on the first voltage value and the first output waveform data.

[0091] Here, since the magnitude of the first voltage value will affect whether a voltage difference is generated between the first voltage value and the power supply voltage value of the first driving circuit when the pull-up resistor in the first driving circuit is turned on, and whether a voltage difference is generated between the first voltage value and zero voltage when the pull-down resistor in the first driving circuit is turned on, and only in the case where a voltage difference is generated between the first voltage value and the power supply voltage of the first driving circuit or zero voltage, the first output voltage value of the first driving circuit when the driving resistor is turned on can be different from the first voltage value, the power supply voltage value of the first driving circuit and zero voltage, so that the first voltage difference between the first output voltage value and the first voltage value, and the second voltage difference between the first output voltage value and the power supply voltage value or zero voltage can be obtained, and then the resistance value of the driving resistor can be obtained.

[0092] That is, when the first voltage value is equal to the power supply voltage value of the first driving circuit, since there is no voltage difference between the first voltage value and the power supply voltage value of the first driving circuit, the first output voltage value when the pull-up resistor in the first driving circuit is turned on cannot be used to determine the size of the pull-up resistor. However, at this time, there is a voltage difference between the first voltage value and zero voltage, so the first output voltage value when the pull-down resistor in the first driving circuit is turned on can be used to determine the size of the pull-down resistor.

[0093] When the first voltage value is equal to zero voltage, since there is no voltage difference between the first voltage value and zero voltage, the first output voltage value when the pull-down resistor in the first driving circuit is turned on cannot be used to determine the size of the pull-down resistor. However, at this time, there is a voltage difference between the first voltage value and the power supply voltage value of the first driving circuit, so the first output voltage value when the pull-up resistor in the first driving circuit is turned on can be used to determine the size of the pull-up resistor.

[0094] When the first voltage value is neither equal to the power supply voltage value of the first driving circuit nor equal to zero voltage, since there is a voltage difference between the first voltage value and the power supply voltage value of the first driving circuit and a voltage difference between the first voltage value and zero voltage, the first output voltage value when the pull-down resistor in the first driving circuit is turned on can be used to determine the size of the pull-down resistor, and the first output voltage value when the pull-up resistor in the first driving circuit is turned on can be used to determine the size of the pull-up resistor.

[0095] In summary, in the case where the first voltage value is neither equal to the power supply voltage value of the first driving circuit nor equal to zero voltage, one voltage value can be used to determine the resistance values of the pull-up resistor and the pull-down resistor. In the case where the first voltage value is equal to the power supply voltage value of the first driving circuit or zero voltage, only one voltage value can be used to determine the resistance value of the pull-up resistor or the pull-down resistor, and the other resistance value needs to be determined by switching the first voltage value.

[0096] In some embodiments, the implementation of step S1013 can select a high level or a low level in the first output waveform data as the first output voltage value according to whether the driving resistor is a pull-up resistor or a pull-down resistor.

[0097] In the embodiments of the present application, first, a first voltage value is applied to the test circuit, so that the first driving circuit and the test circuit are turned on; then, when the memory outputs data, the first data receiver is controlled to collect first output waveform data output by the output pin; finally, according to the size of the first voltage value, the first output voltage value of the first driving circuit when the driving resistor is turned on is determined in the first output waveform data. In this way, first, in the related art, the DQ pin of the driving circuit is connected to the DC unit in the test machine, and the voltage V out and the detection current I out , so as to obtain the resistance value of the driving resistor. However, in the present application, the output pin of the first driving circuit is connected to the first data receiver in the test machine, the first output waveform data output by the output pin is collected by the first data receiver, the first output voltage value of the first driving circuit when the driving resistor is turned on is obtained, and then the resistance value of the driving resistor is obtained by using the first output voltage value, thereby solving the problem in the related art of determining the resistance value of the driving resistor by measuring the current value, and further enabling the method provided in the present application to be applied to the driving circuit in which the output data is continuously switched between high and low levels. Second, since the data receiver and the driving circuit are usually included in the test machine, the scheme provided in the present application can determine the resistance value of the driving resistor without changing the original structure of the test machine, so that the method provided in the embodiments of the present application is easier to implement and operate.

[0098] In some embodiments, the first output waveform includes a second voltage value and a third voltage value greater than the second voltage value, and correspondingly, the implementation of step S1013 “determining the first output voltage value of the first driving circuit when the driving resistor is turned on based on the first voltage value and the first output waveform data” can include the following three cases:

[0099] The first case: in the case where the first voltage value is not equal to the power supply voltage value of the first driving circuit and the zero voltage, the third voltage value is determined as the first output voltage value of the first driving circuit when the pull-up resistor is turned on, and the second voltage value is determined as the first output voltage value of the first driving circuit when the pull-down resistor is turned on.

[0100] That is, one voltage value is used to determine the first output voltage value when the pull-down resistor is turned on and the first output voltage value when the pull-up resistor is turned on. Among them, the first output voltage value when the pull-down resistor is turned on is the low voltage value in the first output waveform data, and the first output voltage value when the pull-up resistor is turned on is the high voltage value in the first output waveform data.

[0101] The second scenario: When the first voltage value is equal to the power supply voltage value of the first driving circuit, the second voltage value is determined as the first output voltage value of the first driving circuit when the pull-down resistor is turned on.

[0102] That is, when the first voltage value is equal to the power supply voltage value of the first driving circuit, it can only be used to determine the first output voltage value when the pull-down resistor is turned on. At this time, the low voltage value in the first output waveform data is selected as the first output voltage value when the pull-down resistor is turned on.

[0103] The third scenario: When the first voltage value is equal to zero voltage, the third voltage value is determined as the first output voltage value of the first drive circuit when the pull-up resistor is turned on.

[0104] That is, when the first voltage value is equal to zero voltage, it can only be used to determine the first output voltage value when the pull-up resistor is turned on. In this case, the high voltage value in the first output waveform data is selected as the first output voltage value when the pull-down resistor is turned on.

[0105] In this embodiment of the application, a method is provided to determine the first output voltage value when the pull-up resistor or the pull-down resistor is turned on, depending on the magnitude of the first voltage value.

[0106] This application also provides a method for determining the driving resistance in a memory, applied to a testing machine, such as... Figure 3 As shown, the method includes:

[0107] Step S201: The test machine issues a Read command (i.e., the above-mentioned read command) to trigger the output drive of the data pin (i.e., the above-mentioned output pin);

[0108] like Figure 4 As shown, the test machine 102 includes a second drive circuit DR2, a first data receiver RCV1, and a first controller. The memory 101 includes the first drive circuit DR1, the second data receiver RCV2, and the second controller. The second drive circuit DR2 is the aforementioned test circuit, connected to the first drive circuit DR1. The second data receiver RCV2 is connected to both the first drive circuit DR1 and the first data receiver RCV1. The second controller receives Read commands from the first controller of the test machine via a command bus to trigger the data pin output drive.

[0109] Step S202: Set the tester VT to VDDQ / 0V (i.e., the first voltage value mentioned above), construct a voltage divider circuit, and measure the output waveform of the pin after a specific delay (i.e., the preset duration mentioned above).

[0110] like Figure 4As shown, the first data receiver RCV1 is used to collect and measure the output waveform of the pin.

[0111] Figure 5A The schematic diagram of the output waveform of the pin when the tester VT is set as VDDQ. Since VT = VDDQ = 1.2V, the low voltage in the output waveform, i.e. Vtar_L, is the first output voltage of the first driving circuit when the pull-down resistor is turned on.

[0112] Figure 5B The schematic diagram of the output waveform of the pin when the tester VT is set as 0. Since VT = 0, the high voltage in the output waveform, i.e. Vtar_H, is the first output voltage of the first driving circuit when the pull-up resistor is turned on.

[0113] Step S203: When VT = VDDQ, the lower boundary of the output waveform is used to calculate RON Pd , and when VT = 0V, the upper boundary of the output waveform is used to calculate RON Pu .

[0114] Here, the implementation of step S203 can obtain RON Pd and RON Pu according to the voltage division law of the series circuit.

[0115] When VT = VDDQ, RON Pd can be calculated according to formula (1-1).

[0116] Vtar_L = (VDDQ * RON Pd ) / (RON Pd + 50) (1-1).

[0117] Where 50 is the test resistance value of the second driving circuit (i.e. the test circuit).

[0118] When VT = 0, RON Pu can be calculated according to formula (1-2).

[0119] Vtar_H = (VDDQ * 50) / (RON Pu + 50) (1-2).

[0120] The embodiments of the present application also provide a tester, as shown in Figure 4 , which comprises a test circuit 1021 and a first controller 1023, wherein:

[0121] The test circuit 1021 is connected with the first drive circuit DR1 in the to-be-tested memory 101, and when the drive resistance of the first drive circuit DR1 is turned on, the test resistance of the test circuit and the drive resistance of the first drive circuit form a series circuit; wherein the first drive circuit includes a pull-up resistor and a pull-down resistor, and the drive resistance includes the pull-up resistor or the pull-down resistor;

[0122] The first controller 1023 is configured to acquire a first output voltage value of the first drive circuit DR1 when the to-be-tested memory 101 outputs data through an output pin and the drive resistance of the first drive circuit DR1 is turned on; acquire a test resistance value of the test circuit, a power voltage value of the first drive circuit, and a first voltage value applied to the test circuit when the drive resistance is turned on; and determine a resistance value of the drive resistance according to a voltage division law of the series circuit based on the first output voltage value, the test resistance value, the first voltage value, and the power voltage value.

[0123] In some embodiments, the test circuit includes a second drive circuit DR2, and the second drive circuit DR2 is connected with the first drive circuit DR1 in the to-be-tested memory 101, and when the drive resistance of the first drive circuit DR1 is turned on, a terminal resistance of the second drive circuit and the drive resistance of the first drive circuit form a series circuit.

[0124] In some embodiments, the test machine further includes:

[0125] The first data receiver RCV1 is configured to acquire a first output voltage value of the first drive circuit DR1 when the drive resistance is turned on, and send the first output voltage value to the first controller 1023.

[0126] In some embodiments, the first controller 1023 sends a read instruction to the second controller of the to-be-tested memory 101 through the command bus 1022, so as to trigger the output pin of the to-be-tested memory 101 to output data.

[0127] Based on the foregoing embodiments, the embodiments of the present application provide a determination device for a drive resistance in a memory, which is applied to a test machine, includes various units and various modules included in the units, and can be realized by a processor in a computer device; of course, it can also be realized by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a micro processing unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.

[0128] Figure 6 A schematic diagram of a determination device for driving resistance in a memory is provided in an embodiment of the present application, as shown in Figure 6 The determination device 600 for driving resistance in a memory includes a first obtaining module 610, a second obtaining module 620, and a determination module 630, wherein:

[0129] The first obtaining module 610 is configured to obtain a first output voltage value of a first driving circuit in the memory when the driving resistance is turned on while the memory is outputting data from an output pin; wherein the first driving circuit includes a pull-up resistor and a pull-down resistor, and the driving resistance includes the pull-up resistor or the pull-down resistor.

[0130] The second obtaining module 620 is configured to obtain a test resistance value of a test circuit of a test machine, a power voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistance is turned on; wherein the test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit when the driving resistance is turned on.

[0131] The determination module 630 is configured to determine the resistance value of the driving resistance according to a voltage division law of the series circuit based on the first output voltage value, the test resistance value of the test circuit, the first voltage value, and the power voltage value.

[0132] In some embodiments, the determination module 630 includes a first determination submodule configured to determine a first voltage difference between the first output voltage value and the first voltage value; a second determination submodule configured to determine a second voltage difference between the first output voltage value and the power voltage value or zero voltage; a third determination submodule configured to determine a ratio between the first voltage difference and the second voltage difference; and a fourth determination submodule configured to determine a product between the ratio and the test resistance value of the test circuit as the resistance value of the driving resistance.

[0133] In some embodiments, the test machine further includes a first data receiver, and the first obtaining module 610 includes an applying submodule configured to apply the first voltage value to the test circuit to turn on the driving resistance and output data from the output pin of the memory; a control submodule configured to control the first data receiver to collect first output waveform data output from the output pin when the memory is outputting data from the output pin; and a fifth determination submodule configured to determine the first output voltage value of the first driving circuit when the driving resistance is turned on based on the first voltage value and the first output waveform data.

[0134] In some embodiments, the first obtaining module 610 further includes an issuing submodule configured to issue a read instruction to the memory before applying the first voltage value to the test circuit to trigger the output pin of the memory to output data.

[0135] In some embodiments, the control submodule comprises: a timing unit, configured to start timing after a read instruction is sent to the memory; and a control unit, configured to control the first data receiver to collect first output waveform data output by the output pin after a preset time length is reached in the timing.

[0136] In some embodiments, the first acquisition module 610 further comprises a write submodule, configured to write preset data into a storage capacitor of the memory before a read instruction is sent to the memory in the case that the output pin is a DQ pin.

[0137] In some embodiments, the first output waveform comprises a second voltage value and a third voltage value greater than the second voltage value, and the fifth determination submodule is configured to determine the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistor is turned on in the case that the first voltage value is neither equal to the power supply voltage value of the first driving circuit nor equal to zero voltage; and determine the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistor is turned on.

[0138] In some embodiments, the first output waveform comprises a second voltage value and a third voltage value greater than the second voltage value, and the fifth determination submodule is further configured to determine the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistor is turned on in the case that the first voltage value is equal to the power supply voltage value of the first driving circuit; and determine the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistor is turned on in the case that the first voltage value is equal to zero voltage.

[0139] In some embodiments, the test circuit comprises a second driving circuit, and the second acquisition module 620 comprises: a sixth determination submodule, configured to determine a terminal resistance of the second driving circuit of the test circuit; and a seventh determination submodule, configured to determine the terminal resistance as the test resistance value of the test circuit.

[0140] In some embodiments, the output pin comprises a DQ pin, a DQS pin, or an Alert pin.

[0141] In some embodiments, the memory is a dynamic random access memory (DRAM) chip.

[0142] The above device embodiments are similar to the above method embodiments in description, and have similar beneficial effects to the method embodiments. In some embodiments, the device provided by the embodiments of the present application has the functions or comprises the modules for performing the methods described in the above method embodiments. For technical details not disclosed in the device embodiments of the present application, please refer to the description of the method embodiments of the present application.

[0143] It should be noted that, in the embodiments of the present application, if the method for determining the driving resistance of the memory is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application can be embodied in the form of a software product in essence or the part that contributes to the related art, which is stored in a storage medium, includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various storage media that can store program codes. Thus, the embodiments of the present application are not limited to any specific hardware, software or firmware, or any combination of hardware, software and firmware.

[0144] The embodiments of the present application provide a computer readable storage medium, which stores a computer program. When the computer program is executed by a processor, part or all steps of the above method are implemented. The computer readable storage medium can be transitory or non-transitory.

[0145] It should be noted that the above description of the various embodiments tends to emphasize the differences between the various embodiments, and the same or similar parts can be referred to each other. The above description of the device and the storage medium embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the device and storage medium embodiments of the present application, please refer to the description of the method embodiments of the present application.

[0146] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily mean the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of each step / process does not mean the execution order, and the execution order of each step / process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above sequence number of the embodiments of the present application is only for description, not representing the advantages and disadvantages of the embodiments.

[0147] It should be noted that, in the present document, the terms "comprising", "containing", or any other similar term are intended to encompass non-exclusive inclusions, such that a process, method, article, or apparatus that comprises a list of elements does not necessarily include those elements only, but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0148] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the various components shown or discussed can be through some interface, indirect coupling or communication connection between devices or units, which can be electrical, mechanical or other forms.

[0149] The units described above as separate components can or can not be physically separated, and the components shown as units can or can not be physical units; they can be located in one place or distributed on multiple network units; part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment. In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be realized in the form of hardware or hardware plus software functional unit.

[0150] Those of ordinary skill in the art can understand that all or part of the steps of the above method embodiments can be completed by program instruction related hardware, and the aforementioned program can be stored in a computer readable storage medium, which executes the steps of the above method embodiments when executed; and the aforementioned storage medium includes: mobile storage device, read only memory (Read Only Memory, ROM), magnetic disc or optical disc, and various program code storage media.

[0151] Alternatively, the above-mentioned integrated units of the present application, if realized in the form of software function modules and sold or used as independent products, can also be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the present application or the parts that make contributions to the related art can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the methods described in the various embodiments of the present application. The aforementioned storage medium includes mobile storage devices, ROM, magnetic discs or optical discs, and various media that can store program codes.

[0152] The above merely describes the embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application.

Claims

1. A method for determining a drive resistance in a memory, applied to a test machine, comprising: obtaining a first output voltage value of a first drive circuit in the memory when a drive resistance is turned on while outputting data from an output pin of the memory; wherein the first drive circuit comprises a pull-up resistor and a pull-down resistor, and the drive resistance comprises the pull-up resistor and the pull-down resistor; obtaining a test resistance value of a test circuit of the test machine, a power voltage value of the first drive circuit, and a first voltage value applied to the test circuit when the drive resistance is turned on; wherein a test resistance of the test circuit and the drive resistance of the first drive circuit form a series circuit when the drive resistance is turned on; and determining a resistance value of the drive resistance according to a voltage division law of the series circuit based on the first output voltage value, the test resistance value of the test circuit, the first voltage value, and the power voltage value. 2.The method of claim 1, wherein determining the resistance value of the drive resistance according to the voltage division law of the series circuit based on the first output voltage value, the test resistance value of the test circuit, the first voltage value, and the power voltage value comprises: determining a first voltage difference between the first output voltage value and the first voltage value; determining a second voltage difference between the first output voltage value and the power voltage value or zero voltage; determining a ratio between the first voltage difference and the second voltage difference; and determining a product between the ratio and the test resistance value of the test circuit as the resistance value of the drive resistance. 3.The method of claim 1 or 2, wherein the test machine further comprises a first data receiver, and the obtaining the first output voltage value of the first drive circuit in the memory when the drive resistance is turned on while outputting data from the output pin of the memory comprises: applying the first voltage value to the test circuit to turn on the drive resistance and output data from the output pin of the memory; controlling the first data receiver to collect first output waveform data output from the output pin while the memory outputs data from the output pin; and determining the first output voltage value of the first drive circuit when the drive resistance is turned on based on the first voltage value and the first output waveform data. 4.The method of claim 3, wherein before the applying the first voltage value to the test circuit, the method further comprises: sending a read instruction to the memory to trigger the memory to output data from the output pin. 5.The method of claim 3, wherein the controlling the first data receiver to collect the first output waveform data output from the output pin while the memory outputs data from the output pin comprises: starting timing after sending the read instruction to the memory; and controlling the first data receiver to collect the first output waveform data output from the output pin after a timing duration reaches a preset duration, wherein the preset duration is used to make the output pin of the memory output data. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 6. The determination method of claim 5, wherein before the read instruction is sent to the memory, further comprising: in the case that the output pin is a DQ pin, writing preset data into a storage capacitor of the memory.

7. The determination method of claim 3, wherein the first output waveform comprises a second voltage value and a third voltage value greater than the second voltage value, based on the first voltage value and the first output waveform data, determining the first output voltage value of the first driving circuit when the driving resistance is turned on, comprising: in the case that the first voltage value is not equal to a power voltage value of the first driving circuit and zero voltage, determining the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistance is turned on, and determining the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistance is turned on.

8. The determination method of claim 3, wherein the first output waveform comprises a second voltage value and a third voltage value greater than the second voltage value, based on the first voltage value and the first output waveform, determining the first output voltage value of the first driving circuit when the driving resistance is turned on, comprising: in the case that the first voltage value is equal to a power voltage value of the first driving circuit, determining the second voltage value as the first output voltage value of the first driving circuit when the pull-down resistance is turned on; in the case that the first voltage value is equal to zero voltage, determining the third voltage value as the first output voltage value of the first driving circuit when the pull-up resistance is turned on.

9. The determination method of any one of claims 1, 2, 4-8, wherein the test circuit comprises a second driving circuit, acquiring the test resistance value of the test circuit, comprising: determining a terminal resistance of the second driving circuit of the test circuit; and determining the terminal resistance as the test resistance value of the test circuit.

10. The determination method of any one of claims 1, 2, 4-8, wherein the output pin comprises a DQ pin, a DQS pin or an Alert pin.

11. The determination method of any one of claims 1, 2, 4-8, wherein the memory is a dynamic random access memory (DRAM) chip.

12. A test machine, comprising: a test circuit configured to be connected to a first driving circuit in a to-be-tested memory, and when a driving resistance of the first driving circuit is turned on, a test resistance of the test circuit and the driving resistance of the first driving circuit form a series circuit; wherein the first driving circuit comprises a pull-up resistance and a pull-down resistance, and the driving resistance comprises the pull-up resistance and the pull-down resistance. ​ ​ ​ ​ ​ ​ ​ The first controller is configured to acquire a first output voltage value of the first driving circuit when the driving resistor is turned on during output of data by the output pin of the memory under test; to acquire a test resistor value of a test circuit of the test machine, a power voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on; and to determine a resistance value of the driving resistor according to a voltage division law of the series circuit based on the first output voltage value, the test resistor value of the test circuit, the first voltage value, and the power voltage value.

13. The test machine of claim 12, wherein the test circuit comprises a second driving circuit configured to be connected with the first driving circuit in the memory under test, and a terminal resistor of the second driving circuit and the driving resistor of the first driving circuit form a series circuit when the driving resistor of the first driving circuit is turned on.

14. The test machine of claim 12, wherein further comprising: a first data receiver configured to acquire the first output voltage value of the first driving circuit when the driving resistor is turned on, and to send the first output voltage value to the first controller.

15. The test machine of any one of claims 12 to 14, wherein the first controller sends a read instruction to a second controller of the memory under test by using a command bus to trigger the output pin of the memory under test to output data.

16. A device for determining a driving resistor in a memory, applied to a test machine, comprising: a first acquisition module configured to acquire a first output voltage value of a first driving circuit in the memory when a driving resistor in the first driving circuit is turned on during output of data by an output pin of the memory under test; wherein the first driving circuit comprises a pull-up resistor and a pull-down resistor, and the driving resistor comprises the pull-up resistor and the pull-down resistor; a second acquisition module configured to acquire a test resistor value of a test circuit of the test machine, a power voltage value of the first driving circuit, and a first voltage value applied to the test circuit when the driving resistor is turned on; wherein a test resistor of the test circuit and the driving resistor of the first driving circuit form a series circuit when the driving resistor is turned on; a determination module configured to determine a resistance value of the driving resistor according to a voltage division law of the series circuit based on the first output voltage value, the test resistor value of the test circuit, the first voltage value, and the power voltage value.

17. A computer readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the steps in the method of any one of claims 1 to 11. ​ ​

Images