A method for surface processing and wiring of a TGV substrate

Abstract

The present invention belongs to the technical field of TGV substrate manufacturing, and discloses a method for surface processing and wiring of a TGV substrate, which is characterized by including the following steps: Step 1, through-hole solid electroplating of the TGV substrate; Step 2, copper processing on the front and back surfaces of the TGV substrate; Step 3, photolithography on the front surface of the TGV substrate; Step 4, etching the electroplated copper layer and the adhesion layer on the front surface of the TGV substrate; Step 5, removing the photoresist on the front surface of the TGV substrate; Step 6, fabricating metal wiring on the back surface of the TGV substrate. This method simplifies the process steps in the manufacturing process of the TGV substrate, and at the same time can achieve the flattening of the surface copper while improving the performance and reliability of subsequent wiring. It can meet the requirements of high-density packaging of the new generation of active sub-arrays / components, with high reliability, higher efficiency, lower cost, and high process compatibility.

Description

Technical Field

[0001] The present invention mainly relates to the technical field of TGV substrate manufacturing, and particularly to a method for surface processing and wiring of a TGV substrate. Background Art

[0002] Facing the development requirements of high density, miniaturization, high frequency, etc. of radiation units in microwave / millimeter-wave components, the antenna unit, which is the core component, urgently needs to adopt a new packaging integration scheme to realize the manufacture of a highly integrated antenna array. In recent years, due to excellent properties such as low dielectric constant and high-density integration, the glass through-hole substrate (i.e., TGV substrate) provides a new technical solution for the integration of the next-generation antenna unit.

[0003] Copper is the main material for signal interconnection in the entire semiconductor industry, and electroplated copper is the main method for realizing the filling of vias with high aspect ratio. The TGV substrate needs to achieve solid electroplating of vias. The electroplating time is relatively long. Affected by factors such as structure and pattern density, the copper thickness on the surface of the electroplated TGV substrate is relatively thick (>10 μm), and the roughness is relatively large, which brings difficulties to the subsequent substrate wiring.

[0004] In the prior art, for the surface processing and wiring of a TGV substrate, the surface of the wafer can be polished by chemical mechanical planarization (CMP) to completely remove the electroplated copper on the substrate surface, and then the wiring on the substrate surface can be realized through processes such as lithography, seed layer deposition, electroplating, and etching. However, this method has three disadvantages: First, the existing method has more process steps. Each additional process will bring an increase in cost and a decrease in yield. Second, after completely removing the copper on the substrate surface, since the copper polishing solution has a corrosive effect on the copper in the holes, a depression phenomenon of metal holes, that is, the so-called dishing, often occurs. The appearance of dishing will reduce the thickness of the subsequent copper interconnection lines, increase the interconnection resistance, and have a great impact on the electrical performance and reliability of the subsequent products. Third, the CMP of copper will have a corrosive effect on the SiO2 material, thereby affecting the degree of surface planarization and the effect of the subsequent lithography process.

[0005] Therefore, after electroplating the TGV substrate, how to optimize the process to achieve the planarization of the surface copper while improving the performance and reliability of the subsequent wiring has become a difficult problem that needs to be solved urgently in the manufacturing process of the TGV substrate. Summary of the Invention

[0006] In order to overcome the above problems, the present invention provides a method for surface processing and wiring of a TGV substrate. This method simplifies the process steps in the manufacturing process of the TGV substrate, and at the same time can achieve the planarization of the surface copper while improving the performance and reliability of the subsequent wiring, meeting the requirements of high-density packaging of the new generation of active sub-arrays / components.

[0007] To achieve the above object, the present invention is realized through the following technical solutions:

[0008] A method for surface processing and wiring of a TGV substrate, characterized by comprising the following steps:

[0009] Step 1: Solid electroplating of the TGV substrate through-holes;

[0010] Step 2: Copper processing on the front and back of the TGV substrate;

[0011] Step 3: Photolithography on the front of the TGV substrate;

[0012] Step 4: Etching the electroplated copper layer and the adhesion layer on the front of the TGV substrate;

[0013] Step 5: Removing the photoresist on the front of the TGV substrate;

[0014] Step 6: Fabricating the metal wiring on the back of the TGV substrate.

[0015] Further, in the step 1, after the TGV substrate is laser-modified and wet-etched, TGV through-holes are formed, a titanium or titanium-tungsten adhesion layer and a copper seed layer are prepared, and a "growth from the middle to both ends" electroplating mode is adopted to complete the solid metalization filling of the through-hole TGV.

[0016] Further, in the step 2, chemical mechanical planarization treatment is respectively performed on the copper seed layers electroplated on the front and back of the TGV substrate.

[0017] Further, after the chemical mechanical planarization treatment of the copper seed layer, the height of the copper seed layer is ≤ 5 μm, the surface roughness of the copper seed layer is ≤ 50 nm, and the surface flatness of the TGV substrate is ≤ 5 μm.

[0018] Further, in the step 3, photoresist is spin-coated on the front of the TGV substrate, then pre-baked at 105 °C and then exposed, then developed with tetramethylammonium hydroxide, and finally the photoresist is baked on a hot plate at 120 °C for hardening.

[0019] Further, the thickness of the photoresist is 5 - 7 μm, and the uniformity is ± 3%.

[0020] Further, in the step 4, through a dry etching process on the front of the TGV substrate, the copper seed layer and the titanium or titanium-tungsten adhesion layer at the positions not covered by the photoresist are removed, while the metal at the positions protected by the photoresist is not etched.

[0021] Further, in the step 5, the photoresist etched on the surface of the TGV is removed on the front of the TGV substrate by using an alkaline solution.

[0022] Further, in the sixth step, using the same process as that for the front side of the TGV substrate in the third to fifth steps, photolithography is performed on the back side of the TGV substrate, and then the electroplated copper seed layer and the titanium or titanium-tungsten adhesion layer are removed by dry etching. Subsequently, the photoresist mask is removed to complete the backside wiring fabrication. Finally, the wiring fabrications on the front and back sides of the TGV substrate are completed to form a single-layer glass-based TGV adapter board.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. It can meet the high-density packaging requirements of the new generation of active sub-arrays / components: By using the surface processing and wiring method of the TGV substrate of the present invention, the surface processing and metal wiring of the high-density solid TGV substrate can be realized, which can meet the requirements of high-precision, high-density, high-integration, and high-frequency glass-based antenna units.

[0025] 2. High reliability: By precisely partially polishing the surface of the copper seed layer, a part of the copper on the surface of the TGV substrate is retained, avoiding the corrosion of the metal holes and the quartz surface by the copper polishing solution, effectively improving the flatness of the surface of the TGV substrate, and improving the reliability of the subsequent wiring.

[0026] 3. Higher efficiency and lower cost: Compared with the existing methods, the process method provided by the present invention shortens the process steps, omits two process steps of seed layer deposition and electroplating, reduces the working hours, improves the production efficiency, reduces the production cost, and has high application value and economic benefits.

[0027] 4. High process compatibility: The process method provided by the present invention is not only applicable to the manufacturing of glass substrates, but also has application value for TSV substrates. After the front side electroplating of the TSV is completed, the process method provided by the present invention can be used to remove the surface copper, thereby improving the reliability of the TSV substrate, reducing the manufacturing cost of the TSV substrate, and guiding the preparation process of the new generation of silicon-based active transceiver (T / R) components. Description of the Drawings

[0028] Figure 1 is a flowchart of the surface processing and wiring process of the TGV substrate;

[0029] Figure 2 is a schematic diagram of the TGV substrate after solid electroplating;

[0030] Figure 3 is a schematic diagram of the structure after high-precision partial CMP treatment of the surface copper of the TGV substrate;

[0031] Figure 4 is a schematic diagram of the structure after photolithography on the surface of the TGV substrate;

[0032] Figure 5Schematic diagram of the structure after etching the surface of the TGV substrate;

[0033] Figure 6 Schematic diagram of the structure after removing the photoresist from the surface of the TGV substrate;

[0034] Figure 7 For the back surface of the TGV substrate according to Figures 4 to 6 The same process, schematic diagram of the structure after completing the wiring on the back surface;

[0035] Among them, 1 - TGV substrate; 2 - titanium or titanium tungsten adhesion layer; 3 - copper seed layer; 4 - photoresist. Specific embodiments

[0036] The following further describes the preferred mechanisms and methods for realizing motion of the present invention in conjunction with the accompanying drawings and specific embodiments.

[0037] As Figure 1 shown, a method for processing and wiring the surface of a TGV substrate includes the following steps:

[0038] Step 1. Through-hole solid electroplating of the TGV substrate: First, after the TGV substrate 1 is subjected to laser modification and wet etching, TGV through-holes are formed. Since magnetron sputtering technology can achieve metallization deposition on the sidewalls of through-holes with small apertures and high aspect ratios, an adhesion layer (i.e., titanium or titanium tungsten adhesion layer 2) and an electroplating seed layer (i.e., copper seed layer 3) are prepared by magnetron sputtering technology. The role of the adhesion layer is to enhance the adhesion between the subsequent copper conductor and the glass, and at the same time, the selected titanium or titanium tungsten material can prevent the diffusion of copper into the glass. Depositing the copper seed layer is to provide the cathode potential required for copper electroplating and ensure the quality of electroplated copper. Subsequently, an electroplating mode of "growing from the middle to both ends" is adopted to complete the solid metal filling of the through-hole TGV, thereby obtaining a TGV substrate to be surface processed and surface wired. At this time, the copper layer on the substrate surface is thick and has large fluctuations, so it must be processed on the surface before the subsequent wiring process, as Figure 2 shown by the copper seed layer 3 in

[0039] Step 2. Copper processing on the front and back surfaces of the TGV substrate: High-precision chemical mechanical planarization treatment is performed on the electroplated copper layers on the front and back surfaces of the TGV substrate. First, the chemical components in the polishing solution can form an easily removable oxide film on the copper surface, and then the abrasive particles in the polishing solution and the mechanical action of the polishing pad are used to remove the oxide film. By repeating this process, the thickness of the electroplated surface copper (>10 μm) is reduced to less than 5 μm, and at the same time, the surface roughness of the surface copper (≤50 nm) is reduced, and the flatness of the substrate surface (≤5 μm) is improved to meet the requirements of the subsequent wiring process.

[0040] It should be noted that in this step, the copper layer is not completely removed, but a copper layer with a certain thickness is retained. The subsequent wiring work can be directly carried out on the retained copper layer, that is, the retained copper layer can be directly used as the surface line, saving the process steps of redepositing metal and lithography for pattern making. Finally, the substrate after surface processing is completed by CMP, as Figure 3 shown.

[0041] Step 3: Photolithography on the front side of the TGV substrate: Spin-coat photoresist 4 on the front side of the TGV substrate. Photoresist of model AZ4620 can be used, and the maximum spin-coating speed is 3000 rpm / s to obtain a uniform photoresist. The thickness of the photoresist is 5 - 7 μm, and the uniformity is ±3%, thereby ensuring the accuracy of the photolithography lines. Subsequently, pre-bake the photoresist at 105 °C and then perform the exposure process. The purpose of pre-baking is to reduce the residual concentration of the solvent in the photoresist to the lowest level, thereby enhancing the stability of the photoresist and also avoiding the photoresist sticking to the mask plate and contaminating the mask plate. According to the wiring requirements, expose the positions on the substrate surface that do not require metal in the later stage. The photoresist at these positions will be removed after the action of the developer. The exposure time can be adjusted according to the thickness of the photoresist and the intensity of the exposure machine light source. The developer can be 2.38% concentration of tetramethylammonium hydroxide (TMAH). Finally, perform a hot plate hardening bake on the photoresist at 120 °C to ensure the stability of the photoresist during the etching process and obtain a patterned etching mask, as Figure 4 shown.

[0042] Step 4: Etch the electroplated copper layer and adhesion layer on the front side of the TGV substrate: Compared with the wet etching method, dry etching has stronger directionality and higher etching accuracy, and is more suitable for the preparation of fine lines. Therefore, an ion beam etching equipment is used, and through the dry etching process, the copper and adhesion layer at the positions not covered by the photoresist are removed. Control the dry etching rate to ensure that the copper and adhesion layer (titanium or titanium-tungsten) at the positions not covered by the photoresist are completely etched, while the metal at the positions protected by the photoresist is not etched. The schematic diagram is as Figure 5 shown.

[0043] Step 5: Remove the photoresist on the front side of the TGV substrate: After the etching of the copper layer and adhesion layer is completed, the photoresist needs to be removed. After the plasma bombardment during dry etching, the surface thin layer of the photoresist is carbonized and difficult to remove, and it can be removed by using alkaline solutions such as NaOH. Finally, the front-side wiring structure of the TGV substrate is obtained, as Figure 6 shown.

[0044] Step 6. Fabrication of the metal wiring on the back side of the TGV substrate: Using the same processes as those for the front side of the TGV substrate in Steps 3 to 5, perform photolithography on the back side of the TGV substrate, then dry-etch and remove the electroplated copper layer and the adhesion layer, and subsequently remove the photoresist on the substrate surface, completing a series of wiring fabrications such as photolithography on the back side, etching the electroplated copper layer and the adhesion layer, and removing the photoresist, finally realizing the wiring fabrication on the back side of the TGV substrate 1 to form a single-layer glass-based TGV adapter board, and the final structure is as shown in Figure 7 shown.

[0045] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the embodiments, for those skilled in the art, they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. However, any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for surface processing and wiring of a TGV substrate, characterized in that It includes the following steps: Step 1, solid electroplating of the vias on the TGV substrate; Step 2, copper processing on the front and back sides of the TGV substrate; Step 3, photolithography on the front side of the TGV substrate; Step 4, etching the electroplated copper layer and the adhesion layer on the front side of the TGV substrate; Step 5, removing the photoresist on the front side of the TGV substrate; Step 6, fabricating the metal wiring on the back side of the TGV substrate; In the said Step 2, chemical mechanical planarization treatment is respectively carried out on the copper seed layers electroplated on the front and back sides of the TGV substrate; In the said Step 2, after the chemical mechanical planarization treatment of the copper seed layer, the height of the copper seed layer is ≤5 μm, the surface roughness of the copper seed layer is ≤50 nm, and the surface flatness of the TGV substrate is ≤5 μm; In the said Step 3, photoresist is spin-coated on the front side of the TGV substrate, then pre-baked at 105 °C and then exposed, then developed with tetramethylammonium hydroxide, and finally the photoresist is baked on a hot plate at 120 °C for hardening.

2. The method for surface processing and wiring of a TGV substrate according to claim 1, characterized in that, In the said Step 1, after the TGV substrate is subjected to laser modification and wet etching, TGV vias are formed, a titanium or titanium-tungsten adhesion layer and a copper seed layer are prepared, and the "growing from the middle to both ends" electroplating mode is adopted to complete the solid metal filling of the through-hole TGV.

3. A method for surface processing and wiring of a TGV substrate according to claim 1, characterized in that, The thickness of the photoresist is 5 - 7 μm, and the uniformity is ±3%.

4. A method for surface processing and wiring of a TGV substrate according to claim 1, characterized in that In the said Step 4, on the front side of the TGV substrate, through a dry etching process, the copper seed layer and the titanium or titanium-tungsten adhesion layer at the positions not covered by the photoresist are removed, and at the same time, the metal at the positions protected by the photoresist is not etched.

5. A method for surface processing and wiring of a TGV substrate according to claim 1, characterized in that, In the said Step 5, on the front side of the TGV substrate, the photoresist after etching on the TGV surface is removed by using an alkaline solution.

6. A method for surface processing and wiring of a TGV substrate according to claim 1, characterized in that, In the said Step 6, using the same process as that for the front side of the TGV substrate in Steps 3 to 5, photolithography is carried out on the back side of the TGV substrate, then the electroplated copper seed layer and the titanium or titanium-tungsten adhesion layer are removed by dry etching, and then the photoresist mask is removed to complete the fabrication of the back-side wiring, and finally the wiring fabrication on the front and back sides of the TGV substrate is realized to form a single-layer glass-based TGV adapter board.

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