A testing device and testing method for output driving capability of an eMMC chip

By using a testing device and method with an output current setting module, a judgment module, and a gear adjustment module, the problem of inconsistent output drive capability of eMMC chips was solved, enabling real-time measurement and adjustment of chip output drive capability and improving shipment yield.

CN115691650BActive Publication Date: 2026-03-24合肥康芯威存储技术有限公司
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-09
Publication Date
2026-03-24

AI Technical Summary

Technical Problem

Existing testing methods for the output drive capability of eMMC chips rely on the representativeness of the samples, resulting in inconsistent output drive capabilities and failing to guarantee that all chips will achieve the expected results.

Method used

A device and method for testing the output drive capability of an eMMC chip are provided. The output drive capability of the chip is measured and adjusted in real time through an output current setting module, a judgment module and a range adjustment module to ensure that the nominal value is met.

Benefits of technology

This improved the yield rate of eMMC chips by measuring and adjusting the output drive level in real time, ensuring the consistency of the chip's output drive capability and the expected performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a kind of test device and test method of the output driving capability of eMMC chip, belongs to eMMC chip test field.Device includes: output current setting module, for the output current of the data IO interface of the eMMC chip is set as rated current;Judgment module, for judging whether the output driving capability of the data IO interface reaches nominal value on the basis of the rated current, and output corresponding judgment signal;Gear adjustment module, for when the judgment signal indicates that the output driving capability does not reach nominal value, control the eMMC chip to increase the output driving gear.Adopting the application, the test and adjustment of the output driving capability of eMMC chip can be realized quickly during packaging test, improve the overall expected effect.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of eMMC chip testing, and in particular to a testing device and method for output driving capability of an eMMC chip. BACKGROUND

[0002] The output driving capability of an eMMC chip directly determines the quality of the output signal.

[0003] The current common testing method is to select a batch of sample chips, measure the output driving gear of the batch of sample chips, determine a window of the output driving gear, and select the middle value in the window. When packaging the eMMC chip, the output driving gear is set to the middle value in the window, and it is believed that the output driving capability of most eMMC chips can fall within the expected range through such setting.

[0004] However, the expected effect of the above method depends on the quality of the selected sample chips, and the sample chips cannot represent all eMMC chips, and cannot well guarantee the uniformity and expectedness of the output driving capability of the eMMC chips. Therefore, there is an urgent need for a new testing device and a corresponding testing method to improve the expected effect of the output driving capability. SUMMARY

[0005] To solve the problems of the prior art, the embodiments of the present application provide a testing device and method for output driving capability of an eMMC chip, which can quickly realize testing and adjustment of the output driving capability during packaging testing, and improve the overall expected effect. The technical solutions are as follows:

[0006] According to an aspect of the present application, a testing device for output driving capability of an eMMC chip is provided, which comprises:

[0007] An output current setting module for setting the output current of a data IO interface of the eMMC chip to a rated current;

[0008] A judgment module for judging whether the output driving capability of the data IO interface reaches a nominal value on the basis of the rated current, and outputting a corresponding judgment signal;

[0009] A gear adjustment module for controlling the eMMC chip to increase the output driving gear when the judgment signal indicates that the output driving capability does not reach the nominal value.

[0010] Optionally, the output current setting module comprises a current mirror circuit, a first end of the current mirror circuit is used to receive a preset current, and a second end of the current mirror circuit is connected with the data IO interface of the eMMC chip;

[0011] The current mirror circuit is configured to set the current at the second end thereof as the rated current of the eMMC chip based on the preset current.

[0012] Optionally, the input end of the judging module is configured to receive the output voltage of the data IO interface.

[0013] The judging module is configured to:

[0014] output a first judging signal when the output voltage is less than the reference voltage, the first judging signal being configured to indicate that the output driving capability does not reach the nominal value.

[0015] output a second judging signal when the output voltage is not less than the reference voltage, the second judging signal being configured to indicate that the output driving capability reaches the nominal value.

[0016] Optionally, the gear adjusting module is configured to output a gear adjusting signal when the first judging signal is output by the judging module, the gear adjusting signal being configured to up-regulate the output driving gear of the eMMC chip.

[0017] Optionally, the device further comprises a switching module.

[0018] The switching module is configured to:

[0019] switch the data IO interface from the test circuit to the communication channel when the first judging signal is output by the judging module, so that the eMMC chip receives the gear adjusting signal.

[0020] switch the data IO interface back to the test circuit after the output driving gear of the eMMC chip is up-regulated.

[0021] According to another aspect of the present application, there is provided a method for testing the output driving capability of an eMMC chip, the method comprising:

[0022] setting the output current of a data IO interface of the eMMC chip as a rated current;

[0023] judging whether the output driving capability of the data IO interface reaches a nominal value based on the rated current;

[0024] controlling the eMMC chip to up-regulate the output driving gear when the output driving capability of the data IO interface does not reach the nominal value, until the output driving capability of the data IO interface reaches the nominal value or the output driving gear reaches a highest gear.

[0025] Optionally, the judging whether the output driving capability of the data IO interface reaches the nominal value comprises:

[0026] determining whether the output voltage of the data IO interface is less than a reference voltage;

[0027] outputting a first determination signal when the output voltage is less than the reference voltage, the first determination signal being used to indicate that the output driving capability does not reach a nominal value;

[0028] outputting a second determination signal when the output voltage is not less than the reference voltage, the second determination signal being used to indicate that the output driving capability reaches the nominal value.

[0029] Optionally, the method further comprises:

[0030] switching the data IO interface from the test circuit to a communication channel when the output driving capability of the data IO interface does not reach the nominal value, so that the eMMC chip receives a gear adjustment signal;

[0031] switching the data IO interface back to the test circuit after the output driving gear of the eMMC chip is up-regulated.

[0032] According to another aspect of the present application, there is provided an electronic device comprising:

[0033] a test device for the output driving capability of the eMMC chip;

[0034] a processor; and

[0035] a memory storing a program,

[0036] wherein the program comprises instructions which, when executed by the processor, cause the processor to perform the test method for the output driving capability of the eMMC chip.

[0037] According to another aspect of the present application, there is provided a non-transitory computer readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the test method for the output driving capability of the eMMC chip.

[0038] In the present application, the output driving capability of the data IO interface is measured by the output current setting module and the determination module, and it is determined whether the output driving capability reaches a nominal value. If the output driving capability does not reach the nominal value, the output driving gear is up-regulated by the gear adjustment module. In the test device for the eMMC chip, a measurement circuit and a feedback adjustment mechanism are adopted, thereby improving the yield of the eMMC chip. BRIEF DESCRIPTION OF DRAWINGS

[0039] More details, features and advantages of the present application are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0040] Figure 1 FIG. 8 shows a schematic diagram of a test device for output driving capability of an eMMC chip according to an example embodiment of the present application;

[0041] Figure 2 FIG. 9 shows a schematic diagram of a current mirror circuit according to an example embodiment of the present application;

[0042] Figure 3 FIG. 10 shows a flow chart of a test method for output driving capability of an eMMC chip according to an example embodiment of the present application;

[0043] Figure 4 FIG. 11 shows a block diagram of an example electronic device that can be used to implement embodiments of the present application. DETAILED DESCRIPTION

[0044] Embodiments of the present application will be described in more detail with reference to the drawings. While certain embodiments of the present application will be shown and described in the drawings and the following description, it is to be understood that the present application can be embodied in various forms and should not be construed as being limited to the embodiments set forth in the description and drawings. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the present application to those skilled in the art.

[0045] It should be understood that the various steps of the method embodiments of the present application can be performed in different orders and / or in parallel. In addition, the method embodiments can include additional steps and / or omit performing the steps shown. The scope of the present application is not limited in this respect.

[0046] The term "comprising" and variations thereof as used in the present document are open-ended, that is, "comprising but not limited to." The term "based on" is "based, at least in part, on." The term "one embodiment" means "at least one embodiment." The term "another embodiment" means "at least one additional embodiment." The term "some embodiments" means "at least some embodiments." Related definitions are given throughout the detailed description. It should be noted that the concepts mentioned in the present application are merely used to distinguish different devices, modules or units, and are not intended to limit the functions performed by these devices, modules or units or the sequence or interdependence of these functions.

[0047] It should be noted that the terms "one", "multiple" mentioned in the present application are illustrative and not restrictive, and those skilled in the art should understand that unless otherwise explicitly stated in the context, it should be understood as "one or more".

[0048] The names of the messages or information exchanged between the devices in the embodiments of the present application are only for illustrative purposes, and are not intended to limit the scope of the messages or information.

[0049] The embodiment of the present application provides a testing device for output driving capability of an eMMC chip, which can be arranged on a load board of the eMMC chip.

[0050] With reference to Figure 1 The testing device is shown in the figure, which comprises an output current setting module, a judging module and a gear adjusting module.

[0051] The output current setting module is used for setting the output current of the data IO interface of the eMMC chip as a rated current.

[0052] The judging module is used for judging whether the output driving capability of the data IO interface reaches a nominal value on the basis of the rated current, and outputting a corresponding judging signal.

[0053] The gear adjusting module is used for controlling the eMMC chip to increase the output driving gear when the judging signal indicates that the output driving capability does not reach the nominal value.

[0054] In a possible implementation, since the output power of the eMMC data IO interface is constant, when the output driving capability of the data IO interface reaches the nominal value, if the fixed output rated current is fixed, the output voltage can be stabilized at the rated voltage (such as 1.8V). Therefore, the output current setting module can be used to set the output current of the data IO interface of the eMMC chip as the rated current, and the judging module can be used to measure the output voltage, so as to judge whether the output driving capability of the data IO interface reaches the nominal value.

[0055] The output driving gear of the eMMC chip is adjustable, the higher the output driving gear is, the stronger the output driving capability of the eMMC chip is, and the preset value is usually located at the middle gear. When the output driving capability of the data IO interface does not reach the nominal value, the output voltage will decrease, at this time, the gear adjusting module can be used to control the eMMC chip to increase the output driving gear, so as to enhance the output driving capability of the eMMC chip.

[0056] Optionally, the output current setting module can comprise a current mirror circuit, a first end of the current mirror circuit is used for receiving a preset current, and a second end of the current mirror circuit is connected with the data IO interface of the eMMC chip.

[0057] The current mirror circuit is used for setting the current at the second end as the rated current of the eMMC chip on the basis of the preset current.

[0058] In a possible implementation, as shown in the current mirror circuit, Iin is a preset constant voltage source input current (i.e. the preset current) on the load board, which is a fixed value current. Figure 2

[0059] ​Since the M2 and M4 gate voltages are equal, the M1 and M3 gate voltages are equal. According to the current mirror principle, when the Vout at the Iout point satisfies the minimum value of Vout >= Vds1 (the voltage between the drain and source of M1) + Vdsat2 (the saturation voltage of M2), the Iout current is equal to the Iin current, that is, the output current of the data IO interface of the eMMC chip is set to the rated current. The parameters of M1, M3 and R can be pre-adjusted to ensure that the eMMC data IO interface can work normally when the output voltage is 1.8V.

[0060] Optionally, the input end of the judgment module can be used to receive the output voltage of the data IO interface. The judgment module can be used to:

[0061] When the output voltage is less than the reference voltage, output the first judgment signal, and the first judgment signal is used to indicate that the output driving capability does not reach the nominal value;

[0062] When the output voltage is not less than the reference voltage, output the second judgment signal, and the second judgment signal is used to indicate that the output driving capability reaches the nominal value.

[0063] In a possible implementation, the judgment module can adopt a comparator circuit, and the two input ends of the comparator circuit can receive the output voltage of the data IO interface and the reference voltage (such as 1.6V) respectively. When the output voltage (such as 1V) is less than the reference voltage, it is determined that it is out of the deviation range, and the comparator circuit can output a low level as the first judgment signal. When the output voltage (such as 1.8V) is not less than the reference voltage, it is determined that the deviation is within the range, and the comparator circuit can output a high level as the second judgment signal, and determine that the eMMC chip passes the test.

[0064] Optionally, the gear adjustment module can be used to: when the judgment module outputs the first judgment signal, output the gear adjustment signal, and the gear adjustment signal is used to up-regulate the output driving gear of the eMMC chip.

[0065] In a possible implementation, an MCU (Microcontroller Unit) can be used to detect the output result of the comparator, and the result is transmitted to the control chip of the test board card through I2C to generate a gear adjustment signal. The MCU, the control chip of the test board card and the related circuit constitute the above-mentioned gear adjustment module. Alternatively, the gear adjustment signal can also be generated by the computer end through the control chip.

[0066] Optionally, the test device can further comprise a switching module. The switching module can be configured to switch the data IO interface from the test circuit to the communication channel when the judging module outputs the first judging signal, so that the eMMC chip receives the gear adjustment signal; and switch the data IO interface back to the test circuit after the output drive gear of the eMMC chip is adjusted up.

[0067] In a possible implementation, the switching module can comprise a multiplexer circuit (MUX) configured to connect the data IO interface and the communication channel, or connect the data IO interface and the test circuit.

[0068] In the initial state, the switching module can connect the data IO interface and the test circuit. After the above test process, if the judging module outputs the first judging signal, i.e., the output drive capability of the eMMC chip does not reach the nominal value, the switching module can switch the data IO interface from the test circuit to the communication channel.

[0069] Further, the eMMC chip can receive the gear adjustment signal through the communication channel, adjust the output drive gear up by one level through the register, and store the adjusted output drive gear in the eMMC chip, so as to make the adjustment effective.

[0070] After the adjustment is completed, the switching module can switch the data IO interface back to the test circuit, and repeat the above test process to judge whether the output drive capability of the data IO interface reaches the nominal value, until the output drive capability of the data IO interface reaches the nominal value, the eMMC chip is determined to pass the test, or the output drive gear reaches the highest gear, and the output drive capability of the data IO interface still does not reach the nominal value, the eMMC chip is determined to be abnormal.

[0071] In the embodiment of the present application, the output current setting module and the judging module are used to measure the output drive capability of the data IO interface, and judge whether the output drive capability of the data IO interface reaches the nominal value; if the output drive capability does not reach the nominal value, the gear adjustment module is used to adjust the output drive gear up. In the test device of the eMMC chip, the measurement circuit and the feedback adjustment mechanism are adopted, and the yield of the eMMC chip is improved.

[0072] Based on the same inventive concept, the embodiment of the present application provides a test method for the output drive capability of an eMMC chip.

[0073] Reference Figure 3 The test method is shown as follows.

[0074] Step 301: set the output current of the data IO interface of the eMMC chip as the rated current;

[0075] Step 302, on the basis of the rated current, it is judged whether the output driving capability of the data IO interface reaches the nominal value or not;

[0076] Step 303, when the output driving capability of the data IO interface does not reach the nominal value, the eMMC chip is controlled to up-regulate the output driving gear.

[0077] Then, the above steps 301-303 are repeated until the output driving capability of the data IO interface reaches the nominal value, or the output driving gear reaches the highest gear. When the output driving capability of the data IO interface reaches the nominal value, it is determined that the eMMC chip passes the test; when the output driving gear reaches the highest gear, and the output driving capability of the data IO interface still does not reach the nominal value, it is determined that the eMMC chip is abnormal.

[0078] Optionally, the judging whether the output driving capability of the data IO interface reaches the nominal value comprises:

[0079] judging whether the output voltage of the data IO interface is less than a reference voltage or not;

[0080] when the output voltage is less than the reference voltage, outputting a first judgment signal, the first judgment signal being used to indicate that the output driving capability does not reach the nominal value;

[0081] when the output voltage is not less than the reference voltage, outputting a second judgment signal, the second judgment signal being used to indicate that the output driving capability reaches the nominal value.

[0082] Optionally, the method further comprises:

[0083] when the output driving capability of the data IO interface does not reach the nominal value, switching the data IO interface from the test circuit to a communication channel, so that the eMMC chip receives a gear adjustment signal;

[0084] after the output driving gear of the eMMC chip is up-regulated, the data IO interface is switched back to the test circuit.

[0085] In the embodiment of the application, on the basis of the output rated current of the data IO interface, it is judged whether the output driving capability of the data IO interface reaches the nominal value or not. If the output driving capability does not reach the nominal value, it is fed back to the eMMC chip to up-regulate the output driving gear, thereby improving the yield of the eMMC chip.

[0086] The exemplary embodiments of the present application also provide an electronic device, comprising: the test device of output driving capability of the eMMC chip; at least one processor; and a memory in communication connection with the at least one processor. The memory stores a computer program capable of being executed by the at least one processor, and the computer program, when executed by the at least one processor, is used for causing the electronic device to execute the method according to the embodiments of the present application.

[0087] The exemplary embodiments of the present application also provide a non-transitory computer readable storage medium storing a computer program, wherein the computer program, when executed by a processor of a computer, is used for causing the computer to execute the method according to the embodiments of the present application.

[0088] The exemplary embodiments of the present application also provide a computer program product comprising a computer program, wherein the computer program, when executed by a processor of a computer, is used for causing the computer to execute the method according to the embodiments of the present application.

[0089] Reference Figure 4 A block diagram of an electronic device 400, which can be a server or a client of the present application, will now be described, which is an example of a hardware device that can be applied to aspects of the present application. The electronic device is intended to represent a wide variety of digital electronic computer devices, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent a wide variety of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown here, their connections, and their functions, are meant to be examples only, and are not intended to limit implementations of the present application described and / or claimed herein.

[0090] As Figure 4 shown, the electronic device 400 includes a computing unit 401 that can perform various appropriate actions and processes in accordance with a computer program stored in a read-only memory (ROM) 402 or a computer program loaded from a storage unit 408 into a random access memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, the ROM 402, and the RAM 403 are connected to each other through a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.

[0091] A plurality of components in the electronic device 400 are connected to the I / O interface 405, including an input unit 406, an output unit 407, a storage unit 408, and a communication unit 409. The input unit 406 can be any type of device that can input information to the electronic device 400, and can receive inputted digital or character information, and generate key signal inputs related to user settings and / or function controls of the electronic device. The output unit 407 can be any type of device that can present information, and can include, but is not limited to, a display, a speaker, a video / audio output terminal, a vibrator, and / or a printer. The storage unit 408 can include, but is not limited to, a magnetic disk, an optical disk. The communication unit 409 allows the electronic device 400 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks, and can include, but is not limited to, a modem, a network card, an infrared communication device, a wireless communication transceiver, and / or a chipset, such as a Bluetooth device, a WiFi device, a WiMax device, a cellular communication device, and / or the like.

[0092] The computing unit 401 can be various general and / or special purpose processing components having processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 401 performs various methods and processes described above. For example, in some embodiments, the above-described test method of output drive capability of an eMMC chip can be implemented as a computer software program, which is tangibly embodied in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 400 via the ROM 402 and / or the communication unit 409. In some embodiments, the computing unit 401 can be configured to perform the above-described test method of output drive capability of an eMMC chip by any other appropriate means, such as by means of firmware.

[0093] Program code for carrying out the methods of the present application can be written in any combination of one or more programming languages. The program code can be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the program code, when executed by the processor or controller, produces the functions / operations specified in the flowcharts and / or the block diagrams. The program code can be embodied on the machine, partially, entirely, as a stand-alone software package, partially on the machine and partially on a remote machine or entirely on a remote machine or server.

[0094] In the context of the present application, a machine-readable medium can be a tangible medium that can contain or store program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable storage medium can include, but are not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium will include one or more lines of electrical connections, portable computer disks, hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fibers, portable compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the foregoing.

[0095] As used in the present application, the terms "machine-readable medium" and "computer- readable medium" refer to any computer program product, apparatus and / or device (e.g., magnetic discs, optical disks, memory, Programmable Logic Devices (PLDs)) used to provide machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal that can be used to provide machine instructions and / or data to a programmable processor.

[0096] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0097] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0098] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

Claims

1. A testing device for the output drive capability of an eMMC chip, characterized in that, The device includes: An output current setting module is used to set the output current of the data I / O interface of the eMMC chip to the rated current; wherein the output power of the data I / O interface is constant; The judgment module is used to determine whether the output drive capability of the data I / O interface reaches the nominal value based on the rated current, and output a corresponding judgment signal. The gear adjustment module is used to control the eMMC chip to increase the output drive gear when the judgment signal indicates that the output drive capability has not reached the nominal value.

2. The apparatus according to claim 1, characterized in that, The output current setting module includes a current mirror circuit. The first end of the current mirror circuit is used to receive a preset current, and the second end is connected to the data I / O interface of the eMMC chip. The current mirror circuit is used to set the current at its second terminal to the rated current of the eMMC chip based on the preset current.

3. The apparatus according to claim 1, characterized in that, The input terminal of the judgment module is used to receive the output voltage of the data I / O interface; The judgment module is used for: When the output voltage is less than the reference voltage, a first judgment signal is output, which indicates that the output driving capability has not reached the nominal value. When the output voltage is not less than the reference voltage, a second judgment signal is output, which is used to indicate that the output driving capability has reached the nominal value.

4. The apparatus according to claim 3, characterized in that, The gear adjustment module is used to output a gear adjustment signal when the judgment module outputs the first judgment signal. The gear adjustment signal is used to increase the output drive gear of the eMMC chip.

5. The apparatus according to claim 4, characterized in that, The device also includes a switching module; The switching module is used for: When the judgment module outputs the first judgment signal, the data I / O interface is switched from the test circuit to the communication channel so that the eMMC chip can receive the gear adjustment signal; After adjusting the output drive level of the eMMC chip, the data I / O interface is switched back to the test circuit.

6. A method for testing the output drive capability of an eMMC chip, characterized in that, The method includes: Set the output current of the data I / O interface of the eMMC chip to the rated current; wherein, the output power of the data I / O interface is constant; Based on the rated current, determine whether the output drive capability of the data I / O interface reaches the nominal value; When the output drive capability of the data IO interface does not reach the nominal value, the eMMC chip is controlled to increase the output drive level until the output drive capability of the data IO interface reaches the nominal value, or the output drive level reaches the highest level.

7. The method according to claim 6, characterized in that, The step of determining whether the output drive capability of the data I / O interface reaches the nominal value includes: Determine whether the output voltage of the data I / O interface is less than the reference voltage; When the output voltage is less than the reference voltage, a first judgment signal is output, which indicates that the output driving capability has not reached the nominal value. When the output voltage is not less than the reference voltage, a second judgment signal is output, which is used to indicate that the output driving capability has reached the nominal value.

8. The method according to claim 6, characterized in that, The method further includes: When the output drive capability of the data I / O interface does not reach the nominal value, the data I / O interface is switched from the test circuit to the communication channel so that the eMMC chip can receive the gear adjustment signal. After adjusting the output drive level of the eMMC chip, the data I / O interface is switched back to the test circuit.

9. An electronic device, comprising: The apparatus as described in any one of claims 1-5; processor; as well as Stored program memory, The program includes instructions that, when executed by the processor, cause the processor to perform the method according to any one of claims 6-8.

10. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 6-8.

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