A germanium-based impurity segregating source-drain field effect transistor and a method of fabricating the same
Patent Information
- Application Number
- CN202211348373.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-31
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2042-10-31
AI Technical Summary
In germanium-based field-effect transistors, as device size shrinks, charge carriers cause lattice damage near the drain, leading to device parameter degradation and affecting reliability. Furthermore, traditional Schottky junctions result in excessively high carrier velocities, causing energy consumption and parameter drift.
Using impurity-segregated Schottky junctions as source-drain structures, carrier transport is optimized by forming a steep barrier drop at the source and a low barrier at the drain. Segregated layers of varying thicknesses are formed by using different doping ions and annealing methods to control the barrier height of the Schottky junction.
This improves the device's drive current and on/off ratio, reduces carrier collisions with the lattice, and enhances the device's reliability and performance stability.
Smart Images
Figure CN115692474B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor field-effect transistor manufacturing, and relates to a method for optimizing the source and drain structure of a device to improve device performance, and particularly relates to a germanium-based impurity-segregated source and drain field-effect transistor and its fabrication method. Background Technology
[0002] Germanium, as a high-mobility material, is used as a channel material in field-effect transistors (FETs), exhibiting even greater mobility than silicon. With the development of integrated circuits and the shrinking of device dimensions, there is a need to increase drive current, improve carrier quantity and transport velocity. However, the transverse electric field of the channel increases with decreasing size, causing lattice damage near the drain by accelerated carriers, resulting in severe device parameter degradation and drift, and affecting device reliability. To improve device performance, the first consideration is to optimize the source-drain structure. When traditional pn junction source-drain germanium-based MOSFETs are miniaturized to the nanometer scale, the large ion diffusion coefficient of germanium makes the difficult-to-control source-drain junction depth exacerbate the short-channel effect and also cause significant parasitic resistance and capacitance.
[0003] When optimizing germanium-based MOSFETs, similar to silicon-based MOSFETs, metal is used to fabricate the source and drain. Using a Schottky junction as the source and drain offers the following advantages: 1. Better current on / off ratio, lower parasitic resistance and capacitance; 2. Smaller depletion width in the source / drain region, reducing the impact of short-channel effects on the device under size reduction. However, steep barrier drops at both the source and drain ends can lead to excessively high carrier velocity at the drain, causing collisional ionization of carriers with the crystal lattice to become one of the main forms of energy consumption. This results in drift or degradation of parameters such as the MOSFET's threshold voltage and linear transconductance, affecting device reliability.
[0004] Therefore, while maintaining the advantages of simple and convenient Schottky junction fabrication and low source-drain parasitic resistance, and optimizing its application process in germanium-based MOSFETs, this invention proposes a germanium-based impurity-segregated source-drain field-effect transistor and its fabrication method. Summary of the Invention
[0005] The purpose of this invention is to address the shortcomings of existing germanium-based MOSFETs by providing a structural optimization scheme for manufacturing impurity-segregated source and drain devices. The source and drain are Schottky junction structures with different impurities. This device structure has advantages such as high drive current, high on / off ratio, and low parasitic resistance and capacitance. It has reference value in the direction of miniaturization process and structural optimization of germanium-based MOSFETs.
[0006] The objective of this invention is achieved through the following technical solution:
[0007] One aspect of the present invention provides a germanium-based impurity-segregated source-drain field-effect transistor, comprising: an N-type germanium substrate, a gate oxide layer, a metal gate layer, a P-type doped impurity-segregated Schottky junction as the source, an N-type doped impurity-segregated Schottky junction as the drain, and a channel region between the source and drain.
[0008] Furthermore, by using a Schottky junction with impurity splitting opposite to the substrate doping as the source end, it is required that the split doped inversion ion layer be as thin as possible and the doping concentration as high as possible, so as to form a steep barrier drop, increase the carrier concentration at the source end, and optimize the device drive current and on / off ratio performance under the acceleration of the strong electric field at the source end.
[0009] Furthermore, using a Schottky junction with the same doping as the substrate as the drain terminal requires the Schottky barrier to be as small as possible to reduce the electric field strength at the drain terminal. This prevents excessive carrier velocity from causing severe collisions between carriers and the lattice, which could ultimately lead to transistor parameter degradation and affect reliability.
[0010] Furthermore, the formation methods of impurity-segregated Schottky junctions include rapid annealing, microwave annealing, and laser annealing. However, for the source and drain ends, the types of doped ions required for different impurity-segregated Schottky junctions formed during annealing are different, and the annealing temperatures are also different.
[0011] Furthermore, the gate oxide layer material is aluminum oxide or hafnium oxide, and the thickness is 1 nanometer to 10 nanometers; the thickness of the metal gate layer is tens to hundreds of nanometers.
[0012] Furthermore, the source-end impurity ions are selected from boron, aluminum, and indium; the drain-end impurity ions are selected from phosphorus, arsenic, and antimony.
[0013] Furthermore, the Schottky junctions at the source and drain ends are NiGe / n-Ge.
[0014] Another aspect of the present invention provides a method for fabricating a germanium-based impurity segregation source-drain field-effect transistor, the method comprising the following steps:
[0015] (1) A gate oxide layer and a metal gate layer are deposited on the surface of an N-type germanium substrate, and the gate structure of a field-effect transistor is formed by etching the metal gate layer and the gate oxide layer;
[0016] (2) Deposit metal in the germanium region on one side of the gate structure to form a P-type doped impurity condensed Schottky junction, which serves as the source end;
[0017] (3) Deposit metal in the germanium region on the other side of the gate structure to form an N-type doped impurity condensed Schottky junction, which serves as the drain.
[0018] Furthermore, metallic Ni is deposited in the germanium regions on both sides of the gate structure to form source / drain metal germanides.
[0019] Furthermore, the source / drain formation methods include rapid annealing, microwave annealing, and laser annealing. Impurity ions form segregated layers of different thicknesses at different annealing temperatures, resulting in different Schottky junction barrier heights.
[0020] The beneficial effects of this invention are:
[0021] 1. The source side requires a high Schottky barrier to create a strong electric field, which significantly increases the carrier transport velocity, even reaching ballistic transport, to enhance the on-state current of the device. A feasible process is to select appropriate dopant ions, increase the doping concentration of the source-side impurity-segregated Schottky junction, and reduce the thickness of the segregated layer.
[0022] 2. The drain requires a low Schottky barrier, almost an ohmic contact, to prevent carriers accelerated at the source from accelerating further at the drain. This is because drain acceleration has virtually no effect on increasing device current. Furthermore, excessively high carrier velocities can cause thermionic effects, degrading device performance. A feasible process involves selecting appropriate dopant ions, reducing the doping concentration of the source-side impurity-segregated Schottky junction, and increasing the thickness of the segregated layer. Attached Figure Description
[0023] Figure 1 (a) is a schematic diagram of growing a gate oxide layer on an N-type germanium substrate, and (b) is a schematic diagram of growing a metal gate layer on the gate oxide layer.
[0024] Figure 2 (a) is a schematic diagram of the gate oxide layer and gate pattern of the etched field-effect transistor, and (b) is a schematic diagram of the deposited metal Ni after etching.
[0025] Figure 3 A schematic diagram of the region at the source end of the Schottky junction where impurities are segregated in the opposite direction to the substrate doping.
[0026] Figure 4 A schematic diagram of the region at the drain end of the Schottky junction, where impurities with the same doping as the substrate are formed;
[0027] Figure 5 (a) is a schematic diagram of the energy band structure of a source-end impurity condensed Schottky junction, and (b) is a schematic diagram of the energy band structure of a drain-end impurity condensed Schottky junction.
[0028] Figure 6 (a) shows the current-voltage diagram of impurity-segregated Schottky junctions (DSS) with different doping types, and (b) shows the current-voltage diagram of impurity-segregated Schottky junctions (DSS) formed at different annealing temperatures.
[0029] Figure 7A schematic diagram comparing the energy bands of a traditional MOS source / drain and an impurity-segregated Schottky junction source / drain;
[0030] In the figure, N-type germanium substrate 10, gate oxide layer 11, metal gate layer 12, metal Ni 13, source terminal 14, and drain terminal 15. Detailed Implementation
[0031] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.
[0032] This invention provides a germanium-based impurity-segregated source-drain field-effect transistor, the structure of which differs from that of conventional transistors in that:
[0033] Using a Schottky junction as the source and drain, the current emission mechanism differs from that of a traditional MOSFET structure. The emission current at the source is the superposition of the current crossing the potential barrier (thermal emission) and the current passing through the potential barrier (field emission). When the doping concentration is high, more carriers cross the potential barrier, increasing the carrier concentration at the source. Simultaneously, a strong electric field accelerates carrier transport, effectively increasing the leakage current. Impurity segregation requires dopant ions to be concentrated as thinly as possible in a region, resulting in a high concentration in that area. We can adjust the Schottky barrier height by regulating the thickness and concentration of the segregated doped layer, thus meeting different requirements for the device's source and drain structures.
[0034] Specifically, firstly, the source end is a Schottky junction with impurities segregated opposite to those doped in the substrate. On the one hand, it forms a steep potential barrier drop, which accelerates the source end carriers. On the other hand, by properly controlling the metal-semiconductor contact potential difference, tunneling current will be generated, increasing the number of source end carriers and thus generating a larger driving current.
[0035] Secondly, the drain terminal employs an impurity-segregated Schottky junction with the same doping as the substrate. This structure results in a lower drain electric field than a traditional pn junction, reducing lattice collision damage near the drain after acceleration by the channel electric field, thus improving reliability. Because charge carriers undergo the hot electron effect under high-speed electric fields, increasing gate leakage current and substrate current, the device's subthreshold swing and drain-induced barrier drop increase, leading to performance degradation. Therefore, the optimized drain structure of this invention reduces the electric field and performance degradation.
[0036] In summary, using impurity-separated Schottky diodes as source-drain structures not only improves the device's drive current and switching ratio performance, but also enhances device reliability, reduces parameter drift or degradation, and ensures that subsequent circuit design results meet expectations.
[0037] In one embodiment, a germanium-based impurity-segregated source-drain field-effect transistor includes: an N-type germanium substrate, a gate oxide layer, a metal gate layer, a P-type doped impurity-segregated Schottky junction as the source, an N-type doped impurity-segregated Schottky junction as the drain, and a channel region between the source and drain.
[0038] Using a Schottky junction with impurity fragmentation opposite to the substrate doping as the source terminal requires the fragmented inversion ion layer to be as thin as possible and the doping concentration as high as possible to form a steep barrier drop. This increases the carrier concentration at the source terminal, and the device's drive current, on / off ratio, and other performance characteristics are optimized under the acceleration of the strong electric field at the source terminal. Conversely, using a Schottky junction with impurity fragmentation the same as the substrate doping as the drain terminal requires the Schottky barrier to be as small as possible to reduce the electric field strength at the drain terminal. This prevents excessive carrier velocity from causing severe carrier-lattice collisions, which could ultimately degrade transistor parameters such as threshold voltage and affect reliability.
[0039] Furthermore, the formation methods of impurity-segregated Schottky junctions include, but are not limited to, rapid annealing, microwave annealing, and laser annealing. However, for the source and drain ends, the required doping ions for different impurity-segregated Schottky junctions formed during annealing are different, and the annealing temperature is also different.
[0040] Furthermore, the gate oxide material includes, but is not limited to, aluminum oxide and hafnium oxide, with a thickness of 1 nanometer to 10 nanometers; the thickness of the metal gate layer is tens to hundreds of nanometers.
[0041] Furthermore, the source-end impurity ions can be selected from boron, aluminum, or indium.
[0042] Furthermore, the drain-end impurity ions can be selected from phosphorus, arsenic, and antimony.
[0043] Furthermore, the Schottky junctions at the source and drain ends are NiGe / n-Ge.
[0044] The following describes the fabrication of a germanium-based impurity-gathering source-drain field-effect transistor using an N-type germanium substrate as an example. The specific steps are as follows:
[0045] (1) As Figure 1 As shown in (a), a gate oxide layer 11 is deposited on the surface of an N-type germanium substrate 10 by thermal oxidation, atomic layer deposition or sputtering, with a thickness of 1 nanometer to 10 nanometers.
[0046] (2) Figure 1 As shown in (b), a metal gate layer 12 is deposited on the surface of the gate oxide layer 11 by atomic layer deposition, evaporation or sputtering, with a thickness of tens to hundreds of nanometers.
[0047] (3) Figure 2As shown in (a), the metal gate layer 12 and gate oxide layer 11 outside the gate region are removed by etching process until the surface of the N-type germanium substrate 10 to form the gate structure of the field effect transistor. The etching method is reactive plasma etching.
[0048] (4) Figure 2 As shown in (b), Ni13 metal is deposited on the gate structure by atomic layer deposition or sputtering, with a thickness of tens to hundreds of nanometers.
[0049] (5) Figure 3 As shown, a P-type doped impurity-segregated Schottky junction is formed in the germanium region on one side of the gate structure, serving as the source terminal 14. The source terminal can be formed using methods including, but not limited to, rapid annealing, microwave annealing, and laser annealing. The doping method can be thermal diffusion or ion implantation; boron ions can be selected, and the annealing temperature is chosen to be 400℃ for 1 min. The energy band diagram of the source terminal is approximately as shown below. Figure 5 As shown in (a).
[0050] (6) Figure 4 As shown, an N-type doped impurity-segregated Schottky junction is formed in the germanium region on the other side of the gate structure, serving as the drain terminal 15. The drain terminal can be formed by methods including, but not limited to, rapid annealing, microwave annealing, and laser annealing. The doping method can be thermal diffusion or ion implantation; phosphorus ions can be selected, and the annealing temperature is chosen to be 500℃ for 1 min. The energy band diagram of the drain terminal is approximately as shown below. Figure 5 As shown in (b), the fabrication of the germanium-based impurity segregation source-drain field-effect transistor of this invention is now complete. It should be noted that electrodes can be added as needed during subsequent measurements of the optimized device.
[0051] In this embodiment, a p-NiGe / n-Ge Schottky junction is formed at the source end, resulting in a steep barrier drop; an n-NiGe / n-Ge Schottky junction is formed at the drain end, creating a Schottky junction with a lower barrier drop, or even an ohmic contact. The formation of the impurity-segregated Schottky junction includes, but is not limited to, rapid annealing, microwave annealing, and laser annealing. Here, metal germanides are formed at the source and drain, and the implanted impurity ions form segregated layers of varying thicknesses at different annealing temperatures, resulting in different Schottky junction barrier heights.
[0052] Figure 6 (a) shows the current-voltage diagram of impurity-segregated Schottky junctions (DSS) with different doping types, and (b) shows the current-voltage diagram of impurity-segregated Schottky junctions (DSS) formed at different annealing temperatures.
[0053] like Figure 7As shown, compared to the traditional pn junction source and drain, the source end optimized in this invention is an impurity-splitting Schottky junction with doping opposite to that of the substrate, which increases the electric field strength and improves the driving current; while the drain end is an impurity-splitting Schottky junction with doping the same as that of the substrate, which reduces the electric field strength of the drain end and increases the reliability.
[0054] The above description is merely a preferred embodiment of one or more embodiments of this specification and is not intended to limit the scope of one or more embodiments of this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this specification should be included within the protection scope of one or more embodiments of this specification.
Claims
1. A field-effect transistor based on germanium impurity condensation source / drain, characterized in that, include: An N-type germanium substrate, a gate oxide layer, a metal gate layer, a P-type doped impurity condensed Schottky junction as the source, an N-type doped impurity condensed Schottky junction as the drain, and a channel region between the source and drain. Using a Schottky junction with impurities of opposite doping to the substrate as the source, the required layer of doped inversion ions is to be as thin as possible and the doping concentration as high as possible, in order to form a steep barrier drop; using a Schottky junction with impurities of the same doping as the substrate as the drain, the required Schottky barrier is to be as small as possible. The source-end impurity ions are selected from boron, aluminum, and indium; the drain-end impurity ions are selected from phosphorus, arsenic, and antimony; the source-end and drain-end impurity ions form segregated layers of different thicknesses at different annealing temperatures, resulting in different Schottky junction barrier heights.
2. The germanium-based impurity segregation source / drain field-effect transistor according to claim 1, characterized in that, The formation of Schottky junctions due to impurity segregation can be achieved through rapid annealing, microwave annealing, and laser annealing.
3. The germanium-based impurity segregation source / drain field-effect transistor according to claim 1, characterized in that, The gate oxide layer material is aluminum oxide or hafnium oxide, with a thickness of 1 nanometer to 10 nanometers; the thickness of the metal gate layer is tens to hundreds of nanometers.
4. The germanium-based impurity condensation source-drain field-effect transistor according to claim 1, characterized in that, The source and drain Schottky junctions are NiGe / n-Ge.
5. A method for fabricating a germanium-based impurity-segregated source-drain field-effect transistor according to any one of claims 1-4, characterized in that, Includes the following steps: (1) A gate oxide layer and a metal gate layer are deposited on the surface of an N-type germanium substrate, and the gate structure of a field-effect transistor is formed by etching the metal gate layer and the gate oxide layer; (2) Deposit metal in the germanium region on one side of the gate structure to form a P-type doped impurity condensed Schottky junction, which serves as the source end; (3) Deposit metal in the germanium region on the other side of the gate structure to form an N-type doped impurity condensed Schottky junction, which serves as the drain.
6. The preparation method according to claim 5, characterized in that, Metallic Ni is deposited in the germanium regions on both sides of the gate structure to form source / drain metal germanides.