Low-cost all-vertical gallium nitride Schottky barrier diode and preparation method thereof

By using low-cost conductive substrates and additional anodes in fully vertical gallium nitride Schottky barrier diodes, the problem of high-cost substrates and current edge collection effects is solved, and efficient and low-cost device preparation and excellent electrical characteristics are achieved.

CN119562535AActive Publication Date: 2025-03-04XIDIAN UNIV
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202411593182.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-08
Publication Date
2025-03-04
Estimated Expiration
2044-11-08

AI Technical Summary

Technical Problem

In the prior art, high-cost gallium nitride homogeneous substrates limit the scale of fully vertical gallium nitride Schottky barrier diodes in commercial applications, and traditional quasi-vertical planar structures have a problem of current edge collection effect.

Method used

Using a low-cost conductive substrate and adding additional anodes to its bottom, a fully vertical gallium nitride Schottky barrier diode structure is innovatively designed. The cathode electrode is arranged on the upper surface of the transport layer, the anode electrode is arranged on the lower surface of the drift layer, and the anode electrode is directly below the cathode electrode, realizing a fully longitudinal conductive vertical device structure.

Benefits of technology

It effectively avoids the current edge collection effect in traditional structures, reduces the device preparation cost, improves the forward current density and switching speed of the device, weakens the thermal effect, and improves the stability and reliability of the device under high-power operating conditions.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119562535A_ABST
    Figure CN119562535A_ABST
Patent Text Reader

Abstract

The invention discloses a low-cost all-vertical gallium nitride Schottky barrier diode and a preparation method thereof. The diode comprises a transmission layer; the drift layer is located on the lower surface of the transmission layer; the positive electrode is located in the middle of the lower surface of the drift layer; the negative electrode is located in the middle of the transmission layer; the first dielectric layer is located on the lower surface of the remaining drift layer and the side wall and part of the lower surface of the positive electrode; the second dielectric layer is located on the upper surface of the remaining transmission layer and the side wall and part of the upper surface of the negative electrode; the positive electrode thickening layer is located on the lower surface of the first dielectric layer and the lower surfaces of the remaining negative electrodes; the conductive substrate is positioned on the lower surface of the positive electrode thickening layer; the additional positive electrode is positioned in the middle of the lower surface of the conductive substrate; the negative electrode thickening layer is located on the upper surface of a part of the second dielectric layer and the upper surface of the remaining negative electrode. According to the invention, a completely longitudinal conductive vertical device structure is realized, the forward current density of the device is improved, and the on-resistance is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a low-cost fully vertical gallium nitride Schottky barrier diode and a preparation method thereof. Background Art

[0002] Compared with traditional silicon (Si) and gallium arsenide (GaAs) materials, gallium nitride (GaN) materials have a bandgap width of up to 3.4eV. This feature gives GaN devices a higher voltage resistance, enabling them to work stably under higher voltage and power conditions. In addition, GaN devices also exhibit low on-resistance and high switching frequency characteristics, which can transmit energy at lower current loss, thereby greatly improving the efficiency of the system and achieving smaller packaging and higher system integration. At present, GaN devices have been widely used in many key fields, especially in power management, high-frequency communications, and high-power conversion. They have shown great potential. With the advancement of technology and the reduction of manufacturing costs, they are expected to play a greater role in high-end applications such as data centers, communication base stations, lidar, power modules, renewable energy, national defense, and aerospace.

[0003] Compared with the traditional quasi-vertical planar structure GaN Schottky barrier diode, the vertical GaN Schottky barrier diode exhibits extremely small on-resistance due to its highly concentrated current path, which helps to achieve the goal of efficient power conversion. Although GaN epitaxial technology based on GaN homogeneous substrate can effectively reduce the high-density defects caused by lattice mismatch, it is difficult to apply it on a large scale in commercialization due to the extremely high cost of GaN homogeneous substrate. Therefore, researching and developing low-cost fully vertical GaN Schottky barrier diodes has become one of the key research directions at home and abroad, and realizing low-cost fully vertical GaN Schottky barrier diodes with high current density has become a problem that needs to be solved urgently. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a low-cost fully vertical gallium nitride Schottky barrier diode and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0005] In a first aspect, an embodiment of the present invention provides a low-cost fully vertical gallium nitride Schottky barrier diode, the diode comprising:

[0006] Transport layer;

[0007] A drift layer, located on the lower surface of the transmission layer;

[0008] an anode electrode, located in the middle of the lower surface of the drift layer and forming a Schottky contact with the drift layer;

[0009] A cathode electrode, located in the middle of the upper surface of the transmission layer and forming an ohmic contact with the transmission layer;

[0010] A first dielectric layer, located on the lower surface of the remaining drift layer, and the side wall and a portion of the lower surface of the anode electrode;

[0011] A second dielectric layer is located on the upper surface of the remaining transmission layer, and the side wall and a portion of the upper surface of the cathode electrode;

[0012] an anode electrode thickening layer, located on the lower surface of the first dielectric layer and the lower surface of the remaining cathode electrode;

[0013] A conductive substrate, located on the lower surface of the anode electrode thickening layer;

[0014] an additional anode electrode, located in the middle of the lower surface of the conductive substrate;

[0015] The cathode electrode thickening layer is located on a portion of the upper surface of the second dielectric layer and the remaining upper surface of the cathode electrode.

[0016] In one embodiment of the present invention, the thickness of the anode electrode thickening layer is 0.5 μm to 10 μm.

[0017] In one embodiment of the present invention, the conductive substrate is a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate.

[0018] In one embodiment of the present invention, the thickness of the cathode thickening layer is 0.5 μm to 10 μm.

[0019] In one embodiment of the present invention, the thickness of the additional anode electrode is 1 μm to 5 μm.

[0020] In a second aspect, an embodiment of the present invention provides a method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode, the method comprising:

[0021] Obtaining an epitaxial wafer; the epitaxial wafer comprises a substrate layer, a nucleation layer, a transmission layer and a drift layer stacked in sequence from bottom to top;

[0022] forming an anode electrode in the middle of the upper surface of the drift layer, wherein the anode electrode forms a Schottky contact with the drift layer;

[0023] forming a first dielectric layer on the remaining upper surface of the drift layer, and on the sidewall and a portion of the upper surface of the anode electrode;

[0024] forming an anode electrode thickening layer on the upper surface of the first dielectric layer and the upper surface of the remaining anode electrode;

[0025] Obtaining a conductive substrate, and permanently bonding the conductive substrate to the upper surface of the anode electrode thickening layer;

[0026] forming an additional anode electrode in the middle of the upper surface of the conductive substrate;

[0027] Turning over the entire device structure, and etching away the substrate layer and the nucleation layer;

[0028] forming a cathode electrode in the middle of the upper surface of the transmission layer, wherein the cathode electrode forms an ohmic contact with the transmission layer;

[0029] forming a second dielectric layer on the upper surface of the remaining transmission layer and the upper surface of a portion of the cathode electrode;

[0030] A cathode electrode thickening layer is formed on the upper surface of the remaining cathode electrode and a portion of the upper surface of the second dielectric layer.

[0031] In one embodiment of the present invention, forming an anode electrode thickening layer on the upper surface of the first dielectric layer and the upper surface of the remaining anode electrode comprises:

[0032] An anode electrode thickening layer with a thickness of 0.5 μm to 10 μm is formed on the upper surface of the first dielectric layer and the upper surface of the remaining anode electrode by using an electroplating process.

[0033] In one embodiment of the present invention, the obtained conductive substrate is a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate.

[0034] In one embodiment of the present invention, before the conductive substrate is permanently bonded to the upper surface of the anode thickening layer, the method comprises:

[0035] The electroplating process is adopted to electroplate metal on the upper surface of the conductive substrate.

[0036] In one embodiment of the present invention, forming a cathode electrode thickening layer on the upper surface of the remaining cathode electrode and the upper surface of a portion of the second dielectric layer comprises:

[0037] An electroplating process is adopted to form a cathode electrode thickening layer with a thickness of 0.5 μm to 10 μm on the upper surface of the remaining cathode electrode and the upper surface of a portion of the second dielectric layer.

[0038] Beneficial effects of the present invention:

[0039] The low-cost fully vertical GaN Schottky barrier diode proposed in the present invention innovatively arranges the cathode electrode on the upper surface of the transmission layer and the anode electrode on the lower surface of the drift layer, and the anode electrode is directly below the cathode electrode. At the same time, a low-cost conductive substrate is introduced, and an additional anode electrode is added to the bottom of the conductive substrate, thereby realizing a fully longitudinally conductive vertical device structure. The device can effectively avoid the current edge collection effect problem existing in the conventional GaN Schottky barrier diode with a quasi-vertical planar structure on a heterogeneous substrate, and at the same time, compared with the conventional GaN Schottky barrier diode with a quasi-vertical planar structure on a heterogeneous substrate, the thicker GaN is stripped. The conductive substrate solves the support problem after the substrate layer of the device is peeled off, and the conductive substrate can be used as a good conductive layer to make up for the deficiency that the cathode electrode is easily generated at the bottom of the substrate layer. The device has a higher forward current density and a lower on-resistance, and has excellent switching speed and breakdown voltage, achieving excellent electrical properties. Since the device can handle a larger forward current density in high-power applications, the thermal effect of the device is reduced, and the stability and reliability of the device under high-power working conditions are further improved. In general, the embodiment of the present invention can effectively solve the current edge collection effect of the traditional heterogeneous substrate quasi-vertical planar structure gallium nitride Schottky barrier diode. With the advantages of large current and low cost, it can promote the low-cost full vertical gallium nitride Schottky barrier diode to have broad application prospects in the field of high-tech, such as in data centers, communication base stations, laser radars, power modules and other electronic equipment. Application and industrialization.

[0040] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a schematic structural diagram of a low-cost fully vertical gallium nitride Schottky barrier diode provided by an embodiment of the present invention;

[0042] Figure 2 It is a schematic flow chart of a method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode provided by an embodiment of the present invention;

[0043] Figure 3a to Figure 3j It is a schematic structural diagram corresponding to the preparation process of a low-cost fully vertical gallium nitride Schottky barrier diode provided by an embodiment of the present invention.

[0044] Description of reference numerals:

[0045] 1-substrate layer; 2-nucleation layer; 3-transmission layer; 4-drift layer; 5-anode; 6-first dielectric layer; 7-anode thickening layer; 8-conductive substrate; 9-additional anode; 10-cathode; 11-second dielectric layer; 12-cathode thickening layer. DETAILED DESCRIPTION

[0046] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0047] First, see Figure 1 The embodiment of the present invention provides a low-cost fully vertical gallium nitride Schottky barrier diode, which specifically includes the following steps:

[0048] Transport layer 3;

[0049] A drift layer 4 is located on the lower surface of the transmission layer 3;

[0050] an anode electrode 5 , located in the middle of the lower surface of the drift layer 4 and forming a Schottky contact with the drift layer 4 ;

[0051] The cathode electrode 10 is located in the middle of the upper surface of the transmission layer 3 and forms an ohmic contact with the transmission layer 3;

[0052] A first dielectric layer 6 is located on the lower surface of the remaining drift layer 4 and the side wall and a part of the lower surface of the anode electrode 5;

[0053] The second dielectric layer 11 is located on the upper surface of the remaining transmission layer 3 and the side wall and a part of the upper surface of the cathode electrode 10;

[0054] The anode thickening layer 7 is located on the lower surface of the first dielectric layer 6 and the lower surface of the remaining cathode electrode 10;

[0055] A conductive substrate 8 is located on the lower surface of the anode thickening layer 7;

[0056] An additional anode electrode 9 is located in the middle of the lower surface of the conductive substrate 8;

[0057] The cathode electrode thickening layer 12 is located on the upper surface of a portion of the second dielectric layer 11 and the upper surface of the remaining cathode electrode 10 .

[0058] In the embodiment of the present invention, the transmission layer 3 is n-type heavily doped GaN with a thickness of 0.5 μm to 5 μm and a silicon doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 The drift layer 4 is an n-type lightly doped GaN drift layer with a thickness of 0.1 μm to 10 μm and a silicon doping concentration of 1×10 15 cm -3 ~5×10 17 cm -3 ; The materials of the first dielectric layer 6 and the second dielectric layer 10 are one or more of Al2O3, SiO2, and SiN.

[0059] The embodiment of the present invention selects Ni / Au (50nm / 150nm) metal, Pt / Au (50nm / 150nm) metal, W / Au (50nm / 150nm) metal or Mo / Au (50nm / 150nm) metal as the anode electrode 5 of the gallium nitride Schottky barrier diode. This is because: metal Ni, Pt, W, Mo can form high-quality Schottky contacts on the surface of the GaN material due to their excellent adhesion; at the same time, the introduction of the Au layer not only effectively improves the conductivity of the diode; but also because of the chemical inertness of Au, it prevents the oxidation of the underlying metal (Ni, Pt, W, Mo), thereby enhancing the reliability of the device.

[0060] The embodiment of the present invention selects Ti / Al / Ni / Au (20nm / 140nm / 50nm / 40nm) metal as the cathode electrode 10 of the gallium nitride Schottky barrier diode. This is because: selecting metal Ti with a lower work function as the contact layer is conducive to forming an ideal ohmic contact at the Au semi-contact interface and reducing the contact resistance; metal Al optimizes the interface bonding effect by promoting the solid phase reaction between N atoms and Ti atoms; metal Ni acts as a barrier layer to prevent interpenetration between different metal layers; metal Au is used to protect the underlying metal from oxidation, thereby enhancing the reliability of the device.

[0061] The thickness of the conductive substrate 8 of the embodiment of the present invention is 50 μm to 150 μm; the material of the conductive substrate 8 is a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate. The low-resistance Si conductive substrate has a lower resistivity, can reduce energy loss and improve the conductive performance; the metal conductive substrate has excellent conductivity; the tungsten-copper alloy conductive substrate combines the high thermal stability of tungsten metal and the excellent electrical and thermal conductivity of copper metal, ensuring the low cost and high performance of the device and improving the heat dissipation capacity of the device.

[0062] In the embodiment of the present invention, if the conductive substrate 8 is a low-resistance Si conductive substrate, the material of the anode electrode thickening layer 7 is selected from metals that can form good ohmic contact with Si. If the conductive substrate 8 is a metal conductive substrate or a tungsten-copper alloy conductive substrate, the material of the anode electrode thickening layer 7 is not limited; the anode electrode thickening layer 7 is used to thicken the anode electrode 5, and the thickness of the anode electrode thickening layer 7 is 0.5μm to 10μm. At the same time, the material of the cathode electrode thickening layer 12 is not limited, for example, it can be Ti / Au metal, which is used to thicken the cathode electrode 10, and the thickness of the cathode electrode thickening layer 12 is 0.5μm to 10μm.

[0063] In the embodiment of the present invention, if the conductive substrate 8 is a low-resistance Si conductive substrate, the material of the additional anode electrode 9 is selected from metals that can form good ohmic contact with Si. If the conductive substrate 8 is a metal conductive substrate or a tungsten-copper alloy conductive substrate, the material of the additional anode electrode 9 is not limited, and the thickness is 1 μm to 5 μm. The additional anode electrode 9 and the cathode thickening layer 12 are used to apply bias to the low-cost full vertical gallium nitride Schottky barrier diode.

[0064] In summary, the low-cost fully vertical GaN Schottky barrier diode proposed in the embodiment of the present invention innovatively arranges the cathode electrode 10 on the upper surface of the transmission layer 3, and the anode electrode 5 on the lower surface of the drift layer 4, and the anode electrode 5 is directly below the cathode electrode 10, and at the same time introduces a low-cost conductive substrate 8, and adds an additional anode electrode 9 at the bottom of the conductive substrate, so as to realize a fully longitudinally conductive vertical device structure, which can effectively avoid the current edge effect problem existing in the conventional GaN Schottky barrier diode with a quasi-vertical planar structure on a heterogeneous substrate, and at the same time, compared with the conventional GaN Schottky barrier diode with a quasi-vertical planar structure on a heterogeneous substrate, The cathode tube is stripped of the thick and less conductive substrate layer. The introduction of the conductive substrate 8 solves the support problem after the substrate layer of the device is stripped, and the conductive substrate 8 can be used as a good conductive layer to make up for the deficiency that if the cathode electrode is directly prepared at the bottom of the substrate layer, it is very easy to produce a large on-resistance, so that the device has a higher forward current density and a lower on-resistance, and has excellent switching speed and breakdown voltage, achieving excellent electrical characteristics. Since the device can handle a larger forward current density in high-power applications, the thermal effect of the device is weakened, and the stability and reliability of the device under high-power working conditions are further improved. In general, the embodiment of the present invention can effectively solve the current edge collection effect of the traditional heterogeneous substrate quasi-vertical planar structure gallium nitride Schottky barrier diode. With the advantages of large current and low cost, it can promote the low-cost full vertical gallium nitride Schottky barrier diode to have broad application prospects in the field of high-tech, such as in data centers, communication base stations, laser radars, power modules and other electronic equipment. Application and industrialization.

[0065] Second, see Figure 2 The embodiment of the present invention provides a method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode, the method comprising:

[0066] S10, obtaining an epitaxial wafer; wherein the epitaxial wafer comprises a substrate layer 1, a nucleation layer 2, a transmission layer 3 and a drift layer 4 stacked in sequence from bottom to top.

[0067] The embodiment of the present invention obtains Figure 3aThe epitaxial wafer shown includes a substrate layer 1, a nucleation layer 2, a transmission layer 3 and a drift layer 4 stacked in sequence from bottom to top. The material of the substrate layer 1 is Si or sapphire, and the production technology is mature and the cost is low; the material of the nucleation layer 2 is one or more of AlN, AlGaN, and GaN, and its thickness is 30nm to 90nm; the transmission layer 3 is n-type heavily doped GaN, with a thickness of 0.5μm to 5μm and a silicon doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 The drift layer 4 is an n-type lightly doped GaN drift layer with a thickness of 0.1 μm to 10 μm and a silicon doping concentration of 1×10 15 cm -3 ~5×10 17 cm -3 The epitaxial wafer may be obtained by epitaxial growth through a MOCVD (Metal-organic Chemical Vapor Deposition) process, or may be directly obtained from an existing epitaxial wafer of the structure.

[0068] Next, the epitaxial wafer is organically cleaned to remove the surface oxide layer. Specifically: first, the epitaxial wafer is immersed in an acetone solution and ultrasonically cleaned for 5 minutes to remove organic pollutants on the surface of the epitaxial wafer; then, the epitaxial wafer is placed in an isopropanol solution and ultrasonically cleaned for 5 minutes to effectively remove the residual acetone on the surface of the epitaxial wafer, and then the epitaxial wafer is rinsed in deionized water to remove the isopropanol residue attached to the surface of the epitaxial wafer, and finally the surface of the epitaxial wafer is blown dry with high-purity nitrogen to ensure that there is no residual liquid on the epitaxial wafer; then, the surface oxide layer of the epitaxial wafer is removed, and the epitaxial wafer is placed in a 1:7 BOE (Buffered Oxide Etch) solution for 30 seconds, and then rinsed with a large amount of deionized water, and finally the deionized water on the surface of the epitaxial wafer is blown dry with high-purity nitrogen to complete the entire cleaning process of the epitaxial wafer. Cleaning of the epitaxial wafer is a necessary process before preparing the device, which can reduce the interference of oxidation and contamination on the subsequent process of the device and the impact on the performance of the device.

[0069] S20 , forming an anode electrode 5 in the middle of the upper surface of the drift layer 4 , so that the anode electrode 5 forms a Schottky contact with the drift layer 4 .

[0070] In the embodiment of the present invention, the upper surface of the drift layer 4 is subjected to coating, baking, exposure, and development, and an anode electrode region is defined in the middle of the upper surface of the drift layer 4. Ni / Au (50nm / 150nm) metal, Pt / Au (50nm / 150nm) metal, W / Au (50nm / 150nm) metal, or Mo / Au (50nm / 150nm) metal layer is grown in the anode electrode region by electron beam evaporation technology, and then residual glue and excess metal are removed by organic cleaning to form an anode electrode 5. Figure 3b As shown, the anode electrode 5 forms a Schottky contact with the drift layer 4. In order to reduce the influence of the Au semi-contact interface state and suppress reverse leakage, the epitaxial wafer formed with the anode electrode 5 is annealed at 450° C. for 5 minutes in a nitrogen atmosphere.

[0071] S30 , forming a first dielectric layer 6 on the upper surface of the remaining drift layer 4 , and the sidewall and a portion of the upper surface of the anode electrode 5 .

[0072] In the embodiment of the present invention, a layer of Al2O3, SiO2 or SiN dielectric material with a thickness of 20nm is deposited on the upper surface of the drift layer 4 and the sidewall and upper surface of the anode electrode 5 by using the PECVD (Plasma Enhanced Chemical Vapor Deposition) process, and the surface of the device structure obtained by S20 is passivated to reduce the influence of the surface state on the device performance, and at the same time effectively prevent the surface of the epitaxial wafer from being contaminated by external impurities. After the first dielectric layer 6 is deposited, the RIE (Reactive Ion Etching) process is used to dry-etch the anode electrode area to etch away part of the first dielectric layer 6, so as to open the necessary anode electrode contact hole on the upper surface of the first dielectric layer 6, such as Figure 3c shown.

[0073] S40 , forming an anode thickening layer 7 on the upper surface of the first dielectric layer 6 and the upper surface of the remaining anode electrodes 5 .

[0074] In the embodiment of the present invention, the device structure obtained in S30 is immersed in acetone and isopropanol solutions in turn, and ultrasonic cleaning is carried out for 5 minutes respectively, and then rinsed with deionized water and blown dry with high-purity nitrogen gas; after the cleaning is completed, an anode thickening layer 7 with a thickness of 0.5μm to 10μm is formed on the upper surface of the first dielectric layer 6 and the upper surface of the remaining anode electrode 5 by using an electroplating process: in the electroplating tank, by controlling process parameters such as current density, temperature and solution composition, the thickness and uniformity of the metal layer are accurately controlled, the anode electrode in the anode electrode area is thickened to the required thickness, and defects in the deposition process are eliminated by annealing, and the crystal quality of the metal layer is increased to obtain an anode thickening layer 7 with a thickness of 0.5μm to 10μm, as shown in FIG. Figure 3dIf the conductive substrate 8 is a low-resistance Si conductive substrate, the material of the anode electrode thickening layer 7 is selected from metals that can form good ohmic contact with Si, such as Ti and W metals. If the conductive substrate 8 is a metal conductive substrate or a tungsten-copper alloy conductive substrate, the material of the anode electrode thickening layer 7 is not limited.

[0075] S50 , obtaining a conductive substrate 8 , and permanently bonding the conductive substrate 8 to the upper surface of the anode thickened layer 7 .

[0076] In the embodiment of the present invention, a conductive substrate 8 is first obtained. The obtained conductive substrate 8 can be a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate. Then, the conductive substrate 8 is electroplated with the same metal as the anode thickening layer 7 by using an electroplating process; and the surface of the conductive substrate 8 with the metal electroplated on the upper surface of the anode thickening layer 7 is permanently bonded by using a bonding technology. The obtained device structure is as follows: Figure 3e More specifically: the obtained conductive substrate 8 is cleaned, and after cleaning, the same metal as the anode electrode thickening layer 7 is electroplated on the surface of the conductive substrate 8 by using the electroplating process, and the conductive substrate 8 and the anode electrode thickening layer 7 are ensured to achieve a good bonding effect, and the anode electrode thickening layer 7 and the surface of the conductive substrate 8 electroplated with the metal are heated to a temperature higher than the recrystallization temperature by using the bonding technology, and the local metal is plastically deformed, and the metal is bonded at the metal contact interface by diffusion and bonding through the external pressure.

[0077] S60 , forming an additional anode electrode 9 in the middle of the upper surface of the conductive substrate 8 .

[0078] In the embodiment of the present invention, the surface of the conductive substrate 8 is cleaned, and the upper surface of the conductive substrate 8 is coated, baked, exposed, and developed. An additional anode electrode area is defined in the middle of the upper surface of the conductive substrate 8, and metal is deposited in the additional anode electrode area using electron beam evaporation technology. The residual glue and excess metal are then removed by organic cleaning. If the conductive substrate 8 is a low-resistance Si conductive substrate, the material of the additional anode electrode 9 is selected from a metal that can form a good ohmic contact with Si, such as Ti / Au or W / Au. Ti and W metals can form a good ohmic contact with the Si surface. Au prevents oxidation of the bottom (Ti / W) metal due to its stability. If the conductive substrate 8 is a metal conductive substrate or a tungsten-copper alloy conductive substrate, the material of the additional anode electrode 9 is not limited, and an additional anode electrode 9 with a thickness of 1μm to 5μm is formed. Figure 3f shown.

[0079] S70 , turning over the entire device structure, and etching away the substrate layer 1 and the nucleation layer 2 .

[0080] The embodiment of the present invention first flips the entire device structure obtained in S60; then, the substrate layer 1 is etched: when the substrate layer 1 is a Si substrate, a mechanical grinding process is used to quickly reduce most of the thickness of the substrate layer 1 and then deep silicon etching is used to completely remove the substrate layer; when the substrate layer 1 is a sapphire substrate, laser stripping technology is used to remove the substrate layer. Finally, the nucleation layer 2 is accurately etched by ICP (Inductively Couple Plasma) technology. During the etching process, a mixed gas of Cl2 and BCl3 is used as an etching medium to ensure etching selectivity and accurate material removal. Finally, high-purity nitrogen is used to etch the substrate layer 2. Figure 3g The device structure with the substrate layer 1 and the nucleation layer 2 removed is dried to ensure that there is no residual liquid or contaminants on the surface.

[0081] S80 , forming a cathode electrode 10 in the middle of the upper surface of the transmission layer 3 , wherein the cathode electrode 10 forms an ohmic contact with the transmission layer 3 .

[0082] In the embodiment of the present invention, the upper surface of the transmission layer 3 is coated, baked, exposed, and developed, and a cathode electrode region is defined in the middle of the upper surface of the transmission layer 3. Then, Ti / Al / Ni / Au (20nm / 140nm / 50nm / 40nm) metal is grown in the cathode electrode region by electron beam evaporation technology, and then residual glue and excess metal are removed by organic cleaning to form a cathode electrode 10. Figure 3h As shown, the cathode electrode 10 forms an ohmic contact with the transmission layer 3. In order to reduce the influence of the Au semi-contact interface state and suppress reverse leakage, the device structure formed with the cathode electrode 10 is annealed at 850° C. for 5 minutes in a nitrogen atmosphere to form a good ohmic contact.

[0083] S90 , forming a second dielectric layer 11 on the upper surface of the remaining transmission layer 3 and the upper surface of a portion of the cathode electrode 10 .

[0084] The embodiment of the present invention uses a PECVD process to deposit a layer of Al2O3, SiO2 or SiN dielectric material with a thickness of 20nm on the upper surface of the transmission layer 3 and the sidewall and upper surface of the cathode electrode 10, and passivates the surface of the transmission layer 3 and the cathode electrode 10 to reduce the influence of the surface state on the device performance, and at the same time effectively prevent the surface of the transmission layer 3 from being contaminated by external impurities. After the second dielectric layer 11 is deposited, the cathode electrode area is dry-etched by RIE process to open the necessary electrode contact holes on the second dielectric layer 11, such as Figure 3i shown.

[0085] S100 , forming a cathode electrode thickening layer 12 on the upper surface of the remaining cathode electrode 10 and the upper surface of a portion of the second dielectric layer 11 .

[0086] In the embodiment of the present invention, the device structure obtained in S90 is immersed in acetone and isopropanol solutions in turn, and ultrasonically cleaned for 5 minutes respectively, and then rinsed with deionized water and dried with high-purity nitrogen. After cleaning, an electroplating process is used to form a cathode thickening layer 12 with a thickness of 0.5μm to 10μm on the upper surface of the remaining cathode electrode 10 and part of the upper surface of the second dielectric layer 11: In the electroplating tank, by controlling process parameters such as current density, temperature and solution composition, precise control of the thickness and uniformity of the metal layer is achieved, and the metal electrode area is thickened to the required thickness. Annealing is used to eliminate defects in the deposition process and increase the crystallization quality of the metal layer, thereby obtaining a cathode thickening layer 12 with a thickness of 0.5μm to 10μm, such as Figure 3j shown.

[0087] The method for preparing a low-cost fully vertical GaN Schottky barrier diode provided in an embodiment of the present invention is based on the innovative design of the device structure of the first aspect, so that in the preparation process, a traditional silicon substrate or sapphire substrate and an epitaxial wafer grown by GaN nucleation technology can be used, thereby avoiding the use of a high-cost GaN homogeneous substrate. This not only effectively reduces the device preparation cost, but also the prepared device solves the current gathering effect of the conventional heterogeneous substrate quasi-vertical planar structure GaN Schottky barrier diode, which is conducive to industrial application.

[0088] As for the method embodiment of the second aspect, since it is basically similar to the structural embodiment of the first aspect, the description is relatively simple, and the relevant parts may refer to the partial description of the structural embodiment of the first aspect.

[0089] In the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0090] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the specification and its drawings. In the specification, the word "comprising" does not exclude other components or steps, and "a" or "one" does not exclude multiple situations. Certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0091] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.

Claims

1. A low-cost fully vertical gallium nitride Schottky barrier diode, characterized in that: The diode comprises: Transport layer (3); A drift layer (4) located on the lower surface of the transmission layer (3); an anode electrode (5), located in the middle of the lower surface of the drift layer (4) and forming a Schottky contact with the drift layer (4); A cathode electrode (10) is located in the middle of the upper surface of the transmission layer (3) and forms an ohmic contact with the transmission layer (3); A first dielectric layer (6) is located on the lower surface of the remaining drift layer (4), as well as the side wall and a portion of the lower surface of the anode electrode (5); A second dielectric layer (11) is located on the upper surface of the remaining transmission layer (3), as well as the side wall and a portion of the upper surface of the cathode electrode (10); An anode thickening layer (7) is located on the lower surface of the first dielectric layer (6) and the lower surface of the remaining cathode electrode (10); A conductive substrate (8) located on the lower surface of the anode electrode thickening layer (7); An additional anode electrode (9) is located in the middle of the lower surface of the conductive substrate (8); The cathode electrode thickening layer (12) is located on a portion of the upper surface of the second dielectric layer (11) and the remaining upper surface of the cathode electrode (10).

2. The low-cost fully vertical gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the anode electrode thickening layer (7) is 0.5 μm to 10 μm.

3. The low-cost fully vertical gallium nitride Schottky barrier diode according to claim 1, characterized in that: The conductive substrate (8) is a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate.

4. The low-cost fully vertical gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the cathode electrode thickening layer (12) is 0.5 μm to 10 μm.

5. The low-cost fully vertical gallium nitride Schottky barrier diode according to claim 1, characterized in that: The additional anode electrode (9) has a thickness of 1 μm to 5 μm.

6. A method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode, characterized in that: The preparation method comprises: Obtaining an epitaxial wafer; the epitaxial wafer comprises a substrate layer (1), a nucleation layer (2), a transmission layer (3) and a drift layer (4) stacked in sequence from bottom to top; An anode electrode (5) is formed in the middle of the upper surface of the drift layer (4), and the anode electrode (5) forms a Schottky contact with the drift layer (4); forming a first dielectric layer (6) on the remaining upper surface of the drift layer (4), and on the side wall and a portion of the upper surface of the anode electrode (5); forming an anode electrode thickening layer (7) on the upper surface of the first dielectric layer (6) and the upper surface of the remaining anode electrode (5); Obtaining a conductive substrate (8), and permanently bonding the conductive substrate (8) to the upper surface of the anode electrode thickening layer (7); An additional anode electrode (9) is formed in the middle of the upper surface of the conductive substrate (8); Turning over the entire device structure, and etching away the substrate layer (1) and the nucleation layer (2); A cathode electrode (10) is formed in the middle of the upper surface of the transmission layer (3), wherein the cathode electrode (10) forms an ohmic contact with the transmission layer (3); forming a second dielectric layer (11) on the upper surface of the remaining transmission layer (3) and on the upper surface of a portion of the cathode electrode (10); A cathode electrode thickening layer (12) is formed on the upper surface of the remaining cathode electrode (10) and on the upper surface of a portion of the second dielectric layer (11).

7. The method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode according to claim 6, characterized in that: An anode thickening layer (7) is formed on the upper surface of the first dielectric layer (6) and the upper surface of the remaining anode electrode (5), comprising: An electroplating process is used to form an anode thickening layer (7) with a thickness of 0.5 μm to 10 μm on the upper surface of the first dielectric layer (6) and the upper surface of the remaining anode electrode (5).

8. The method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode according to claim 6, characterized in that: The obtained conductive substrate (8) is a low-resistance Si conductive substrate, a metal conductive substrate or a tungsten-copper alloy conductive substrate.

9. The method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode according to claim 6, characterized in that: Before the conductive substrate (8) is permanently bonded to the upper surface of the anode thickened layer (7), the method comprises: The electroplating process is used to electroplate metal on the upper surface of the conductive substrate (8).

10. The method for preparing a low-cost fully vertical gallium nitride Schottky barrier diode according to claim 6, characterized in that: A cathode electrode thickening layer (12) is formed on the upper surface of the remaining cathode electrode (10) and a portion of the upper surface of the second dielectric layer (11), comprising: By adopting an electroplating process, a cathode electrode thickening layer (12) with a thickness of 0.5 μm to 10 μm is formed on the upper surface of the remaining cathode electrode (10) and the upper surface of part of the second dielectric layer (11).

Citation Information

Patent Citations

  • GaN-based completely-vertical Schottky varactor based on metal eave structure and preparation method thereof

    CN110808292A

  • Gallium nitride vertical PIN diode and preparation method thereof

    CN113871463A

  • Gallium nitride Schottky barrier diode and preparation method thereof

    CN114695112A

  • Schottky barrier diode and epitaxial substrate

    JP2007324327A

  • Schottky barrier diode and manufacturing method for the same

    KR101435937B1