Switch-capacitor common-ground nine-level inverter

Abstract

A switched-capacitor common-ground nine-level inverter, with a DC voltage source V in whose positive terminal is connected to the drain of switch S1 and the source of switch S3, and the negative terminal of V in is grounded and connected to the sources of switches S2, S6, and S 11 's drain; the positive terminal of capacitor C1 is connected to the drains of S3 and S4, and the negative terminal of C1 is connected to the sources of S1 and S2; the source of S4 is connected to the drains of switches S5 and S7; the source of S5 is connected to the drains of S6 and S8; the positive terminal of capacitor C2 is connected to the drains of S7 and S9, the negative terminal of C2 is connected to the source of S8 and the positive terminal of capacitor C3, and the negative terminal of C3 is connected to the sources of switches S 10 and S 11 's source; the source of S9 is connected to the drain of S 10 and one end of the filter inductor L f , the other end of L f is connected to one end of the load, and the other end of the load is grounded. The present invention has a quadruple boost capacity; a common-ground structure, which can solve the leakage current problem in the field of photovoltaic power generation.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to a switched-capacitor common-ground nine-level inverter. Background Art

[0002] With the increasingly serious problems of energy shortage and environmental pollution globally, finding and developing new alternative energy sources have become the focus of researchers around the world. As a renewable energy source with rich resources and wide distribution, solar energy has received attention and research. Among them, the utilization method of photovoltaic power generation has become one of the effective means to solve the current energy problems.

[0003] With the continuous development of power electronics technology, photovoltaic power generation is developing towards high efficiency, high power quality, and high power density. Multilevel inverters have been widely used in photovoltaic power generation due to their advantages such as high output power quality, low stress on switching devices, and high system power density.

[0004] However, in traditional multilevel inverter types, neutral-point clamped and flying-capacitor inverters respectively require a large number of clamping diodes and flying capacitors to generate multilevel outputs; cascaded H-bridge inverters generate multilevels by cascading multiple H-bridge units and require a large number of DC power supplies. These have led to a significant increase in the cost and control difficulty of the inverter.

[0005] The multilevel inverter based on switched capacitors can solve the above problems. The switched-capacitor structure has no magnetic components such as inductors and transformers, and has the advantages of small volume, high power density, high conversion efficiency, and easy integration. At the same time, this structure has a certain boost ability and is suitable for medium and small power photovoltaic grid-connected boost occasions, which can reduce the intermediate DC boost link, reduce the system cost, and improve the inverter efficiency.

[0006] At present, the non-isolated photovoltaic grid-connected inverter does not contain a transformer and has no electrical isolation, forming a common-mode loop between the parasitic capacitance between the photovoltaic panel and the ground and the photovoltaic grid-connected inverter and the ground, thus generating leakage current. The leakage current will cause additional losses, reduce the power quality, and even endanger the safety of personnel. Summary of the Invention

[0007] The object of the present invention is to provide a switched-capacitor common-ground nine-level inverter. The common-ground structure of this inverter enables it to have good leakage current suppression ability; the output voltage is four times the DC voltage source voltage, having a high voltage gain ability; the switched capacitor can achieve the charge and discharge balance of the capacitor voltage without an additional control circuit.

[0008] The technical solution to achieve the object of the present invention is as follows:

[0009] Switched-capacitor common-ground nine-level inverter, DC voltage source V inThe positive electrode is connected to the drain of the switching transistor S1 and the source of the switching transistor S3, V in The negative electrode is grounded and connected to the source of the switching transistor S2, the source of the switching transistor S6, the source of the switching transistor S 11 The drain; the positive electrode of the capacitor C1 is connected to the drain of S3 and the drain of the switching transistor S4, the negative electrode of C1 is connected to the source of S1 and the drain of S2; the source of S4 is connected to the drain of the switching transistor S5 and the source of the switching transistor S7; the source of S5 is connected to the drain of S6 and the drain of the switching transistor S8; the positive electrode of the capacitor C2 is connected to the drain of S7 and the drain of the switching transistor S9, the negative electrode of C2 is connected to the source of S8 and the positive electrode of the capacitor C3, the negative electrode of C3 is connected to the source of the switching transistor S 10 The source and S 11 The source; the source of S9 is connected to S 10 The drain and the filter inductor L f One end of, L f The other end is connected to one end of the load, and the other end of the load is grounded.

[0010] The control method of the above inverter is: using the drive signals s1-s11 to control the switching transistors S1-S 11 ;

[0011] Among them, s1 = (A1) or (B1) or (B3) or (B6), s2 = s3 = not((A1) or (B1) or (B3) or (B6)), s4 = A8, s5 = (A2) or (B4) or (not(A8)), s6 = (B1) or (B6) or (not(A8)), s7 = (B2) or (not(A6)), s8 = (A3) or (B5), s9 = A4, s10 = not(A4), s11 = (A1) or (B3); the B1 = (not(A2)) and (A3), B2 = (not(A2)) and (A4), B3 = (not(A4)) and (A5), B4 = (not(A4)) and (A6), B5 = (not(A4)) and (A7), B6 = (not(A6)) and (A7); the A1 = (u s > u1), A2 = (u s > u2), A3 = (u s > u3), A4 = (u s > u4), A5 = (u s > u5), A6 = (u s > u6), A7 = (u s > u7), A8 = (u s > u8); the u sis a sine wave, and u1 to u8 are triangular waves with equal frequency and the same phase; the frequency of u1 to u8 is greater than that of u s ; the minimum value of u1 is 3A c , and the maximum value is 4A c ; the minimum value of u2 is 2A c , and the maximum value is 3A c ; the minimum value of u3 is A c , and the maximum value is 2A c ; the minimum value of u4 is 0, and the maximum value is A c ; the maximum value of u5 is 0, and the minimum value is -A c ; the maximum value of u6 is -A c , and the minimum value is -2A c ; the maximum value of u7 is -2A c , and the minimum value is -3A c ; the maximum value of u8 is -3A c , and the minimum value is -4A c ; the peak value of u s is less than 4A c .

[0012] The present invention is a boost inverter with quadruple boost ability; a common-ground structure, which can solve the leakage current problem in the field of photovoltaic power generation; fewer components, simple structure, low cost, high power density, and high system efficiency; all capacitors can achieve charge and discharge balance of the capacitor voltage within the power frequency period, reducing the cost and volume of the switched capacitor. Description of the Drawings

[0013] Figure 1 is the schematic diagram of the switched-capacitor common-ground nine-level inverter.

[0014] Figure 2 is the modulation signal diagram of the switched-capacitor common-ground nine-level inverter.

[0015] Figure 3 is the logic diagram for generating the switch tube drive signal.

[0016] Figures 4(a) to 4(i) is the operating mode diagram of the switched-capacitor common-ground nine-level inverter.

[0017] Figure 5 is the waveform diagram of the output voltage, output current, and capacitor voltage of the switched-capacitor common-ground nine-level inverter.

[0018] Figure 6 is the leakage current waveform diagram of the switched-capacitor common-ground nine-level inverter.

[0019] Figure 7 is the waveform diagram of the output voltage and output current of the switched-capacitor common-ground nine-level inverter when the load changes. Detailed implementation manners

[0020] The following further describes the detailed implementation manners of the present invention with reference to the accompanying drawings.

[0021] As shown in Figure 1 , the circuit schematic diagram of the switched-capacitor common-ground nine-level inverter includes a DC voltage source V in , a first capacitor C1, a second capacitor C2, a third capacitor C3, a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, a sixth switch S6, a seventh switch S7, an eighth switch S8, a ninth switch S9, a tenth switch S 10 , an eleventh switch S 11 , and a filter inductor L f .

[0022] The positive pole of the DC voltage source V in is connected to the drain of the first switch tube S1 and the source of the third switch tube S3, and the negative pole of the DC voltage source V in is connected to the source of the second switch tube S2, the source of the sixth switch tube S6, the drain of the eleventh switch tube S 11 , and the neutral point of the power grid; the positive pole of the first capacitor C1 is connected to the drain of the third switch tube S3 and the drain of the fourth switch tube S4, and the negative pole of the first capacitor C1 is connected to the source of the first switch tube S1 and the drain of the second switch tube S2; the positive pole of the second capacitor C2 is connected to the drain of the seventh switch tube S7 and the drain of the ninth switch tube S9, and the negative pole of the second capacitor C2 is connected to the source of the eighth switch tube S8 and the positive pole of the third capacitor C3; the positive pole of the third capacitor C3 is connected to the source of the eighth switch tube S8 and the negative pole of the second capacitor C2, and the negative pole of the third capacitor C3 is connected to the source of the tenth switch tube S 10 and the source of the eleventh switch tube S 11 ; the source of the fourth switch tube S4 is connected to the drain of the fifth switch tube S5 and the source of the seventh switch tube S7; the source of the fifth switch tube S5 is connected to the drain of the sixth switch tube S6 and the drain of the eighth switch tube S8; the source of the ninth switch tube S9 is connected to the drain of the tenth switch tube S 10 and the filter inductor L f .

[0023] Figure 2 The modulation signals of the above-mentioned switched-capacitor common-ground nine-level inverter are given. In the figure, u s is a sine wave, and u1, u2, u3, u4, u5, u6, u7, and u8 are triangular waves. The frequencies of u1 to u8 are greater than the frequency of u s ; the frequencies of u1 to u8 are equal and the phases are the same; the magnitudes of u1 and u8 are 3A c ~4A c, the magnitudes of u2 and u7 are 2A c ~3A c , the magnitudes of u3 and u6 are A c ~2A c , the magnitudes of u4 and u5 are 0~A c , u s has an amplitude less than 4A c .

[0024] Figure 3 is a logic diagram for generating the switching tube drive signal using a sine wave and a triangular wave. As Figure 3 shown, the sine wave and triangular wave signals are logically operated to generate intermediate signals A1 - A8, and A1 - A8 are then used to generate intermediate signals B1 - B6. These intermediate signals are further logically operated to obtain the switching tube drive signals s1 - s11.

[0025] Under the control of the switching tube drive signal generated by the above inverter Figure 3 , the voltage of the first capacitor C1 can be obtained as the voltage of the DC voltage source, the voltage of the second capacitor C2 can be obtained as twice the voltage of the DC voltage source, and the voltage of the third capacitor C3 can be obtained as twice the voltage of the DC voltage source.

[0026] The first capacitor C1, the second capacitor C2, and the third capacitor C3 can all achieve the charging and discharging balance of the capacitor voltage in the power frequency cycle; the amplitude of the output voltage of the inverter is four times the voltage of the DC voltage source.

[0027] Next, the operating state after controlling the switching tube using the Figure 3 generated drive signal will be described.

[0028] Within one output voltage cycle, the inverter has a total of 9 operating states.

[0029] 1) v o = 0: As shown in Figure 4(a), the switching tubes S1, S4, S5, S8, S 10 , S 11 are turned on, and the remaining switching tubes are turned off. The output voltage of the inverter is zero.

[0030] 2) v o = +V in : As shown in Figure 4(b), the switching tubes S2, S3, S4, S7, S9 are turned on, and the remaining switching tubes are turned off. The capacitor C1 is charged in parallel with the DC voltage source to V in . At the same time, the DC voltage source directly supplies power to the load through S3, S4, S7, S9. The output voltage of the inverter is +V in .

[0031] 3) v o = +2V in: As shown in Figure 4(c), switch tubes S1, S4, S6, S7, S8, and S9 are turned on, and the remaining switch tubes are turned off. At this time, capacitor C1 is in series with the DC voltage source and charges capacitor C2 through S1, S4, S7, S8, and S6, and the voltage of capacitor C2 is +2V in ; Capacitor C1 is in series with the DC voltage source and supplies power to the load through S1, S4, S7, and S9, and the output voltage of the inverter is +2V in .

[0032] 4)v o = +3V in : As shown in Figure 4(d), switch tubes S2, S3, S4, S5, S8, and S9 are turned on, and the remaining switch tubes are turned off. Capacitor C1 is charged in parallel with the DC voltage source to V in . At the same time, capacitor C2 is in series with the DC voltage source and supplies power to the load through S3, S4, S5, S8, and S9, and the output voltage of the inverter is +3V in .

[0033] 5)v o = +4V in : As shown in Figure 4(e), switch tubes S1, S4, S5, S8, S9, and S 11 are turned on, and the remaining switch tubes are turned off. Capacitor C1 is in series with the DC voltage source and charges capacitor C3 through S1, S4, S5, S8, and S 11 , and the voltage of capacitor C3 is +2V in ; The DC voltage source is in series with capacitors C1 and C2 and supplies power to the load through S1, S4, S5, S8, and S9, and the output voltage of the inverter is +4V in .

[0034] 6)v o = -V in : As shown in Figure 4(f), switch tubes S2, S3, S4, S5, S8, and S 10 are turned on, and the remaining switch tubes are turned off. Capacitor C1 is charged in parallel with the DC voltage source to V in . At the same time, capacitor C3 is in series with capacitor C1 and directly supplies power to the load through S8, S5, S4, S2, and S 10 , and the output voltage of the inverter is -V in .

[0035] 7)v o = -2V in : As shown in Figure 4(g), switch tubes S1, S4, S6, S7, S8, and S 10 are turned on, and the remaining switch tubes are turned off. Capacitor C1 is in series with the DC voltage source and charges capacitor C2 through S1, S4, S7, S8, and S6, and the voltage of capacitor C2 is +2V in; The capacitor C3 supplies power directly to the load through S8, S6, S 10 and the output voltage of the inverter is -2V in .

[0036] 8) v o = -3V in : As shown in Fig. 4(h), the switching transistors S2, S3, S4, S7, S 10 conduct, and the rest of the switching transistors are turned off. The capacitor C1 is charged in parallel with the DC voltage source to V in . The capacitors C2, C3 and C1 are connected in series and supply power to the load through S7, S4, S2, S 10 and the output voltage of the inverter is -3V in .

[0037] 9) v o = -4V in : As shown in Fig. 4(i), the switching transistors S2, S3, S5, S6, S7, S 10 conduct, and the rest of the switching transistors are turned off; the capacitor C1 is charged in parallel with the DC voltage source to V in . The capacitors C2 and C3 are connected in series and supply power to the load through S7, S5, S6, S 10 and the output voltage of the inverter is -4V in .

[0038] The time-domain simulation analysis of the grounded switched-capacitor nine-level inverter is carried out by using the Simulink simulation software. Among them, the voltage of the DC voltage source is 100V, C1 = 470 μF, C2 = 3300 μF, C3 = 3300 μF, the load is 100 Ω, the switching frequency is 18 kHz, and the effective value of the output voltage is 220V. The simulation results are as shown Figure 5 . It can be seen from the figure that the simulation results are consistent with the theoretical analysis.

[0039] Figure 6 is the leakage current waveform, and the current shows zero, verifying that the grounded characteristic of this topology can eliminate the leakage current.

[0040] Figure 7 is the transient response waveform of the grounded switched-capacitor nine-level inverter under load jump. At the initial moment, the load is 100 Ω; at 0.16 s, the load changes from 100 Ω to 50 Ω; at 0.28 s, the load changes back from 50 Ω to 100 Ω, and the operation of the system is the same as the initial state. It can be seen from the figure that when the load changes, the output voltage remains constant.

[0041] According to the above theoretical analysis and simulation, it can be seen that for the switched-capacitor common-ground nine-level inverter provided by the present invention, the negative pole of the DC power supply is directly connected to the neutral point of the power grid, short-circuiting the parasitic capacitance and completely eliminating the leakage current. It has the advantages of simple structure, high power density, and high system efficiency; high voltage gain, and the output voltage is four times that of the input DC power supply voltage; the capacitor voltage can achieve charge and discharge balance within the power frequency period without an additional control circuit; fewer switching devices, and compared with the existing common-ground nine-level inverter, the number of devices used is significantly reduced, reducing the system cost. Therefore, the common-ground switched-capacitor nine-level inverter provided by the present invention has obvious advantages.

Claims

1. A switched-capacitor common-ground nine-level inverter, characterized in that, DC voltage source V in The positive pole is connected to the drain of switch tube S1 and the source of switch tube S3, and V in The negative pole is grounded and connected to the source of switch tube S2, the source of switch tube S6, and the drain of switch tube S 11 ; The positive pole of capacitor C1 is connected to the drain of S3 and the drain of switch tube S4, and the negative pole of C1 is connected to the source of S1 and the drain of S2; The source of S4 is connected to the drain of switch tube S5 and the source of switch tube S7; The source of S5 is connected to the drain of S6 and the drain of switch tube S8; The positive pole of capacitor C2 is connected to the drain of S7 and the drain of switch tube S9, the negative pole of C2 is connected to the source of S8 and the positive pole of capacitor C3, and the negative pole of C3 is connected to the source of switch tube S 10 and S 11 ; The source of S9 is connected to S 10 's drain and the filtering inductor L f 's one end, the other end of L f is connected to one end of the load, and the other end of the load is grounded.

2. The control method of the switched-capacitor common-ground nine-level inverter according to claim 1, characterized in that, Control the switching transistors S1 - S respectively using the drive signals s1 - s11 11 ; where s1 = (A1) or (B1) or (B3) or (B6), s2 = s3 = not((A1) or (B1) or (B3) or (B6)), s4 = A8, s5 = (A2) or (B4) or (not(A8)), s6 = (B1) or (B6) or (not(A8)), s7 = (B2) or (not(A6)), s8 = (A3) or (B5), s9 = A4, s10 = not(A4), s11 = (A1) or (B3); where B1 = (not(A2)) and (A3), B2 = (not(A2)) and (A4), B3 = (not(A4)) and (A5), B4 = (not(A4)) and (A6), B5 = (not(A4)) and (A7), B6 = (not(A6)) and (A7); The said A1 = (u s > u1), A2 = (u s > u2), A3 = (u s > u3), A4 = (u s > u4), A5 = (u s > u5), A6 = (u s > u6), A7 = (u s > u7), A8 = (u s > u8); The said u s is a sine wave, and u1 to u8 are triangular waves with equal frequencies and the same phase; The frequencies of u1 to u8 are greater than the frequency of u s ; The minimum value of u1 is 3A c , and the maximum value is 4A c ; The minimum value of u2 is 2A c , and the maximum value is 3A c ; The minimum value of u3 is A c , and the maximum value is 2A c ; The minimum value of u4 is 0, and the maximum value is A c ; The maximum value of u5 is 0, and the minimum value is -A c ; The maximum value of u6 is -A c , and the minimum value is -2A c ; The maximum value of u7 is -2A c , and the minimum value is -3A c ; The maximum value of u8 is -3A c , and the minimum value is -4A c ; The peak value of u s is less than 4A c .

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