Silicon carbide junction barrier schottky diode and method of fabrication thereof

Abstract

The application provides a silicon carbide junction barrier Schottky diode and a manufacturing method thereof. The silicon carbide junction barrier Schottky diode comprises an N-type silicon carbide substrate, an N-type silicon carbide drift region, an N-type silicon carbide buffer layer, a P-type well region, a cathode and an anode. The N-type silicon carbide buffer layer is located between the N-type silicon carbide substrate and the N-type silicon carbide drift region. The N-type ion doping concentration of the N-type silicon carbide buffer layer is greater than the N-type ion doping concentration of the N-type silicon carbide drift region and less than the N-type ion doping concentration of the N-type silicon carbide substrate. The P-type well region is located in the N-type silicon carbide drift region. The cathode is located below the N-type silicon carbide substrate, and the cathode and the N-type silicon carbide substrate are in ohmic contact. The anode is located above the P-type well region and the N-type silicon carbide drift region. The anode and the P-type well region are in ohmic contact, and a Schottky barrier is formed between the anode and the N-type silicon carbide drift region. According to the embodiment of the application, the forward conduction voltage drop of the diode device can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor devices, and particularly relates to a silicon carbide junction barrier Schottky diode and a manufacturing method thereof. BACKGROUND

[0002] A Schottky barrier diode (SBD) is not made by using the principle of PN junction formed by P-type semiconductor and N-type semiconductor, but is made by using the principle of metal-semiconductor junction formed by metal and semiconductor, is a kind of hot carrier diode, and has the advantages of low forward voltage drop and short reverse recovery time. Silicon carbide (SiC) has the characteristics of large band gap, high breakdown field, high saturation electron drift rate, high thermal conductivity and stable chemical properties. A silicon carbide Schottky barrier diode (SiC SBD) combines the advantages of SiC and SBD, has the characteristics of high off-state voltage, fast response speed and low switching loss, and becomes the best SiC power device in terms of technology maturity, and is widely recognized by application. However, due to the surface defects of silicon carbide material and the metal penetration of Schottky contact, the existing SiC SBD has too large reverse leakage current, reaching the order of magnitude of tens of microamperes.

[0003] A silicon carbide junction barrier Schottky diode (SiC JBS) uses the space charge region of PN junction to protect the Schottky junction, so as to reduce the Schottky contact leakage current of SiC surface, but the forward conduction voltage drop of the device is high, which leads to large power loss. SUMMARY

[0004] The purpose of the present application is to provide a silicon carbide junction barrier Schottky diode and a manufacturing method thereof, which at least reduces the forward conduction voltage drop of the device.

[0005] To achieve the above-mentioned purpose, the first aspect of the present application provides a silicon carbide junction barrier Schottky diode, comprising:

[0006] An N-type silicon carbide substrate;

[0007] An N-type silicon carbide drift region located above the N-type silicon carbide substrate;

[0008] An N-type silicon carbide buffer layer located between the N-type silicon carbide substrate and the N-type silicon carbide drift region, wherein the N-type ion doping concentration of the N-type silicon carbide buffer layer is greater than the N-type ion doping concentration of the N-type silicon carbide drift region and less than the N-type ion doping concentration of the N-type silicon carbide substrate;

[0009] A P-type well region located in the N-type silicon carbide drift region;

[0010] a cathode located below the N-type silicon carbide substrate; the cathode and the N-type silicon carbide substrate are in ohmic contact;

[0011] an anode located above the P-type well region and the N-type silicon carbide drift region; the anode and the P-type well region are in ohmic contact, and the anode and the N-type silicon carbide drift region form a Schottky barrier.

[0012] Optionally, the silicon carbide junction barrier Schottky diode further comprises an N-type well region located within the N-type silicon carbide drift region and adjacent to the P-type well region.

[0013] Optionally, the N-type ion doping concentration of the N-type well region matches the P-type ion doping concentration of the P-type well region, so as to reduce the surface electric field intensity value of the N-type well region when the silicon carbide junction barrier Schottky diode is reversely connected.

[0014] Optionally, in the direction from the surface to the interior, the N-type well region comprises a first N-type well region, a second N-type well region and a third N-type well region in sequence, and the P-type well region comprises a first P-type well region, a second P-type well region and a third P-type well region in sequence; the first N-type well region is adjacent to the first P-type well region, the second N-type well region is adjacent to the second P-type well region, and the third N-type well region is adjacent to the third P-type well region; the matching of the N-type ion doping concentration of the N-type well region and the P-type ion doping concentration of the P-type well region comprises that the N-type ion doping concentration of the second N-type well region is greater than the N-type ion doping concentration of the first N-type well region and the third N-type well region respectively, the P-type ion doping concentration of the second P-type well region is greater than the P-type ion doping concentration of the first P-type well region and the third P-type well region respectively, or the N-type ion doping concentration of the first N-type well region is less than the N-type ion doping concentration of the second N-type well region and the third N-type well region respectively, and the P-type ion doping concentration of the first P-type well region is less than the P-type ion doping concentration of the second P-type well region and the third P-type well region respectively.

[0015] Optionally, the P-type well region and the N-type well region each have a plurality of, and the N-type well region is located between adjacent P-type well regions.

[0016] The second aspect of the present application provides a manufacturing method of a silicon carbide junction barrier Schottky diode, comprising:

[0017] providing an N-type silicon carbide substrate, epitaxially growing an N-type silicon carbide buffer layer and an N-type silicon carbide drift region on the N-type silicon carbide substrate in sequence, the N-type ion doping concentration of the N-type silicon carbide buffer layer being greater than the N-type ion doping concentration of the N-type silicon carbide drift region and less than the N-type ion doping concentration of the N-type silicon carbide substrate;

[0018] forming a P-type well region in the N-type silicon carbide drift region by ion implantation;

[0019] forming a cathode below the N-type silicon carbide substrate, the cathode having an ohmic contact with the N-type silicon carbide substrate; forming an anode above the P-type well region and the N-type silicon carbide drift region, the anode having an ohmic contact with the P-type well region and forming a Schottky barrier between the anode and the N-type silicon carbide drift region.

[0020] Optionally, the method for manufacturing the silicon carbide junction barrier Schottky diode further comprises: forming an N-type well region in the N-type silicon carbide drift region by ion implantation, the N-type well region being adjacent to the P-type well region.

[0021] Optionally, the N-type ion doping concentration of the formed N-type well region matches the P-type ion doping concentration of the formed P-type well region, so as to reduce the surface electric field intensity value of the N-type well region when the silicon carbide junction barrier Schottky diode is reversely connected.

[0022] Optionally, in the direction from the surface to the inside, the formed N-type well region comprises a first N-type well region, a second N-type well region and a third N-type well region in sequence, and the formed P-type well region comprises a first P-type well region, a second P-type well region and a third P-type well region in sequence; the first N-type well region is adjacent to the first P-type well region, the second N-type well region is adjacent to the second P-type well region, and the third N-type well region is adjacent to the third P-type well region; the matching of the N-type ion doping concentration of the N-type well region and the P-type ion doping concentration of the P-type well region comprises: the N-type ion doping concentration of the second N-type well region is greater than the N-type ion doping concentration of the first N-type well region and the third N-type well region respectively, the P-type ion doping concentration of the second P-type well region is greater than the P-type ion doping concentration of the first P-type well region and the third P-type well region respectively, or the N-type ion doping concentration of the first N-type well region is less than the N-type ion doping concentration of the second N-type well region and the third N-type well region respectively, and the P-type ion doping concentration of the first P-type well region is less than the P-type ion doping concentration of the second P-type well region and the third P-type well region respectively.

[0023] Optionally, the formed P-type well region and the formed N-type well region each have a plurality of, and the N-type well region is located between adjacent P-type well regions.

[0024] Compared with the prior art, the beneficial technical effect of the present application is that the N-type carbonized silicon buffer layer is arranged between the N-type carbonized silicon substrate and the N-type carbonized silicon drift region, the N-type ion doping concentration of the N-type carbonized silicon buffer layer is greater than the N-type ion doping concentration of the N-type carbonized silicon drift region and less than the N-type ion doping concentration of the N-type carbonized silicon substrate, so that the N-type ion doping concentration of the N-type carbonized silicon drift region can be increased under the condition of bearing the same reverse withstand voltage, thereby reducing the forward conduction voltage drop of the N-type carbonized silicon drift region, and since the thickness of the N-type carbonized silicon drift region is much greater than the thickness of the N-type carbonized silicon buffer layer, the forward conduction voltage drop of the diode device can be reduced as a whole. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode of the first embodiment of the present application;

[0026] Figure 2 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode of a comparative example;

[0027] Figure 3 is Figure 1 a flowchart of a manufacturing method of the silicon carbide junction barrier Schottky diode in

[0028] Figure 4 is Figure 3 the intermediate structure schematic diagram corresponding to the flow in

[0029] Figure 5 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode of the second embodiment of the present application;

[0030] Figure 6 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode of the third embodiment of the present application;

[0031] Figure 7 is Figure 6 and Figure 2 the corresponding relationship curve diagram of the depth of the N-type carbonized silicon drift region and the electric field intensity value when the silicon carbide junction barrier Schottky diode in

[0032] Figure 8 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode of the fourth embodiment of the present application.

[0033] For the convenience of understanding the present application, all the reference signs appearing in the present application are listed as follows:

[0034] Silicon carbide junction barrier Schottky diode 1, 2, 3, 4, 5 N-type carbonized silicon substrate 10

[0035] N-type carbonized silicon drift region 11 N-type carbonized silicon buffer layer 12

[0036] P-type well region 13, 13' Cathode 14

[0037] Anode 15 N-type well region 16, 16'

[0038] First N-type well region 161 Second N-type well region 162

[0039] Third N-type well region 163 First P-type well region 131

[0040] Second P-type well region 132 Third P-type well region 133 DETAILED DESCRIPTION

[0041] In order to make the above objectives, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0042] Figure 1 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode according to a first embodiment of the present application.

[0043] Referring to Figure 1 , the silicon carbide junction barrier Schottky diode 1 comprises:

[0044] an N-type silicon carbide substrate 10;

[0045] an N-type silicon carbide drift region 11 located above the N-type silicon carbide substrate 10;

[0046] an N-type silicon carbide buffer layer 12 located between the N-type silicon carbide substrate 10 and the N-type silicon carbide drift region 11, the N-type ion doping concentration of the N-type silicon carbide buffer layer 12 being greater than the N-type ion doping concentration of the N-type silicon carbide drift region 11 and less than the N-type ion doping concentration of the N-type silicon carbide substrate 10;

[0047] a P-type well region 13 located within the N-type silicon carbide drift region 11;

[0048] a cathode 14 located below the N-type silicon carbide substrate 10; the cathode 14 and the N-type silicon carbide substrate 10 are in ohmic contact;

[0049] an anode 15 located above the P-type well region 13 and the N-type silicon carbide drift region 11; the anode 15 and the P-type well region 13 are in ohmic contact, and the anode 15 and the N-type silicon carbide drift region 11 form a Schottky barrier.

[0050] The N-type doping ions in the N-type silicon carbide substrate 10, the N-type silicon carbide drift region 11 and the N-type silicon carbide buffer layer 12 can be Group V elements, such as nitrogen.

[0051] Figure 2This is a schematic diagram of the cross-sectional structure of a silicon carbide junction barrier Schottky diode as a comparative example.

[0052] Reference Figure 2 As shown, when the silicon carbide junction barrier Schottky diode 2 is forward-biased, the forward voltage drop includes: the voltage drop of the Schottky barrier formed between the anode 15 and the N-type silicon carbide drift region 11, the voltage drop of the junction field-effect region (located in the region of the N-type silicon carbide drift region 11 near the anode 15), the voltage drop of the N-type silicon carbide drift region 11, and the voltage drop of the N-type silicon carbide substrate 10.

[0053] In this embodiment, refer to Figure 1 As shown, an N-type silicon carbide buffer layer 12 is disposed between the N-type silicon carbide substrate 10 and the N-type silicon carbide drift region 11. The N-type ion doping concentration of the N-type silicon carbide buffer layer 12 is greater than that of the N-type silicon carbide drift region 11, but less than that of the N-type silicon carbide substrate 10. The N-type ion doping concentration of the N-type silicon carbide buffer layer 12 can be 3 to 5 times that of the N-type silicon carbide drift region 11.

[0054] It should be noted that the numerical range in this embodiment includes endpoint values.

[0055] The N-type silicon carbide buffer layer 12 can serve as a field cutoff region, reducing the widening of the inefficient depletion layer. This allows the silicon carbide junction barrier Schottky diodes 1 and 2 to increase the N-type ion doping concentration of the N-type silicon carbide drift region 11 while maintaining the same reverse withstand voltage. Consequently, the forward voltage drop of the N-type silicon carbide drift region 11 is reduced. Since the thickness of the N-type silicon carbide drift region 11 is much greater than the thickness of the N-type silicon carbide buffer layer 12, the forward voltage drop of the silicon carbide junction barrier Schottky diode 1 can be reduced overall.

[0056] The first embodiment of the present invention also provides Figure 1 The fabrication method of silicon carbide junction barrier Schottky diode 1. Figure 3 It is a flowchart of the production method. Figure 4 yes Figure 3 The diagram shows the intermediate structure corresponding to the process flow.

[0057] First, refer to Figure 3 Step S1 and Figure 4 As shown, an N-type silicon carbide substrate 10 is provided, and an N-type silicon carbide buffer layer 12 and an N-type silicon carbide drift region 11 are epitaxially grown sequentially on the N-type silicon carbide substrate 10. The N-type ion doping concentration of the N-type silicon carbide buffer layer 12 is greater than the N-type ion doping concentration of the N-type silicon carbide drift region 11, but less than the N-type ion doping concentration of the N-type silicon carbide substrate 10.

[0058] The method for epitaxial growth of the N-type silicon carbide buffer layer 12 and the N-type silicon carbide drift region 11 can include an atomic layer deposition (ALD), or a chemical vapor deposition (CVD), or a molecular beam epitaxy (MBE), or a plasma enhanced chemical vapor deposition (PECVD), or a low pressure chemical vapor deposition (LPCVD), or a metal-organic chemical vapor deposition (MOCVD), or a combination thereof. The N-type ions can be in-situ doped or doped by ion implantation after the epitaxial growth of the silicon carbide layer.

[0059] The N-type ion doping concentration of the N-type silicon carbide buffer layer 12 can be 3-5 times of the N-type ion doping concentration of the N-type silicon carbide drift region 11.

[0060] Next, referring to step S2 in Figure 3 and step S3 in Figure 1 , the P-type well region 13 is formed in the N-type silicon carbide drift region 11 by ion implantation.

[0061] The P-type doping ions in the P-type well region 13 can be a group III element, such as aluminum.

[0062] Before the P-type ion implantation, a first patterned mask layer can be formed on the N-type silicon carbide drift region 11, and the material of the first patterned mask layer can be photoresist, silicon dioxide, or a stack structure of silicon dioxide and polysilicon. The first patterned mask layer has an opening that exposes the region of the P-type well region 13 to be formed.

[0063] After the P-type ion implantation, the first patterned mask layer can be removed.

[0064] Next, referring to step S3 in Figure 3 and step S4 in Figure 1 , the cathode 14 is formed below the N-type silicon carbide substrate 10, and the cathode 14 has an ohmic contact with the N-type silicon carbide substrate 10; the anode 15 is formed above the P-type well region 13 and the N-type silicon carbide drift region 11, and the anode 15 has an ohmic contact with the P-type well region 13 and forms a Schottky barrier with the N-type silicon carbide drift region 11.

[0065] The material of the cathode 14 and the anode 15 can be titanium tungsten aluminum alloy or titanium nickel silver alloy, and can be formed by sputtering or evaporation.

[0066] Figure 5 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode according to a second embodiment of the present application. Referring to Figure 5 The silicon carbide junction barrier Schottky diode 3 in the present embodiment is different from the silicon carbide junction barrier Schottky diode 1 in the first embodiment only in that it further comprises: an N-type well region 16 located in the N-type silicon carbide drift region 11 and adjacent to the P-type well region 13.

[0067] The N-type well region 16 increases the N-type ion doping concentration of the junction field effect region, and thus can further reduce the forward conduction voltage drop of the silicon carbide junction barrier Schottky diode 3 compared with the silicon carbide junction barrier Schottky diode 1. In addition, the N-type well region 16 can also increase the minority carrier injection concentration of the P-type well region 13 into the N-type silicon carbide drift region 11 during the forward surge of the silicon carbide junction barrier Schottky diode 3, thereby improving the forward surge capability of the silicon carbide junction barrier Schottky diode 3.

[0068] Except for the above difference, the other structures of the silicon carbide junction barrier Schottky diode 3 in the second embodiment can refer to the corresponding structures of the silicon carbide junction barrier Schottky diode 1 in the first embodiment.

[0069] As for the manufacturing method, the difference between the manufacturing method of the silicon carbide junction barrier Schottky diode 3 in the present embodiment and the manufacturing method of the silicon carbide junction barrier Schottky diode 1 in the first embodiment is only that step S2 further comprises: forming the N-type well region 16 in the N-type silicon carbide drift region 11 by ion implantation, and the N-type well region 16 is adjacent to the P-type well region 13.

[0070] Before the N-type ion implantation, a second patterned mask layer can be formed on the N-type silicon carbide drift region 11, and the material of the second patterned mask layer can be photoresist or silicon dioxide, or a stacked structure of silicon dioxide and polysilicon. The second patterned mask layer has an opening, and the opening exposes the region of the N-type well region 16 to be formed.

[0071] After the N-type ion implantation, the second patterned mask layer can be removed.

[0072] Except for the above difference, the other steps of the silicon carbide junction barrier Schottky diode 3 in the second embodiment can refer to the corresponding steps of the silicon carbide junction barrier Schottky diode 1 in the first embodiment.

[0073] Figure 6 is a cross-sectional structure schematic diagram of a silicon carbide junction barrier Schottky diode according to a third embodiment of the present application. Referring to Figure 6As shown, the difference between the silicon carbide junction barrier Schottky diode 4 in the present embodiment and the silicon carbide junction barrier Schottky diode 3 in Embodiment Two is that the N-type ion doping concentration of the N-type well region 16' matches the P-type ion doping concentration of the P-type well region 13' to reduce the surface electric field intensity value of the N-type well region 16' when the silicon carbide junction barrier Schottky diode 4 is reversed.

[0074] The surface electric field intensity value of the N-type well region 16' when the silicon carbide junction barrier Schottky diode 4 is reversed is the electric field intensity value of the contact surface between the anode 15 and the N-type well region 16'.

[0075] In addition, the N-type ion doping concentration of the N-type well region 16' matches the P-type ion doping concentration of the P-type well region 13', and in the case of increasing the N-type ion doping concentration of the junction field effect region, the reverse voltage value of the silicon carbide junction barrier Schottky diode 4 can still be ensured to be the same as the reverse voltage value of the silicon carbide junction barrier Schottky diode 2.

[0076] To verify the above conclusion, the inventors conducted a control experiment, Figure 7 is a corresponding relationship curve diagram of the depth of the N-type silicon carbide drift region and the electric field intensity value when the silicon carbide junction barrier Schottky diode is reversed. Among them, the solid line corresponds to the silicon carbide junction barrier Schottky diode of the present embodiment, and the reference surface of the depth of the N-type silicon carbide drift region is the contact surface between the anode and the N-type well region; the dashed line corresponds to Figure 2 the silicon carbide junction barrier Schottky diode of the control example, and the reference surface of the depth of the N-type silicon carbide drift region is the contact surface between the anode and the junction field effect region. Refer to Figure 7 As shown, it can be seen that 1) on the reference surface, the surface electric field intensity value of the N-type well region 16' when the silicon carbide junction barrier Schottky diode 4 is reversed is less than the surface electric field intensity value of the junction field effect region when the silicon carbide junction barrier Schottky diode 2 is reversed; 2) the area enclosed by the above curve and the horizontal and vertical coordinates represents the reverse voltage value of the silicon carbide junction barrier Schottky diode, and since the areas of the enclosed regions corresponding to the solid line curve and the dashed line curve are the same, the reverse voltage value of the silicon carbide junction barrier Schottky diode 4 is the same as the reverse voltage value of the silicon carbide junction barrier Schottky diode 2.

[0077] In other words, the silicon carbide junction barrier Schottky diode 4 optimizes the reverse electric field.

[0078] In the embodiment, in the surface-to-interior direction, the N-type well region 16' includes the first N-type well region 161, the second N-type well region 162 and the third N-type well region 163 in sequence, and the P-type well region 13' includes the first P-type well region 131, the second P-type well region 132 and the third P-type well region 133 in sequence; the first N-type well region 161 is adjacent to the first P-type well region 131, the second N-type well region 162 is adjacent to the second P-type well region 132, and the third N-type well region 163 is adjacent to the third P-type well region 133; the matching of the N-type ion doping concentration of the N-type well region 16' and the P-type ion doping concentration of the P-type well region 13' includes that the N-type ion doping concentration of the second N-type well region 162 is greater than the N-type ion doping concentration of the first N-type well region 161 and the third N-type well region 163 respectively, and the P-type ion doping concentration of the second P-type well region 132 is greater than the P-type ion doping concentration of the first P-type well region 131 and the third P-type well region 133 respectively.

[0079] In other embodiments, the matching of the N-type ion doping concentration of the N-type well region 16' and the P-type ion doping concentration of the P-type well region 13' can include that the N-type ion doping concentration of the first N-type well region 161 is less than the N-type ion doping concentration of the second N-type well region 162 and the third N-type well region 163 respectively, and the P-type ion doping concentration of the first P-type well region 131 is less than the P-type ion doping concentration of the second P-type well region 132 and the third P-type well region 133 respectively.

[0080] Research shows that the above-mentioned doping concentration distribution can optimize the reverse electric field distribution of the silicon carbide junction barrier Schottky diode 4, reduce the surface electric field value of the N-type well region 16', reduce the influence of the mirror force on the Schottky barrier, and thus effectively reduce the reverse leakage current of the silicon carbide junction barrier Schottky diode 4.

[0081] In addition to the above differences, the other structures of the silicon carbide junction barrier Schottky diode 4 of the third embodiment can refer to the corresponding structures of the silicon carbide junction barrier Schottky diode 1 of the first embodiment.

[0082] As for the manufacturing method, the difference between the manufacturing method of the silicon carbide junction barrier Schottky diode 4 in the embodiment and the manufacturing method of the silicon carbide junction barrier Schottky diode 3 in the second embodiment is only that in step S2, the N-type well region 16 and the P-type well region 13 can be formed by multiple ion implantations respectively, and the depth and concentration of each ion implantation can be controlled respectively.

[0083] In addition to the above differences, the other steps of the silicon carbide junction barrier Schottky diode 4 of the third embodiment can refer to the corresponding steps of the silicon carbide junction barrier Schottky diode 1 of the first embodiment.

[0084] Figure 8 is a schematic diagram of the cross-sectional structure of the silicon carbide junction barrier Schottky diode of the fourth embodiment of the present application. Referring toFigure 8 As shown, the difference between the silicon carbide junction barrier Schottky diode 5 in this embodiment and the silicon carbide junction barrier Schottky diodes 1, 3, 4 in the embodiments one, two and three is that the P-type well region 13 and the N-type well region 16 respectively have multiple, and the N-type well region 16 and the P-type well region 13 are alternately distributed.

[0085] One N-type well region 16 and one P-type well region 13 form a cell, and each cell is connected in parallel.

[0086] In addition to the above difference, the other structures of the silicon carbide junction barrier Schottky diode 5 in this embodiment four can refer to the corresponding structures of the silicon carbide junction barrier Schottky diodes 1, 3, 4 in the embodiments one, two and three.

[0087] As for the manufacturing method, the difference between the manufacturing method of the silicon carbide junction barrier Schottky diode 5 in this embodiment and the manufacturing method of the silicon carbide junction barrier Schottky diodes 1, 3, 4 in the embodiments one, two and three is that in step S2, the P-type well region 13 and the N-type well region 16 respectively have multiple, and the N-type well region 16 and the P-type well region 13 are alternately distributed.

[0088] In addition to the above difference, the other steps of the silicon carbide junction barrier Schottky diode 5 in this embodiment four can refer to the corresponding steps of the silicon carbide junction barrier Schottky diodes 1, 3, 4 in the embodiments one, two and three.

[0089] Although the present application is disclosed as above, the present application is not limited to this. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, therefore the protection scope of the present application should be limited by the scope defined by the claims.

Claims

1. A silicon carbide junction barrier Schottky diode, characterized by, Comprising: An N-type silicon carbide substrate; An N-type silicon carbide drift region above the N-type silicon carbide substrate; An N-type silicon carbide buffer layer between the N-type silicon carbide substrate and the N-type silicon carbide drift region, the N-type silicon carbide buffer layer having an N-type ion doping concentration greater than that of the N-type silicon carbide drift region and less than that of the N-type silicon carbide substrate; A P-type well region within the N-type silicon carbide drift region; A cathode below the N-type silicon carbide substrate, the cathode and the N-type silicon carbide substrate having an ohmic contact therebetween; An anode above the P-type well region and the N-type silicon carbide drift region, the anode and the P-type well region having an ohmic contact therebetween and the anode and the N-type silicon carbide drift region forming a Schottky barrier therebetween; Further comprising: an N-type well region within the N-type silicon carbide drift region and adjacent to the P-type well region; In a surface-to-internal direction, the N-type well region comprises a first N-type well region, a second N-type well region and a third N-type well region in sequence, and the P-type well region comprises a first P-type well region, a second P-type well region and a third P-type well region in sequence; the first N-type well region is adjacent to the first P-type well region, the second N-type well region is adjacent to the second P-type well region, and the third N-type well region is adjacent to the third P-type well region; the second N-type well region has an N-type ion doping concentration greater than that of the first N-type well region and the third N-type well region respectively, the second P-type well region has a P-type ion doping concentration greater than that of the first P-type well region and the third P-type well region respectively, or the first N-type well region has an N-type ion doping concentration less than that of the second N-type well region and the third N-type well region respectively, and the first P-type well region has a P-type ion doping concentration less than that of the second P-type well region and the third P-type well region respectively. The N-type ion doping concentration of the N-type well region and the P-type ion doping concentration of the P-type well region are matched to reduce the surface electric field intensity value of the N-type well region when the silicon carbide junction barrier Schottky diode is reversed.

2. The silicon carbide junction barrier Schottky diode of claim 1, wherein the first and second epitaxial layers are doped with a first conductivity type and the drift layer is doped with a second conductivity type opposite the first conductivity type. The P-type well region and the N-type well region each have a plurality of regions, and the N-type well regions and the P-type well regions are alternately distributed.

3. The silicon carbide junction barrier Schottky diode of claim 1, wherein the first and second epitaxial layers are doped with a first conductivity type and the drift layer is doped with a second conductivity type opposite the first conductivity type. Comprising:

4. A method for fabricating a silicon carbide junction barrier Schottky diode, the method comprising: Providing an N-type silicon carbide substrate, epitaxially growing an N-type silicon carbide buffer layer and an N-type silicon carbide drift region on the N-type silicon carbide substrate in sequence, the N-type silicon carbide buffer layer having an N-type ion doping concentration greater than that of the N-type silicon carbide drift region and less than that of the N-type silicon carbide substrate; Forming a P-type well region within the N-type silicon carbide drift region by ion implantation; Forming a cathode below the N-type silicon carbide substrate, the cathode and the N-type silicon carbide substrate having an ohmic contact therebetween; Forming an anode above the P-type well region and the N-type silicon carbide drift region, the anode and the P-type well region having an ohmic contact therebetween and the anode and the N-type silicon carbide drift region forming a Schottky barrier therebetween; ​ Further comprising: forming an N-type well region in the N-type silicon carbide drift region by ion implantation, the N-type well region being adjacent to the P-type well region; In a surface-to-internal direction, the formed N-type well region comprises a first N-type well region, a second N-type well region and a third N-type well region in sequence, and the formed P-type well region comprises a first P-type well region, a second P-type well region and a third P-type well region in sequence; the first N-type well region is adjacent to the first P-type well region, the second N-type well region is adjacent to the second P-type well region, and the third N-type well region is adjacent to the third P-type well region; the N-type ion doping concentration of the second N-type well region is greater than the N-type ion doping concentration of the first N-type well region and the third N-type well region respectively, the P-type ion doping concentration of the second P-type well region is greater than the P-type ion doping concentration of the first P-type well region and the third P-type well region respectively, or the N-type ion doping concentration of the first N-type well region is less than the N-type ion doping concentration of the second N-type well region and the third N-type well region respectively, and the P-type ion doping concentration of the first P-type well region is less than the P-type ion doping concentration of the second P-type well region and the third P-type well region respectively.

5. The method of producing a silicon carbide junction barrier Schottky diode according to Claim 4, wherein The N-type ion doping concentration of the formed N-type well region matches the P-type ion doping concentration of the formed P-type well region, so as to reduce the surface electric field intensity value of the N-type well region when the silicon carbide junction barrier Schottky diode is reversed.

6. The method of producing a silicon carbide junction barrier Schottky diode according to claim 4, wherein The formed P-type well region and the formed N-type well region each have a plurality of regions, and the N-type well regions and the P-type well regions are alternately distributed.

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