A snapshot-based multi-clock domain switching method

Through the combination of snapshot replication and proportional integral controller, the problem of inaccurate time synchronization caused by clock domain loss in TSN network is solved, and fast and high-precision time switching is achieved to ensure system stability and accuracy.

CN115720134BActive Publication Date: 2025-07-15MOTORCOMM (SHANGHAI) ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202211312622.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-25
Publication Date
2025-07-15
Estimated Expiration
2042-10-25

AI Technical Summary

Technical Problem

In TSN network, when the time synchronization packets in one clock domain are lost, the prior art cannot switch to another clock domain quickly and with high accuracy, resulting in inaccurate time synchronization accuracy and slow processing flow of the upper-layer control system.

Method used

The snapshot method is used to copy the current time of the lost clock domain to the time calculation module of the unlost clock domain, and the proportional integration controller is maintained stable, and the output time is calculated in combination with the normally received time synchronization packets to achieve high-precision switching.

Benefits of technology

In the case of clock domain loss, it can quickly and with high accuracy to switch to another clock domain, maintaining high accuracy of time synchronization, and not relying on the immediate response of the upper control system to ensure stable operation of the system.

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Abstract

The present invention discloses a multi-clock domain switching method based on snapshot, which comprises the following steps: making time synchronization messages into at least two virtual channels, with each virtual channel representing a clock domain; when the time synchronization message of a certain clock domain is lost, copying the current time of the clock domain where the time synchronization message is lost to the clock domain where the time synchronization message is not lost in a snapshot manner; and switching control signals to select the time output of the clock domain where the time synchronization message is not lost. The present invention can quickly and accurately switch the time calculation module when the time synchronization message of a certain clock domain is lost, and still maintain high-precision time synchronization in the second clock domain.
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Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a multi-clock domain switching method based on snapshot. Background Art

[0002] The TSN network may be used in autonomous driving or industrial networks. When the time synchronization accuracy is not high, there may be a time difference in the processing of emergencies by two parties. For example, when an autonomous vehicle detects bad road conditions ahead and the deceleration system responds slowly, the danger will be great. In the TSN network, time synchronization is achieved through packets with time information. When the time synchronization packet in one clock domain cannot continue to maintain clock synchronization due to some reason, it may be that the device cannot normally send time synchronization packets or discards such packets due to some event, and a more secure mechanism is needed to ensure high-precision time synchronization.

[0003] Assume that the first time calculation module and the second time calculation module represent the times of two clock domains respectively. In the prior art, if such an event occurs, the upper control system can quickly obtain the problem event, but it needs to check the process and then make a deal, and this process will be relatively slow; if the first time calculation module does not receive the time synchronization packet within the specified time, and directly switches to the second time calculation module, the time accuracy will be inaccurate; therefore, if such an event occurs, it is necessary to have the ability to handle temporarily to give the control system time to respond to this event. Summary of the Invention

[0004] In view of the deficiencies of the prior art, the present invention provides a multi-clock domain switching method based on snapshot, and the method has a simple process and high time accuracy.

[0005] The present invention is realized through the following technical solutions:

[0006] A multi-clock domain switching method based on snapshot includes the following steps:

[0007] Make at least two virtual channels for the time synchronization packets, and each virtual channel represents a clock domain;

[0008] When the time synchronization packet of a certain clock domain is lost, copy the current time of the clock domain where the time synchronization packet is lost to the clock domain where the time synchronization packet is not lost in a snapshot manner;

[0009] Switch the control signal to select the time output of the clock domain where the time synchronization packet is not lost.

[0010] Further, a time calculation module is provided within the clock domain, and the time calculation module is used to receive the time synchronization packet and calculate the final output time in combination with the current time.

[0011] Further, the time calculation module is a proportional-integral controller, and the proportional-integral controller can keep the clock domain stable in the long term.

[0012] Further, the step: when the time synchronization message of a certain clock domain is lost, copy the current time of the clock domain where the time synchronization message is lost to the clock domain where the time synchronization message is not lost in a snapshot manner, which specifically includes the following steps:

[0013] When the time calculation module in a certain clock domain does not receive the time synchronization message, the time calculation module prompts that a fault occurs in this clock domain;

[0014] Copy the final time in the time calculation module before the fault occurs to the time calculation module in the clock domain that can normally receive the time synchronization message;

[0015] After the copying is completed, the time calculation module that can normally receive the time synchronization message still maintains the original step, and combines the time synchronization message and the copied time to calculate the output time.

[0016] Further, the step is the time increased in each clock cycle.

[0017] Further, the final time includes 48-bit second time, 32-bit nanosecond time, and 26-bit fractional nanosecond time.

[0018] Further, the step: control signal switching, select the time output of the clock domain where the time synchronization message is not lost, specifically includes:

[0019] Control signal switching, select the output time of the time calculation module that normally receives the time synchronization message.

[0020] Compared with the prior art, the advantages of the present invention are as follows:

[0021] 1. When the time synchronization message of a certain clock domain is lost, the time calculation module can be quickly and accurately switched. After switching to the second time calculation module, use the step of the second clock domain as time accumulation, and still maintain high-precision time synchronization in the second clock domain, without the need for the upper control system to immediately respond to handle the problem of the first clock domain losing the message.

[0022] 2. Quickly switch the time to another clock domain in a snapshot manner to ensure that the time is still highly accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a flowchart of a multi-clock domain switching method based on snapshot according to an embodiment of the present invention;

[0024] Figure 2 It is a flowchart of an embodiment of the present invention. Detailed implementation manners

[0025] The technical solution of the invention will be further described in detail below in conjunction with the preferred embodiments and their accompanying drawings in a non-limiting manner. In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined. The embodiments described below by referring to the drawings are exemplary and are intended to explain the present invention and should not be construed as a limitation to the present invention.

[0026] As Figure 1 shown, a snapshot-based multi-clock domain switching method according to an embodiment of the present invention is characterized by including the following steps:

[0027] S1: Make the time synchronization message into at least two virtual channels, and each virtual channel represents a clock domain.

[0028] Wherein, a time calculation module is provided in the clock domain, and the time calculation module is used to receive the time synchronization message and calculate the final output time in combination with the current time. The time calculation module is a proportional-integral controller. The multi-clock domain will cause a time delay, that is, there will be a small deviation between each time calculation module. Through the proportional-integral controller, each time calculation module can be kept stable in the long term. By adjusting the proportional coefficient and the integral coefficient, the pi increment is calculated, and then the final time value is output.

[0029] In this embodiment, it is assumed that the time synchronization message is made into two virtual channels, and each virtual channel represents a clock domain, namely the first clock domain and the second clock domain.

[0030] S2: When the time synchronization message of a certain clock domain is lost, copy the current time of the clock domain where the time synchronization message is lost to the clock domain where the time synchronization message is not lost in a snapshot manner.

[0031] S20: When the time calculation module in a certain clock domain does not receive the time synchronization message, the time calculation module prompts that a fault has occurred in this clock domain;

[0032] In this embodiment, there is a first time calculation module in the first clock domain and a second time calculation module in the second clock domain. Assume that the first time calculation module has a fault, and the fault comes from the outside. For example, the first time calculation module does not receive the time synchronization message within the specified time. The first time calculation module prompts that a fault has occurred in the first clock domain.

[0033] S21: Copy the final time in the time calculation module before the fault occurs to the time calculation module in the clock domain that can normally receive the time synchronization message.

[0034] In this embodiment, before the fault occurs, the final time of the first time calculation module among them is copied to the second time calculation module. The final time includes 8-bit second time, 32-bit nanosecond time, and 26-bit fractional nanosecond time. Snapshot only copies the time over and does not copy the step of the first time calculation module to the step of the second time calculation module, because the step of each time calculation module is calculated based on the current clock domain. In this way, high-precision time can still be maintained during subsequent synchronization. Here, the step refers to the time increased in each clock cycle.

[0035] After the copying is completed, the time calculation module that can normally receive the time synchronization message still maintains its original step, and combines the time synchronization message and the copied time to calculate the output time.

[0036] The step time of the second time calculation module continues to remain unchanged. In the normal working mode, the clocks of the two clock domains are accurate. Due to the nature of the network, there will be a time error in the forwarding process of the synchronization messages of the two clock domains. Over time, the step times of the two clock domains will be quite different. Therefore, the times output by the two time calculation modules are the same, but the time increased in each clock cycle is different. Since the step of the second time calculation module is calculated based on the second time calculation module, it is more accurate than the step of the first time calculation module.

[0037] S3: The control signal is switched to select the time output of the clock domain that has not lost the time synchronization message.

[0038] Specifically, when the control signal is switched, the output time of the time calculation module that normally receives the time synchronization message is selected through a data selector. For the time calculation modules of the two clock domains, it is equivalent to that when a control signal is 0, the first time calculation module is selected, and after a fault occurs, the control signal becomes 1 and the second time calculation module starts to be selected.

[0039] For a better understanding of the present invention, the present invention will be further described in conjunction with the following embodiments.

[0040] Taking a switch as an example, the clock is 125M and the clock period is 8ns.

[0041] At 12:30:40.100500 seconds on September 24, 2022, within one hour, the first time calculation module continuously maintains receiving 8 time synchronization messages per second. When one hour ends, from 12:30:40.100500 seconds on September 24, 2022 to 13:30:41.100500 seconds on September 24, 2022, within 1 second, the first time calculation module does not receive any time synchronization messages. At this time, the first time calculation module will prompt a fault. After the first time calculation module was last adjusted by the proportional-integral controller, the step was 7.999ns.

[0042] Then the second time calculation module will copy the time of 13:30:41.100500 seconds on September 24, 2022 to the second time calculation module. At this time, the step of the second time calculation module may be 7.992ns, and the step of the second time calculation module continues to maintain the result calculated by the proportional-integral controller of the second time calculation module.

[0043] The second time calculation module may have some time deviations due to message forwarding and transmission. Therefore, there may be a relatively large gap between the steps of the second time calculation module and the first time calculation module. However, the respective steps are accurate within their respective clock domains. So, the second time calculation module directly copies the time of the first time calculation module and uses its own step, which can continue to maintain a relatively high time synchronization. In this switching process, no software intervention is required, and it can quickly handle the situation where a certain clock domain fails. For the entire system, this method is more intelligent.

[0044] In the present invention, when the control system may be handling other events, the network itself has a certain degree of flexibility and can continue to operate stably. When the time synchronization messages of a certain clock domain are lost, it can quickly and highly accurately switch the time calculation module and still maintain high-precision time synchronization in the second clock domain, without requiring the upper-layer control system to immediately respond to handle the problem of lost messages in the first clock domain.

[0045] The above-described embodiments only represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation to the scope of the patent of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

Claims

1. A multi-clock domain switching method based on snapshot, characterized in that Including the following steps: Making the time synchronization message into at least two virtual channels, and each virtual channel represents a clock domain; When the time synchronization message of a certain clock domain is lost, copying the current time of the clock domain where the time synchronization message is lost to the clock domain where the time synchronization message is not lost in the snapshot manner; Switching the control signal to select the time output of the clock domain where the time synchronization message is not lost; The step: when the time synchronization message of a certain clock domain is lost, copying the current time of the clock domain where the time synchronization message is lost to the clock domain where the time synchronization message is not lost in the snapshot manner, specifically including the following steps: When the time calculation module in a certain clock domain does not receive the time synchronization message, the time calculation module prompts that a fault occurs in this clock domain; copying the final time in the time calculation module before the fault occurs to the time calculation module in the clock domain that can normally receive the time synchronization message; after the copying is completed, the time calculation module that can normally receive the time synchronization message still maintains the original step, and combines the time synchronization message and the copied time to calculate the output time; The final time includes 48-bit second time, 32-bit nanosecond time, and 26-bit fractional nanosecond time.

2. The multi-clock domain switching method based on snapshot according to claim 1, wherein, There is a time calculation module in the clock domain, and the time calculation module is used to receive the time synchronization message and calculate the final output time in combination with the current time.

3. The multi-clock domain switching method based on snapshot according to claim 2, wherein The time calculation module is a proportional-integral controller, and the proportional-integral controller can keep the clock domain stable in the long term.

4. The multi-clock domain switching method based on snapshot according to claim 1, wherein The step is the time increased in each clock cycle.

5. The multi-clock domain switching method based on snapshot according to claim 1, characterized in that The step: switching the control signal to select the time output of the clock domain where the time synchronization message is not lost, specifically including: Switching the control signal to select the output time of the time calculation module that normally receives the time synchronization message.

Citation Information

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