LED chip and manufacturing method thereof

By setting a multi-layer structure between the substrate and the epitaxial stack, including a metal bonding layer, an insulating layer, a metal connection layer and a dielectric layer, the heat dissipation and adhesion problems of vertical structure LED chips are solved, achieving higher reflectivity and heat dissipation capacity, and improving product reliability.

CN115732622BActive Publication Date: 2026-01-23XIAMEN CHANGELIGHT CO LTD
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Patent Information

Application Number
CN202211555098.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-06
Publication Date
2026-01-23
Estimated Expiration
2042-12-06

AI Technical Summary

Technical Problem

Existing vertical LED chips suffer from poor heat dissipation performance and insufficient adhesion of the metal reflective layer, resulting in significant heat dissipation problems and limited improvement in reflectivity.

Method used

A metal bonding layer, an insulating layer, a metal interconnect layer, a metal reflective layer, and a dielectric layer are disposed between the substrate and the epitaxial stack. The dielectric layer extends to the sidewall of the via, and the metal reflective layer is embedded in the dielectric hole and extends to the sidewall of the via. Adhesion is improved by disposing a second dielectric film at the edge of the metal reflective layer.

Benefits of technology

It improves the chip's heat dissipation capacity and reflectivity, solving the problem of heat not being able to dissipate in time, while also enhancing the adhesion of the metal reflective layer and improving the product's reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides an LED chip and a manufacturing method thereof. The medium layer extends to the side wall of the through hole of the epitaxial stack. The metal reflection layer is embedded in the medium hole and in contact with the second type semiconductor layer by being stacked on the surface of the medium layer, and extends to the side wall of the through hole. The metal connection layer is stacked on the side surface of the metal reflection layer away from the medium layer, and the metal connection layer has an exposed surface on the side surface facing the epitaxial stack. The insulating layer extends to the side wall of the through hole by covering the metal connection layer and the metal reflection layer. Thus, the metal reflection layer is extended into the through hole, the reflectivity of the through hole is improved, the heat in the through hole can be conducted from the mesa to improve the heat dissipation capacity of the chip, and the problem that the heat cannot be dissipated in time due to the existence of the cavity in the through hole type vertical structure LED chip can be well solved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of light emitting diodes, in particular to a LED chip and a manufacturing method thereof. BACKGROUND

[0002] The existing light emitting diodes include horizontal type and vertical type. The vertical type light emitting diode is obtained by transferring the semiconductor epitaxial wafer stack to other substrates such as silicon, silicon carbide or metal substrate, and removing the original epitaxial growth substrate, which can effectively improve the technical problems of light absorption, current crowding or poor heat dissipation caused by the epitaxial growth substrate compared with the horizontal type. The transfer of the substrate generally adopts a bonding process, and the bonding is mainly through metal-metal high temperature and high pressure bonding, that is, a metal bonding layer is formed between the semiconductor epitaxial wafer stack and the substrate. The other side of the semiconductor epitaxial wafer stack provides a light emitting side, and the light emitting side is provided with a wire electrode to provide current injection or outflow, and the substrate below the semiconductor epitaxial wafer stack provides current outflow or inflow, thereby forming a light emitting diode with vertical current through the semiconductor epitaxial wafer stack. For LED light emitting devices, improving the external quantum efficiency of the LED and the heat dissipation capacity of the chip is the eternal topic pursued by researchers; usually improving the brightness at the epitaxial structure level or at the chip structure level. Among them, the design of the reflector is the key object to be overcome at the structure level of the vertical structure LED chip. At present, high reflectivity metal is usually used to act as a current spreading layer and a reflective metal layer, and the metal includes one or more of Ag, Au, Al, Mg, Ni, Ti, etc. However, the reflectivity of high reflectivity metal is still far from 100%. Thus, the ODR all-around reflector is derived as an optimization scheme for improving reflectivity, that is, a reflective metal is deposited on a dielectric film layer, and the reflectivity is improved through the cooperation of the dielectric film and the reflective metal. However, since the dielectric film is usually an oxide, the thermal conductivity of the oxide material is poor, which makes the chip heat dissipation performance poor, and as the chip power increases, the heat dissipation problem becomes more and more prominent; at the same time, due to the poor adhesion of the reflective metal and the dielectric film, the reflective metal has a falling defect.

[0003] Therefore, the present application is designed to solve the above problems. SUMMARY

[0004] The present application aims to provide a LED chip and a manufacturing method thereof to solve the problems of heat dissipation and metal falling of the existing vertical structure LED chip.

[0005] In order to achieve the above-mentioned purpose, the technical scheme adopted by the present application is as follows:

[0006] A LED chip, comprising:

[0007] A substrate and an epitaxial stack disposed above the substrate; the epitaxial stack at least includes a second-type semiconductor layer, an active region and a first-type semiconductor layer stacked in sequence along a first direction, and the epitaxial stack has a via hole exposing a part of a surface of the first-type semiconductor layer; the first direction is perpendicular to the substrate and points from the substrate to the epitaxial stack;

[0008] A metal bonding layer, an insulating layer, a metal connecting layer, a metal reflecting layer and a dielectric layer are disposed between the substrate and the epitaxial stack;

[0009] The dielectric layer is disposed on a side of the epitaxial stack facing the substrate and extends to a sidewall of the via hole of the epitaxial stack; and the dielectric layer has a dielectric hole exposing the second-type semiconductor layer;

[0010] The metal reflecting layer is embedded in the dielectric hole and in contact with the second-type semiconductor layer by being laminated on a surface of the dielectric layer, and extends to the sidewall of the via hole;

[0011] The metal connecting layer is in contact with the metal reflecting layer, and a surface of the metal connecting layer on a side facing the epitaxial stack has an exposed surface;

[0012] The insulating layer extends to the sidewall of the via hole by covering the metal connecting layer and the metal reflecting layer;

[0013] The substrate is bonded to the epitaxial stack to form an integrated body by being embedded in the via hole through the metal bonding layer.

[0014] Preferably, the metal reflecting layer covers the sidewall of the via hole.

[0015] Preferably, a second dielectric film is disposed on an edge of the metal reflecting layer.

[0016] Preferably, the second dielectric film extends to the sidewall of the via hole.

[0017] Preferably, the metal connecting layer is integrally formed with the metal reflecting layer, or the metal connecting layer is laminated on a side surface of the metal reflecting layer away from the dielectric layer.

[0018] Preferably, the dielectric layer includes at least one of a fluoride layer, a nitride layer or an oxide layer.

[0019] Preferably, the metal reflecting layer includes a high-reflectivity material layer.

[0020] Preferably, the metal reflecting layer includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead and nickel.

[0021] Preferably, the metal connecting layer comprises one or more of gold, titanium, nickel, and chromium.

[0022] Preferably, a sidewall of the metal connecting layer is coated by the insulating layer.

[0023] Preferably, the substrate comprises an electrically conductive substrate.

[0024] Preferably, the insulating layer comprises a layer of high-thermal-conductivity insulating material.

[0025] The present application also provides a method for manufacturing an LED chip, comprising the following steps:

[0026] S01, providing a growth substrate;

[0027] S02, laminating an epitaxial layer on a surface of the growth substrate, the epitaxial layer comprising a first-type semiconductor layer, an active region, and a second-type semiconductor layer stacked in sequence along a growth direction;

[0028] S03, forming a through hole and a light-emitting mesa in the epitaxial layer by an etching process, the through hole exposing part of a surface of the first-type semiconductor layer;

[0029] S04, manufacturing a dielectric layer, the dielectric layer covering the light-emitting mesa and the through hole, and the dielectric layer having a dielectric hole exposing the second-type semiconductor layer;

[0030] S05, depositing a metal reflective layer, the metal reflective layer being embedded in the dielectric hole and in contact with the second-type semiconductor layer by being laminated on a surface of the dielectric layer, and extending to the through hole;

[0031] S06, manufacturing a second dielectric film, and removing the metal reflective layer at a bottom of the through hole by a photolithography process, and the second dielectric film being reserved at edges of the metal reflective layer;

[0032] S07, depositing a metal connecting layer, the metal connecting layer being laminated on a surface of the metal reflective layer;

[0033] S08, manufacturing an insulating layer, the insulating layer filling the through hole and extending to the light-emitting mesa to cover the metal connecting layer;

[0034] S09, etching the insulating layer along a position of the through hole to expose the first-type semiconductor layer, and reserving the insulating layer at a sidewall of the through hole;

[0035] S10, providing a substrate, and bonding the substrate with the epitaxial layer by a bonding process to form an integrated body by embedding the substrate in the through hole through a metal bonding layer;

[0036] S11, peeling off the growth substrate;

[0037] S12, by means of photolithography, etching process, the LED chip has the exposed surface of the metal connecting layer.

[0038] Preferably, the second dielectric film extends to the side wall of the through hole.

[0039] Via the technical solution described above, the LED chip provided by the application is characterized in that: a metal bonding layer, an insulating layer, a metal connecting layer, a metal reflecting layer and a dielectric layer are arranged between the substrate and the epitaxial stack; the dielectric layer is arranged on the side of the epitaxial stack facing the substrate and extends to the side wall of the through hole of the epitaxial stack; the dielectric layer has a dielectric hole exposing the second type semiconductor layer; the metal reflecting layer is embedded in the dielectric hole and in contact with the second type semiconductor layer by being laminated on the surface of the dielectric layer and extends to the side wall of the through hole; the metal connecting layer is laminated on the side surface of the metal reflecting layer away from the dielectric layer, and the metal connecting layer has an exposed surface on the side surface facing the epitaxial stack; the insulating layer extends to the side wall of the through hole by covering the metal connecting layer and the metal reflecting layer; and the substrate is bonded with the epitaxial stack to form an integrated body by being embedded in the through hole through the metal bonding layer. Thus, the metal reflecting layer is extended into the through hole, the reflectivity of the through hole is improved, the heat in the through hole can be conducted from the mesa to improve the heat dissipation capacity of the chip, and the problem that the heat cannot be dissipated in time due to the existence of the cavity in the through-hole vertical structure LED chip is solved.

[0040] Further, the application further provides a second dielectric film arranged at the edge of the metal reflecting layer, and the second dielectric film extends to the side wall of the through hole. Thus, the adhesion between the dielectric layer and the metal reflecting layer is improved to prevent the metal reflecting layer from falling off at the edge of the dielectric layer, thereby improving the reliability of the product.

[0041] The manufacturing method of the LED chip provided by the application is simple and convenient in process and is easy to produce while achieving the beneficial effects described above. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of the provided drawings.

[0043] Figure 1 The structure schematic diagram of the LED chip provided by the embodiment 1 of the application;

[0044] Figures 2.1 to 2.13 Structure diagram corresponding to the steps of the manufacturing method of the LED chip provided by the embodiment of the present application;

[0045] Figure 3 Structure diagram of the LED chip provided by the embodiment 2 of the present application;

[0046] Symbol explanation in the figure: 1, growth substrate, 2, epitaxial stack, 21, first type semiconductor layer, 22, active region, 23, second type semiconductor layer, 3, through hole, 4, light emitting mesa, 5, dielectric layer, 51, dielectric hole, 6, metal reflection layer, 7, second dielectric film, 8, metal connection layer, 9, insulating layer, 10, metal bonding layer, 11, substrate. DETAILED DESCRIPTION

[0047] In order to make the content of the present application clearer, the content of the present application will be further explained in combination with the drawings. The present application is not limited to this specific embodiment. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0048] Embodiment 1

[0049] As shown in the figure, an LED chip comprises: Figure 1

[0050] a substrate 11 and an epitaxial stack 2 arranged above the substrate 11; the epitaxial stack 2 at least comprises a second type semiconductor layer 23, an active region 22 and a first type semiconductor layer 21 stacked in sequence along a first direction, and the epitaxial stack 2 has a through hole 3 exposing part of the surface of the first type semiconductor layer 21; the first direction is perpendicular to the substrate 11 and points from the substrate 11 to the epitaxial stack 2;

[0051] a metal bonding layer 10, an insulating layer 9, a metal connection layer 8, a metal reflection layer 6 and a dielectric layer 5 are arranged between the substrate 11 and the epitaxial stack 2;

[0052] The dielectric layer 5 is arranged on the side of the epitaxial stack 2 facing the substrate 11 and extends to the sidewall of the through hole 3 of the epitaxial stack 2; and the dielectric layer 5 has a dielectric hole 51 exposing the second type semiconductor layer 23;

[0053] The metal reflection layer 6 is embedded in the dielectric hole 51 and in contact with the second type semiconductor layer 23 by being laminated on the surface of the dielectric layer 5 and extends to the sidewall of the through hole 3;

[0054] ​The metal connecting layer 8 is in contact with the metal reflecting layer 6, and the metal connecting layer 8 has an exposed surface on a side surface facing the epitaxial stack 2;

[0055] The insulating layer 9 extends to the side wall of the through hole 3 by covering the metal connecting layer 8 and the metal reflecting layer 6;

[0056] The substrate 11 is bonded with the epitaxial stack 2 in an embedded manner of the metal bonding layer 10 in the through hole 3.

[0057] It is worth mentioning that the types of the first-type semiconductor layer 21, the active region 22 and the second-type semiconductor layer 23 of the epitaxial stack 2 are not limited in the embodiment, for example, the first-type semiconductor layer can be but is not limited to an N-type gallium nitride layer, and accordingly, the second-type semiconductor layer can be but is not limited to a P-type gallium nitride layer.

[0058] In the embodiment, the metal reflecting layer 6 covers the side wall of the through hole 3.

[0059] In the embodiment, the second dielectric film 7 is arranged at the edge of the metal reflecting layer 6.

[0060] In the embodiment, the second dielectric film 7 extends to the side wall of the through hole 3.

[0061] In the embodiment, the dielectric layer 5 includes at least one stack of a fluoride layer, a nitride layer or an oxide layer.

[0062] In the embodiment, the metal reflecting layer 6 includes a high-reflectivity material layer.

[0063] In the embodiment, the metal reflecting layer 6 includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead and nickel.

[0064] In the embodiment, the metal connecting layer 8 includes one or more of gold, titanium, nickel and chromium.

[0065] In the embodiment, the side wall of the metal connecting layer 8 is covered by the insulating layer 9.

[0066] In the embodiment, the substrate 11 includes a conductive substrate 11.

[0067] In the embodiment, the insulating layer 9 includes a high-thermal-conductivity insulating material layer.

[0068] The embodiment of the present application also provides a manufacturing method of an LED chip, including the following steps:

[0069] S01, as shown in the figure, a growth substrate 1 is provided; Figure 2.1

[0070] ​S02, as shown in Figure 2.2 A first-type semiconductor layer 21, an active region 22 and a second-type semiconductor layer 23 are sequentially stacked on the surface of the growth substrate 1 along the growth direction to form an epitaxial stack 2;

[0071] S03, as shown in Figure 2.3 A via hole 3 and a light-emitting mesa 4 are formed in the epitaxial stack 2 by an etching process, and the via hole 3 exposes part of the surface of the first-type semiconductor layer 21;

[0072] S04, as shown in Figure 2.4 A dielectric layer 5 is made, which covers the light-emitting mesa 4 and the via hole 3, and the dielectric layer 5 has a dielectric hole 51 that exposes the second-type semiconductor layer 23;

[0073] S05, as shown in Figure 2.5 A metal reflective layer 6 is deposited, which is embedded in the dielectric hole 51 and in contact with the second-type semiconductor layer 23 by being stacked on the surface of the dielectric layer 5, and extends to the via hole 3;

[0074] S06, as shown in Figure 2.6 A second dielectric film 7 is made on the front surface, and then the metal reflective layer 6 at the bottom of the via hole 3 is removed by a photolithography process, and the second dielectric film 7 remains at the edge of the metal reflective layer 6, as shown in Figure 2.7

[0075] S07, as shown in Figure 2.8 A metal connecting layer 8 is deposited, which is stacked on the surface of the metal reflective layer 6;

[0076] S08, as shown in Figure 2.9 An insulating layer 9 is made, which fills the via hole 3 and extends to the light-emitting mesa 4 to cover the metal connecting layer 8;

[0077] S09, as shown in Figure 2.10 The insulating layer 9 is etched along the position of the via hole 3 to expose the first-type semiconductor layer 21, and the insulating layer 9 on the side wall of the via hole 3 is retained;

[0078] S10, as shown in Figure 2.11 A substrate 11 is provided, and the substrate 11 is bonded to the epitaxial stack 2 by a bonding process to form an integrated body by embedding the via hole 3 through the metal bonding layer 10;

[0079] S11, as shown in Figure 2.12 The growth substrate 1 is peeled off;

[0080] S12, as shown in Figure 2.13 ​As shown, the LED chip has an exposed surface of the metal connecting layer 8 by means of photolithography and etching process.

[0081] Preferably, the second dielectric film 7 extends to the side wall of the through hole 3.

[0082] As known from the above technical solution, the LED chip provided by the application has the following features: a metal bonding layer 10, an insulating layer 9, a metal connecting layer 8, a metal reflecting layer 6 and a dielectric layer 5 are arranged between the substrate 11 and the epitaxial layer 2; the dielectric layer 5 is arranged on the side of the epitaxial layer 2 facing the substrate 11 and extends to the side wall of the through hole 3 of the epitaxial layer 2; the dielectric layer 5 has a dielectric hole 51 exposing the second type semiconductor layer 23; the metal reflecting layer 6 is embedded in the dielectric hole 51 and in contact with the second type semiconductor layer 23 by being laminated on the surface of the dielectric layer 5 and extends to the side wall of the through hole 3; the metal connecting layer 8 is laminated on the side surface of the metal reflecting layer 6 away from the dielectric layer 5, and the metal connecting layer 8 has an exposed surface on the side surface facing the epitaxial layer 2; the insulating layer 9 extends to the side wall of the through hole 3 by covering the metal connecting layer 8 and the metal reflecting layer 6; and the substrate 11 is bonded with the epitaxial layer 2 to form an integrated body by means of the metal bonding layer 10 embedded in the through hole 3. Thus, the metal reflecting layer 6 is extended into the through hole 3, the reflectivity inside the through hole 3 is improved, the heat inside the through hole 3 can be conducted from the mesa to improve the heat dissipation capacity of the chip, and the problem that the heat cannot be dissipated in time due to the existence of the cavity in the through hole 3 type vertical structure LED chip is solved.

[0083] Further, the second dielectric film 7 is arranged on the edge of the metal reflecting layer 6, and the second dielectric film 7 extends to the side wall of the through hole 3. Thus, the adhesion of the dielectric layer 5 and the metal reflecting layer 6 is improved to prevent the metal reflecting layer 6 from falling off at the edge of the dielectric layer 5, thereby improving the reliability of the product.

[0084] The manufacturing method of the LED chip provided by the application is simple and convenient in process manufacturing and is easy to produce while achieving the above beneficial effects.

[0085] Embodiment 2

[0086] The difference between this embodiment and embodiment 1 is that, as shown in the figure, in this embodiment, the metal connecting layer and the metal reflecting layer are integrally formed, and finally the metal reflecting layer 8 is obtained. Figure 3

[0087] ​The device provided by the embodiments of the present application has the same implementation principle and generated technical effects as the foregoing method embodiments. For brevity, the part not mentioned in the device embodiment part can be referred to the corresponding content in the foregoing method embodiments. Those skilled in the art can clearly understand the specific working process of the system, device and unit described above, which can be referred to the corresponding process in the foregoing method embodiments, and will not be described here.

[0088] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between each embodiment can be referred to each other.

[0089] It should also be noted that, in this document, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another same element in the article or device including the above element.

[0090] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to the embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, include: A substrate and an epitaxial stack disposed above the substrate; the epitaxial stack includes at least a second type semiconductor layer, an active region and a first type semiconductor layer stacked sequentially along a first direction, and the epitaxial stack has a through-hole exposing a portion of the surface of the first type semiconductor layer; The first direction is perpendicular to the substrate and points from the substrate to the epitaxial stack; A metal bonding layer, an insulating layer, a metal connection layer, a metal reflective layer, and a dielectric layer are provided between the substrate and the epitaxial stack. The dielectric layer is disposed on the side of the epitaxial stack facing the substrate and extends to the through-hole sidewall of the epitaxial stack; and the dielectric layer has a dielectric hole exposing the second type semiconductor layer. The metal reflective layer is embedded in the dielectric hole and forms contact with the second type semiconductor layer by being stacked on the surface of the dielectric layer, and extends to the sidewall of the via; The metal bonding layer is in contact with the metal reflective layer, and the metal bonding layer has an exposed surface on the side facing the epitaxial stack. The insulating layer extends to the sidewall of the through hole by covering the metal connection layer and the metal reflective layer; The substrate is bonded to the epitaxial stack by embedding the through-hole in the metal bonding layer to form an integral unit.

2. The LED chip according to claim 1, characterized in that, The metal reflective layer covers the sidewalls of the through hole.

3. The LED chip according to claim 1 or 2, characterized in that, A second dielectric film is provided at the edge of the metal reflective layer.

4. The LED chip according to claim 3, characterized in that, The second dielectric film extends to the sidewall of the via.

5. The LED chip according to claim 1, characterized in that, The insulating layer comprises an insulating material layer with high thermal conductivity.

6. The LED chip according to claim 1, characterized in that, The metal bonding layer is integrally formed with the metal reflective layer, or the metal bonding layer is stacked on the side surface of the metal reflective layer that is away from the dielectric layer.

7. The LED chip according to claim 1, characterized in that, The metal reflective layer includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, and nickel.

8. The LED chip according to claim 1, characterized in that, The sidewalls of the metal connection layer are covered by the insulating layer.

9. The LED chip according to claim 1, characterized in that, The substrate includes a conductive substrate.

10. A method for manufacturing an LED chip, characterized in that, Includes the following steps: S01, Provide a growth substrate; S02. An epitaxial stack is stacked on the surface of the growth substrate, the epitaxial stack comprising a first type semiconductor layer, an active region and a second type semiconductor layer stacked sequentially along the growth direction; S03. Through-holes and light-emitting mesa are formed on the epitaxial stack by etching process, and the through-holes expose part of the surface of the first type semiconductor layer; S04. Fabricate a dielectric layer, wherein the dielectric layer covers the light-emitting mesa and the via, and the dielectric layer has a dielectric hole that exposes the second type semiconductor layer; S05. Deposit a metal reflective layer, wherein the metal reflective layer is embedded in the dielectric hole and forms contact with the second type semiconductor layer by being stacked on the surface of the dielectric layer, and extends to the via; S06. Fabricate a second dielectric film. Fabricate a second dielectric film and remove the metal reflective layer located at the bottom of the via through a photolithography process, while the second dielectric film remains at the edge of the metal reflective layer. S07. Deposit a metal bonding layer, wherein the metal bonding layer is stacked on the surface of the metal reflective layer; S08. Fabricate an insulating layer, wherein the insulating layer fills the through hole and extends to the light-emitting platform to cover the metal connection layer; S09. The insulating layer is etched along the via location until the first type semiconductor layer is exposed, while retaining the insulating layer on the sidewall of the via. S10. A substrate is provided, and the substrate is bonded to the epitaxial stack by means of a bonding process, wherein the substrate is embedded in the through hole through a metal bonding layer to form an integral unit; S11. Peel off the growth substrate; S12. Through photolithography and etching processes, the LED chip has an exposed surface of the metal interconnect layer.

11. The method for manufacturing an LED chip according to claim 10, characterized in that, The second dielectric film extends to the sidewall of the via.

Citation Information

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