Gallium nitride-based high electron mobility transistor and method of making the same

Abstract

Embodiments of the present application relate to a gallium nitride-based high electron mobility transistor and a method for manufacturing the same, including: a substrate including a first surface and a second surface opposite to each other in a thickness direction; a drain trench extending from the first surface of the substrate to an interior of the substrate; a gallium nitride-based epitaxial stack extending on the first surface of the substrate and on an inner surface of the drain trench, at least a partial region of the gallium nitride-based epitaxial stack being used to form a two-dimensional electron gas channel; a drain located in the drain trench and at a first position of the gallium nitride-based epitaxial stack; a gate located at a second position of the gallium nitride-based epitaxial stack; the two-dimensional electron gas channel formed by a portion of the gallium nitride-based epitaxial stack between the first position and the second position has a component in the thickness direction; in this way, the length of the two-dimensional electron gas channel between the drain and the gate is extended in the thickness direction of the substrate, so that a higher withstand voltage is achieved with a smaller occupied area.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a gallium nitride-based high electron mobility transistor and a preparation method thereof. BACKGROUND

[0002] A high electron mobility transistor (HEMT) is a field effect transistor based on the high mobility characteristics of a two-dimensional electron gas (2DEG) in a heterojunction, which has high electron mobility at low temperature and low electric field, and can achieve high speed and low noise operation.

[0003] In recent years, a gallium nitride-based high electron mobility transistor (GaN HEMT), such as an AlGaN / GaN high electron mobility transistor, has attracted widespread attention in the power electronics industry due to its high two-dimensional electron gas concentration, high speed, and high breakdown field.

[0004] Current gallium nitride-based high electron mobility transistors are mostly planar structures, which occupy a large area. Moreover, if the voltage resistance of the device needs to be improved, the distance between the gate and the drain can only be increased, which will further increase the occupied area of the device. Therefore, how to balance the size and voltage resistance of the device is an important problem in the field. SUMMARY

[0005] Therefore, the embodiments of the present application provide a gallium nitride-based high electron mobility transistor and a preparation method thereof to solve at least one problem in the background art.

[0006] In a first aspect, the embodiments of the present application provide a gallium nitride-based high electron mobility transistor, comprising:

[0007] a substrate comprising a first surface and a second surface opposite to each other in a thickness direction;

[0008] a drain trench extending from the first surface of the substrate to the inside of the substrate;

[0009] a gallium nitride-based epitaxial stack extending on the first surface of the substrate and the inner surface of the drain trench, at least a part of the gallium nitride-based epitaxial stack being used to form a two-dimensional electron gas channel;

[0010] a drain located in the drain trench and at a first position of the gallium nitride-based epitaxial stack;

[0011] a gate located at a second position of the gallium nitride-based epitaxial stack;

[0012] The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack between the first position and the second position has a component in the thickness direction.

[0013] In an optional implementation of the first aspect of the present application, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack between the first position and the second position includes at least: a region extending in the thickness direction, and / or a region extending in a direction that forms an acute angle with the thickness direction.

[0014] In an optional implementation of the first aspect of the present application, the first position is located at the bottom end of the drain trench.

[0015] In an optional implementation of the first aspect of the present application, the second position is located on the first surface.

[0016] In an optional implementation of the first aspect of the present application, the method further includes:

[0017] a gate trench extending from the first surface of the substrate to the interior of the substrate;

[0018] a gallium nitride-based epitaxial stack further extending on the inner surface of the gate trench;

[0019] The second position is located in the gate trench.

[0020] In a second aspect, the embodiments of the present application provide a method for manufacturing a gallium nitride-based high electron mobility transistor, the method including:

[0021] providing a substrate including a first surface and a second surface opposite to each other in a thickness direction;

[0022] forming a drain trench extending from the first surface to the interior of the substrate on the substrate;

[0023] forming a gallium nitride-based epitaxial stack on the first surface and the inner surface of the drain trench, at least a portion of the gallium nitride-based epitaxial stack being used to form a two-dimensional electron gas channel;

[0024] forming a drain and a gate, wherein the drain is formed in the drain trench and located on a first position of the gallium nitride-based epitaxial stack, and the gate is formed on a second position of the gallium nitride-based epitaxial stack;

[0025] The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack between the first position and the second position has a component in the thickness direction.

[0026] In combination with the second aspect of the present application, in an optional implementation, the forming the drain trench extending from the first surface to the interior of the substrate comprises at least one of the following:

[0027] forming the drain trench with at least part of the sidewall extending along the thickness direction;

[0028] forming the drain trench with at least part of the sidewall tilting away from the center of the drain trench in the direction from the first surface to the second surface;

[0029] forming the drain trench with at least part of the sidewall tilting towards the center of the drain trench in the direction from the first surface to the second surface.

[0030] In combination with the second aspect of the present application, in an optional implementation, the first position is located at the bottom end of the drain trench.

[0031] In combination with the second aspect of the present application, in an optional implementation, the second position is located on the first surface.

[0032] In combination with the second aspect of the present application, in an optional implementation, before the forming the gallium nitride-based epitaxial layer, the method further comprises: forming a gate trench extending from the first surface to the interior of the substrate;

[0033] the forming the gallium nitride-based epitaxial layer comprises: forming the gallium nitride-based epitaxial layer on the first surface, the inner surface of the gate trench and the inner surface of the drain trench;

[0034] the second position is located in the gate trench.

[0035] The gallium nitride-based high electron mobility transistor and the manufacturing method thereof provided by the embodiments of the present application, wherein the gallium nitride-based high electron mobility transistor comprises: a substrate comprising a first surface and a second surface opposite to each other in a thickness direction; a drain trench extending from the first surface of the substrate to the interior of the substrate; a gallium nitride-based epitaxial layer extending on the first surface of the substrate and the inner surface of the drain trench, at least part of the gallium nitride-based epitaxial layer being used to form a two-dimensional electron gas channel; a drain located in the drain trench and at a first position of the gallium nitride-based epitaxial layer; a gate located at a second position of the gallium nitride-based epitaxial layer; and the two-dimensional electron gas channel formed by the part of the gallium nitride-based epitaxial layer between the first position and the second position has a component along the thickness direction; in this way, the length of the two-dimensional electron gas channel between the drain and the gate is extended along the thickness direction of the substrate, so that a higher withstand voltage is achieved with a smaller occupied area.

[0036] Additional aspects and advantages of the present application will be made apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0037] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:

[0038] Figure 1 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by an embodiment of the present application;

[0039] Figure 2 A flowchart schematic diagram of a preparation method of a gallium nitride based high electron mobility transistor provided by an embodiment of the present application;

[0040] Figures 3 to 9 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor in a preparation process provided by an embodiment of the present application;

[0041] Figure 10 A schematic diagram of a two-dimensional electron gas channel in an embodiment of the present application;

[0042] Figure 11 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by a first variant embodiment of the present application;

[0043] Figure 12 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by a second variant embodiment of the present application;

[0044] Figure 13 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by a third variant embodiment of the present application;

[0045] Figure 14 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by a fourth variant embodiment of the present application;

[0046] Figure 15 A cross-sectional structure schematic diagram of a gallium nitride based high electron mobility transistor provided by a fifth variant embodiment of the present application. DETAILED DESCRIPTION

[0047] Exemplary embodiments of the present application will be described herein below with reference to the accompanying drawings. While exemplary embodiments of the present application are illustrated, it will be understood that the present application can be carried out in various ways without being limited to the particular embodiments set forth herein. Conversely, additional embodiments of the present application can from time to time be set forth, of which the person of ordinary skill in the art will avail himself / herself by virtue of the conceptual description of the application as set forth herein.

[0048] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. It will be apparent, however, to one of ordinary skill in the art that the present application can be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail so as not to unnecessarily obscure the present application.

[0049] In the drawings, the size of layers, regions, elements, and the like can be exaggerated for clarity. Like reference numerals can represent like elements throughout the several figures.

[0050] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will also be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms since such terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section.

[0051] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or

[0052] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0053] For a thorough understanding of the present application, reference will be made to the following detailed description taken in conjunction with the accompanying drawings, in which:

[0054] First, the embodiments of the present application provide a gallium nitride based high electron mobility transistor. Please refer to Figure 1 The gallium nitride based high electron mobility transistor comprises: a substrate 110, the substrate 110 comprises a first surface 111 and a second surface 112 opposite to each other in a thickness direction; a drain trench 113 extending from the first surface 111 of the substrate 110 to the inside of the substrate 110; a gallium nitride based epitaxial layer 120 extending on the first surface 111 of the substrate 110 and on the inner surface 1130 of the drain trench 113, at least a part of the gallium nitride based epitaxial layer 120 is used to form a two-dimensional electron gas channel 123; a drain 130 located in the drain trench 113 and at a first position P1 of the gallium nitride based epitaxial layer 120; a gate 140 located at a second position P2 of the gallium nitride based epitaxial layer 120. Wherein the two-dimensional electron gas channel formed by the part of the gallium nitride based epitaxial layer 120 between the first position P1 and the second position P2 has a component in the thickness direction.

[0055] It can be understood that, by opening the drain trench 113 on the substrate 110 and arranging the drain 130 in the drain trench 113, the two-dimensional electron gas channel formed by the part of the gallium nitride-based epitaxial stack 120 between the first position P1 corresponding to the drain 130 and the second position P2 corresponding to the gate 140 has a component in the thickness direction, so compared with the prior art scheme in which the two-dimensional electron gas channel is arranged only in the substrate plane direction, the embodiment of the present application prolongs the length of the two-dimensional electron gas channel between the drain 130 and the gate 140 in the thickness direction of the substrate 110, thereby balancing the size and withstand voltage of the device, and a higher withstand voltage can be achieved with a smaller occupied area. Further, when preparing a device with the same withstand voltage as the prior art, the number of devices prepared on the entire wafer can be increased due to the reduction in the occupied area of a single device; the final device is smaller in size, which can save the volume of the application end and lay the foundation for subsequent replacement of silicon-based products. The "device" refers to a gallium nitride-based high electron mobility transistor or a package containing a gallium nitride-based high electron mobility transistor.

[0056] In the embodiments of the present application, the term "substrate" refers to a carrier on which subsequent material layers are added. The stacking direction of the added subsequent material layers is the thickness direction of the substrate, or the height direction of the device, and the Z direction and the opposite direction thereof in the figure are the thickness direction of the substrate. The substrate 110 includes a first surface 111 and a second surface 112 opposite each other in the thickness direction. According to the formation position of the device, the first surface 111 and the second surface 112 can also be referred to as the top surface and the bottom surface, respectively, or the upper surface and the lower surface, respectively. The top surface of the substrate 110 is usually the side on which the device is formed, so the gallium nitride-based high electron mobility transistor is formed on the top side of the substrate 110, unless otherwise specified. According to the plane on which the first surface 111 and the second surface 112 of the substrate 110 are located, or strictly according to the central plane of the substrate 110 in the thickness direction, the substrate plane can be determined; the direction parallel to the substrate plane is the substrate plane direction. Two first and second directions (shown as X and Y in the figure, respectively) intersecting each other are defined in the substrate plane direction; the first and second directions are, for example, two directions perpendicular to each other.

[0057] The material of the substrate 110 can be any suitable material known to those skilled in the art, such as a silicon (Si) substrate, a gallium nitride (GaN) substrate, a silicon carbide (SiC) substrate, or a sapphire substrate, etc.

[0058] The drain trench 113 can be formed by performing an etching process on the first surface 111 of the substrate 110. The etching process can be a wet etching process or a dry etching process. In order to form the drain trench 113 with a preset size at a preset position, in a specific operation, a patterned mask layer can be formed by steps such as gluing, exposure, and development in a photolithography process, and then etching is performed with the aid of the mask layer. The drain trench 113 extends from the first surface 111 of the substrate 110 to the inside of the substrate 110; in other words, the etching depth is less than the thickness of the substrate 110, and the second surface 112 of the substrate 110 is not exposed by the drain trench 113. The mask layer is removed after the drain trench 113 is etched.

[0059] It should be noted that although it is named as a "drain trench", it does not mean that only a drain can be arranged in the drain trench 113 in the embodiment. Other structures can also be arranged in the drain trench 113.

[0060] The gallium nitride-based epitaxial stack 120 can include a channel layer 121 and a barrier layer 122. At least part of the gallium nitride-based epitaxial stack 120 is used to form a two-dimensional electron gas channel 123, which can be formed in at least part of the channel layer 121 close to the barrier layer 122. Specifically, the band gap width of the barrier layer 122 is greater than that of the channel layer 121, so that the electrons in the wide-band-gap barrier layer 122 and the electrons on the surface of the barrier layer 122 overflow and move to the interface between the channel layer 121 close to the barrier layer 122 and are confined in the potential well formed at the interface, thereby forming a two-dimensional electron gas. In actual preparation, the gallium nitride-based epitaxial stack 120 is formed, for example, by an epitaxial growth process.

[0061] In a specific example, the material of the channel layer 121 includes gallium nitride. Further, the channel layer 121 can be a non-doped material layer (for example, a non-doped gallium nitride layer), so that at least part of the channel layer 121 below the two-dimensional electron gas exhibits a high resistance. The material of the barrier layer 122 includes aluminum gallium nitride (AlGaN). Further, the material of the barrier layer 122 can be an undoped material (for example, an undoped aluminum gallium nitride layer); or the barrier layer 122 can also be an N-doped material layer (for example, an N-type doped aluminum gallium nitride layer), so as to facilitate the induction of a higher density of two-dimensional electron gas.

[0062] In addition, the gallium nitride-based epitaxial stack 120 can further include a transition layer and / or a buffer layer (not shown in the figure) formed between the channel layer 121 and the substrate 110. The transition layer is, for example, a gallium nitride transition layer, an aluminum gallium nitride transition layer, and in some specific examples, an aluminum nitride (AlN) transition layer, or a multi-layer stack structure. By providing the transition layer, on the one hand, the lattice mismatch between the substrate 110 and the channel layer 121 epitaxially grown thereon can be reduced, and the crystal quality of the channel layer 121 can be improved; on the other hand, the transition layer can also serve as a high-resistance layer to reduce device leakage and the like. The buffer layer is, for example, a gallium nitride buffer layer. The channel layer 121 and the barrier layer 122 can be sequentially stacked on the buffer layer. Further, in the specific example in which the transition layer and the buffer layer are included between the channel layer 121 and the substrate 110, the buffer layer is formed on the transition layer. The transition layer and the buffer layer are collectively used to release interface stress, reduce defect density, improve the film layer quality of the subsequent active layers such as the channel layer 121 and the barrier layer 122, and reduce the static current leakage of the device, thereby improving the performance of the device.

[0063] In a specific application, the gallium nitride-based epitaxial stack 120 extending on the first surface 111 of the substrate 110 and on the inner surface 1130 of the drain trench 113 can be that the gallium nitride-based epitaxial stack 120 extends on part of the first surface 111 of the substrate 110 and extends on all of the inner surface 1130 of the drain trench 113. Of course, the present application is not limited thereto, and the gallium nitride-based epitaxial stack 120 can also extend on all of the first surface 111 of the substrate 110 and extend on all of the inner surface 1130 of the drain trench 113, or at least extend between the arrangement positions of the electrodes of the device.

[0064] The electrodes of the gallium nitride-based high electron mobility transistor can include a drain 130, a gate 140, and a source 150. The drain 130 and the source 150 are respectively connected to the gallium nitride-based epitaxial stack 120, thereby being electrically connected to the two-dimensional electron gas channel 123; the gate 140 is arranged between the drain 130 and the source 150, and is used to deplete the two-dimensional electron gas channel 123 in the channel layer 121 thereunder, thereby controlling the turn-on or turn-off of the device.

[0065] It can be understood that although the drain 130 is arranged in the drain trench 113 in the embodiment of the present application, the position and morphology of the drain 130 in the thickness direction are changed; however, the overall structure of the device still maintains that the drain 130, the gate 140, and the source 150 are located on the same side of the substrate 110. The gallium nitride-based high electron mobility transistor in the embodiment still belongs to a lateral high electron mobility transistor.

[0066] In actual fabrication, the drain 130 and the source 150 can be formed by, for example, applying a metal material at a preset forming position of the drain 130 and the source 150 by using any suitable process known to those skilled in the art, such as evaporation, sputtering, etc., and then performing annealing to react the metal material with a surface layer of the gallium nitride-based epitaxial stack 120 to form the drain 130 and the source 150. The metal material can include any one or a combination of multiple of Ti, Ni, Al, Mo, Pt, Pd, Au, Ta, or W. The drain 130 and the source 150 form ohmic contacts with the gallium nitride-based epitaxial stack 120.

[0067] For example, the material of the gate 140 includes P-type gallium nitride. The gate 140 can be formed by using a suitable process, such as Metal Organic Chemical Vapor Deposition (MOCVD), etc. The gate 140 can further include a gate contact structure, etc.

[0068] It can be understood that the gallium nitride-based high electron mobility transistor further includes a gate dielectric layer 170 between the gate 140 and the gallium nitride-based epitaxial stack 120. In addition, the gallium nitride-based high electron mobility transistor can further include a dielectric layer 160 covering a surface of the gallium nitride-based epitaxial stack 120, which can serve as a protective layer of the drain 130 and the source 150. In some embodiments, the gate dielectric layer 170 can also be part of the dielectric layer 160. The embodiments of the present application do not make specific limitations in this regard. Furthermore, the dielectric layer 160, the gate dielectric layer 170, etc. can be implemented by using the same materials and processes as those in the prior art, and thus will not be described here.

[0069] In the embodiments of the present application, the first position P1 and the second position P2 of the gallium nitride-based epitaxial stack 120 refer to positions of the gallium nitride-based epitaxial stack 120 in the extension direction, without considering the thickness direction of the gallium nitride-based epitaxial stack 120. The first position P1 and the second position P2 can be position points or position regions. Considering that the drain 130 and the gate 140 each have a certain area in the substrate plane direction, the first position P1 and the second position P2 mainly refer to position regions.

[0070] The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 has a component in the thickness direction. It can be understood that if the two-dimensional electron gas channel formed by the portion between the first position P1 and the second position P2 only extends in the substrate plane direction, it obviously does not have a component in the thickness direction.

[0071] Please refer toFigure 10 In one specific example, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 includes at least: a region 1231 extending along the thickness direction, and / or a region 1232 extending along a direction that is an acute angle with the thickness direction.

[0072] It can be understood that the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 having a component along the thickness direction can be realized by extending the gallium nitride-based epitaxial stack 120 along the thickness direction within the drain trench 113, or by extending along a direction that is an acute angle with the thickness direction within the drain trench 113.

[0073] Here, the direction that is an acute angle with the thickness direction can include a direction that is an acute angle with the thickness direction on a side away from the center of the drain trench 113, or a direction that is an acute angle with the thickness direction on a side close to the center of the drain trench 113. Extending along a direction that is an acute angle with the thickness direction does not mean extending along a straight line that is inclined, in other words, the acute angle is not a fixed acute angle. In the direction from the first surface 111 to the second surface 112, the angle between the extension direction of the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 and the thickness direction can increase or decrease within a range less than 90 degrees.

[0074] Thus, when forming the drain trench 113, the drain trench 113 can be formed such that at least part of the side wall extends along the thickness direction; and / or, the drain trench 113 can be formed such that, in the direction from the first surface 111 to the second surface 112, at least part of the side wall of the drain trench 113 is inclined toward a direction away from the center of the drain trench 113 (see Figure 11 ); and / or, the drain trench 113 can be formed such that, in the direction from the first surface 111 to the second surface 112, at least part of the side wall of the drain trench 113 is inclined toward a direction close to the center of the drain trench 113 (see Figure 10 or Figure 12 ).

[0075] In this way, the gallium nitride-based epitaxial stack 120 extends on the inner surface 1130 of the drain trench 113, so that the extension direction of the two-dimensional electron gas channel 123 in the gallium nitride-based epitaxial stack 120 can be controlled by controlling the shape of the drain trench 113. Here, the inner surface 1130 of the drain trench 113 includes the side wall and the bottom wall; in other words, at least part of the side wall of the drain trench 113 is part of the inner surface 1130 of the drain trench 113.

[0076] In addition, please continue to refer to Figure 10The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 can also include a region 1233 extending along the substrate plane direction. It should be noted that the present application is not limited thereto, and the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 can also not include the region 1233 extending along the substrate plane direction.

[0077] In a variant, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 having a component along the thickness direction can be achieved only by including a region extending along a direction forming an acute angle with the thickness direction, please refer to Figure 11 and Figure 12 .

[0078] In Figure 11 the first variant, at least a portion of the sidewall 1131 of the drain trench 113 is inclined away from the center of the drain trench 113. The drain trench 113 at least includes a portion with an opening size increasing along a direction approaching the second surface 112. In actual processes, the DRIE (Deep Reactive Ion Etching) process can be used to achieve the inclined angle. Accordingly, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 between the first position P1 and the second position P2 includes a region 1234 inclined away from the center of the drain trench 113. In this way, the length of the two-dimensional electron gas channel between the drain 130 and the gate 140 is further extended, thereby further improving the breakdown voltage (i.e. the voltage resistance) of the device, while the top opening line width of the drain trench 113 remains unchanged.

[0079] In addition, the drain trench 113 can also include a portion of the sidewall 1132 inclined toward the center of the drain trench 113. Compared with the way of extending along the thickness direction, the inclined sidewall has a greater length under the same depth, thus helping to extend the length of the two-dimensional electron gas channel between the drain 130 and the gate 140, and further helping to improve the voltage resistance of the device.

[0080] It can be understood that although not shown in the figure, the present variant also does not exclude the case where the drain trench 113 includes a portion of the sidewall extending along the thickness direction.

[0081] Figure 12 A cross-sectional structure schematic diagram of a gallium nitride-based high electron mobility transistor in a second variant is shown. As shown in the figure, the present variant is similar to the first variant shown in Figure 1The main difference in the illustrated embodiment is that the sidewalls of the drain trench 113 are inclined toward the center of the drain trench 113. The opening size of the drain trench 113 decreases toward the second surface 112. The two-dimensional electron gas channel 1235 (or "region 1235 of the two-dimensional electron gas channel located in the drain trench 113") formed by the portion of the gallium nitride-based epitaxial stack 120 located in the drain trench 113 extends at an acute angle to the thickness direction; and, specifically, in the direction from the first surface 111 to the second surface 112, the two-dimensional electron gas channel 1235 located in the drain trench 113 is inclined toward the center of the drain trench 113. This not only helps to extend the length of the two-dimensional electron gas channel between the drain 130 and the gate 140, improving the device's withstand voltage, but also reduces the difficulty of the etching process required to form the drain trench 113 when the depth of the drain trench 113 is fixed, since the top opening size of the drain trench 113 is larger than the opening size of other parts; in addition, the structure of this modified embodiment also helps to improve the drain-source breakdown voltage BVDSS of the device.

[0082] Please refer to Figure 13 In a third modified embodiment, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 located between the first position P1 and the second position P2 may also exclude the region 1233 extending along the substrate plane. In this modified embodiment, the second position P2 is located on the first surface 111 and is located adjacent to the upper opening of the drain trench 113.

[0083] Although not shown in the figures, in this embodiment, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 located between the first position P1 and the second position P2 can have a component along the thickness direction simply by including a region 1231 extending along the thickness direction. Correspondingly, the sidewalls of the drain trench 113 extend along the thickness direction of the substrate 110.

[0084] Figure 14 A schematic cross-sectional view of a gallium nitride-based high electron mobility transistor in a fourth modified embodiment is shown. As shown, this modified embodiment is similar to... Figure 1 The main difference in the illustrated embodiment is that the sidewalls of the drain trench 113 further include a stepped portion 1133. Correspondingly, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 located within the drain trench 113 has a region 1236 extending along the substrate plane. This not only helps to extend the length of the two-dimensional electron gas channel between the drain 130 and the gate 140, improving the device's breakdown voltage, but also helps to improve the lattice defect problem of the gallium nitride-based epitaxial stack 120.

[0085] It should be noted that, although Figure 14The regions other than the region 1236 in the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 located within the drain trench 113 are the same as in the embodiment shown in FIG. 12, and specifically can be compared with Figure 1 the same as in the embodiment shown in FIG. 12, and specifically can be compared with Figure 10 that is, also includes portions corresponding to the region 1231 extending in the thickness direction and the region 1232 extending in a direction that is an acute angle to the thickness direction, and the region 1236 is specifically located between the region 1231 and the region 1232; however, according to the improved concept of the present application, the two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack 120 located within the drain trench 113 can also include the region 1234 that is inclined in a direction away from the center of the drain trench 113 as in the first variant embodiment.

[0086] In each of the above embodiments, the first position P1 is located at the bottom end of the drain trench 113. Specifically, the first position P1 is the position of the gallium nitride-based epitaxial stack 120 that is closest to the second surface 112 in the extension direction. Thereby, the drain trench 113 is utilized as much as possible to extend the length of the two-dimensional electron gas channel between the drain 130 and the gate 140.

[0087] In each of the above embodiments, the second position P2 is located on the first surface 111.

[0088] Next, reference is made to Figure 15 . In the above embodiments, the second position P2 is located on the first surface 111. Figure 15In the fifth variant shown, the gallium nitride based high electron mobility transistor further comprises: a gate trench 114 extending from the first surface 111 of the substrate 110 to the interior of the substrate 110; the gallium nitride based epitaxial stack 120 further extends on the inner surface of the gate trench 114; and a second position P2 is located within the gate trench 114. Thus, the two-dimensional electron gas channel formed by the portion of the gallium nitride based epitaxial stack 120 between the first position P1 and the second position P2 includes a region 1237 located within the gate trench 114, a region 1238 located on the first surface 111, and a region 1239 located within the drain trench 113. The total length of the two-dimensional electron gas channel between the drain 130 and the gate 140 is jointly determined by the length of the region 1237, the length of the region 1238, and the length of the region 1239, while the size occupied by the drain 130 and the gate 140 in the direction along the substrate plane is only the distance between the gate trench 114 and the drain trench 113, thus greatly solving the problem of difficult trade-off between the size and the withstand voltage of the device, repeatedly utilizing the space in the thickness direction of the substrate, and achieving the beneficial effect of obtaining a higher withstand voltage with a smaller occupied area. Furthermore, since the gallium nitride based epitaxial stack 120 is usually obtained by an epitaxial growth process, the portion grown within the drain trench 113 will be affected by the stress from the substrate 110, especially at the position of the sidewall of the drain trench 113, and this stress effect is often difficult to ignore. In the present variant, the distance between the gate trench 114 and the drain trench 113 is small when the length of the region 1238 is small, thus facilitating the release of the stress of the substrate material between the gate trench 114 and the drain trench 113, so that the portion of the gallium nitride based epitaxial stack 120 forming the region 1237 and the portion forming the region 1239 can have a higher growth quality, which is ultimately beneficial to improving the overall performance of the device.

[0089] As an optional implementation, the depth of the gate trench 114 is equal to the depth of the drain trench 113. Thus, the gate trench 114 and the drain trench 113 can be formed in the same etching process.

[0090] Preferably, the depth of the gate trench 114 and the depth of the drain trench 113 are, for example, both in the range of 0.5 μm to 1 μm; and the line width of the gate trench 114 and the line width of the drain trench 113 are, for example, both in the range of 0.5 μm to 1 μm.

[0091] Please refer to Figure 15 , the gallium nitride based high electron mobility transistor can further comprise: a gate dielectric layer 170 formed within the gate trench 114; and the gate 140 formed on the gate dielectric layer 170. In order for each electrode to be conductively led out, the dielectric layer 160 can have openings respectively exposing the drain 130, the gate 140, and the source 150.

[0092] On this basis, the application further provides a preparation method of a gallium nitride-based high electron mobility transistor, please refer to Figure 2 , the method comprises:

[0093] Step 201, providing a substrate 110, the substrate 110 comprises a first surface 111 and a second surface 112 opposite to each other in the thickness direction;

[0094] Step 202, forming a drain trench 113 extending from the first surface 111 to the inside of the substrate 110 on the substrate 110;

[0095] Step 203, forming a gallium nitride-based epitaxial layer 120 on the first surface 111 and the inner surface 1130 of the drain trench 113, at least part of the gallium nitride-based epitaxial layer 120 is used to form a two-dimensional electron gas channel;

[0096] Step 204, forming a drain 130 and a gate 140, wherein the drain 130 is formed in the drain trench 113 and located on the first position P1 of the gallium nitride-based epitaxial layer 120, and the gate 140 is formed on the second position P2 of the gallium nitride-based epitaxial layer 120;

[0097] The two-dimensional electron gas channel formed by the part of the gallium nitride-based epitaxial layer 120 between the first position P1 and the second position P2 has a component along the thickness direction.

[0098] Next, combined with the cross-sectional structure schematic diagram of the gallium nitride-based high electron mobility transistor in the preparation process shown in Figures 3 to 9 , the preparation method of the gallium nitride-based high electron mobility transistor provided by the application is further described in detail.

[0099] First, please refer to Figure 3 . Step 201 is performed to provide a substrate 110, the substrate 110 comprises a first surface 111 and a second surface 112 opposite to each other in the thickness direction. The material of the substrate 110 can be any suitable material known to those skilled in the art, such as silicon (Si) substrate, gallium nitride (GaN) substrate, silicon carbide (SiC) substrate or sapphire substrate, etc.

[0100] Next, please refer to Figure 4The step 202 is performed to form the drain trench 113 extending from the first surface 111 to the inside of the substrate 110. Specifically, a patterned mask layer (not shown in the figure) can be formed on the first surface 111 of the substrate 110; the patterned mask layer can be formed by steps in a photolithography process such as coating, exposure, development, etc. Then, the substrate 110 is etched using the patterned mask layer; the etching process can be a wet etching process or a dry etching process according to actual needs. The etching depth is less than the thickness of the substrate 110, and the drain trench 113 does not expose the second surface 112 of the substrate 110. The mask layer is removed after the etching to form the drain trench 113.

[0101] Optionally, the step of forming the drain trench 113 extending from the first surface 111 to the inside of the substrate 110 includes at least one of the following:

[0102] forming the drain trench 113 with at least part of the sidewall extending in the thickness direction;

[0103] forming the drain trench 113 as follows: in the direction from the first surface 111 to the second surface 112, at least part of the sidewall of the drain trench 113 is inclined away from the center of the trench;

[0104] forming the drain trench 113 as follows: in the direction from the first surface 111 to the second surface 112, at least part of the sidewall of the drain trench 113 is inclined towards the center of the trench.

[0105] Here, the drain trench 113 can refer to the drain trench 113 described in the above-mentioned various modified embodiments, and thus will not be described again.

[0106] In addition, corresponding to the fifth modified embodiment, the method further includes: forming a gate trench 114 extending from the first surface 111 to the inside of the substrate 110 on the substrate 110. The gate trench 114 and the drain trench 113 can be formed in the same etching process or separately; the etching conditions of the gate trench 114 can be the same as or different from the etching conditions of the drain trench 113.

[0107] Next, refer to Figure 5 and Figure 6 The step 203 is performed to form a gallium nitride-based epitaxial layer 120 on the first surface 111 and the inner surface 1130 of the drain trench 113.

[0108] Specifically, first refer to Figure 5 to form a channel layer 121 on the first surface 111 and the inner surface 1130 of the drain trench 113. Then, refer to Figure 6A barrier layer 122 is formed on the channel layer 121. Thus, a two-dimensional electron gas channel 123 is formed in at least a portion of the channel layer 121 near the barrier layer 122.

[0109] The material of the channel layer 121 can include gallium nitride. Further, the channel layer 121 can be a non-doped material layer (e.g., a non-doped gallium nitride layer), such that at least a portion of the channel layer 121 under the two-dimensional electron gas exhibits a high resistance. The material of the barrier layer 122 can include aluminum gallium nitride (AlGaN). Further, the material of the barrier layer 122 can be an undoped material (e.g., an undoped aluminum gallium nitride layer); or, the barrier layer 122 can also be an N-doped material layer (e.g., an N-type doped aluminum gallium nitride layer), so as to facilitate inducing a higher density of the two-dimensional electron gas.

[0110] Further, before forming the channel layer 121, the method can further include forming a transition layer and / or a buffer layer (not shown in the figures) on the substrate 110. The transition layer is, for example, a gallium nitride transition layer, an aluminum gallium nitride transition layer, and in some specific examples, an aluminum nitride (AIN) transition layer, or a multi-layered structure. By providing the transition layer, on the one hand, the lattice mismatch between the substrate 110 and the channel layer 121 epitaxially grown thereon can be reduced, and the crystal quality of the channel layer 121 can be improved; on the other hand, the transition layer can also serve as a high-resistance layer to reduce device leakage and the like. The buffer layer is, for example, a gallium nitride buffer layer. The channel layer 121 and the barrier layer 122 can be sequentially stacked on the buffer layer. Further, in specific examples including the steps of forming the transition layer and the buffer layer, the buffer layer is formed on the transition layer. The transition layer and the buffer layer are collectively used to release interface stress, reduce defect density, improve the film quality of the subsequent active layers such as the channel layer 121 and the barrier layer 122, and reduce the static current leakage of the device, thereby improving the performance of the device.

[0111] It is easy to understand that, corresponding to the fifth variant embodiment, the step of forming the gallium nitride-based epitaxial stack 120 includes: forming the gallium nitride-based epitaxial stack 120 on the first surface 111, on the inner surface of the gate trench 114, and on the inner surface of the drain trench 113.

[0112] Next, please refer to Figure 7 The drain 130 is formed; wherein the drain 130 is formed in the drain trench 113 and located at the first position P1 of the gallium nitride-based epitaxial stack 120.

[0113] Optionally, the first position P1 is located at the bottom end of the drain trench 113.

[0114] Further, the method should further include the step of forming the source 150. The drain 130 and the source 150 are connected to the gallium nitride-based epitaxial stack 120, respectively, thereby being electrically connected to the two-dimensional electron gas channel 123.

[0115] Next, refer to Figure 8 . The dielectric layer 160 is formed; wherein the dielectric layer 160 can be formed on the first surface 111, especially covering the surface of the gallium nitride based epitaxial stack 120 away from the substrate 110. The dielectric layer 160 can also fill in the drain trench 113. The material of the dielectric layer 160 can be selected from the commonly used insulating dielectric materials in the art.

[0116] Next, refer to Figure 9 . The gate 140 is formed, wherein the gate 140 is formed on the second position P2 of the gallium nitride based epitaxial stack 120.

[0117] Optionally, the second position P2 is on the first surface 111. Corresponding to the fifth variant embodiment, the second position P2 can also be in the gate trench 114.

[0118] It can be understood that the method can further comprise: forming a gate dielectric layer 170 on the second position P2 first; and then forming the gate 140 on the gate dielectric layer 170.

[0119] In a specific process, a part of the dielectric layer 160 can also be used to form the gate dielectric layer 170. In this regard, the embodiments of the present application do not make specific limitations.

[0120] For the case that any one of the drain 130, the gate 140, and the source 150 is completely covered by the dielectric layer 160, the method can further comprise: removing part of the dielectric layer 160 so that the drain 130, the gate 140, and the source 150 are exposed. In the subsequent process, the exposed surfaces of the drain 130, the gate 140, and the source 150 can be used for conductive connection.

[0121] The gallium nitride based high electron mobility transistor in the embodiments of the present application can be a normally-on device or a normally-off device.

[0122] It should be noted that the preparation method embodiments of the gallium nitride based high electron mobility transistor provided by the present application belong to the same concept as the gallium nitride based high electron mobility transistor embodiments; the technical features in the technical solutions recorded in each embodiment can be combined arbitrarily without conflict. However, it should be further noted that the combination of technical features of the gallium nitride based high electron mobility transistor provided by the embodiments of the present application can already solve the technical problems to be solved by the present application; thus, the gallium nitride based high electron mobility transistor provided by the embodiments of the present application can not be limited by the preparation method of the gallium nitride based high electron mobility transistor provided by the embodiments of the present application, and any gallium nitride based high electron mobility transistor prepared by a preparation method that can form the structure of the gallium nitride based high electron mobility transistor provided by the embodiments of the present application is within the scope of protection of the present application.

[0123] It should be understood that the above examples are exemplary and are not intended to limit the scope of the claims encompassing all possible embodiments. Various modifications and changes can be made thereto without departing from the scope of the present disclosure, which is set forth in the claims. Similarly, each of the individual features of the above examples can be combined with each other to form further embodiments of the present application, which can not be explicitly described. Therefore, the above examples merely express several embodiments of the present application, and do not limit the scope of the patent protection of the present application.

Claims

1. A gallium nitride-based high electron mobility transistor, characterized in that, include: The substrate includes a first surface and a second surface that are opposite to each other in the thickness direction; Drain trenches extend from the first surface of the substrate into the interior of the substrate; A gallium nitride-based epitaxial stack extends on the first surface of the substrate and on the inner surface of the drain trench, wherein at least a portion of the gallium nitride-based epitaxial stack is used to form a two-dimensional electron gas channel. The drain electrode is located within the drain trench and at a first position on the gallium nitride-based epitaxial stack. The gate is located at the second position of the gallium nitride-based epitaxial stack; The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack located between the first and second positions has a component along the thickness direction.

2. The gallium nitride-based high electron mobility transistor according to claim 1, characterized in that, The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack located between the first position and the second position includes at least: a region extending along the thickness direction, and / or a region extending at an acute angle to the thickness direction.

3. The gallium nitride-based high electron mobility transistor according to claim 1, characterized in that, The first position is located at the bottom end of the drain trench.

4. The gallium nitride-based high electron mobility transistor according to claim 1 or 3, characterized in that, The second position is located on the first surface.

5. The gallium nitride-based high electron mobility transistor according to claim 1 or 3, characterized in that, Also includes: A gate trench extends from the first surface of the substrate into the interior of the substrate; The gallium nitride-based epitaxial stack also extends on the inner surface of the gate trench; The second position is located within the gate trench.

6. A method for fabricating a gallium nitride-based high electron mobility transistor, characterized in that, The method includes: A substrate is provided, the substrate including a first surface and a second surface opposite to each other in the thickness direction; A drain trench is formed on the substrate, extending from the first surface into the interior of the substrate; Gallium nitride-based epitaxial stacks are formed on the first surface and on the inner surface of the drain trench, wherein at least a portion of the gallium nitride-based epitaxial stacks are used to form two-dimensional electron gas channels. A drain and a gate are formed, wherein the drain is formed in the drain trench and located at a first position of the gallium nitride-based epitaxial stack, and the gate is formed at a second position of the gallium nitride-based epitaxial stack; The two-dimensional electron gas channel formed by the portion of the gallium nitride-based epitaxial stack located between the first and second positions has a component along the thickness direction.

7. The method for fabricating a gallium nitride-based high electron mobility transistor according to claim 6, characterized in that, The formation of a drain trench on the substrate extending from the first surface to the interior of the substrate includes at least one of the following: A drain trench is formed, with at least a portion of its sidewalls extending along the thickness direction; A drain trench is formed such that, in the direction from the first surface to the second surface, at least a portion of the sidewalls of the drain trench are inclined in a direction away from the center of the drain trench. A drain trench is formed such that, in the direction from the first surface to the second surface, at least a portion of the sidewalls of the drain trench are inclined toward the center of the drain trench.

8. The method for fabricating a gallium nitride-based high electron mobility transistor according to claim 6, characterized in that, The first position is located at the bottom end of the drain trench.

9. The method for fabricating a gallium nitride-based high electron mobility transistor according to claim 6 or 8, characterized in that, The second position is located on the first surface.

10. The method for fabricating a gallium nitride-based high electron mobility transistor according to claim 6 or 8, characterized in that, Before forming the gallium nitride-based epitaxial stack, the method further includes: forming a gate trench on the substrate extending from the first surface to the interior of the substrate; The formation of the gallium nitride-based epitaxial stack includes: forming the gallium nitride-based epitaxial stack on the first surface, the inner surface of the gate trench, and the inner surface of the drain trench. The second position is located within the gate trench.

Images