Power module integrating coupled damping coil and silicon carbide MOSFET chip

Abstract

This invention provides a power module integrating a coupling damping coil and a silicon carbide MOSFET chip. The power module includes a second copper layer, an insulating layer, and a first copper layer arranged sequentially from top to bottom in the height direction. A groove is formed on the insulating layer, and the coil is accommodated in the groove. The height of the annular structure is less than the height of the groove, and an insulating material is disposed between the coil and the second copper layer. The power module also includes a first resistor and a first capacitor. The coil, the first resistor, and the first capacitor are connected in series in a first circuit. A first silicon carbide MOSFET chip, a second silicon carbide MOSFET chip, and a second capacitor are disposed on the second copper layer. The first silicon carbide MOSFET chip has a first gate, a first source, and a first drain. The second silicon carbide MOSFET chip has a second gate, a second source, and a second drain. The first source and the second drain are electrically connected, and the second capacitor is electrically connected between the first drain and the second source.

Description

Technical Field

[0001] This invention belongs to the field of power electronic device technology and relates to a SiC MOSFET power module with integrated coupling damping coil. Background Technology

[0002] Wide-bandgap semiconductor power devices, represented by silicon carbide (SiC) MOSFETs, have injected strong vitality into the development of power electronics technology. Compared with traditional silicon-based devices, SiC MOSFETs have gradually replaced SiIGBTs and are widely used in electric traction, photovoltaic power generation, smart grids, and other fields due to their advantages such as high-frequency switching, high-temperature operation, and low loss. However, due to the high-frequency characteristics of SiC devices, their small junction capacitance, low gate charge, and fast switching speed, the voltage and current change rates during switching are extremely high. Parasitic inductance under extremely large di / dt conditions easily leads to voltage overshoot and oscillation phenomena, which are inherent from the initial device design stage. Furthermore, severe switching oscillations increase additional power losses, exacerbate electromagnetic interference in the system, and may even cause false triggering of the device, thus damaging it. Therefore, the mainstream application of SiC MOSFETs in power electronics still faces significant challenges. To fully utilize the advantages of SiC MOSFETs' extremely fast switching speed and low loss, it is essential to deeply study the mechanism of SiC MOSFET switching oscillations and find suitable methods to suppress them.

[0003] Methods to suppress switching oscillations in silicon carbide MOSFETs mainly include: optimizing printed circuit board (PCB) layout and device packaging, increasing the gate resistance Rg, active gate drive (AGD) technology, and adding external buffer circuits. Increasing Rg can suppress electromagnetic interference to some extent, but it often significantly increases the device's turn-on and turn-off times, thereby increasing switching losses and negating the high-speed switching advantage of SiC MOSFETs. AGD can reduce oscillations by adjusting the device's dv / dt and di / dt, and can effectively improve switching speed and reduce switching losses, but it increases the design difficulty and cost of the drive circuit, making implementation difficult. According to existing research, external buffer circuits added to the primary side mainly include ferrite beads, DC-side RC and C-RC buffers, and decoupling capacitors Cdec. Inserting a primary-side buffer circuit into the main circuit can lead to a temperature rise due to losses caused by switching transients and ringing, thus posing certain reliability issues. Summary of the Invention

[0004] The problem this invention aims to solve is that existing technologies for suppressing switching oscillations of silicon carbide MOSFETs increase switching losses or drive circuit complexity. The invention provides a power module that integrates a coupling damping coil and a silicon carbide MOSFET chip.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a power module integrating a coupling damping coil and a silicon carbide MOSFET chip, wherein the power module includes a second copper layer, an insulating layer, and a first copper layer arranged sequentially from top to bottom in the height direction;

[0006] The insulating layer has a groove facing the second copper layer, and the groove accommodates a coil forming a ring structure. The height direction of the power module is perpendicular to the coil plane of the coil.

[0007] The height of the annular structure is less than the height of the groove, and an insulating material is provided between the coil and the second copper layer, with the insulating material covering the coil;

[0008] The two connecting ends of the coil extend from the groove, and the coil is located in the first circuit.

[0009] In one embodiment, the first circuit is a resonant circuit (or inductively coupled damping circuit) consisting of a coil and a first resistor connected in series, that is, the two connection terminals of the coil are respectively electrically connected to the two ends of the first resistor; or

[0010] In another embodiment, the first circuit is a resonant circuit (or inductively coupled damping circuit) consisting of a coil, a first resistor, and a first capacitor connected in series, that is, the two connection terminals of the coil are electrically connected to one end of the first resistor and one end of the first capacitor, respectively.

[0011] A first silicon carbide MOSFET chip, a second silicon carbide MOSFET chip, and a second capacitor are disposed on the second copper layer. The first silicon carbide MOSFET chip has a first gate, a first source, and a first drain. The second silicon carbide MOSFET chip has a second gate, a second source, and a second drain.

[0012] The first source is electrically connected to the second drain, and the second capacitor is electrically connected between the first drain and the second source.

[0013] In this invention, the first silicon carbide MOSFET chip, the second silicon carbide MOSFET chip, and the second capacitor are located in the power circuit (i.e., the primary side). The coupling damping circuit formed by the coil, the first resistor, and the first inductor constitutes the secondary side. The coil on the secondary side (considered as an inductor) and the entire primary side (also considered as an inductor) are magnetically coupled, thus forming a certain mutual inductance between them. This increases the damping coefficient of the primary side, playing a role in oscillation suppression and effectively suppressing the switching oscillation of the power circuit. Since the coil is arranged in a groove in the insulating layer facing the second copper layer, and the silicon carbide MOSFET chip is arranged in the second copper layer, the oscillation suppression effect of the secondary side on the primary side is better. The first copper layer is the lower copper layer, and the second copper layer is the upper copper layer. In addition, in the prior art, the power circuit with a half-bridge structure composed of the first silicon carbide MOSFET chip, the second silicon carbide MOSFET chip, and the second capacitor is generally set in the PCB board, resulting in a large parasitic inductance. In this solution, the power circuit consisting of the first silicon carbide MOSFET chip, the second silicon carbide MOSFET chip, and the second capacitor is integrated into the power module, thereby optimizing the layout, reducing parasitic inductance, and also reducing switching oscillation. In this invention, the coupling damping coil refers to the first circuit formed by the coil and the first resistor, or the coil, the first resistor, and the first capacitor, being magnetically coupled to the primary side, increasing the damping coefficient of the primary side and playing a role in oscillation suppression.

[0014] In the above technical solution, the groove is U-shaped, and the portion of the insulating layer located inside the groove forms a protrusion, with the coil wound around the protrusion;

[0015] The portion of the insulating layer located outside the groove and the protrusions have the same height;

[0016] The second copper layer is supported by the portion of the insulating layer located outside the groove and the protrusion.

[0017] In this invention, the above-described arrangement makes it easier to arrange the coil in the U-shaped groove.

[0018] In the above technical solution, the second copper layer includes a first copper-clad area, a second copper-clad area, and a third copper-clad area. There is a gap between any two copper-clad areas, and each copper-clad area is supported by a portion of the insulating layer outside the groove and the protrusion.

[0019] The first silicon carbide MOSFET chip and the second silicon carbide MOSFET chip are respectively fixed on the first copper-clad area and the second copper-clad area;

[0020] The first drain and the second drain are electrically connected to the first copper-clad area and the second copper-clad area, respectively.

[0021] The first source electrode is electrically connected to the second copper-clad region through an electrical connector that spans the gap between the first copper-clad region and the second copper-clad region, and the second source electrode is electrically connected to the third copper-clad region through an electrical connector that spans the gap between the second copper-clad region and the third copper-clad region.

[0022] The two electrical connection terminals of the second capacitor are respectively electrically connected to the first copper-clad area and the third copper-clad area.

[0023] In this invention, the second copper layer is divided into multiple regions through the above-described configuration, facilitating the arrangement and electrical connection of the two silicon carbide MOSFET chips. By setting the first copper-clad region, the second copper-clad region, and the third copper-clad region, copper-clad regions are correspondingly provided for the drain and source stages of the two silicon carbide MOSFET chips, thereby effectively reducing parasitic inductance and noise of the power module.

[0024] In the above technical solution, the first copper-clad area and the third copper-clad area are respectively electrically connected to a drain terminal and a source terminal, and both the drain terminal and the source terminal are protruding.

[0025] By setting drain and source terminals, it is easy to connect to the power supply and external DC bus capacitors.

[0026] In the above technical solution, the projection area of ​​the coil on the first plane overlaps with the projection area of ​​the first silicon carbide MOSFET chip on the first plane;

[0027] The projection area of ​​the coil on the first plane overlaps with the projection area of ​​the second silicon carbide MOSFET chip on the first plane; the height direction of the power module is perpendicular to the first plane.

[0028] The above settings allow the projections of the silicon carbide MOSFET chip and the coil to overlap, resulting in a closer distance between the silicon carbide MOSFET chip and the coil, thus improving the oscillation suppression effect of the secondary side on the primary side.

[0029] In the above technical solution, the material of the insulating layer is aluminum nitride ceramic or alumina ceramic.

[0030] In the above technical solution, the insulating material covers the groove opening, the insulating material and the insulating layer form an integral structure and are made of the same material, and the top surface of the insulating material structure is at the same height as the top surface of the insulating layer, thereby supporting the second copper layer.

[0031] With the above configuration, since the coil is made of copper, and copper has a higher thermal conductivity than the insulating material, embedding the coil into the insulating layer can improve its thermal conductivity.

[0032] In the above technical solution, the first drain and the second source are respectively electrically connected to the positive power supply terminal and the negative power supply terminal of the power supply.

[0033] The first gate and the first source are respectively connected to the two output terminals of the first driving circuit used to drive the first silicon carbide MOSFET chip to turn on / off;

[0034] The second gate and the second source are respectively connected to the two output terminals of the second driving circuit used to drive the second silicon carbide MOSFET chip to turn on / off.

[0035] In the above technical solution, the power module further includes a substrate solder layer, a substrate layer, and a chip layer containing the first silicon carbide MOSFET chip and the second silicon carbide MOSFET chip, a second copper layer, an insulating layer, a first copper layer, a substrate solder layer, and a substrate layer arranged sequentially from top to bottom along the height direction of the power module.

[0036] In the above technical solution, the first resistor is fixedly connected to the second copper layer or insulating layer; the first capacitor is fixedly connected to the second copper layer or insulating layer.

[0037] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention has an ingenious structure. On the one hand, by adjusting the overall layout of the module, the parasitic inductance of the module can be greatly reduced. On the other hand, since the module integrates a coil connected in series with a resistor and a capacitor at the terminal to form an inductive coupling damping circuit, it effectively suppresses the switching oscillation of the SiC MOSFET. Since the inductance formed by the coil in the coupling damping circuit is close to the power circuit, the coupling coefficient is high. Even without magnetic devices, a good suppression effect can be achieved, avoiding a series of problems such as magnetic saturation. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a three-dimensional structural schematic diagram of an embodiment of the present invention;

[0040] Figure 2 This is an embodiment of the present invention. Figure 1 Front view of the structural diagram;

[0041] Figure 3 This is an embodiment of the present invention. Figure 1 Top view of the structure;

[0042] Figure 4 This is an embodiment of the present invention. Figure 1 Left-view cross-sectional structural diagram;

[0043] Figure 5 This is a schematic diagram of the power circuit structure according to an embodiment of the present invention;

[0044] Figure 6 This is a schematic diagram of the coil structure according to an embodiment of the present invention;

[0045] Figure 7 This is a circuit connection diagram of the power circuit of the power module according to an embodiment of the present invention;

[0046] Figure 8(a) is a circuit diagram of an embodiment of the resonant circuit in the present invention, in which the first loop is composed of a coil and a first resistor connected in series.

[0047] Figure 8(b) is a circuit diagram of an embodiment of the resonant circuit in the present invention, in which the first loop is composed of a coil, a first resistor, and a first capacitor connected in series.

[0048] Figure 9 This is a schematic diagram illustrating the interaction between the primary and secondary sides in an embodiment of the present invention.

[0049] In the figure: 1. DBC substrate; 2. First copper layer; 3. Insulating layer; 31. Groove; 32. Protrusion; 4. Second copper layer; 5. First silicon carbide MOSFET chip, G1, first gate, S1, first source, D1, first drain; 6. Second silicon carbide MOSFET chip, G2, second gate, S2, second source, D2, second drain; 7. Coil; 8. Coil terminal; 9. First copper plating area; 10. Second copper plating area; 11. Bonding wire; 12. Third copper plating area; 13. Source terminal; 14. Drain terminal; R1, first resistor; C1, first capacitor; C2, second capacitor. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are one embodiment of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0051] In the description of this invention, it should be noted that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. It should also be noted that, unless otherwise explicitly specified and limited, the term "connection" should be interpreted broadly; for example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0052] The present invention provides a power module integrating a coupling damping coil and a silicon carbide MOSFET chip. The power module includes a second copper layer 4, an insulating layer 3, and a first copper layer 2 arranged sequentially from top to bottom in the height direction.

[0053] The insulating layer 3 has a groove 31 facing the second copper layer 4. The groove 31 accommodates a coil 7 forming a ring structure (which can be a square ring, a circular ring, or other ring structures). The height direction of the power module is perpendicular to the coil plane of the coil 7.

[0054] The height of the annular structure is less than the height of the groove 31, and an insulating material is provided between the coil 7 and the second copper layer 4.

[0055] The two connecting ends of the coil 7 extend from the groove 31, and the coil is electrically connected in the first circuit.

[0056] In one embodiment, the first circuit is a resonant circuit consisting of a coil 7 and a first resistor R1 connected in series, as shown in Figure 8(a).

[0057] In another embodiment, the first circuit is a resonant circuit consisting of coil 7, first resistor R1, and first capacitor C1 connected in series, as shown in Figure 8(b).

[0058] The first resistor R1 and the first capacitor C1 can be directly fixed on the second copper layer 2 or the insulating layer 3, or they can be fixed on a separate PCB board, and then the PCB board is fixedly connected to the coil terminal 8.

[0059] The second copper layer 4 is provided with a first silicon carbide MOSFET chip 5, a second silicon carbide MOSFET chip 6, and a second capacitor C2. The first silicon carbide MOSFET chip 5 has a first gate G1, a first source S1, and a first drain D1. The second silicon carbide MOSFET chip 6 has a second gate G2, a second source S2, and a second drain D2.

[0060] The first source electrode S1 is electrically connected to the second drain electrode D2, and a second capacitor C2 is electrically connected between the first drain electrode D1 and the second source electrode S2.

[0061] Figures 1-5 The structure of the second capacitor 2 is not shown in . A person skilled in the art can, for example, fix the second capacitor C2 on the second copper layer 4 (for example, fixed in the first copper-clad area 9 and / or the third copper-clad area 12), as long as the two connection ends of the second capacitor C2 are respectively electrically connected to the first drain electrode D1 and the second source electrode S2. For example, the two connection ends of the second capacitor C2 can be respectively connected to the first copper-clad area 9 and the third copper-clad area 12.

[0062] The groove 31 is in a zigzag shape, and a part of the insulating layer 3 located inside the groove 31 forms a protrusion 32, and the coil 7 is wound around the protrusion 32;

[0063] The part of the insulating layer 3 located outside the groove 31 and the protrusion 32 have the same height. There is an insulating material with the same height as the insulating layer on the top surface between the insulating layer and the second copper layer, so that the upper surface of the integrated structure formed by the insulating layer 3 and the insulating material is still a whole horizontal plane.

[0064] The second copper layer 4 is supported by the part of the insulating layer 3 located outside the groove 31 and the protrusion 32.

[0065] The second copper layer 4 includes a first copper-clad area 9, a second copper-clad area 10, and a third copper-clad area 12. There is a gap between any two copper-clad areas, and each copper-clad area is supported by the part of the insulating layer 3 outside the groove 31 and the protrusion 32. The first copper-clad area 9, the second copper-clad area 10, and the third copper-clad area 12 can be independent and spaced-apart copper-clad plates, or can be copper-clad areas spaced apart from each other on the same plate.

[0066] The first silicon carbide MOSFET chip 5 and the second silicon carbide MOSFET chip 6 are respectively fixed on the first copper-clad area 9 and the second copper-clad area 10.

[0067] The first drain electrode D1 and the second drain electrode D2 are respectively electrically connected to the upper surface of the first copper-clad area 9 and the upper surface of the second copper-clad area 10.

[0068] The first source electrode S1 is electrically connected to the second copper-clad area 10 through an electrical connector that spans the gap between the first copper-clad area 9 and the second copper-clad area 10, and the second source electrode S2 is electrically connected to the third copper-clad area 12 through an electrical connector that spans the gap between the second copper-clad area 10 and the third copper-clad area 12;

[0069] The two electrical connection terminals of the second capacitor C2 are respectively electrically connected to the first copper-clad area 9 and the third copper-clad area 12.

[0070] The first copper-clad area 9 and the third copper-clad area 12 are respectively electrically connected to the drain terminal 14 and the source terminal 13, and both the drain terminal 14 and the source terminal 13 are protruding.

[0071] The projection area of ​​the coil 7 on the first plane overlaps with the projection area of ​​the first silicon carbide MOSFET chip 5 on the first plane.

[0072] The projection area of ​​the coil 7 on the first plane overlaps with the projection area of ​​the second silicon carbide MOSFET chip 6 on the first plane.

[0073] The insulating layer 3 is made of aluminum nitride ceramic or alumina ceramic.

[0074] The difference between the height of the coil 7 and the height of the groove 31 is in the range of 0.05mm-0.08mm.

[0075] The insulating material covers the opening of the groove 31, and the insulating material forms an integral structure with the insulating layer 3 and is made of the same material. This can be understood as the insulating material covering the opening (or leaving a certain opening for the coil's inlet and outlet wires), thereby forming a space inside the insulating layer 3 to accommodate the coil. Figures 1-7 Insulating materials are not shown, but those skilled in the art will understand how they are arranged.

[0076] The first drain D1 and the second source S2 are respectively electrically connected to the positive power supply terminal and the negative power supply terminal of the power supply Vdc.

[0077] The first gate G1 and the first source S1 are respectively connected to the first driving circuit (such as...) used to drive the first silicon carbide MOSFET chip 5 to turn on / off. Figure 7 , Figure 9 The two output terminals of Vdr1 are connected accordingly;

[0078] The second gate G2 and the second source S1 are respectively connected to the second driving circuit (such as...) used to drive the second silicon carbide MOSFET chip 6 to turn on / off. Figure 7 , Figure 9 The two output terminals of Vdr2 are connected accordingly.

[0079] The power module also includes a substrate solder layer, a substrate layer, a chip layer containing the first silicon carbide MOSFET chip 5 and the second silicon carbide MOSFET chip 6, a second copper layer 4, an insulating layer 3, a first copper layer 2, a substrate solder layer, and a substrate layer arranged sequentially from top to bottom in the height direction of the power module.

[0080] The following is a detailed description of this embodiment. Figure 1 As shown in Figure 8, a SiC MOSFET power module structure with an integrated coupling damping coil includes a DBC substrate 1, a silicon carbide MOSFET chip, a coil 7, a drain terminal 14, a source terminal 13, a gate, and a coil terminal 8. The DBC substrate includes a first copper layer 2, a second copper layer 4, and an insulating layer 3. The insulating layer 3 is located between the two copper layers and can be made of aluminum nitride ceramic or alumina ceramic. A receiving space (i.e., an annular groove) is formed inside the insulating layer to enclose the coil and fix the coil 7 in place.

[0081] Coil 7 (or coupling coil) is made of copper wire and embedded in the insulating layer 3 of the DBC substrate 1, spaced apart from the second copper layer 4 of the DBC substrate. The copper wire can be Litz wire, with a diameter between 0.25mm and 0.3mm, maintaining a certain gap with the second copper layer. Furthermore, the diameter of the copper wire is lower than the height of the annular groove 31. The two terminals of the coil (acting as an inductor) are connected to resistors and capacitors outside the groove, thus forming an inductively coupled damping circuit in series. The inductively coupled damping circuit can effectively suppress switching oscillations caused by the turn-on and turn-off of the silicon carbide MOSFET chip in the power circuit. The design of the inductively coupled damping circuit can utilize existing technologies, mainly relying on finding the peak characteristic impedance and analyzing the relationship between the peak impedance and the secondary side resistance (i.e., the second resistor R2). Based on the principle that "the oscillation suppression effect is best at the point of maximum characteristic impedance," the optimal value range of the second resistor R2 can be obtained.

[0082] Two silicon carbide MOSFET chips are connected in series through the second copper layer and bonding wires of the DBC substrate to form a power circuit.

[0083] This invention effectively suppresses SiC MOSFET switching oscillation by integrating a coil into the module and forming an inductively coupled damping circuit with a resistor and capacitor connected in series at the terminals.

[0084] The thickness of the groove 31 is less than the thickness of the insulating layer 3, and there is an insulating layer separating the bottom of the groove 31 from the first copper layer 2. The width of the groove 31 ( Figure 6 The width of the middle label is d The design can be arbitrary. In this embodiment, the thickness of the insulating layer can be 0.38 mm, and the thickness of the groove 31 is 0.05 mm less than the thickness of the insulating layer. The width of the groove 31 ( Figure 6 The Chinese logo is d The width of groove 31 can vary with the number of turns of the wound coil to achieve better coupling with the power circuit.

[0085] like Figure 1 , Figure 3 and Figure 5As shown, the first silicon carbide MOSFET chip 5 and the second silicon carbide MOSFET chip 6 are disposed on the second copper layer 4 of the DBC substrate 1. The two silicon carbide MOSFET chips are connected through the second copper layer 4 of the DBC substrate 1 and the bonding wire 11 to form a power circuit, as shown. Figure 7 The circuit schematic is shown. The upper surface of the first silicon carbide MOSFET chip 5 has a first gate G1 and a first source S1, and the lower surface has a first drain D1. The upper surface of the second silicon carbide MOSFET chip has a second gate G2 and a second source S2, and the lower surface has a second drain D2. Both the first gate G1 and the second gate G2 can be connected to an external trigger circuit via bonding wires or solder terminals to control the chip's on / off state. The first drain D1 and the second drain D2 can be soldered to their corresponding copper areas. Since the first drain D1 and the second drain D2 are located on the lower surface of the corresponding silicon carbide MOSFET chip, therefore... Figures 1-6 The first drain level D1 and the second drain level D2 are not shown in the diagram.

[0086] The second copper layer 4 of the DBC substrate 1 includes a first copper-clad region 9 connected to the first drain stage D1, a second copper-clad region 10 connected to the second drain stage D2 and the first source stage S1, and a third copper-clad region 12 connected to the second source stage S2. The connection between the first source stage S1 and the second copper-clad region 10, and the connection between the second source stage S2 and the third copper-clad region 12, are both achieved by bonding wires 11.

[0087] In this embodiment, as Figure 1 , Figure 5 As shown, in order to facilitate the connection of the power circuit with other electronic devices and realize the application of the module in the actual circuit, the drain terminal 14 and the source terminal 13 are respectively soldered in the first copper area 9 connected to the first drain stage D1 and the third copper area 12 connected to the second source stage S2, which can be connected to the external circuit through the terminals.

[0088] This invention provides a SiC MOSFET power module with an integrated coupling damping coil. This module optimizes the layout to reduce parasitic inductance while further reducing SiC MOSFET switching oscillations through an inductively coupled damping circuit, maximizing the high-speed switching performance of the SiC MOSFET. Because the coil is close to the power circuit, the coupling coefficient is high, achieving excellent suppression even without magnetic components. This avoids problems such as magnetic saturation and avoids additional parasitic inductance caused by separately packaging the inductively coupled damping circuit.

[0089] like Figure 9As shown, the first resistor R1, the first capacitor C1, and the first inductor L1 (i.e., composed of coil 7) form the first loop, which is an inductively coupled damping circuit. The power loop includes a first silicon carbide MOSFET chip, a second silicon carbide MOSFET chip, and a second capacitor C2. In the figure, L2 is considered as the equivalent inductance of the entire power loop and is coupled to the first inductor L1 in the first loop. RL load The load inductance applied by the external circuitry. For the first silicon carbide MOSFET chip: R G1 L is the driving resistance between the driving circuit Vdr1 and the first gate D1. G1 L D1 L S1 For the equivalent parasitic inductance at the corresponding location, C GD1 C GS1 C DS1 R is the equivalent parasitic capacitance at the corresponding location. g1 This represents the gate resistance at the corresponding location. Similarly, the corresponding parasitic inductance / capacitance and drive / gate resistance of the second silicon carbide MOSFET chip can be understood.

[0090] according to Figure 9 The first inductor L1 in the first loop of the secondary side is coupled to the equivalent inductor L2 in the power loop of the primary side. Based on the first resistor R1 and the first capacitor C1 connected in series on the secondary side, the mapped impedance of the secondary side circuit as seen from the primary side is derived, thus obtaining the characteristic equation of the system when the inductively coupled damped circuit is an RLC resonant cavity, thereby increasing the order of the system transfer function. By adjusting the parameters of the secondary side circuit devices, the system is in an overdamped state, suppressing the switching oscillation of the silicon carbide MOSFET chip. According to the requirement of the damping coefficient (e.g., damping coefficient > 0.4), the parameters of the secondary side circuit devices can be determined, and this determination method is existing technology.

[0091] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0092] The embodiments of the present invention have been described in detail above, but the content described is only a preferred embodiment of the present invention and should not be considered as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should still fall within the scope of this patent. After reading this invention, any modifications of the present invention in various equivalent forms by those skilled in the art fall within the scope defined by the appended claims. Unless otherwise specified, the embodiments and features in the embodiments of the present invention can be combined with each other.

Claims

1. A power module integrating a coupling damping coil and a silicon carbide MOSFET chip, the power module comprising a second copper layer (4), an insulating layer (3), and a first copper layer (2) arranged sequentially from top to bottom in the height direction; Its characteristics are: The insulating layer (3) has a groove (31) facing the second copper layer (4), and the groove (31) contains a coil (7) forming a ring structure. The height direction of the power module is perpendicular to the coil plane of the coil (7). The height of the annular structure is less than the height of the groove (31), and an insulating material is provided between the coil (7) and the second copper layer (4), and the insulating material covers the coil (7); The two connecting ends of the coil (7) extend from the groove (31), and the coil (7) is located in the first circuit; The first circuit is a resonant circuit consisting of a coil (7) and a first resistor (R1) connected in series, or the first circuit is a resonant circuit consisting of a coil (7), a first resistor (R1), and a first capacitor (C1) connected in series. The second copper layer (4) is provided with a first silicon carbide MOSFET chip (5), a second silicon carbide MOSFET chip (6), and a second capacitor (C2). The first silicon carbide MOSFET chip (5) has a first gate (G1), a first source (S1), and a first drain (D1). The second silicon carbide MOSFET chip (6) has a second gate (G2), a second source (S2), and a second drain (D2). The first source (S1) is electrically connected to the second drain (D2), and the second capacitor (C2) is electrically connected between the first drain (D1) and the second source (S2). The portion of the insulating layer (3) located inside the groove (31) forms a protrusion (32). The second copper layer (4) includes a first copper-clad area (9), a second copper-clad area (10), and a third copper-clad area (12). There is a gap between any two copper-clad areas. Each copper-clad area is supported by a portion of the insulating layer (3) outside the groove (31) and the protrusion (32). The first silicon carbide MOSFET chip (5) and the second silicon carbide MOSFET chip (6) are respectively fixed on the first copper-clad area (9) and the second copper-clad area (10); The first drain (D1) and the second drain (D2) are electrically connected to the first copper-clad area (9) and the second copper-clad area (10), respectively. The first source electrode (S1) is electrically connected to the second copper-clad region (10) through an electrical connector that spans the gap between the first copper-clad region (9) and the second copper-clad region (10), and the second source electrode (S2) is electrically connected to the third copper-clad region (12) through an electrical connector that spans the gap between the second copper-clad region (10) and the third copper-clad region (12). The two electrical connection terminals of the second capacitor (C2) are respectively electrically connected to the first copper-clad area (9) and the third copper-clad area (12).

2. The power module according to claim 1, characterized in that: The groove (31) is in the shape of a back shape, and the protrusion (32) is around which the coil (7) is wound. The portion of the insulating layer (3) located outside the groove (31) and the protrusion (32) have the same height; The second copper layer (4) is supported by the portion of the insulating layer (3) located outside the groove (31) and the protrusion (32).

3. The power module according to claim 1, characterized in that: The first copper-clad area (9) and the third copper-clad area (12) are respectively electrically connected to the drain terminal (14) and the source terminal (13), and the drain terminal (14) and the source terminal (13) are both protruding.

4. The power module according to any one of claims 1-3, characterized in that: The projection area of ​​the coil (7) on the first plane overlaps with the projection area of ​​the first silicon carbide MOSFET chip (5) on the first plane. The projection area of ​​the coil (7) on the first plane overlaps with the projection area of ​​the second silicon carbide MOSFET chip (6) on the first plane; the height direction of the power module is perpendicular to the first plane.

5. The power module according to any one of claims 1-3, characterized in that: The insulating layer (3) is made of aluminum nitride ceramic or aluminum oxide ceramic.

6. The power module according to any one of claims 1-3, characterized in that: The insulating material covers the opening of the groove (31). The insulating material and the insulating layer (3) form an integral structure and are made of the same material. The top surface of the insulating material structure is at the same height as the top surface of the insulating layer (3), thereby supporting the second copper layer (4).

7. The power module according to any one of claims 1-3, characterized in that: The first drain (D1) and the second source (S2) are electrically connected to the positive and negative power supply terminals of the power supply, respectively. The first gate (G1) and the first source (S1) are respectively connected to the two output terminals of the first driving circuit used to drive the first silicon carbide MOSFET chip (5) to turn on / off; The second gate (G2) and the second source (S1) are respectively connected to the two output terminals of the second driving circuit used to drive the second silicon carbide MOSFET chip (6) to turn on / off.

8. The power module according to any one of claims 1-3, characterized in that: The power module also includes a substrate solder layer, a substrate layer, a chip layer containing the first silicon carbide MOSFET chip (5) and the second silicon carbide MOSFET chip (6), a second copper layer (4), an insulating layer (3), a first copper layer (2), a substrate solder layer, and a substrate layer arranged sequentially from top to bottom in the height direction of the power module.

9. The power module according to any one of claims 1-3, characterized in that: The first resistor (R1) is fixedly connected to the second copper layer (2) or the insulating layer (3); the first capacitor (C1) is fixedly connected to the second copper layer (2) or the insulating layer (3).

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