Analog front-end terminal circuit with bandwidth extension and impedance matching function

Abstract

The application discloses a terminal circuit with bandwidth expansion and impedance matching functions, and belongs to the technical field of basic electronic circuits. In view of the defects in the prior art, the terminal circuit is designed by adopting a simplified three-stage asymmetric T-coil technology, and the terminal circuit comprises a first pad capacitor, a second pad capacitor, a first impedance matching module, a first bandwidth expansion module based on a three-stage asymmetric T-coil structure, a second impedance matching module, a second bandwidth expansion module based on the three-stage asymmetric T-coil structure, a first terminal resistor, a second terminal resistor and a load circuit. The terminal circuit can greatly enhance the bandwidth expansion capability, uses a small number of inductors and capacitors, has a good impedance matching effect, and realizes a great reduction of area overhead. Meanwhile, the application has high engineering applicability, is suitable for engineering product design, can be widely used in the design of a SerDes analog front end, can greatly improve the performance index of the analog front end, and simultaneously reduces comprehensive overhead.

Description

Technical Field

[0001] This invention relates to the design of bandwidth expansion and impedance matching in analog front-end circuits of analog integrated circuits, and particularly to an analog front-end circuit structure with high engineering applicability and small area overhead. Specifically, it discloses an analog front-end terminal circuit with bandwidth expansion and impedance matching functions, belonging to the technical field of basic electronic circuits. Background Technology

[0002] As device size decreases and semiconductor IC operating speeds increase, devices / transistors on ICs become increasingly susceptible to electrostatic discharge (ESD). High-speed I / O interfaces have reached speeds of tens or even hundreds of GHz, placing increasingly stringent demands on ESD protection networks. Interface capacitance is primarily contributed by the ESD protection network; a large voltage protection margin means that ESD parasitic capacitance cannot be designed too small. However, higher-level ESD protection networks can have a large number of ESD parasitic capacitances, which is very detrimental to interface bandwidth. Additionally, parasitic capacitances in pads, metal interconnects, and front-end circuitry all negatively impact circuit bandwidth. Furthermore, when the channel is connected to the receiver input, the analog front-end no longer maintains ideal matching. Signals from the channel can be reflected due to impedance mismatches in I / O interface pad capacitance, ESD diodes, and the input capacitance of the SerDes receiver front-end circuitry, leading to signal attenuation. Even if the chip package is designed with an ideal 50Ω transmission line, several hundred fF of on-chip capacitance can still prevent meeting return loss requirements in the Gb / s range. Using a T-coil circuit can provide ESD protection for these devices / transistors, and the inductance peaks of the two coupled inductors on both sides of the T-coil can reduce high-frequency signal loss caused by ESD diode capacitive load. Similarly, the T-coil can compensate for the bandwidth of other capacitors, thereby ensuring that the analog front-end continuous time linear equalization (CTLE) can perform good frequency compensation at the Nyquist frequency. However, a single-stage T-coil circuit cannot improve the bandwidth effect of multiple capacitors, so a multi-stage asymmetric T-coil structure is required. However, the multi-stage asymmetric T-coil structure achieves the purpose of bandwidth compensation for multiple capacitors at the cost of increasing the number of inductors. In addition, impedance matching networks can transmit signals to back-end circuits with maximum gain. During transmission, proper impedance matching is an important condition for ensuring smooth transmission. Therefore, impedance matching is also particularly important.

[0003] In summary, the present invention aims to provide an analog front-end termination circuit with bandwidth extension and impedance matching functions to overcome the above-mentioned defects. Summary of the Invention

[0004] The purpose of this invention is to address the capacitor C of the I / O interface pad. pad The capacitance C of the electrostatic discharge (ESD) diode esd The load capacitance C of the SerDes receiver CTLE circuit L To address the impact of analog front-end circuit bandwidth and impedance matching, this paper proposes an analog front-end terminal circuit with bandwidth expansion and impedance matching functions. The invention achieves the purpose of bandwidth expansion and impedance matching through a simplified three-stage asymmetric T-coil technology and a smaller number of capacitors and inductors, thus solving the technical problems of bandwidth attenuation and impedance mismatch caused by multiple capacitors in existing analog front-ends.

[0005] To achieve the above-mentioned objectives, the present invention employs the following technical solution:

[0006] An analog front-end terminating circuit with bandwidth expansion and impedance matching functions includes: a first pad capacitor, a second pad capacitor, a first impedance matching module, a second impedance matching module, a first bandwidth expansion module, a second bandwidth expansion module, a first terminating resistor, a second terminating resistor, and a load circuit. The positive plates of the first and second pad capacitors serve as input terminals of the analog front-end terminating circuit, connected to a negative and a positive input signal, respectively. The input terminal of the first impedance matching module is connected to the positive plate of the first pad capacitor, and the input terminal of the second impedance matching module is connected to the positive plate of the second pad capacitor. The output terminal of the first impedance matching module is connected to the first input terminal of the first bandwidth expansion module, and the output terminal of the second impedance matching module is connected to the first input terminal of the second bandwidth expansion module. The output terminals of the first and second bandwidth expansion modules are connected to the input terminals of the load circuit. The first terminal of the first terminating resistor is connected to the second input terminal of the first bandwidth expansion module, the first terminal of the second terminating resistor is connected to the second input terminal of the second bandwidth expansion module, and the second terminal of the first terminating resistor is connected to the second terminal of the second terminating resistor. The input terminal of the load circuit is connected to the output terminal of the bandwidth extension circuit, the output terminal of the load resistor is grounded, and a common-mode feedback voltage signal is output to the connection point of the first terminating resistor and the second terminating resistor.

[0007] Furthermore, the first and second pad capacitors are identical, both being capacitors of the same capacitance value. The positive terminal of the pad capacitor is connected to the input signal, while the negative terminal is grounded.

[0008] Furthermore, the first impedance matching module and the second impedance matching module are the same, both consisting of a matching inductor and a matching capacitor; wherein, the first end of the matching inductor is connected to the signal input terminal, and the second end of the matching inductor is connected to the first input terminal of the bandwidth extension circuit; the positive plate of the matching capacitor is connected to the second end of the matching inductor, and the negative plate of the matching capacitor is grounded.

[0009] Furthermore, the first bandwidth expansion module and the second bandwidth expansion module are identical, both including three cascaded asymmetric T-coil structures. Each of the three cascaded asymmetric T-coil structures can be equivalently represented by an equivalent circuit consisting of a first coupled inductor, a second coupled inductor, a first diode, a second diode, and a first extended inductor. Specifically, the first terminal of the first coupled inductor is connected to the output terminal of the impedance matching circuit, and the second terminal of the first coupled inductor is connected to the first terminal of the second coupled inductor. The second terminal of the second coupled inductor is connected to the first terminal of the first extended inductor. The cathode of the first diode is connected to the signal power supply terminal, and the anode of the first diode is connected to the second terminal of the first coupled inductor. The cathode of the second diode is connected to the second terminal of the first coupled inductor, and the anode of the second diode is grounded. The first terminal of the first extended inductor is connected to the second terminal of the second coupled inductor, and the second terminal of the first extended inductor is connected to the first terminal of the terminating resistor.

[0010] Furthermore, the first terminating resistor and the second terminating resistor are identical, both being resistors of the same resistance value. Specifically, the first terminal of the terminating resistor is connected to the second input terminal of the extended inductor, and the second terminal of the terminating resistor is connected to the common-mode feedback voltage signal from the load circuit.

[0011] Furthermore, the load circuit is connected to the second terminal of the extended inductor.

[0012] The present invention, employing the above technical solution, has the following beneficial effects: The present invention uses a simplified three-level asymmetric T-coil structure design for the bandwidth extension module, and in the I / O interface pad capacitor C pad An impedance matching module is introduced between the bandwidth expansion module and the analog front-end circuit. This compensates for the bandwidth of the multi-capacitor circuit while simultaneously achieving impedance matching. Compared to multi-stage asymmetric T-coil analog front-end circuits, the terminating circuit proposed in this invention significantly reduces the number of inductors and capacitors, offering technical advantages such as better bandwidth expansion, superior impedance matching, and reduced analog front-end area overhead. Furthermore, this invention has high engineering applicability and is suitable for engineering product design. It can be widely used in the design of SerDes analog front-ends, greatly improving their performance while reducing overall overhead. Attached Figure Description

[0013] Figure 1 This is a circuit structure diagram of the analog front-end bandwidth expansion and impedance matching proposed in this invention.

[0014] Figure 2 This is a standard T-coil circuit diagram.

[0015] Figure 3 This is the circuit structure diagram of a three-stage asymmetric T-coil.

[0016] Figure 4This is a simplified circuit diagram of the three-stage asymmetric T-coil in this invention.

[0017] Figure 5 This is a circuit diagram of the bandwidth extension and impedance matching of the present invention.

[0018] Explanation of the labels in the diagram: C pad1 For the first pad capacitor, C pad2 For the second pad capacitor, IM1 is the first impedance matching module, IM2 is the second impedance matching module, BE1 is the first bandwidth extension module, BE2 is the second bandwidth extension module, and R... D1 R is the first terminating resistor. D2 The second terminating resistor is CTLE, which is the load circuit, and L is... R1 L R2 For the first and second matching inductors, C R1 C R2 L1 is the first and second matching capacitor, L2 is the first coupling inductor, L1 is the second coupling inductor, DP1 is the first diode, DN1 is the second diode, and L... t1 L3 is the first extension inductor, L4 is the third coupling inductor, L5 is the fourth coupling inductor, DP2 is the third diode, DN2 is the fourth diode, and L6 is the fourth coupling inductor. t2 This is the second extended inductor. Detailed Implementation

[0019] The present invention will now be described in further detail with reference to the accompanying drawings.

[0020] This invention discloses an analog front-end terminating circuit with bandwidth extension and impedance matching functions, such as... Figure 1 As shown, it includes: the first pad capacitor C pad1 Second pad capacitor C pad2 First impedance matching module IM1, second impedance matching module IM2, first bandwidth extension module BE1, second bandwidth extension module BE2, first terminating resistor R D1 Second terminating resistor R D2 and load circuit CTLE.

[0021] First pad capacitor C pad1 Second pad capacitor C pad2 The input terminals of the first impedance matching module IM1 and the second impedance matching module IM2 are respectively connected to the negative input signal RXN and the positive input signal RXP as differential input terminals of the analog front-end terminal circuit. The input terminals of the first impedance matching module IM1 and the second impedance matching module IM2 are respectively connected to the first pad capacitor C. pad1 Second pad capacitor C pad2 The positive plate, the first pad capacitor C pad1 Second pad capacitor C pad2The negative plate is grounded. The output terminal of the first impedance matching module IM1 is connected to the first input terminal of the first bandwidth expansion module BE1. The output terminal of the second impedance matching module IM2 is connected to the first input terminal of the second bandwidth expansion module BE2. The first input terminal of the first bandwidth expansion module BE1 is connected to the output terminal of the first impedance matching module IM1, and the first input terminal of the second bandwidth expansion module BE2 is connected to the output terminal of the second impedance matching module IM2. The second input terminal of the first bandwidth expansion circuit BE1 is connected to the first terminating resistor R. D1 One end of the second input terminal of the second bandwidth extension circuit BE2 is connected to the second terminating resistor R. D2 One end of the circuit, the output of the first bandwidth extension module BE1 and the output of the second bandwidth extension module BE2, are connected to the input of the load circuit CTLE. The first terminating resistor R... D1 The other end and the second terminating resistor R D2 The other end is connected. The input terminal of the load circuit CTLE is connected to the output terminals of the first bandwidth expansion circuit BE1 and the second bandwidth expansion circuit BE2, and the output terminal of the load circuit CTLE is grounded.

[0022] First pad capacitor C pad1 Second pad capacitor C pad2 They are all capacitors with the same parameter value. Specifically, the capacitor C of the first pad... pad1 The positive plate is connected to the negative input signal RXN, and the first pad capacitor C pad1 The negative plate is grounded. The first impedance matching module IM1 and the second impedance matching module IM2 are identical, both consisting of a matching inductor and a matching capacitor; wherein, the first matching inductor L... R1 The first terminal is connected to the negative polarity signal input terminal RXN, and the first matching inductor L R1 The second terminal is connected to the input terminal of the first bandwidth expansion module BE1; the first matching capacitor C R1 The positive plate and the first matching inductor L R1 The second terminal is connected to the first matching capacitor C. R1 The negative plate is grounded. The first bandwidth extension module BE1 and the second bandwidth extension module BE2 are identical. The first bandwidth extension module BE1 consists of a first coupling inductor L1, a second coupling inductor L2, a first diode DP1, a second diode DN1, and a first extension inductor L... t1 The configuration includes: a first terminal of the first coupling inductor L1 connected to the output terminal of the first impedance matching module IM1; a second terminal of the first coupling inductor L1 connected to the first terminal of the second coupling inductor L2; a first terminal of the second coupling inductor L2 connected to the second terminal of the first coupling inductor L1; and a second terminal of the second coupling inductor L2 connected to the first extended inductor L... t1The first terminal of the first coupling inductor L1 and the first terminal of the second coupling inductor L2 are connected, and are of the same name; the cathode of the first diode DP1 is connected to the signal power supply terminal, and the anode of the first diode DP1 is connected to the second terminal of the first coupling inductor L1; the cathode of the second diode DN1 is connected to the second terminal of the first coupling inductor L1, and the anode of the second diode DN1 is grounded; the first extended inductor L... t1 The first terminal is connected to the second terminal of the second coupled inductor L2, and the first extended inductor L... t1 The second terminal is connected to the first terminating resistor R D1 The first terminal is connected. The first terminating resistor R... D1 Second terminating resistor R D2 They are all resistors with the same resistance value. Specifically, the first terminating resistor R... D1 The first terminal and the first extended inductor L t1 The second end is connected to the first terminating resistor R. D1 The second terminal receives the common-mode feedback voltage from the load circuit. The input terminal of the load circuit CTLE is connected to the first extended inductor L. t1 The first terminal is connected. The circuit of the second impedance matching module IM2, which connects to the positive differential signal RXP, includes the second matching inductor L. R2 The second matching capacitor C R2 Its connection method is the same as that of the first impedance matching module IM1; the second bandwidth expansion module BE2 includes: a third coupling inductor L3, a fourth coupling inductor L4, a third diode DP2, a fourth diode DN2, and a second expansion inductor L... t2 Its connection method is the same as that of the first bandwidth expansion circuit BE1, which will not be described in detail here.

[0023] To address the aforementioned technical challenges, an asymmetric T-coil structure is adopted within the basic three-stage T-coil configuration. Furthermore, the three-stage T-coil is simplified and optimized to reduce circuit overhead. Additionally, for impedance matching, a series-parallel capacitor-inductor configuration is used to achieve good performance with minimal area.

[0024] The simulation front-end bandwidth expansion and impedance matching circuit specifically includes steps S1 to S6.

[0025] Step S1: Determine the basic circuit parameters based on the actual circuit. The analog front-end bandwidth extension and impedance matching circuit mainly consists of I / O interface pad capacitors C. pad The capacitance C of the electrostatic discharge (ESD) diode esd The load capacitance C of the SerDes receiver front-end circuit L To assemble and expand it, the first step is to determine the values ​​of these three capacitors and the setting of the terminating resistor.

[0026] Step S2: Architecture Selection. Based on the determination of the capacitor parameters above, it was found that a single-stage T-coil structure was not feasible. The number of T-coil stages was adjusted according to the number of capacitors, ultimately determining to use a three-stage T-coil structure. Based on the bandwidth expansion requirements of the actual circuit, an asymmetric T-coil structure was selected.

[0027] Step S3: Calculate parameters. Based on the I / O interface pad capacitance C in step S1. pad The parameters are determined by referring to the formula for the asymmetric T-coil structure, calculating and determining the parameters of the inductance, coupling coefficient, and bridge capacitance in the asymmetric T-coil. Based on the capacitance C of the ESD diode described in step S1... esd The parameters are determined by referring to the formula for the asymmetric T-coil structure, calculating the parameters of the inductance, coupling coefficient, and bridge capacitor in the asymmetric T-coil. Based on the load capacitance C of the SerDes receiver front-end circuit described in step S1... L The parameters are determined by referring to the formula for the asymmetric T-coil structure, and the parameters of the inductance, coupling coefficient and bridge capacitor in the asymmetric T-coil are calculated.

[0028] Step S4: Cascade the above three-stage asymmetric T-coil structure, using I / O interface pad capacitor C. pad The resulting asymmetric T-coil structure is placed in the first stage, with the capacitance C of the electrostatic discharge (ESD) diode. esd The resulting asymmetric T-coil structure is placed in the second stage, controlled by the load capacitance C of the SerDes receiver front-end circuit. L The resulting asymmetric T-coil structure is placed in the third stage. The first terminal of the first-stage asymmetric T-coil structure is connected to the input signal. The second terminal of the first-stage asymmetric T-coil structure is connected to the first terminal of the second-stage asymmetric T-coil structure. The second terminal of the second-stage asymmetric T-coil structure is connected to the first terminal of the third-stage asymmetric T-coil structure. The second terminal of the third-stage asymmetric T-coil structure is connected to the terminating resistor R. D The first terminal is connected, and the terminating resistor R is connected. D The second terminal is grounded. The complete three-stage T-coil structure is as follows: Figure 3 As shown, the circuit is then simplified by sharing inductors and capacitors. For the first-stage T-coil structure, the bridge capacitor C is ignored. B1 The inductance L due to the package / trace can be ignored. 1a For the second-stage T-coil structure, due to the inductance L... 2a and inductor L 1bSince there is no capacitor between them, there is no way to eliminate the effect of the capacitor; therefore, one inductor can be ignored, and a single inductor can be used for sharing. Similarly, for the third-stage T-coil structure, the inductor L... 3a and inductor L 2b One inductor can be ignored and a single inductor can be used for sharing. Bridge capacitor C B2 and C B3 Simplify and merge into a single-bridge capacitor C B The final bridge capacitor C B Discard directly. At this point, the simplification of the bandwidth extension section is complete. Based on the requirements of the actual circuit and the simulation results, the bandwidth is increased by appropriately adjusting the simplified inductor values. Ultimately, the bandwidth extension circuit serves as the core of the entire circuit. L1 and L2 act as the two coupled inductors of the asymmetric T-coil, and diodes DP and DN form an ESD network, providing ESD protection. The capacitance of the ESD network formed by diodes DP and DN is equal to the capacitance C of the electrostatic discharge ESD diode. esd Equivalent; Inductance L t Used to compensate for the bandwidth of the load circuit.

[0029] Step S5: Impedance matching. The impedance matching circuit is performed using an LC network and added to the bandwidth extension circuit. The simplified multi-stage asymmetric T-coil structure described above is connected via a series inductor L. R and parallel capacitor C R Bandwidth and impedance matching were optimized. The parameters of the inductor and capacitor were continuously adjusted based on simulation results. Finally, the complete circuit design for bandwidth extension and impedance matching was completed.

[0030] Step S6: Cascade the various circuits, including the bandwidth extension circuit and the impedance matching circuit, and expand them into a differential structure to form the final complete circuit.

[0031] Please refer to Figure 1 This invention provides an analog front-end termination circuit with bandwidth extension and impedance matching functions. Firstly, regarding the I / O interface pad capacitor C in the background art... pad The capacitance C of the electrostatic discharge (ESD) diode esd The load capacitance C of the SerDes receiver CTLE circuit L The impact of three types of capacitors on the bandwidth and impedance matching of the analog front-end circuit is investigated, and the parameters of each capacitor in the actual circuit design are obtained. For example... Figure 2As shown, the bandwidth extension method is mainly based on T-coil. Previous T-coil designs were widely used due to the advantages of symmetrical structures, such as ease of calculation and design. However, the asymmetric T-coil structure is an improvement on the symmetrical structure. Since L1 = L, L2 = bL, and M = mL, compared to the symmetrical T-coil structure, an additional variable b is added. This allows for bandwidth extension at the cost of higher design complexity, utilizing greater design freedom. Here, L represents the inductance of the asymmetric T-coil structure.

[0032]

[0033] Bridge capacitor C B It can be represented as:

[0034]

[0035] The coupling coefficient k is expressed as:

[0036]

[0037] The damping coefficient ζ is expressed as:

[0038]

[0039]

[0040] Because the asymmetric T-coil structure has an additional variable 'b', the parameters cannot be determined. Therefore, by introducing the variable 'β', and letting β = b / m, since... Then we can obtain another relationship between the mutual inductance coefficients m and β:

[0041]

[0042] It's important to note here that β, m, and b are all positive numbers. Based on the above formula, the parameters of the asymmetric T-coil structure can be calculated from the given conditions. For the I / O interface pad capacitor C... pad The capacitance C of the electrostatic discharge (ESD) diode esd The load capacitance C of the SerDes receiver front-end circuit L The impact of this necessitates consideration of using a three-level asymmetric T-coil structure, such as... Figure 3 As shown. Therefore, the inductance, coupling coefficient, and bridge capacitor parameters of the asymmetric T-coil structure corresponding to each capacitor are calculated, based on the I / O interface pad capacitor C. pad The resulting asymmetric T-coil structure is placed in the first stage, and the capacitance C of the electrostatic discharge (ESD) diode is used. esd The resulting asymmetric T-coil structure is placed in the second stage, controlled by the load capacitance C of the SerDes receiver front-end circuit.L The resulting asymmetric T-coil structure is placed in the third stage. The first terminal of the first-stage asymmetric T-coil structure is connected to the input signal; the second terminal of the first-stage asymmetric T-coil structure is connected to the first terminal of the second-stage asymmetric T-coil structure; the second terminal of the second-stage asymmetric T-coil structure is connected to the first terminal of the third-stage asymmetric T-coil structure; and the second terminal of the third-stage asymmetric T-coil structure is connected to the terminating resistor R. D The first terminal is connected, and the terminating resistor R is connected. D The second terminal is grounded, thus forming a complete three-stage asymmetric T-coil structure.

[0043] The three-stage asymmetric T-coil structure can effectively solve the bandwidth attenuation and impedance mismatch problems caused by multiple capacitors. First, according to Figure 2 The three asymmetric T-coil circuits in the structural design are cascaded in sequence, with terminating resistor R. D The complete circuit placed at the second end of the third-stage asymmetric T-coil is as follows: Figure 3 As shown. For the first-stage T-coil structure, because the parasitic capacitance between the two coils usually meets the requirement C. B =C L / 8, Bridge capacitor C B1 The inductance L can be ignored due to the presence of package / trace inductance. 1a For the second-stage T-coil structure, due to the inductance L... 2a and inductor L 1b Since there is no capacitor between them, there is no way to eliminate the effect of capacitance, and an inductor can be used to share it. Similarly, for the third-stage T-coil structure, the inductor L... 3a and inductor L 2b Shared using a single inductor. Bridge capacitor C B2 and C B3 Simplify and merge into a single-bridge capacitor C B Because the capacitance of a bridge capacitor with a T-coil structure is inherently small, and the parasitic capacitance of the actual inductor is fully considered, the bridge capacitor C... B Discard directly. The final simplified three-level asymmetric T-coil structure is as follows: Figure 4 As shown.

[0044] Impedance matching is primarily achieved by adjusting the load impedance through series and parallel connections of capacitors, inductors, and the load to match the source impedance and load impedance. The source impedance is Z. S Load impedance Z L When the impedances of the two components are conjugate, the power absorbed by the circuit from the signal source reaches its maximum value, thus achieving the input impedance matching condition. First, let Z... S ZL Normalize and plot the path through Z on the Smith chart. S and Z L The impedance circle and admittance circle at the conjugate point can be used to determine the intersection of these circles. The number of intersection points indicates the number of matching structures. From Z... S To Z A The trajectory is along Z S The admittance circle moves counterclockwise, indicating that the source impedance Z S Should be related to inductance L a Parallel; and from Z A arrive The trajectory is along the path through The impedance circle moves clockwise, indicating that the source impedance Z S With inductor L a After being connected in parallel, it should also be connected with another inductor L. b In series, where:

[0045]

[0046]

[0047] Where Z0 is the characteristic impedance. Therefore, moving clockwise within the impedance circle requires a series inductor:

[0048]

[0049] To move counterclockwise, a capacitor needs to be connected in series:

[0050]

[0051] Moving clockwise within the admittance circle requires a parallel capacitor:

[0052]

[0053] To move counterclockwise, an inductor needs to be connected in parallel:

[0054]

[0055] Based on the impedance matching method described above, the simplified asymmetric T-coil structure can be matched with a series matching inductor L. R and parallel matching capacitor C R Optimization of bandwidth and impedance matching is performed, wherein the matching inductor L R The first terminal is connected to the signal input terminal, and the matching inductor L R The second terminal is connected to the bandwidth extension circuit, and the matching capacitor C R The first terminal is connected to the signal input terminal, and the capacitor C RThe second terminal is grounded. The terminating resistor R D As a terminal module of the circuit, it prevents signal reflection after reaching the end of the transmission line, thus avoiding signal attenuation. The final simplified structure is shown below. Figure 5 As shown.

[0056] In summary, the analog front-end terminating circuit with bandwidth expansion and impedance matching functions proposed in this invention can greatly enhance bandwidth expansion capability and achieve good impedance matching effect.

[0057] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0058] The above description is merely a specific embodiment of the present invention. It should be noted that any modifications, improvements, and equivalent substitutions made within the technical principles and rules of the present invention should be included within the protection scope of the present invention.

Claims

1. An analog front-end terminating circuit with bandwidth extension and impedance matching functions, characterized in that, include: The first pad capacitor has its positive plate connected to the negative input signal, and its negative plate grounded. The second pad capacitor has its positive plate connected to a positive input signal and its negative plate grounded. The first impedance matching module has its input terminal connected to the positive plate of the first pad capacitor. The first bandwidth extension module, based on a three-stage asymmetric T-coil structure, has its first input connected to the output of the first impedance matching module, its second input connected to the first terminal of the first terminating resistor, and its output connected to the input of the load circuit. The second impedance matching module has its input terminal connected to the positive plate of the second pad capacitor. The second bandwidth extension module, based on a three-stage asymmetric T-coil structure, has its first input connected to the output of the second impedance matching module, its second input connected to the first terminal of the second terminating resistor, and its output connected to the input of the load circuit. The first terminating resistor has its first end connected to the second input terminal of the first bandwidth extension module, and its second end receiving a common-mode feedback voltage signal from the load circuit. The second terminating resistor has its first end connected to the second input terminal of the second bandwidth extension module, and its second end receiving the common-mode feedback voltage signal from the load circuit. The load circuit has its input terminal connected to the output terminal of the first bandwidth expansion module and the output terminal of the second bandwidth expansion module, and its output terminal is grounded. The first bandwidth extension module based on the three-level asymmetric T-coil structure and the second bandwidth extension module based on the three-level asymmetric T-coil structure have the same circuit structure. The first bandwidth extension module is equivalent to a circuit composed of a first coupling inductor, a second coupling inductor, a first diode, a second diode, and a first extension inductor. The first end of the first coupling inductor is connected to the output end of the first impedance matching module. The second end of the first coupling inductor is connected to the first end of the second coupling inductor. The second end of the second coupling inductor is connected to the first end of the first extension inductor. The cathode of the first diode is connected to the signal power supply end. The anode of the first diode is connected to the second end of the first coupling inductor. The cathode of the second diode is connected to the second end of the first coupling inductor. The anode of the second diode is grounded. The second end of the first extension inductor is connected to the first end of the first terminating resistor. The first end of the first coupling inductor and the first end of the second coupling inductor are terminals of the same name. The first impedance matching module and the second impedance matching module have the same circuit structure. The first impedance matching module includes a matching inductor and a matching capacitor. The first end of the matching inductor is connected to the negative polarity signal input terminal, and the second end of the matching inductor and the positive plate of the matching capacitor are both connected to the first input terminal of the first bandwidth expansion module. The negative plate of the matching capacitor is grounded.

2. The analog front-end terminating circuit with bandwidth extension and impedance matching functions according to claim 1, characterized in that, The first bandwidth extension module based on the three-level asymmetric T-coil structure includes three cascaded asymmetric T-coil structures. The parameters of the first asymmetric T-coil structure are determined based on the parameter values ​​of the I / O interface pad capacitors, the parameters of the second asymmetric T-coil structure are determined based on the parameter values ​​of the electrostatic discharge ESD diodes, and the parameters of the third asymmetric T-coil structure are determined based on the parameter values ​​of the load capacitors of the SerDes receiver front-end circuit.

3. An analog front-end terminating circuit with bandwidth extension and impedance matching functions according to claim 1 or 2, characterized in that, The capacitance values ​​of the first pad capacitor and the second pad capacitor are equal.

4. An analog front-end terminating circuit with bandwidth extension and impedance matching functions according to claim 1 or 2, characterized in that, The resistance values ​​of the first terminating resistor and the second terminating resistor are equal.

5. An analog front-end terminating circuit with bandwidth extension and impedance matching functions according to claim 1 or 2, characterized in that, The ESD network composed of the first diode and the second diode has a capacitance value equal to that of the electrostatic discharge ESD diode.

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