Circuit board assembly and method of manufacturing a circuit board assembly

Abstract

The embodiment of the application provides a circuit board assembly and a preparation method thereof, and belongs to the technical field of chips, and the circuit board assembly comprises: a printed circuit board and M pads, the M pads are arranged at intervals on the printed circuit board, first vias are arranged on N pads in the M pads, and second vias are further arranged on the printed circuit board and at positions between any two adjacent pads in the N pads, the center of the second via deviates from the center line of the any two adjacent pads, M and N are both integers greater than 1, and N is less than or equal to M.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of chips, and particularly relates to a circuit board assembly and a preparation method of the circuit board assembly. BACKGROUND

[0002] With the development of electronic technology, consumers have higher and higher requirements for the charging speed of electronic devices such as mobile phones. The charging power of electronic devices has increased from ordinary 18W to fast charging 66W, 80W, and now 120W, or even 200W. It can be seen that increasing the charging power is the key to improving the charging speed of electronic devices. While increasing the charging power of electronic devices, the current that needs to pass through the chip in the charging module also increases from 2A for ordinary charging to 10A for super-fast charging, or even larger charging current.

[0003] In the design of a printed circuit board (PCB), a hole is usually punched on a pad and a surface layer is routed to increase the current-carrying capacity. However, for the case of 120W or even 200W power, the current can reach 10A. By punching a hole on the pad and routing the surface layer, it is difficult to meet the current-carrying capacity requirement of large current during high-power charging. Therefore, a scheme of setting a via between pads is proposed.

[0004] However, the scheme of setting a via between pads in the related art improves the current-carrying capacity of large current during high-power charging, but there is a significant deficiency in the welding reliability of the PCB after actual production. For example, the pads are occupied by the routing and the via around the pads, resulting in virtual welding or short circuit due to continuous soldering between the pads. It can be seen that the reliability of the circuit board assembly is poor after the current-carrying capacity is improved. SUMMARY

[0005] The purpose of the embodiments of the application is a circuit board assembly and a preparation method of the circuit board assembly, which can solve the problem of poor reliability of the circuit board assembly after improving the current-carrying capacity.

[0006] In a first aspect, the embodiments of the application provide a circuit board assembly, which comprises a printed circuit board and M pads, the M pads are arranged on the printed circuit board at intervals, and first vias are arranged on N pads in the M pads. The printed circuit board and the second via are arranged between any two adjacent pads in the N pads, the center of the second via deviates from the center line of the any two adjacent pads, M and N are both integers greater than 1, and N is less than or equal to M.

[0007] In a second aspect, the embodiments of the application further provide a preparation method of a circuit board assembly, which comprises the following steps.

[0008] acquire a first printed circuit board to be prepared, M pads are arranged on the first printed circuit board to be prepared, and a first via is arranged on N pads among the M pads;

[0009] On the first printed circuit board to be prepared, a second via is arranged between any two adjacent pads among the N pads, and a center of the second via deviates from a center line of the any two adjacent pads, to obtain a printed circuit board.

[0010] Wherein, M and N are integers greater than 1, and N is less than or equal to M.

[0011] In the embodiment of the present application, the M pads are arranged on the printed circuit board, the first via is arranged on the N pads among the M pads, and the second via is arranged between any two adjacent pads among the N pads, so as to improve the current flow capacity; meanwhile, the center of the second via deviates from the center line of the any two adjacent pads, so that the interval distance between the second via and the pad is increased, thereby reducing the occupation of the pad by the second via, improving the integrity of the pad, and further enhancing the reliability of the circuit board assembly. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is one of the structural schematic diagrams of the circuit board assembly provided by the embodiment of the present application;

[0013] Figure 2 is one of the actual photos of the circuit board assembly provided by the embodiment of the present application;

[0014] Figure 3 is the second actual photo of the circuit board assembly provided by the embodiment of the present application;

[0015] Figure 4 is the connection relationship schematic diagram of the circuit board assembly and the chip provided by the embodiment of the present application;

[0016] Figure 5 is the second structural schematic diagram of the circuit board assembly provided by the embodiment of the present application;

[0017] Figure 6 is the third structural schematic diagram of the circuit board assembly provided by the embodiment of the present application;

[0018] Figure 7 is the fourth structural schematic diagram of the circuit board assembly provided by the embodiment of the present application;

[0019] Figure 8 is the flow chart of the preparation method of the circuit board assembly provided by the embodiment of the present application. DETAILED DESCRIPTION

[0020] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly described. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art are within the scope of the present application.

[0021] The terms "first", "second", and the like in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than that illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally a category, and are not limited to the number of objects, for example, the first object can be one or more. In addition, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / ", generally indicates that the objects before and after are in a "or" relationship.

[0022] Please refer to Figure 1 , Figure 1 is one of the structural schematic diagrams of the circuit board assembly provided by the embodiments of the present application, as shown in Figure 1 The circuit board assembly includes a printed circuit board 101 and M pads, the M pads are arranged at intervals on the printed circuit board 101, a first via 103 is arranged on N pads 102 of the M pads, a second via 104 is further arranged at a position between any two adjacent pads 102 of the N pads 102 on the printed circuit board 101, the center of the second via 104 deviates from the center line of any two adjacent pads 102, M and N are both integers greater than 1, and N is less than or equal to M.

[0023] Among the M pads on the printed circuit board 101, there are also independent pads 105, that is, the first via 103 is not arranged on the pad 105.

[0024] Among the M pads on the printed circuit board 101, there are also independent pads 105, that is, the first via 103 is not arranged on the pad 105.

[0025] Among the M pads on the printed circuit board 101, there are also independent pads 105, that is, the first via 103 is not arranged on the pad 105.

[0026] In this embodiment, M pads are spaced apart on the printed circuit board 101. A first via 103 is provided on N pads 102 among the M pads, and a second via 104 is provided between any two adjacent pads 102 to improve current carrying capacity. At the same time, the center of the second via 104 is offset from the center line connecting any two adjacent pads 102. In this way, compared with the method of placing the second via on the center line connecting any two adjacent pads, the spacing distance between the second via 104 and the pads 102 is increased, thereby reducing the encroachment of the second via 104 on the pads 102, improving the integrity of the pads 102, and thus enhancing the reliability of the circuit board assembly.

[0027] Optionally, all M pads on the printed circuit board 101 can be non-Solder Mask Defined Pads (NSMD).

[0028] like Figure 3 and Figure 4 As shown, each of the M pads (including pad 102 and pad 105) includes a pad body 1022 and a solder mask groove 1021. The solder mask groove 1021 surrounds the pad body 1022 and is located between the pad body 1022 and the second via 104. That is, a ring of solder mask groove 1021 is provided around the pad body 1022. The solder mask groove 1021 can be formed by the gap between the ink 107 and the pad body 1022. The solder mask groove 1021 can separate the pad body 1022 and the surrounding ink 107 by a certain distance. When the pad body 1022 is soldered to the material end (e.g., pad 401 on the chip), excess solder paste can flow into the solder mask groove 1021, reducing the occurrence of solder bridging between adjacent pads.

[0029] The ink 107 can be a barrier layer with acid and alkali corrosion resistance, which is set on the printed circuit board. The ink 107 can prevent circuit corrosion and protect the circuit during the etching process.

[0030] The second via 104, located on the printed circuit board 101, is situated between any two adjacent pads 102 among the N pads 102. It easily encroaches on adjacent pads 102, with particularly severe encroachment on the solder mask 1021. Due to the encroachment of the second via 104, only a portion of the solder mask 1021 is preserved. When excess solder paste cannot flow into the solder mask 1021, solder paste accumulation easily occurs, leading to short circuits between different pads and ultimately causing functional failure of the terminal device.

[0031] In an example, the second via hole 104 is arranged between any two adjacent pads 102 of the N pads 102, and the center of the second via hole 104 deviates from the center line of the any two adjacent pads 102, so as to increase the spacing distance between the second via hole 104 and the soldering groove 1021, reduce the occupation of the second via hole 104 to the soldering groove 1021, improve the integrity of the pad 102 and the soldering groove 1021, and thus improve the shape of the solder joint, solve the problem of virtual welding and continuous tin during welding, and thus improve the welding reliability of the PCB.

[0032] Optionally, the first via hole 103 and the second via hole 104 are electrically connected through the wire 106.

[0033] In an example, the first via hole 103 is arranged on the N pads 102 of the M pads, and the second via hole 104 is arranged between any two adjacent pads 102 of the N pads 102, and the wire 106 is arranged between the first via hole 103 and the second via hole 104, so that the adjacent pads 102 can transmit signals through the wire 106. Wherein, the center of the second via hole 104 deviates from the center line of the any two adjacent pads 102, so that the second via hole 104 is staggered between any two adjacent pads 102, and the wire 106 extending from each pad of the adjacent two pads 102 to the position of the second via hole 104 can be electrically connected with the second via hole 104, so as to reduce the redundant wire between the pads 102, avoid the case that the wire 106 and the second via hole 104 occupy the pads 102 from different directions when the wire 106 and the second via hole 104 are located in different directions of the pads 102, and thus improve the integrity of the pad 102 and the soldering groove 1021. While improving the current overcurrent capacity, the circuit board assembly has high reliability.

[0034] Optionally, the second via hole 104 is connected with one of the any two adjacent pads 102 of the N pads 102 through a first wire, and the second via hole 104 is connected with the other of the any two adjacent pads 102 of the N pads 102 through a second wire, and the included angle between the first wire and the second wire is greater than or equal to 90 degrees.

[0035] In an example, the second via 104 is arranged between any two adjacent pads 102 of the N pads 102, and the center of the second via 104 deviates from the center line of any two adjacent pads 102, the trace 106 includes a first trace and a second trace, so that one of any two adjacent pads 102 of the N pads 102 can extend to the second via 104 through the first trace, and the other of any two adjacent pads 102 of the N pads 102 can extend to the second via 104 through the second trace, and the included angle between the first trace and the second trace is greater than or equal to 90 degrees, reducing the case that the trace 106 and the second via 104 invade the pads 102 from different directions, thereby improving the integrity of the pads 102 and the solder resist groove 1021. While improving the current overcurrent capacity, the circuit board assembly has high reliability.

[0036] Optionally, the second via 104 is arranged in the central region of any L pads 102 of the N pads 102, L is an integer greater than 1 and less than or equal to N.

[0037] In an example, as shown in Figure 5 The second via 104 can be arranged in the central region of any three pads 102 of the N pads 102, and the three pads 102 can be distributed in a triangular shape, and the second via 104 can be located in the middle region of the triangle, in other words, the center of the second via 104 deviates from the center line of any two adjacent pads 102 of the three pads 102, reducing the invasion of the second via 104 to any one of the three pads 102, and the trace 106 extending from the first via 103 of each pad of the three pads 102 can extend to the second via 104 to be electrically connected to the second via 104, reducing the case that the trace 106 and the second via 104 invade the pads 102 from different directions, thereby improving the regularity of the pads 102, improving the shape of the solder joint, reducing the case that the area of the pads 102 on the PCB is larger and the size of the solder ball at the material end is smaller, the solder joint is inverted funnel-shaped, resulting in poor stress resistance of the circuit board assembly; and increasing the integrity of the solder resist groove 1021, reducing the case that excess solder paste cannot flow into the solder resist groove 1021 and accumulate, thereby improving the reliability of the circuit board assembly.

[0038] The three pads 102 can be arranged in a regular triangle, and the second via 104 can be arranged at the center of the regular triangle, so that the center of the second via 104 is equidistant from the center of each of the three pads 102. In this way, in the case where the second via 104 interferes with the pads 102 and / or the solder resist groove 1021, the influence of the same second via 104 on each of the three pads 102 can be dispersed. In addition, the wires 106 extending from each of the three pads 102 to the first via 103 can extend to the second via 104 to electrically connect the second via 104, so as to reduce the redundant wires between the three pads 102. Since the first distance D1 between each of the three pads 102 and the second via 104 is equal, the length of the wires 106 between each of the three pads 102 and the second via 104 is uniform, which further improves the regularity of the pads 102 and the integrity of the solder resist groove 1021. While improving the current overcurrent capacity, the circuit board assembly has high reliability.

[0039] In another example, the second via 104 can be arranged in the center region of any four adjacent pads 102 of the N pads 102, and the four pads 102 can be arranged in a rectangle. The second via 104 can be arranged in the middle region of the rectangle, that is, the center of the second via 104 deviates from the center line of any two adjacent pads 102 of the four pads 102. This reduces the occupation of the second via 104 on any one of the four pads 102. In addition, the wires 106 extending from each of the four pads 102 to the first via 103 can extend to the second via 104 to electrically connect the second via 104. The pads 102 at the diagonal positions can also be connected by sharing the same wires 106, thereby reducing the redundant wires between the four pads 102 and reducing the occupation of the wires 106 and the second via 104 on the pads 102 from different directions, thereby improving the regularity of the pads 102, increasing the integrity of the solder resist groove 1021, reducing the accumulation of excess solder paste that cannot flow into the solder resist groove 1021, and further improving the reliability of the circuit board assembly.

[0040] The four pads 102 can be arranged in a square, and the second via 104 can be located at the intersection of the diagonals of the square, such that the center of the second via 104 is equidistant from the center of each of the four pads 102 by a first distance D1. This way, even if there is interference between the second via 104 and the pads 102, and / or interference between the second via 104 and the solder mask 1021, the influence of the same second via 104 on each of the four pads 102 can be dispersed. Furthermore, this ensures that the trace 106 length between each pad 102 and the second via 104 is uniform, further improving the regularity of the pads 102 and the integrity of the solder mask 1021. While improving current carrying capacity, the circuit board assembly also exhibits high reliability.

[0041] In another example, such as Figure 6 As shown, the second via 104 can be disposed in the central region of any five adjacent pads 102 among the N pads 102. The five pads 102 can be distributed in a pentagonal pattern, and the second via 104 can be located in the middle region of the pentagon. In other words, the center of the second via 104 is offset from the line connecting the centers of any two adjacent pads 102 among the five pads 102, reducing the encroachment of the second via 104 on any of the five pads 102. Furthermore, each of the five pads 102 is connected to the first via. The trace 106 led out from 103 can extend towards the location of the second via 104 to be electrically connected to the second via 104, reducing redundant traces between the five pads 102 and reducing the situation where the trace 106 and the second via 104 encroach on the pads 102 from different directions. This improves the regularity of the pads 102, increases the integrity of the solder mask 1021, reduces the situation where excess solder paste cannot flow into the solder mask 1021 and accumulates, thereby improving the reliability of the circuit board assembly.

[0042] The five pads 102 can be arranged in a regular pentagon, and the second via 104 can be located at the center of the pentagon, such that the center of the second via 104 is equal to the first distance D1 between the center of each of the five pads 102. This way, even if there is interference between the second via 104 and the pads 102, and / or interference between the second via 104 and the solder mask 1021, the influence of the same second via 104 on each of the five pads 102 can be dispersed. Furthermore, this ensures that the trace 106 length between each pad 102 and the second via 104 is uniform, further improving the regularity of the pads 102 and the integrity of the solder mask 1021. While improving current carrying capacity, the circuit board assembly also exhibits high reliability.

[0043] In another example, such as Figure 7As shown, the second via hole 104 can be arranged at the center region of any six adjacent pads 102 in the N pads 102, the six pads 102 can be arranged in a hexagonal shape, and the second via hole 104 can be located at the center region of the hexagon, in other words, the center of the second via hole 104 deviates from the center line of any two adjacent pads 102 in the six pads 102, which reduces the occupation of the second via hole 104 to any one of the six pads 102, and the traces 106 extending from each pad 102 to the first via hole 103 can extend to the position of the second via hole 104 to be electrically connected to the second via hole 104, and the pads 102 at the diagonal position can also be connected by sharing the same traces 106, thereby reducing the redundant traces between the six pads 102, reducing the occupation of the traces 106 and the second via hole 104 to the pads 102 from different directions, thereby improving the regularity of the pads 102, increasing the integrity of the soldering groove 1021, reducing the accumulation of excess solder paste that cannot flow into the soldering groove 1021, and thereby improving the reliability of the circuit board assembly.

[0044] In the embodiment, the six pads 102 can be arranged in a regular hexagon, and the second via hole 104 can be located at the intersection of the diagonal lines of the regular hexagon, so that the center of the second via hole 104 is equal to the first distance D1 between the center of each pad 102 in the six pads 102, so that in the case of interference between the second via hole 104 and the pad 102, and / or interference between the second via hole 104 and the soldering groove 1021, the influence of the same second via hole 104 on each pad 102 in the six pads 102 can be dispersed. And the length of the traces 106 between each pad 102 and the second via hole 104 is uniform, further improving the regularity of the pads 102 and the integrity of the soldering groove 1021. While improving the current flow capacity, the circuit board assembly has high reliability.

[0045] It should be noted that the second via hole 104 is arranged at the center region of any L pads 102 adjacent to each other in the N pads 102, and L can also be other numbers, such as 8, 9, 12, etc., which can be adjusted according to actual conditions, and the same technical effects can be achieved, which will not be repeated here.

[0046] The center of the second via hole 104 and the center of each of the L pads 102 have a first distance D1, the center of any two adjacent pads 102 of the L pads 102 have a second distance D2, and the ratio between the first distance D1 and the second distance D2 is greater than 1:2, so as to increase the spacing distance between the second via hole 104 and the pad 102, reduce the occupation of the second via hole 104 to the pad 102 and / or the solder resist groove 1021, improve the integrity of the pad 102 and the solder resist groove 1021, thereby improving the morphology of the solder joint, solving the problem of virtual welding and continuous soldering during welding, and improving the reliability of the circuit board assembly.

[0047] Optionally, the size of the trace 106 is less than or equal to the size of the pad 102, and / or the size of the trace 106 is less than or equal to the size of the second via hole 104.

[0048] In the embodiment of the present application, by reducing the width of the trace 106 between each pad 102 of the M pads, the size of the trace 106 is less than or equal to the size of the pad 102, and / or the size of the trace 106 is less than or equal to the size of the second via hole 104, thereby reducing the case that the trace 106 and the pad 102 interfere with each other in a large area, which leads to poor integrity of the solder resist groove 1021. This not only realizes the PCB surface layer trace and increases the via hole to increase the current carrying capacity, but also maximizes the size and integrity of the solder resist groove 1021, and improves the problems of continuous soldering and virtual welding during welding.

[0049] Optionally, the number of adjacent second via holes 104 of each pad 102 of the N pads 102 is less than or equal to two.

[0050] In the embodiment of the present application, the N pads 102 can include a plurality of pad networks, and each pad network can include at least two pads 102. The second via hole 104 can be arranged between any two adjacent pads 102 of the at least two pads 102, so that the center of the second via hole 104 deviates from the connecting line of the centers of the two adjacent pads 102. The trace 106 led out from each pad 102 of the two adjacent pads 102 extends towards the position of the second via hole 104 and is electrically connected to the second via hole 104. The width of the trace 106 can be less than or equal to the width of the pad 102, and the number of second via holes 104 electrically connected to each pad 102 is less than or equal to two. This not only realizes the PCB surface layer trace and increases the via hole to increase the current carrying capacity, but also maximizes the size and integrity of the solder resist groove 1021, and improves the problems of continuous soldering and virtual welding during welding, thereby improving the reliability of the circuit board assembly.

[0051] In the PCB design, one or more pads 102 and the independent pad 105 can be connected by the wire 106 according to actual needs, and the second via hole 104 can be arranged on the wire 106 between the pad 102 and the independent pad 105, so that the wire led out by the independent pad 105 is directed to the second via hole 104, and the wire led out by the pad 102 is directed to the second via hole 104, the redundant wire between the pad 102 and the independent pad 105 is reduced, the wire 106 and the second via hole 104 occupy the pad, and thus the integrity of the pad is improved. While the current overcurrent capacity is improved, the circuit board assembly has high reliability.

[0052] Please refer to Figure 8 , Figure 8 is a flowchart of a preparation method of a circuit board assembly provided by the embodiment of the present application, which is used for preparing the circuit board assembly described above, and the method comprises the following steps:

[0053] In step 801, a first to-be-prepared printed circuit board is obtained, and M pads are arranged on the first to-be-prepared printed circuit board at intervals, and a first via hole is arranged on N pads in the M pads.

[0054] In this step, the first to-be-prepared printed circuit board can be a to-be-processed PCB board without a second via hole. The M pads can be arranged on the first to-be-prepared printed circuit board in an array, and the first via hole is arranged on N pads in the M pads, so that the pads can be welded with a material end in the subsequent process.

[0055] In step 802, a second via hole is arranged at a position between any two adjacent pads in the N pads on the first to-be-prepared printed circuit board, and the center of the second via hole deviates from the center line of the any two adjacent pads, to obtain a printed circuit board.

[0056] In the embodiment, M and N are both integers greater than 1, and N is less than or equal to M.

[0057] In this step, the overcurrent capacity of the circuit board assembly can be improved by arranging the via hole, the second via hole is arranged between any two adjacent pads, and the center of the second via hole deviates from the center line of the any two adjacent pads, so as to reduce the occupation of the pad by the second via hole and improve the shape of the solder joint.

[0058] In this embodiment of the application, during the PCB design process, M pads are set on the first printed circuit board to be prepared. N pads among the M pads are provided with first vias. By drilling a second via between any two adjacent pads among the N pads of the first printed circuit board to be prepared, the current carrying capacity is improved. The center of the second via is offset from the line connecting the centers of any two adjacent pads, thus obtaining the printed circuit board. In the printed circuit board, the spacing between the second via and the pad is increased, thereby reducing the encroachment of the second via on the pad, improving the integrity of the pad, and thus enhancing the reliability of the circuit board assembly.

[0059] In this process, on the first printed circuit board to be prepared, a second via is drilled between any two adjacent pads among the N pads, and the center of the second via is offset from the line connecting the centers of the two adjacent pads, thus obtaining the printed circuit board, comprising:

[0060] On the first printed circuit board to be prepared, a second via is drilled between any two adjacent pads among the N pads, and the center of the second via is offset from the line connecting the centers of the two adjacent pads to obtain the second printed circuit board to be prepared.

[0061] By connecting the two printed circuit boards to be prepared, a printed circuit board is obtained. On the printed circuit board, the traces between any two adjacent pads extend toward the location of the second via to be electrically connected to the second via.

[0062] In this way, traces can be placed between two adjacent pads, and the traces leading from each of the two adjacent pads extend towards the location of the second via to make electrical connection with the via. This reduces redundant traces between pads and avoids situations where traces and vias are located in different directions from the pads, thus improving pad integrity. While improving current carrying capacity, the circuit board assembly also has high reliability.

[0063] Optionally, the step of drilling a second via at a position between any two adjacent pads among the N pads on the first printed circuit board to be prepared, and the center of the second via being offset from the line connecting the centers of the two adjacent pads, to obtain the printed circuit board, includes:

[0064] If the target area on the first printed circuit board to be prepared meets the via drilling conditions, a second via is drilled in the target area to obtain the printed circuit board.

[0065] The target area is the position between any two adjacent pads among the N pads, and the target area is offset from the center line connecting the two adjacent pads.

[0066] In the embodiment of the present application, when the second via hole is punched on the target region on the first printed circuit board to be prepared, the interference of the second via hole to the adjacent pads in the N pads is considered, and in the case that the interference of the second via hole to the pads is less than a target threshold, i.e., the distance between any two adjacent pads in the N pads is large, the second via hole can be arranged between the two pads, and otherwise, the punching is not performed, thereby improving the integrity of the pads.

[0067] It should be noted that in this document, the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article or apparatus including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such a process, method, article or apparatus. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of another identical element in the process, method, article or apparatus including the element. In addition, it should be pointed out that the scope of the methods and apparatuses in the embodiments of the present application is not limited to performing functions in the order shown or discussed, but can also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved, for example, the described method can be performed in an order different from that described, and various steps can also be added, omitted or combined. In addition, the features described with reference to certain examples can be combined in other examples.

[0068] The embodiments of the present application are described above in combination with the drawings, but the present application is not limited to the above-described specific embodiments, and the above-described specific embodiments are only illustrative, but not limiting, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the scope of the present application and the scope protected by the claims.

Claims

1. A circuit board assembly, characterized in that, include: A printed circuit board and M pads, the M pads being spaced apart on the printed circuit board, N pads of the M pads having a first via, and a second via being provided on the printed circuit board between any two adjacent pads of the N pads, the center of the second via being offset from the line connecting the centers of the two adjacent pads, M and N being integers greater than 1, and N being less than or equal to M; The first via and the second via are electrically connected by a trace.

2. The circuit board assembly according to claim 1, characterized in that, The second via is located in the center region of any L adjacent pads among the N pads, where L is an integer greater than 1 and less than or equal to N.

3. The circuit board assembly according to claim 2, characterized in that, The center of the second via has a first distance from the center of each of the L pads, and the center of any two adjacent pads in the L pads has a second distance. The ratio between the first distance and the second distance is greater than 1:

2.

4. The circuit board assembly according to claim 1, characterized in that, The size of the trace is less than or equal to the size of each of the N pads, and / or the size of the trace is less than or equal to the size of the second via.

5. The circuit board assembly according to any one of claims 1 to 3, characterized in that, The second via is connected to one of any two adjacent pads among the N pads via a first trace, and the second via is connected to the other of any two adjacent pads among the N pads via a second trace, wherein the included angle between the first trace and the second trace is greater than or equal to 90 degrees.

6. The circuit board assembly according to any one of claims 1 to 3, characterized in that, Each of the M pads is a non-solder resist defined pad.

7. The circuit board assembly according to claim 6, characterized in that, Each of the M pads includes a pad body and a solder mask groove, the solder mask groove surrounds the pad body and is located between the pad body and the second via.

8. The circuit board assembly according to claim 7, characterized in that, The printed circuit board is also provided with ink, and the gap between the ink and the solder pad body forms the solder resist groove.

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