Bias voltage supply circuit, bias voltage supply method, and nonvolatile memory chip

Abstract

The application relates to the technical field of circuit control, and discloses a bias voltage providing circuit, a bias voltage providing method and a nonvolatile memory chip. The bias voltage providing circuit comprises: a reference voltage providing module, which is used for providing a reference voltage based on a reference ground voltage; a bias voltage generating module, which is connected with the reference voltage providing module to generate a bias voltage according to the reference voltage; and an output adjusting module, which is connected with the bias voltage generating module and selectively connected with the reference ground voltage or a compensation voltage, so as to adjust the bias voltage to be a first type bias voltage based on the reference ground voltage based on the selected reference ground voltage or adjust the bias voltage to be a second type bias voltage based on the compensation voltage based on the selected compensation voltage. In this way, when the compensation voltage is selected, the second type bias voltage obtained by adjusting the bias voltage can compensate noise, and when the reference ground voltage is selected, the first type bias voltage is provided for a module which does not need to be compensated.

Description

Technical Field

[0001] This application relates to the field of circuit control technology, and in particular to bias voltage supply circuits, bias voltage supply methods, and non-volatile memory chips. Background Technology

[0002] When reading from a non-volatile memory chip, voltages are typically applied to its word line (WL) and bit line (BL). The sensing module then identifies the stored data by detecting the current in the memory cell. Therefore, during the read process, current flows through the memory cell. This current flows from the sensing module, through the BL, through the memory cell, and then through the source line of the memory's common source terminal to the ground of the non-volatile memory chip.

[0003] The source lines of non-volatile memory chips are typically metal interconnects that connect the entire memory array within the chip. They possess a certain internal resistance. Furthermore, a switching transistor is usually present in the source line path to control the source line voltage, further increasing the equivalent resistance of the source line. As a result, during read operations, a voltage drop V occurs when the current flowing through the source line across all the read memory cells. SL This situation is more pronounced when the read bit width is wide. Because the current in the memory cells varies when storing different data, the source line voltage drop V0... SL The current value of a storage cell varies with the data stored within it and can be considered as noise that affects the current value of the storage cell. Summary of the Invention

[0004] The main technical problem solved by this application is to provide a bias voltage providing circuit, a bias voltage providing method, and a non-volatile memory chip, which can enable the second type of bias voltage obtained by adjusting the bias voltage to compensate for noise when selecting the compensation voltage, and provide a first type of bias voltage for modules that do not require compensation when selecting the reference ground voltage.

[0005] To address the aforementioned problems, this application provides a bias voltage supply circuit, comprising: a reference voltage supply module for supplying a reference voltage based on a reference ground voltage; a bias voltage generation module connected to the reference voltage supply module to generate a bias voltage based on the reference voltage; and an output adjustment module connected to the bias voltage generation module and selectively connected to either a reference ground voltage or a compensation voltage, to adjust the bias voltage based on the selected reference ground voltage to a first type of bias voltage based on the reference ground voltage, or to adjust the bias voltage based on the selected compensation voltage to a second type of bias voltage based on the compensation voltage.

[0006] The output adjustment module includes: a selection unit that receives a reference ground voltage and a compensation voltage, and selectively outputs either the reference ground voltage or the compensation voltage; and an adder unit that connects the bias voltage generation module and the selection unit to adjust the bias voltage based on the reference ground voltage or the compensation voltage selected by the selection unit, thereby outputting either a first type of bias voltage based on the reference ground voltage or a second type of bias voltage based on the compensation voltage.

[0007] The adder unit includes: a first operational amplifier, wherein the inverting input of the first operational amplifier is connected to a selection unit via a first resistor, and a first node between the first resistor and the inverting input of the first operational amplifier is connected to a bias voltage generation module via a second resistor and to the output of the first operational amplifier via a third resistor; the non-inverting input of the first operational amplifier receives a first common voltage; a second operational amplifier, wherein the inverting input of the second operational amplifier is connected to the output of the first operational amplifier via a fourth resistor, and a second node between the fourth resistor and the inverting input of the second operational amplifier is connected to the output of the second operational amplifier via a fifth resistor; the non-inverting input of the second operational amplifier receives a second common voltage; wherein the output of the second operational amplifier serves as the output of the adder unit to output a first type bias voltage based on a reference ground voltage or a second type bias voltage based on a compensation voltage.

[0008] Among them, the resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, and the fifth resistor are equal.

[0009] The second common voltage is 1.5 times the first common voltage.

[0010] The selection unit includes: a first switch connected between the adding unit and the reference ground voltage, wherein when the first switch is turned on, the adding unit is connected to the reference ground voltage and the bias voltage generation module to adjust the bias voltage based on the reference ground voltage to generate a first type of bias voltage based on the reference ground voltage; and a second switch connected between the adding unit and the compensation voltage, wherein when the second switch is turned on, the adding unit is connected to the compensation voltage and the bias voltage generation module to adjust the bias voltage based on the compensation voltage to generate a second type of bias voltage based on the compensation voltage.

[0011] Wherein, the reference ground voltage is the reference ground voltage of the non-volatile memory chip, the compensation voltage is the noise voltage on the source line of the non-volatile memory chip, and the bias voltage providing circuit is used to provide a first type of bias voltage for the first type of working module based on the reference ground voltage in the non-volatile memory chip, and to provide a second type of bias voltage for the second type of working module affected by the compensation voltage.

[0012] To address the aforementioned issues, another technical solution adopted in this application is to provide a bias voltage provision method, comprising: providing a reference voltage based on a reference ground voltage; generating a bias voltage based on the reference voltage; selecting a reference ground voltage or a compensation voltage as a reference, adjusting the bias voltage based on the selected reference ground voltage to generate a first type of bias voltage based on the reference ground voltage, or adjusting the bias voltage based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage.

[0013] The step of selecting a reference ground voltage or a compensation voltage as a reference, and adjusting the bias voltage based on the selected reference ground voltage to generate a first type of bias voltage based on the reference ground voltage, or adjusting the bias voltage based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage, includes: selecting a reference ground voltage or a compensation voltage as a reference; superimposing the selected reference ground voltage and the bias voltage to generate a first type of bias voltage based on the reference ground voltage, or superimposing the selected compensation voltage and the bias voltage to generate a second type of bias voltage based on the compensation voltage.

[0014] To address the aforementioned issues, another technical solution adopted in this application is to provide a non-volatile memory chip, including a bias voltage supply circuit as described above.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, the bias voltage providing circuit provided in this application utilizes a reference voltage providing module to provide a reference voltage based on a reference ground voltage; a bias voltage generating module is connected to the reference voltage providing module to generate a bias voltage based on the reference voltage; then, an output adjustment module is connected to the bias voltage generating module to selectively connect either a reference ground voltage or a compensation voltage. The bias voltage is adjusted based on the selected reference ground voltage to become a first-type bias voltage based on the reference ground voltage, or based on the selected compensation voltage to become a second-type bias voltage based on the compensation voltage. The output adjustment module can dynamically select either the reference ground voltage or the compensation voltage to adjust the bias voltage and generate either the first-type or second-type bias voltage. When selecting the compensation voltage, the second-type bias voltage obtained by adjusting the bias voltage can compensate for noise. When selecting the reference ground voltage, the first-type bias voltage is provided to modules that do not require compensation. Compared to existing technologies, the bias voltage providing circuit provided in this application has better process compatibility and can generate both types of bias voltages without an additional reference source, reducing cost and power consumption. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0017] Figure 1 This is a schematic diagram of an embodiment of the bias voltage providing circuit provided in this application;

[0018] Figure 2 This is a schematic diagram of the application scenario of the bias voltage providing circuit provided in this application;

[0019] Figure 3 This is a schematic diagram of another embodiment of the bias voltage providing circuit provided in this application;

[0020] Figure 4 This is a schematic flowchart of an embodiment of the bias voltage provision method provided in this application;

[0021] Figure 5 This is a schematic diagram of another embodiment of the bias voltage providing method provided in this application;

[0022] Figure 6 This is a schematic diagram of the structure of an embodiment of the non-volatile memory chip provided in this application;

[0023] Figures 7-9 This is a schematic diagram of the application scenario of the bias voltage providing circuit provided in this application. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It is understood that the specific embodiments described herein are only for explaining this application and not for limiting it. Furthermore, it should be noted that, for ease of description, only the parts related to this application are shown in the accompanying drawings, not all structures. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0025] The terms "first," "second," etc., used in this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0026] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0027] See Figure 1 , Figure 1 This is a schematic diagram of an embodiment of the bias voltage providing circuit provided in this application. The bias voltage providing circuit 100 includes a reference voltage providing module 10, a bias voltage generating module 20, and an output adjustment module 30.

[0028] The reference voltage providing module 10 provides a reference voltage based on a reference ground voltage 40. The bias voltage generating module 20 is connected to the reference voltage providing module 10 to generate a bias voltage based on the reference voltage. The output adjustment module 30 is connected to the bias voltage generating module 20 and selectively connected to either the reference ground voltage 40 or a compensation voltage 50 to adjust the bias voltage to a first type of bias voltage based on the selected reference ground voltage 40, or to a second type of bias voltage based on the selected compensation voltage 50.

[0029] In some embodiments, the bias voltage generating module 20 may be a pull-up circuit or a pull-down circuit.

[0030] In one application scenario, combined Figure 2 Explanation:

[0031] When reading data from a non-volatile memory chip, voltage is typically applied to its word line (WL) and bit line (BL), and then... Figure 2 The sensing modules 1, 2, and n distinguish the stored data by judging the current of the corresponding connected storage cells 1, 2, and n. Here, n is an integer greater than 2. Therefore, during data reading, a current I flows through storage cells 1 and / or 2 and / or n. The current I flows from the corresponding sensing modules 1 and / or 2 and / or n, through BL, storage cells 1 and / or 2 and / or n, and then through the source line of the common source terminal of the non-volatile memory chip to the ground of the non-volatile memory chip.

[0032] The source lines of non-volatile memory chips are typically metal wires used for interconnection. They need to connect the entire memory array within the non-volatile memory chip and have a certain internal resistance, such as... Figure 2In addition to RS1, there is usually a switching transistor on the source line path to control the source line voltage. During non-readout operations, it may be biased to other voltages, further increasing the equivalent resistance of the source line. As a result of these factors, during readout, a voltage drop V is generated when the current flowing through the source line from all read memory cells 1 and / or 2 and / or n. SL This situation is particularly severe when the read bit width is wide. Because the current in the storage cells varies when storing different data, the source line voltage drop V... SL The current varies with the data stored in the memory cell and can be considered as noise affecting the current value of the memory cell, due to the source line voltage drop V. SL Such noise, therefore, the voltage difference between the word line voltage and the source line voltage applied to the memory cell, or the voltage difference between the bit line voltage and the source line voltage applied to the sensing module, will be affected by the source line voltage drop V. SL This noise is reduced, which in turn leads to a decrease in the current of the storage cell. Since the sensing module distinguishes the stored data by the magnitude of the storage cell current, a decrease in the current of the storage cell may result in the inability to read the data in the storage cell correctly.

[0033] At this point, the bias voltage supply circuit 100 described above can be used to process the source line voltage drop V. SL As compensation voltage 50. During data reading from the non-volatile memory chip, the reference voltage providing module 10 in the bias voltage providing circuit 100 provides a reference voltage based on the reference ground voltage 40. The bias voltage generating module 20 is connected to the reference voltage providing module 10 to generate a bias voltage according to the reference voltage. The output adjustment module 30 is connected to the bias voltage generating module 20 and selectively connects to the compensation voltage 50, i.e., connects to the source line, to adjust the bias voltage to a second type of bias voltage based on the selected compensation voltage 50.

[0034] At this point, the second type of bias voltage can be used as a reference voltage and input to the bit line voltage generator and word line voltage generator to generate the corresponding bit line voltage V. BLC Or word line voltage V WL This causes the bit line voltage V output by the bit line voltage generator to be so high. BLC and the word line voltage V output by the word line voltage generator WL Based on a compensation voltage of 50 (source line voltage drop V) SL The corresponding increase is equivalent to partially offsetting the voltage drop V at the source line. SL This causes the current read from the sensing module to be affected by the voltage drop V. SL If the impact is reduced, then the data can be read.

[0035] Furthermore, many modules in a non-volatile memory chip, such as various functional modules that generate erase and write voltages (e.g., charge pumps) and LDOs (low dropout regulators) that generate power supply voltages for internal control logic circuits, require bias voltages. However, these bias voltages do not need to use the compensation voltage 50 as a reference voltage; instead, they use the reference ground voltage 40 as a reference voltage. Therefore, when these modules require bias voltages, the bias voltage generation module 20 can be connected to the reference voltage supply module 10 to generate a bias voltage based on the reference voltage. The output adjustment module 30 is connected to the bias voltage generation module 20 and selectively connected to the reference ground voltage 40 to adjust the bias voltage to a first type of bias voltage based on the selected reference ground voltage 40.

[0036] In this embodiment, the bias voltage providing circuit 100 uses the reference voltage providing module 10 to provide a reference voltage based on the reference ground voltage; the bias voltage generating module 20 is connected to the reference voltage providing module 10 to generate a bias voltage according to the reference voltage; then the output adjustment module 30 is connected to the bias voltage generating module 20 to selectively connect the reference ground voltage 40 or the compensation voltage 50, so that the bias voltage is adjusted to a first type bias voltage based on the selected reference ground voltage 40, or the bias voltage is adjusted to a second type bias voltage based on the selected compensation voltage 50. The output adjustment module 30 can dynamically select the reference ground voltage 40 or the compensation voltage 50 to adjust the bias voltage and generate a first type bias voltage or a second type bias voltage. When the compensation voltage 50 is selected, the second type bias voltage obtained by adjusting the bias voltage can compensate for noise. When the reference ground voltage 40 is selected, the first type bias voltage is provided to modules that do not require compensation. Compared to existing technologies, the bias voltage providing circuit in this embodiment has better process compatibility and can generate two types of bias voltages without the need for an additional reference source, reducing cost and power consumption.

[0037] In some embodiments, see Figure 3 The bias voltage providing circuit 100 includes a reference voltage providing module 10, a bias voltage generating module 20, and an output adjustment module 30. The output adjustment module 30 includes a selection unit 31 and an adder unit 32. The adder unit 32 includes a first operational amplifier 321, a first resistor 322, a second resistor 323, a third resistor 324, a second operational amplifier 325, a fourth resistor 326, and a fifth resistor 327. The selection unit 31 includes a first switch 311 and a second switch 312.

[0038] The inverting input terminal of the first operational amplifier 321 is connected to the selection unit 31 through the first resistor 322, and the first node between the first resistor 322 and the inverting input terminal of the first operational amplifier 321 is connected to the bias voltage generation module 20 through the second resistor 323, and connected to the output terminal of the first operational amplifier 321 through the third resistor 324.

[0039] The non-inverting input of the first operational amplifier 321 receives the first common voltage V. COM1 .

[0040] In this configuration, the inverting input terminal of the second operational amplifier 325 is connected to the output terminal of the first operational amplifier 321 via a fourth resistor 326, and the second node between the fourth resistor 326 and the inverting input terminal of the second operational amplifier 325 is connected to the output terminal of the second operational amplifier 325 via a fifth resistor 327; the non-inverting input terminal of the second operational amplifier 325 receives the second common voltage V. COM2 The output of the second operational amplifier 325 serves as the output of the adder 32 to output a first type bias voltage based on the reference ground voltage 40 or a second type bias voltage based on the compensation voltage 50.

[0041] In one application scenario, V can be calculated using the following first formula. 01 . Among them, V REG V represents the reference voltage. COM1 V represents the first common voltage. SW This indicates the voltage input to selection unit 31. R1 represents the resistance value of the first resistor 322, R2 represents the resistance value of the second resistor 323, and R3 represents the resistance value of the third resistor 324, expressed in V. out This indicates the output bias voltage.

[0042] Furthermore, V can be calculated using the following second formula. OUT . Where R4 represents the resistance value of the fourth resistor 326, R5 represents the resistance value of the fifth resistor 327, and V COM2 This indicates the second common voltage.

[0043] In some embodiments, the resistance values ​​of the first resistor 322, the second resistor 323, the third resistor 324, the fourth resistor 326, and the fifth resistor 327 are equal. Simplifying the first formula above, we obtain the third formula:

[0044] V 01 =3V COM1 -(V REG +V SW ).

[0045] Simplifying the second formula above, we obtain the fourth formula: VOUT =2V COM2 -V 01 .

[0046] In some embodiments, the second common voltage V COM2 The first common voltage V COM1 1.5 times. Simplifying the fourth formula above, we get the fifth formula: V OUT =V REG +V SW .

[0047] In one application scenario, a first switch 311 is connected between an adder unit 32 and a reference ground voltage 40. When the first switch 311 is turned on, the adder unit 32 is connected to the reference ground voltage 40 and a bias voltage generation module to adjust the bias voltage based on the reference ground voltage 40 to generate a first type of bias voltage based on the reference ground voltage 40.

[0048] If the resistance values ​​of the first resistor 322, the second resistor 323, the third resistor 324, the fourth resistor 326, and the fifth resistor 327 are equal, the second common voltage V COM2 The first common voltage V COM1 1.5 times, combined with the fifth formula above, since the reference ground voltage 40 is 0, then the first type bias voltage V OUT =V REG .

[0049] The second switch 312 is connected between the adding unit 32 and the compensation voltage 50. When the second switch 312 is turned on, the adding unit 32 is connected to the compensation voltage 50 and the bias voltage generation module 20 to adjust the bias voltage based on the compensation voltage 50 to generate a second type of bias voltage based on the compensation voltage 50.

[0050] If the resistance values ​​of the first resistor 322, the second resistor 323, the third resistor 324, the fourth resistor 326, and the fifth resistor 327 are equal, the second common voltage V COM2 The first common voltage V COM1 1.5 times, combined with the fifth formula above, since the compensation voltage is 50V SL Then the first type bias voltage V OUT =V REG +V SL It is understandable that at this time, due to the conduction of the second switch 312, the selection unit 31... SW equals V SL .

[0051] It is understandable that when the first switch 311 is on, the second switch 312 is off, or when the first switch 311 is off, the second switch 312 is on.

[0052] In one application scenario, the bias voltage providing circuit 100 is applied to a non-volatile memory chip. In this case, the reference ground voltage 40 mentioned in the above embodiment is the reference ground voltage of the non-volatile memory chip, and the compensation voltage 50 is the noise voltage on the source line of the non-volatile memory chip.

[0053] The bias voltage providing circuit 100 is used to provide a first type bias voltage for a first type of working module based on a reference ground voltage in a non-volatile memory chip, and to provide a second type bias voltage for a second type of working module affected by a compensation voltage.

[0054] The first type of working module can be various functional modules that generate erase and write voltages, such as charge pumps and LDOs (low dropout regulators) that generate power supply voltages for internal control logic circuits.

[0055] The second type of work module can be as described above. Figure 2 The sensor module, bit line voltage generator, and word line voltage generator are shown in combination for data reading or writing.

[0056] Among them, the reference voltage providing module 10 can be a bandgap reference source circuit, which outputs a reference voltage V. REF A bias voltage V is generated by the bias voltage generation module 20. REF .

[0057] The adder unit 32, composed of the first operational amplifier 321, the first resistor 322, the second resistor 323, the third resistor 324, the second operational amplifier 325, the fourth resistor 326, and the fifth resistor 327, utilizes the principle of negative feedback between the first operational amplifier 321 and the second operational amplifier 325. When the resistance values ​​of the first resistor 322, the second resistor 323, the third resistor 324, the fourth resistor 326, and the fifth resistor 327 are equal, its first-stage output V... 01 =3V COM1 -(V REG +V SW The second-stage output V OUT =2V COM2 -V 01 .

[0058] V COM1 and V COM2 The value is used to adjust the input DC level of the first operational amplifier 321 and the second operational amplifier 325, as well as the output V of the first stage. 01 The values ​​are set so that these voltage values ​​are within a reasonable range, ensuring the normal operation of the adder unit 32.

[0059] When the first switch 311 is turned on, VSW =0, output voltage V OUT =V REG This value is equal to the type 1 bias voltage that is desired to be applied to the memory cell.

[0060] When the second switch 312 is turned on, V SW =V SL Output voltage V OUT =V REG +V SL That is, the required voltage plus the noise voltage of the source line completes the compensation of the source line noise voltage, ensuring that the actual voltage applied to the gate-source or drain-source of the memory cell is not affected by the source line noise voltage.

[0061] See Figure 4 , Figure 4 This is a schematic flowchart of an embodiment of the bias voltage provision method provided in this application. The method includes:

[0062] Step 41: Provide a reference voltage based on the reference ground voltage.

[0063] In this embodiment, the description can be based on the bias voltage providing circuit 100 in any of the above embodiments. When a bias voltage is required, the reference voltage providing module 10 in the bias voltage providing circuit 100 provides a reference voltage based on the reference ground voltage.

[0064] Step 42: Generate a bias voltage based on the reference voltage.

[0065] The bias voltage generation module 20 in the bias voltage supply circuit 100 is connected to the reference voltage supply module 10 to generate a bias voltage based on the reference voltage.

[0066] Step 43: Select a reference ground voltage or a compensation voltage as a reference, and adjust the bias voltage based on the selected reference ground voltage to generate a first type of bias voltage based on the reference ground voltage, or adjust the bias voltage based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage.

[0067] In some embodiments, when a bias voltage is required, either a reference ground voltage or a compensation voltage has been determined as the base. Therefore, if a reference ground voltage is selected as the base, the bias voltage is adjusted based on the selected reference ground voltage to generate a first type of bias voltage based on the reference ground voltage. Similarly, if a compensation voltage is selected as the base, the bias voltage is adjusted based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage.

[0068] In this embodiment, the bias voltage is dynamically adjusted based on the reference ground voltage or the compensation voltage to generate a first type bias voltage or a second type bias voltage. When the compensation voltage is selected, the second type bias voltage is used to compensate for noise. When the reference ground voltage is selected, the first type bias voltage is provided to modules that do not require compensation.

[0069] See Figure 5 , Figure 5 This is a schematic flowchart of another embodiment of the bias voltage providing method provided in this application. The method includes:

[0070] Step 51: Provide a reference voltage based on the reference ground voltage.

[0071] Step 52: Generate a bias voltage based on the reference voltage.

[0072] Steps 51 and 52 have the same or similar technical solutions as the above embodiments, and will not be described in detail here.

[0073] Step 53: Select the reference ground voltage or compensation voltage as the benchmark.

[0074] Step 54: Superimpose the selected reference ground voltage and bias voltage to generate a first type of bias voltage based on the reference ground voltage, or superimpose the selected compensation voltage and bias voltage to generate a second type of bias voltage based on the compensation voltage.

[0075] In this embodiment, the description can be based on the bias voltage supply circuit 100 in any of the above embodiments.

[0076] When a bias voltage is required, the reference voltage or compensation voltage has already been determined. If the first switch 311 is turned on, the reference voltage is selected as the reference. The adder unit 32 is connected to the reference voltage 40 and the bias voltage generation module to adjust the bias voltage based on the reference voltage 40 to generate a first type of bias voltage based on the reference voltage 40. The specific calculation method can be found in the description of any of the above embodiments, and will not be repeated here.

[0077] If the second switch 312 is turned on, the adder unit 32 connects the compensation voltage 50 and the bias voltage generation module 20 to adjust the bias voltage based on the compensation voltage 50 to generate a second type of bias voltage based on the compensation voltage 50. The specific calculation method can be found in the description of any of the above embodiments, and will not be repeated here.

[0078] See Figure 6 , Figure 6 This is a schematic diagram of an embodiment of the non-volatile memory chip provided in this application. The non-volatile memory chip 700 includes a bias voltage supply circuit 100.

[0079] The bias voltage supply circuit 100 can be as described in any of the above embodiments, and will not be elaborated here.

[0080] It is understandable that the non-volatile memory chip 700 also includes, for example, Figure 2 The storage unit, sensing module, bit line voltage generator, word line voltage generator, etc. are shown.

[0081] Based on any of the above technical solutions, the inventors used simulation software to simulate the impact of source line noise on the current of the non-volatile memory chip 700 when 2k byte memory cells are read out simultaneously and the current of each memory cell is about 1uA.

[0082] In an ideal case where the source line resistance is not considered, such as Figure 7 As shown, V REG_WL V REG_BLC The output of the bias voltage generation module 20 is used to ideally apply bias voltages of 2.9V and 1.8V to memory cells WL and BL, respectively. `en` is the enable signal. After the enable signal is active, since there is no source line resistance, the source line voltage V... SL =0, one input of the adder unit is 0, therefore the output word line bias voltage V WL =V REG_WL =2.9V, used to provide the bias voltage for the gate of the non-volatile memory chip 700, bit line bias voltage V BLC =V REG_BLC =1.8V, used to provide bias voltage to the drain terminal of non-volatile memory chip 700. The memory cell current of non-volatile memory chip 700 is I = 973nA. Since there is no source line resistance, this current is entirely determined by the characteristics of non-volatile memory chip 700 and the bias voltage V. WL V BLC The decision is made based on this current I, which can be seen as a simulation of an ideal situation. The sensing module uses this current I to determine the data value stored in the non-volatile memory chip 700.

[0083] Considering a source line resistance of 5 ohms and without compensation, if Figure 8 As shown, after the enable signal is valid, the presence of the source line resistance causes a voltage drop across it, resulting in the source line voltage V. SL =73mV, this voltage raises the reference level of the memory cell due to the word line bias voltage V WL With bit line bias voltage V BLCWith the voltage value unchanged, the actual voltage applied between the word line, bit line and reference potential of the memory cell decreases, resulting in a decrease in the memory cell current I of the non-volatile memory chip 700 from 973nA to 890nA, which is 8.5% lower than the initial project value, affecting the resolution of the data stored in the non-volatile memory chip.

[0084] Considering a source line resistance of 5 ohms and using the technical solution described above in this application, if Figure 9 As shown, after the enable signal is valid, the source line voltage V SL =79mV, this compensation method is a positive feedback method, V WL V BLC The increase in voltage will further increase V. SL The value of V is such that, compared to the uncompensated case, V SL It will be slightly higher due to the compensation method, word line bias voltage V WL The bit line bias voltage V was increased from 2.9V to 2.98V. BLC The increase in bias voltage from 1.8V to 1.88V largely compensated for the V... SL Voltage, so that the actual voltage applied between the word line, bit line and reference potential of the memory cell is not affected by V. SL Due to the influence of the non-volatile memory chip 700, the memory cell current I is increased from 890nA without compensation to 956nA, and the difference from the ideal current is reduced from 8.5% to 1.7%, effectively reducing the impact of the source line voltage on the data in the non-volatile memory chip 700.

[0085] In summary, the bias voltage providing circuit provided in this application utilizes a reference voltage providing module to provide a reference voltage based on a reference ground voltage; a bias voltage generating module is connected to the reference voltage providing module to generate a bias voltage based on the reference voltage; then, an output adjustment module is connected to the bias voltage generating module to selectively connect either a reference ground voltage or a compensation voltage. The bias voltage is adjusted based on the selected reference ground voltage to become a first type of bias voltage based on the reference ground voltage, or based on the selected compensation voltage to become a second type of bias voltage based on the compensation voltage. The output adjustment module can dynamically select either the reference ground voltage or the compensation voltage to adjust the bias voltage and generate either the first type or the second type of bias voltage. When selecting the compensation voltage, the second type of bias voltage obtained by adjusting the bias voltage can compensate for noise. When selecting the reference ground voltage, the first type of bias voltage is provided to modules that do not require compensation. Compared to existing technologies, the bias voltage providing circuit provided in this application has better process compatibility and can generate both types of bias voltages without an additional reference source, reducing cost and power consumption.

[0086] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0087] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0088] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0089] If the integrated units in the other embodiments described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0090] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A bias voltage providing circuit, characterized in that, include: A reference voltage providing module is used to provide a reference voltage based on a reference ground voltage; A bias voltage generation module is connected to the reference voltage supply module to generate a bias voltage based on the reference voltage; An output adjustment module is connected to the bias voltage generation module and selectively connected to the reference ground voltage or the compensation voltage, so as to adjust the bias voltage to a first type of bias voltage based on the selected reference ground voltage, or adjust the bias voltage to a second type of bias voltage based on the selected compensation voltage. The output adjustment module includes: The selection unit receives the reference ground voltage and the compensation voltage, and selectively outputs either the reference ground voltage or the compensation voltage. An adder unit is connected to the bias voltage generation module and the selection unit to adjust the bias voltage based on the reference ground voltage or the compensation voltage selected by the selection unit, thereby outputting a first type bias voltage based on the reference ground voltage or a second type bias voltage based on the compensation voltage. The addition unit includes: A first operational amplifier, wherein the inverting input terminal of the first operational amplifier is connected to the selection unit through a first resistor, and a first node between the first resistor and the inverting input terminal of the first operational amplifier is connected to the bias voltage generation module through a second resistor and to the output terminal of the first operational amplifier through a third resistor; the non-inverting input terminal of the first operational amplifier receives a first common voltage. The second operational amplifier has an inverting input terminal connected to the output terminal of the first operational amplifier via a fourth resistor, and a second node between the fourth resistor and the inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier via a fifth resistor; the non-inverting input terminal of the second operational amplifier receives a second common voltage. The output of the second operational amplifier serves as the output of the adder unit to output either a first type bias voltage based on the reference ground voltage or a second type bias voltage based on the compensation voltage.

2. The bias voltage providing circuit according to claim 1, characterized in that, The resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, and the fifth resistor are equal.

3. The bias voltage providing circuit according to claim 2, characterized in that, The second common voltage is 1.5 times the first common voltage.

4. The bias voltage providing circuit according to claim 1, characterized in that, The selection unit includes: A first switch is connected between the adding unit and the reference ground voltage. When the first switch is turned on, the adding unit is connected to the reference ground voltage and the bias voltage generation module to adjust the bias voltage based on the reference ground voltage to generate a first type of bias voltage based on the reference ground voltage. A second switch is connected between the adding unit and the compensation voltage. When the second switch is turned on, the adding unit connects the compensation voltage and the bias voltage generation module to adjust the bias voltage based on the compensation voltage to generate a second type of bias voltage based on the compensation voltage.

5. The bias voltage providing circuit according to claim 1, characterized in that, The reference ground voltage is the reference ground voltage of the non-volatile memory chip, the compensation voltage is the noise voltage on the source line of the non-volatile memory chip, and the bias voltage providing circuit is used to provide a first type bias voltage for a first type of working module in the non-volatile memory chip based on the reference ground voltage, and to provide a second type bias voltage for a second type of working module affected by the compensation voltage.

6. A method for providing a bias voltage, characterized in that, An application to the bias voltage supply circuit as described in any one of claims 1-5, comprising: Provides a reference voltage based on the reference ground voltage; A bias voltage is generated based on the reference voltage; The bias voltage is adjusted based on the selected reference ground voltage or compensation voltage to generate a first type of bias voltage based on the reference ground voltage, or the bias voltage is adjusted based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage.

7. The bias voltage providing method according to claim 6, characterized in that, The step of selecting the reference ground voltage or compensation voltage as a reference, adjusting the bias voltage based on the selected reference ground voltage to generate a first type of bias voltage based on the reference ground voltage, or adjusting the bias voltage based on the selected compensation voltage to generate a second type of bias voltage based on the compensation voltage, includes: Select the reference ground voltage or compensation voltage as the benchmark; The selected reference ground voltage and the bias voltage are superimposed to generate a first type of bias voltage based on the reference ground voltage, or the selected compensation voltage and the bias voltage are superimposed to generate a second type of bias voltage based on the compensation voltage.

8. A non-volatile memory chip, characterized in that, Includes the bias voltage supply circuit as described in any one of claims 1-5.

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