Display panel and electronic device

Abstract

The display panel and the electronic equipment provided by the embodiments of the present application relate to the technical field of display. The display panel has a main screen area and a secondary screen area, and comprises a substrate, an array driving layer and a light emitting pixel layer. The array driving layer comprises a plurality of metal layers, and the light emitting pixel layer comprises light emitting pixels located in the secondary screen area. The array driving layer further comprises pixel driving circuits located in the screen area, and electrode traces extending from the main screen area to the secondary screen area and used for connecting the pixel driving circuits and the corresponding light emitting pixels. Part of the electrode traces is arranged in the same layer as one of the plurality of metal layers. In this way, the manufacturing of the intermediate film layer between part of the electrode traces and part of the metal layers can be reduced, the number of film layers and the number of masks required for manufacturing the display panel can be reduced, thereby reducing the manufacturing cost of the display panel and improving the market competitiveness of the display panel.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and an electronic device. BACKGROUND

[0002] With the development of full-screen display technology, the scheme of setting optical devices (such as cameras) under the display panel has become the mainstream scheme in the industry, in which the area of the display panel where the optical devices are arranged is called a sub-screen area, and the other area is called a main screen area. Both the main screen area and the sub-screen area can display. However, the display panel manufactured by the above scheme has high manufacturing cost, which affects the market competitiveness of the product. SUMMARY

[0003] In order to overcome the technical problems mentioned in the technical background, the embodiments of the present application provide a display panel and an electronic device.

[0004] In a first aspect, the present application provides a display panel, the display panel having a main screen area and a sub-screen area, and the display panel comprising:

[0005] a substrate;

[0006] an array driving layer on the substrate, the array driving layer comprising a plurality of metal layers;

[0007] a light-emitting pixel layer on a side of the array driving layer away from the substrate, the light-emitting pixel layer comprising light-emitting pixels in the sub-screen area;

[0008] the array driving layer comprising pixel driving circuits in the main screen area, electrode traces extending from the main screen area to the sub-screen area and used to connect the pixel driving circuits and the corresponding light-emitting pixels;

[0009] Part of the electrode traces is arranged in the same layer as one of the metal layers.

[0010] In the above structure, part of the electrode traces is arranged in the same layer as one of the metal layers, which can reduce the manufacturing of the intermediate film layer between part of the electrode traces and part of the metal layers, reduce the number of film layers and the number of masks required for manufacturing the display panel, thereby reducing the manufacturing cost of the display panel and improving the market competitiveness of the display panel.

[0011] In a possible embodiment of the present application, the electrode traces comprise first transparent conductive lines, second transparent conductive lines and third transparent conductive lines.

[0012] The first transparent conductive lines are connected to the pixel driving circuits.

[0013] In a possible embodiment of the present application, the second transparent wire is arranged in the same layer as the metal layer, and the third transparent wire is connected to the light-emitting pixel, and the first transparent wire is electrically connected to the third transparent wire through the second transparent wire.

[0014] In a possible embodiment of the present application, the plurality of metal layers comprises a first metal layer, a second metal layer, a third metal layer and a fourth metal layer arranged in sequence in a direction away from the substrate.

[0015] The array driving layer further comprises a first planarization layer located on a side of the fourth metal layer away from the substrate, and the first transparent wire is arranged on a surface of the first planarization layer away from the substrate.

[0016] In a possible embodiment of the present application, the second transparent wire is arranged in the same layer as the third metal layer.

[0017] The array driving layer further comprises a first organic insulating layer located between the second metal layer and the third metal layer, and the second transparent wire is arranged on a surface of the first organic insulating layer away from the substrate.

[0018] In a possible embodiment of the present application, the second transparent wire is arranged in the same layer as the fourth metal layer.

[0019] The array driving layer further comprises a second organic insulating layer located between the third metal layer and the fourth metal layer, and the second transparent wire is arranged on a surface of the second organic insulating layer away from the third metal layer.

[0020] In a possible embodiment of the present application, the plurality of metal layers comprises a first metal layer, a second metal layer, a third metal layer and a fourth metal layer arranged in sequence in a direction away from the substrate, and the first transparent wire is arranged in the same layer as the fourth metal layer.

[0021] The array driving layer further comprises a third organic insulating layer located between the third metal layer and the fourth metal layer, and the first transparent wire is arranged on a surface of the third organic insulating layer away from the substrate.

[0022] In a possible embodiment of the present application, the array driving layer further comprises a second planarization layer located on a side of the first transparent wire away from the substrate.

[0023] The third transparent wire is arranged on a surface of the second planarization layer away from the substrate.

[0024] The light-emitting pixel comprises an anode arranged on a surface of the second planarization layer away from the substrate, and the anode is connected to the third transparent wire.

[0025] In a possible implementation of the present application, the first transparent wire, the second transparent wire and the third transparent wire are indium tin oxide wires.

[0026] In a second aspect of the present application, an electronic device is provided, and the electronic device comprises the display panel in any possible implementation of the first aspect.

[0027] The display panel and the electronic device provided in the embodiments of the present application have a main screen area and a sub-screen area, and the display panel comprises a substrate, an array driving layer and a light emitting pixel layer. The array driving layer comprises a plurality of metal layers, and the light emitting pixel layer comprises light emitting pixels located in the sub-screen area. The array driving layer further comprises pixel driving circuits located in the main screen area, and electrode wires extending from the main screen area to the sub-screen area and used to connect the pixel driving circuits and the corresponding light emitting pixels. Some of the electrode wires are arranged in the same layer as one of the metal layers. In this way, the manufacturing of the intermediate film layer between some of the electrode wires and some of the metal layers can be reduced, the number of film layers and the number of masks required for manufacturing the display panel can be reduced, and thus the manufacturing cost of the display panel can be reduced and the market competitiveness of the display panel can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0029] Figure 1 An existing display panel film layer structure schematic diagram is shown;

[0030] Figure 2 A display panel area distribution schematic diagram provided by the present embodiment is shown;

[0031] Figure 3 One of the display panel film layer structure schematic diagrams provided by the present embodiment is shown;

[0032] Figure 4 Another of the display panel film layer structure schematic diagrams provided by the present embodiment is shown;

[0033] Figure 5 The third of the display panel film layer structure schematic diagrams provided by the present embodiment is shown.

[0034] Icon: 10 - display panel; 10A - main screen area; 10B - sub-screen area; 110 - substrate; 120 - array driving layer; 1201 - electrode trace; 12011 - first transparent conductive trace; 12012 - second transparent conductive trace; 12013 - third transparent conductive trace; 1202 - driving transistor; 12031 - first planarization layer; 12032 - second planarization layer; 12041 - first organic insulating layer; 12042 - second organic insulating layer; 12043 - third organic insulating layer; 130 - light-emitting pixel layer; 1301 - light-emitting pixel; 13011 - anode. DETAILED DESCRIPTION

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will be combined with the accompanying drawings for the embodiments of the present application to make a clear and complete description of the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various different configurations.

[0036] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0037] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0038] In the description of the present application, it should be noted that the terms "upper", "lower", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present application is usually placed, only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", and the like are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0039] It should be noted that the different features in the embodiments of the present application can be combined with each other without conflict.

[0040] Since the optical device is arranged below the auxiliary screen area, the auxiliary screen area needs to have good light transmittance. Therefore, in the related art, the auxiliary screen area and the main screen area are designed differently, wherein the auxiliary screen area does not design the pixel driving circuit with poor light transmittance. Please refer to Figure 1 , Figure 1 An example is shown in a schematic diagram of a film layer structure of an existing display panel, in which the driving transistor 1202 of the main screen area 10A is connected to the light-emitting pixel 1301 of the auxiliary screen area 10B through the electrode trace 1201, so that the light-emitting pixel 1301 of the auxiliary screen area can emit light normally. Generally, the electrode trace 1201 needs at least 3 layers of traces as shown, and an interlayer insulating layer needs to be arranged between adjacent traces, which makes the display panel based on the under-screen optical device scheme at least 6 more film layers to be manufactured than the ordinary display panel, corresponding to 3 layers of traces and the interlayer insulating layer below each layer of traces (as shown in Figure 1 ), which will result in an increase in the number of film layers and the number of masks needed, thereby increasing the manufacturing cost of the display panel and being not conducive to the improvement of the market competitiveness of the display panel.

[0041] In order to solve the above-mentioned problems, the inventors innovatively design the following technical solutions, and the specific implementation schemes of the present application will be described in detail below with reference to the accompanying drawings. It should be pointed out that the defects in the above-mentioned prior art solutions are the results obtained by the inventors after careful research and practice, therefore, the discovery process of the above-mentioned technical problems and the solutions proposed by the present embodiment to solve the above-mentioned problems should be the contribution made by the inventors to the present application in the process of invention and creation, and should not be understood as technical contents known to those skilled in the art.

[0042] Please refer to Figure 2 and Figure 3 , Figure 2 An example is shown in a schematic diagram of the area distribution of the display panel, Figure 3 An example is shown in a schematic diagram of part of the film layer structure of the display panel provided by the present embodiment. In the present embodiment, the display panel 10 includes a main screen area 10A and an auxiliary screen area 10B, the main screen area 10A at least partially surrounds the auxiliary screen area 10B, and the display panel 10 includes a substrate 110, an array driving layer 120 and a light-emitting pixel layer 130 arranged in layers. The array driving layer 120 includes a plurality of metal layers, and the array driving layer 120 further includes a pixel driving circuit located in the main screen area 10A, and an electrode trace 1201 extending from the main screen area 10A to the auxiliary screen area 10B and used to connect the pixel driving circuit and the corresponding light-emitting pixel. The plurality of metal layers can form the pixel driving circuit. The electrode trace is connected by transparent conductive lines located in different layers, and part of the electrode trace 1201 is arranged in the same layer as one of the plurality of metal layers, that is, part of the transparent conductive lines located in different layers of the electrode trace can be arranged in the same layer as one of the plurality of metal layers.

[0043] In the above structure, the manufacturing of the interlayer film (interlayer insulating layer) between the partial electrode traces and the partial metal layers can be reduced, the number of film layers and the number of masks required for manufacturing the display panel can be reduced, the manufacturing cost of the display panel can be reduced, and the market competitiveness of the display panel can be improved.

[0044] Please refer to Figure 3 Further, the electrode trace 1201 includes a first transparent conductor 12011, a second transparent conductor 12012, and a third transparent conductor 12013 arranged in different layers, the first transparent conductor 12011, the second transparent conductor 12012, and the third transparent conductor 12013 are connected to each other, and the first transparent conductor 12011 is connected to the pixel driving circuit. In the embodiment, the pixel driving circuit includes a driving transistor 1202, and the first transparent conductor 12011 is connected to the drain of the driving transistor 1202.

[0045] In the embodiment, the second transparent conductor 12012 can be arranged in the same layer as one of the metal layers, the third transparent conductor 12013 is connected to the light-emitting pixel 1301, and the first transparent conductor 12011 is electrically connected to the third transparent conductor 12013 through the second transparent conductor 12012.

[0046] Further, the metal layers can include a first metal layer M1, a second metal layer M2, a third metal layer M3, and a fourth metal layer M4, the first metal layer M1, the second metal layer M2, the third metal layer M3, and the fourth metal layer M4 are arranged in sequence in a direction away from the substrate 110, and adjacent metal layers are separated by an insulating layer. When a trace needs to cross a metal layer, a film layer via hole is used to connect the traces in different metal layers. The first metal layer M1, the second metal layer M2, the third metal layer M3, and the fourth metal layer M4 can be used to form a pixel driving circuit. For example, the first metal layer M1 and the second metal layer M2 can form signal traces (such as scan signal traces and voltage reset signal traces) in the pixel driving circuit, and the first metal layer M1 and the second metal layer M2 can also form a first electrode and a second electrode of an energy storage capacitor in the pixel driving circuit, respectively. The third metal layer M3 or the fourth metal layer M4 can be used to form a power voltage signal lead VDD in the pixel driving circuit, and the fourth metal layer M4 can also be used to form a data voltage signal lead DATA in the pixel driving circuit.

[0047] Please refer to Figure 3In the embodiment, when the first transparent conductor 12011 is disposed in a different layer from the fourth metal layer M4, the array driving layer further comprises a first planarization layer 12031 disposed on a side of the fourth metal layer M4 away from the substrate 110, and the first transparent conductor 12011 is disposed on a surface of the first planarization layer 12031 away from the substrate 110. In this case, the second transparent conductor 12012 can be disposed in the same layer as any one of the first metal layer M1, the second metal layer M2, the third metal layer M3, and the fourth metal layer M4.

[0048] Next, the second transparent conductor 12012 is disposed in the same layer as the third metal layer M3, and the second transparent conductor 12012 is disposed in the same layer as the fourth metal layer M4.

[0049] Referring again to Figure 3 , the array driving layer 120 further comprises a first organic insulating layer 12041 disposed between the second metal layer M2 and the third metal layer M3, and a second organic insulating layer 12042 disposed between the third metal layer M3 and the fourth metal layer M4. The array driving layer 120 further comprises a second planarization layer 12032 disposed on a side of the first transparent conductor 12011 away from the substrate 110, and the third transparent conductor 12013 is disposed on a surface of the second planarization layer 12032 away from the substrate 110. The light emitting pixel 1301 comprises an anode 13011 disposed on a surface of the second planarization layer 12032 away from the substrate 110, and the third transparent conductor 12013 is connected to the anode 13011. For example, the third transparent conductor 12013 can be overlapped on the anode 13011.

[0050] In the embodiment, when the second transparent conductor 12012 is disposed in the same layer as the third metal layer M3, the second transparent conductor 12012 is disposed on a surface of the first organic insulating layer 12041 away from the substrate 110.

[0051] In the prior art, the insulating layer (interlayer insulating layer) disposed between the second metal layer M2 and the third metal layer M3 is an inorganic insulating layer. When the inorganic insulating layer is made by vapor deposition, the surface of the inorganic insulating layer can be uneven. When the first transparent conductor 12011 is made on the inorganic insulating layer, the first transparent conductor 12011 is prone to form residues on the inorganic insulating layer, which is not conducive to forming stable lines. In the embodiment, the organic material layer is used as the interlayer insulating layer, which can ensure that the interlayer insulating layer has a flat surface, so that the first transparent conductor 12011 can easily form stable lines on the first organic insulating layer 12041.

[0052] In this embodiment, the third transparent wire 12013 is connected with the second transparent wire 12012 through a via hole on the second planarization layer 12032, the first planarization layer 12031 and the second organic insulating layer 12042, and the second transparent wire 12012 is connected with the driving transistor 1202 through a via hole on the first planarization layer 12031 and the second organic insulating layer 12042.

[0053] In the above embodiment, by arranging the second transparent wire 12012 and the third metal layer M3 in the same layer, the interlayer insulating layer between the two can be omitted, thus the number of film layers and the mask for manufacturing the film layer can be reduced, the manufacturing cost is lowered, and the market competitiveness of the display panel is improved. The scheme provided in this embodiment can provide a larger wire space for the first transparent wire 12011 in the electrode wire 1201 connected with the light-emitting pixel 1301, and more wire layout can be arranged in the sub-screen area, which can be used in the case that one driving transistor 1202 drives one light-emitting pixel 1301. Figure 1

[0054] Please refer to Figure 4 , when the first transparent wire 12011 is not arranged in the same layer as the fourth metal layer M4, and the second transparent wire 12012 is arranged in the same layer as the fourth metal layer M4, the second transparent wire 12012 is arranged on the surface of the second organic insulating layer 1402 away from the third metal layer M3.

[0055] In this embodiment, the third transparent wire 12013 is connected with the second transparent wire 12012 through a via hole of the second planarization layer 12032 and the first planarization layer 12031, and the second transparent wire 12012 is connected with the driving transistor 1202 through a via hole on the first planarization layer 12031.

[0056] In this embodiment, by arranging the second transparent wire 12012 and the fourth metal layer M4 in the same layer, the interlayer insulating layer between the two can be omitted, thus the number of film layers and the mask for manufacturing the film layer can be reduced, the manufacturing cost is lowered, and the market competitiveness of the display panel is improved. In this case, the first transparent wire 12011 in the electrode wire 1201 connected with the light-emitting pixel 1301 has a larger wire space, and more wire layout can be arranged in the sub-screen area, which can be used in the case that one driving transistor 1202 drives one light-emitting pixel 1301.

[0057] In this embodiment, please refer to Figure 5 , the first transparent wire 12011 can also be arranged in the same layer as the fourth metal layer M4, and the array driving layer 120 further includes a third organic insulating layer 12043 between the third metal layer M3 and the fourth metal layer M4, and the first transparent wire 12011 is arranged on the surface of the third organic insulating layer 12043 away from the substrate 110. In this case, compared with​Figure 3 The film layer structure shown in the figure lacks the first planarization layer 12031.

[0058] In this embodiment, the third transparent wire 12013 is connected with the second transparent wire 12012 through the via hole of the second planarization layer 12032 and the third organic insulating layer 12043, and the second transparent wire 12012 is connected with the first transparent wire 12011 through the via hole of the third organic insulating layer 12043.

[0059] In the above embodiment, by arranging the first transparent wire 12011 and the fourth metal layer M4 in the same layer, the interlayer insulating layer between the first transparent wire 12011 and the fourth metal layer M4 can be omitted. In this way, the number of film layers and the mask used to manufacture the film layers can be reduced, thereby reducing the manufacturing cost and improving the market competitiveness of the display panel. The scheme provided in this embodiment has the advantages of Figure 3 and Figure 4 The scheme shown in the figure has fewer interlayer insulating layers, and the wiring space of the transparent wire is relatively small. The transparent wire cannot be arranged too much in the sub-screen area 10B, and can be used to drive multiple pixel anodes by one driving transistor.

[0060] The inventor found that, by manufacturing one less interlayer insulating layer (for example, using a planarization layer as an interlayer insulating layer), 1-5 masks can be saved, and the manufacturing cost can be reduced by about 200,000 yuan-1,000,000 yuan, thereby greatly reducing the manufacturing cost of the display panel and improving the market competitiveness of the display panel.

[0061] The present embodiment also provides an electronic device including the display panel described in the foregoing embodiments. The use of the foregoing display panel can reduce the manufacturing cost of the electronic device as a whole and improve the market competitiveness of the electronic device.

[0062] In summary, the display panel and the electronic device provided in the embodiments of the present application have a main screen area and a sub-screen area, and the display panel includes a substrate, an array driving layer, and a light-emitting pixel layer. The array driving layer includes a plurality of metal layers, and the light-emitting pixel layer includes light-emitting pixels in the sub-screen area. The array driving layer further includes pixel driving circuits in the screen area, and electrode wires extending from the main screen area to the sub-screen area and used to connect the pixel driving circuits and the corresponding light-emitting pixels. Some of the electrode wires are arranged in the same layer as one of the metal layers. In this way,

[0063] The manufacturing of the intermediate film layer between some of the electrode wires and some of the metal layers can be reduced, the number of film layers and the number of masks required for manufacturing the display panel can be reduced, thereby reducing the manufacturing cost of the display panel and improving the market competitiveness of the display panel.

[0064] The above descriptions are only the preferred embodiments of the present application, and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, and the like made within the spirit and principle of the present application should be included in the protection scope of the present application.

[0065] The above descriptions are only the preferred embodiments of the present application, and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, and the like made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A display panel, characterized by, The display panel has a main screen area and a sub-screen area, and comprises: a substrate; an array driving layer on the substrate, the array driving layer comprising a plurality of metal layers; a light-emitting pixel layer on a side of the array driving layer away from the substrate, the light-emitting pixel layer comprising light-emitting pixels in the sub-screen area; the array driving layer further comprises pixel driving circuits in the main screen area, electrode tracks extending from the main screen area to the sub-screen area and used to connect the pixel driving circuits and the corresponding light-emitting pixels, wherein the electrode tracks are connected by transparent conductive lines in different layers; part of the electrode tracks is arranged in the same layer as one of the metal layers.

2. The display panel of claim 1, wherein, The electrode tracks comprise a first transparent conductive line, a second transparent conductive line and a third transparent conductive line. The first transparent conductive line is connected to the pixel driving circuit.

3. The display panel of claim 2, wherein, The second transparent conductive line is arranged in the same layer as one of the metal layers, the third transparent conductive line is connected to the light-emitting pixel, and the first transparent conductive line and the third transparent conductive line are electrically connected through the second transparent conductive line.

4. The display panel of claim 3, wherein, The plurality of metal layers comprises a first metal layer, a second metal layer, a third metal layer and a fourth metal layer arranged in sequence in a direction away from the substrate. The array driving layer further comprises a first planarization layer on a side of the fourth metal layer away from the substrate, and the first transparent conductive line is arranged on a surface of the first planarization layer away from the substrate.

5. The display panel of claim 4, wherein, The second transparent conductive line is arranged in the same layer as the third metal layer. The array driving layer further comprises a first organic insulating layer between the second metal layer and the third metal layer, and the second transparent conductive line is arranged on a surface of the first organic insulating layer away from the substrate.

6. The display panel of claim 4, wherein, The second transparent conductive line is arranged in the same layer as the fourth metal layer. The array driving layer further comprises a second organic insulating layer between the third metal layer and the fourth metal layer, and the second transparent conductive line is arranged on a surface of the second organic insulating layer away from the third metal layer.

7. The display panel of claim 3, wherein, The plurality of metal layers comprises a first metal layer, a second metal layer, a third metal layer and a fourth metal layer arranged in sequence in a direction away from the substrate, and the first transparent conductive line is arranged in the same layer as the fourth metal layer. The array driving layer further comprises a third organic insulating layer between the third metal layer and the fourth metal layer, and the first transparent conductive line is arranged on a surface of the third organic insulating layer away from the substrate.

8. The display panel of claim 4 or 7, wherein, The array driving layer further comprises a second planarization layer on a side of the first transparent conductive line away from the substrate. The third transparent conductive line is arranged on a surface of the second planarization layer away from the substrate. The light-emitting pixel comprises an anode arranged on a surface of the second planarization layer away from the substrate, and the anode is connected to the third transparent conductive line.

9. The display panel of any of claims 2-7, wherein, The first transparent conductive line, the second transparent conductive line and the third transparent conductive line are indium tin oxide conductive lines.

10. An electronic device, comprising: The electronic device comprises the display panel of any one of claims 1-9.

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