Automatic calibration system and method for silicon-based N×N optical switch chips

Abstract

An automatic calibration system and method for silicon-based N×N optical switch chips is disclosed. This system monitors the on-chip optical path status using photodetectors on the redundant ports of the extended stage in the optical switch array chip. An analog selection switch is used to time-division multiplex the optical power of the photodetectors and transmit it to a microprocessor. An automatic calibration algorithm deployed in the microprocessor rapidly and automatically calibrates the status of all units in the optical switch array. This invention effectively reduces the number of on-chip photodetectors and external analog-to-digital converters, enabling rapid calibration of the silicon-based optical switch chip status. It offers advantages such as simplicity, high calibration speed, and low cost.

Description

Technical Field

[0001] This invention relates to the field of optical communication, specifically to an automatic calibration system and method for silicon-based N×N optical switch chips. Background Technology

[0002] With the application of high-definition video and the widespread adoption of 5G technology, global data traffic is experiencing explosive growth. International Data Corporation (IDC) predicts that global data traffic will increase from 33 ZB in 2018 to 175 ZB by 2025. Of this, data center internal traffic switching accounts for more than 71.5% of all traffic. Traditional electrical switching networks cannot meet the current data center requirements for low power consumption, high bandwidth, and low cost.

[0003] All-optical switching networks switch signals directly in the optical domain, free from the constraints of traditional electronic technologies, and offer advantages such as high bandwidth, low power consumption, and low cost. Optical switches can route high-speed optical signals to different output ports with low power consumption and low latency, making them one of the core components of all-optical switching networks. N×N high-speed optical switch chips are the most basic and crucial components in optical switches.

[0004] Traditional optical switching systems are mainly constructed using discrete optical switch arrays such as 2×2 and 4×4, which suffer from problems such as large size, high power consumption, and low reliability. Silicon-based optical switch chips have advantages such as high integration, low power consumption, and compatibility with traditional microelectronic CMOS processes, making them suitable for large-scale optical switch arrays in all-optical switching systems.

[0005] The main topologies of silicon-based optical switch chips include Benes, Crossbar, and switch & select (S&S). Benes-based optical switch arrays can achieve N×N arrays, such as a 32×32 array, with fewer switching units. The Benes structure requires only 144 switching units to achieve a non-blocking switch array. However, because Benes switches are reconfigurable non-blocking switch structures, changes in the current routing state can affect the transmission of other routing signals. Therefore, the control algorithm for Benes-based switch arrays is more complex than that for strictly non-blocking switch structures.

[0006] The main structures of switching units include Mach-Zehnder interferometers (MZIs) and microring resonators. MZI structures offer advantages such as wideband response and temperature insensitivity, making them more promising for applications. However, due to manufacturing errors, the initial state of the switching unit does not match the design values, requiring initial state calibration of the chip. Furthermore, because the two output optical signals of the 3dB beam splitter in the MZI unit are not exactly π / 2 out of phase, and the splitting ratio is uneven, the operating voltage of the Crossbar varies slightly from different input ports. Under the same switching state, the voltage required to achieve the optimal extinction ratio from different input ports will differ, further increasing crosstalk in the switching array.

[0007] Currently, silicon-based optical switch chips mainly calibrate the state of switch units along the path by monitoring the optical power changes at the target output port. Since interference signals from crosstalk ports are unavoidable during the switch calibration process, it is necessary to use crosstalk switch units to achieve state calibration. The research project of Chu Tao at Zhejiang University (Qiao L, Tang W, Chu T. 32×32 silicon electro-optic switch with built-in monitors and balanced-status units[J]. Scientific Reports,2017,7(1):1-7) directly calibrated the state of optical switch units along the target path by inserting a dual directional coupler and a grating coupler on the right side of the intermediate stage of the Benes structured optical switch. However, the use of the grating coupler requires off-chip vertical fiber coupling and off-chip optical power detection, which further increases the chip packaging difficulty and calibration time. Huawei (P. Dumais et al., "Silicon Photonic Switch Subsystem With 900 Monolithically Integrated Calibration Photodiodes and 64-Fiber Package," in Journal of Lightwave Technology, vol.36, no.2, pp.233-238, 15 Jan.15, 2018.) directly calibrated the state of the switching unit on-chip by embedding two weakly directional couplers and an integrated silicon-germanium photodetector on the output waveguide of each 2×2 optical switch unit. However, since each switch is connected to two photodetectors, the entire 32×32 optical switch chip has as many as a thousand output electrodes, which further increases the packaging complexity and control difficulty of the optical switch chip. Summary of the Invention

[0008] To address the aforementioned problems of difficult, complex, and time-consuming state calibration of silicon-based N×N optical switch array chips, this invention proposes an automatic calibration system and method for silicon-based N×N optical switch chips. Through photodetectors on the redundant ports of the optical switch array, peripheral control circuitry, and an automatic calibration algorithm, the system can quickly and automatically calibrate the state of all units in the optical switch array.

[0009] The technical solution of the present invention is as follows:

[0010] On one hand, the present invention provides an automatic calibration system for silicon-based N×N optical switch chips, characterized in that it includes:

[0011] A light source used to generate two single-wavelength input optical signals of equal energy;

[0012] Two symmetrically arranged programmable polarization controllers are used to receive the input optical signal respectively, and adjust the polarization state of the input optical signal through the control signals they receive.

[0013] Two symmetrically arranged 1×N optical switches are used to receive feedback signals and control the input optical signal to be input from one input port and output from any one of the N output ports, or to control the input optical signal to be input from any one of the N input ports and output from one output port.

[0014] A silicon-based N×N optical switch chip includes 4M photodetectors, and a first-stage 2×2 optical switch, a second-stage 2×2 optical switch, ..., a T-stage 2×2 optical switch, ..., a 2T-2-stage 2×2 optical switch and a 2T-1-stage 2×2 optical switch; the T-stage 2×2 optical switch is composed of M 2×2 optical switches, and each 2×2 optical switch contains 4 redundant ports, 2 at each of the left and right ends, which are respectively connected to the photodetectors;

[0015] Two symmetrically arranged 1×2M analog selection switches, each with 2M ports connected to 2M photodetectors, are used to output the real-time photocurrent of the photodetectors on different paths and transmit it to the corresponding transimpedance amplifier.

[0016] Two symmetrically arranged transimpedance amplifiers are used to amplify the received photocurrent and convert it into a voltage signal;

[0017] Two symmetrically arranged analog-to-digital converters are used to read the voltage signal output from the transimpedance circuit and convert it into a digital signal;

[0018] The microprocessor is a hardware platform for implementing the automatic calibration algorithm. It receives the voltage value fed back by the analog-to-digital converter, outputs a feedback signal and a feedback voltage value to the digital-to-analog converter, and automatically switches the output port of the 1×N optical switch unit according to the automatic correction algorithm, simulating the switch output port number, and feeding back the new voltage value to the digital-to-analog converter.

[0019] A digital-to-analog converter is used to read the feedback signal from the microprocessor and convert it into an analog signal, which is then fed back to the driver amplifier.

[0020] The driver amplifier converts the digital signal fed back from the digital-to-analog converter into a corresponding voltage value and applies it to the corresponding 2×2 switching unit.

[0021] Furthermore, the network topology of the silicon-based N×N optical switch chip includes Benes, extended Benes, Crossbar, and dual-layer network (DLN) structures.

[0022] Furthermore, the 2×2 optical switches are arranged in a certain network topology, and their number is determined by the topology, which is either a 2×2 Mach-Zehnder interferometer structure or a 2×2 micro-ring resonator structure.

[0023] Furthermore, if the T-level 2×2 optical switch does not have redundant ports, it is constructed by cross-connecting four 2×2 optical switches.

[0024] Furthermore, the photodetector is a silicon-germanium PIN detector.

[0025] On the other hand, the present invention also provides an automatic calibration method for silicon-based N×N optical switch chips, characterized in that the method includes the following steps:

[0026] Output optical signal: The microprocessor turns on the light source and introduces the two equal-energy single-wavelength input optical signals into their respective programmable polarization controllers;

[0027] Select calibration path: Select a path to be calibrated. m -O n (I m and O n These are the m-th input port and n-th output port of the silicon-based N×N optical switch chip, respectively (m, n = 1, 2, ..., N). Optical signals are input to the 1×N optical switch array from both the left and right sides; that is, the left optical signal is input to the N×N optical switch array chip from the m-th port, and the right optical signal is input to the N×N optical switch chip from the n-th port. The path to be calibrated is I. m -O nAfter passing through the i-th (i = 1, 2, ..., M) optical switch in the intermediate stage, the microprocessor sends control signals to the two 1×2M analog switches on both sides, causing the two 1×2M analog switches on the left and right to switch to the 2×i-2+p and 2×i-2+q paths respectively (p, q = 1, 2), which are connected to the p-th photodetector on the left and the q-th photodetector on the right of the i-th optical switch unit in the intermediate stage; the microprocessor obtains the optical signal input to the intermediate stage optical switch by reading the voltage signals input to the two analog-to-digital converters;

[0028] Calibration path initialization: Based on the read voltage signal, the microprocessor sends a control signal to the programmable polarization controller to adjust the polarization state of the introduced input optical signal, maximizing the optical signal of the intermediate-stage optical switch; it also sends a control signal to the digital-to-analog converter to initialize the calibration path I. m -O n The initial voltage required to load all optical switching units in the circuit is such that the voltage signal read from the analog-to-digital converter is large.

[0029] Calibration switch unit: calibrate the path I to be calibrated sequentially. m -O n In the optical switch unit, the microprocessor sends control signals to the corresponding digital-to-analog converter (DAC) to change the driving voltage applied to the optical switch unit to be calibrated. If the optical switch to be calibrated is on the right side of the middle stage, the voltage signal of the left DAC is read; otherwise, the voltage signal of the right DAC is read. The search algorithm continuously searches for the driving voltage applied to the optical switch unit to be calibrated until the convergence condition is met. This process is repeated until the calibration path I is reached. m -O n All optical switching units in the system have reached the convergence condition;

[0030] Select the next path to be calibrated and repeat the above steps until the driving voltage values ​​of all units of the N×N optical switch are obtained; write the obtained driving voltages into the lookup table, and the calibration is complete.

[0031] Furthermore, the initial switching voltage can be obtained through prior experience or by testing equipment.

[0032] Furthermore, the search algorithms include one-dimensional golden section, linear scan, gradient descent, particle swarm optimization, etc.

[0033] Furthermore, the convergence condition is that the voltage signal read from the digital-to-digital converter is at its maximum or minimum. A maximum voltage signal indicates that the unit is in the state required by the calibrated path; a minimum voltage signal indicates that the unit is in the opposite state of the calibrated path.

[0034] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0035] 1. The on-chip photodetectors on the redundant ports of the intermediate-level optical switch unit are used to monitor the optical power in the routing path. The number of detectors is small, reducing the chip size. The calibration complexity of the switch array unit is reduced. With the help of peripheral control circuits and optimization algorithms, the calibration of the working status of all units in the optical switch array can be completed quickly and automatically.

[0036] 2. By using analog switches, the number of transimpedance amplifiers and analog-to-digital converters is reduced, effectively lowering costs. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the automatic calibration system for silicon-based N×N optical switch chips of the present invention;

[0038] Figure 2 This is an extended Benes switch array, which is an example of a silicon-based N×N optical switch chip.

[0039] Figure 3 This is a calibration diagram of the extended Benes switch array, Example 1 of the silicon-based N×N optical switch chip.

[0040] Figure 4 This is a flowchart of the automatic calibration method for silicon-based N×N optical switch chips according to the present invention;

[0041] Figure 5 It is a 2×2MZI optical switch

[0042] Figure 6 It is the transmission spectrum of the two input ports.

[0043] Figure 7 It is a single-switching unit 'Cross' state calibration process.

[0044] Figure 8 It is the transmission spectral line of path 5-4.

[0045] Figure 9 The transmission spectral line of the optical signal routed from input 5 to path 4. Detailed Implementation

[0046] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments, but this should not be construed as limiting the scope of protection of the present invention.

[0047] The automatic calibration system of the present invention, such as Figure 1As shown, the system includes: a laser to generate a single-wavelength input optical signal; a 3dB optical beam splitter to split light of equal energy into two paths; two programmable polarization controllers to adjust the polarization state of the input optical signal via control signals; and two 1×N optical switches to allow the input optical signal to be output from any of the N ports, or to output from a single port if the input signal is input from any of the N ports. Optional 1×N optical switches include 1×N silicon-based optical switches, 1×N MEMS optical switches, and 1×N mechanical optical switches, which are used in the system to select which input ports the optical signal enters into the N×N optical switch array chip. This embodiment uses an extended Benes N×N optical switch array chip, such as... Figure 2 As shown, the chip contains a total of (2×log₂N-1)×N / 2 2×2 optical switches, distributed in N / 2 rows and (2×log₂N-1) columns, arranged in a Benes topology. Each 2×2 optical switch in the intermediate stage (log₂N-th column) consists of four 2×2 switching units, which are interconnected in a cross-connection manner, as shown below. Figure 2 As shown in the dashed box; each of the remaining 2×2 optical switches consists of one 2×2 switching unit. The 2×2 switching units can be 2×2 Mach-Zehnder interferometer structures, 2×2 micro-ring resonators, etc., with a total number of (2×log₂N+2)×N / 2 on the chip. Each 2×2 switching unit in the middle column has a redundant port, connected to an on-chip photodetector, with a total of 4M photodetectors (M=N / 2). The on-chip photodetectors can be silicon-germanium PIN detectors, used to monitor the optical power in the switching path. Two 1×2M analog circuit selection switches are used, each connected to N photodetectors to read the photocurrent readings from the photodetectors along the path. Two transimpedance amplifiers are used to amplify the photocurrent output from the photodetectors into a voltage signal that can be acquired by the analog-to-digital converter. Two analog-to-digital converters read the analog voltage signal, specifically the transimpedance output voltage in this system. The microprocessor is the hardware platform for implementing the automatic calibration algorithm. It receives voltage feedback from the analog-to-digital converter (ADC) and outputs algorithm feedback signals, automatically adjusting the output ports of the 1×N optical switch units, the analog switch output port numbers, and assigning new voltage values ​​to the ADC. Options include a computer and a Field Programmable Gate Array (FPGA). The digital-to-analog converter (DAC) reads the analog signals from the microprocessor and converts them into digital signals, feeding them back to the driver amplifiers (2 + 2 × log₂N) × N / 2. The driver amplifiers convert the digital signals from the ADC back into corresponding voltage values ​​and apply them to the corresponding optical switch units (2 + 2 × log₂N) × N / 2.

[0048] This implementation uses an automatic calibration system based on an extended-level Benes optical switch array, such as... Figure 1 As shown, the extended-stage N×NBenes optical switch array rapidly completes the calibration of the state of the switched units using on-chip photodetectors, peripheral control circuits, and automatic calibration algorithms. The specific calibration process is as follows: Figure 3 , Figure 4 As shown.

[0049] The automatic calibration method for the extended Benes N×N optical switch array chip in this embodiment includes the following steps:

[0050] 1) The microprocessor sends a control signal to the laser and outputs an optical signal. After passing through a 3dB beam splitter, the signal is divided into two beams of single-wavelength light with the same energy, which then enter a programmable polarization controller. The entire process is as follows: Figure 4 The “output optical signal” in the text.

[0051] 2) Select a path to be calibrated (I) m -O n , (I m and O n These are the m-th input port and n-th output port of a silicon-based N×N optical switch chip, respectively (m, n = 1, 2, ..., N). Figure 3 The solid black line represents a path to be calibrated, where m = N-2 and n = N-3. The microprocessor sends control signals to the left and right 1×N optical switches, causing the input optical signals to enter the N×N optical switch chip from the (N-2)th (m-th) and (N-3)th (n-th) ports, respectively. If the path to be calibrated is I... m -O n After passing through the (N-1)th (i-th, i=1,2,…N)th optical switch in the intermediate stage (T=log2N stage), specifically through the second (p-th, p=1,2) 2×2 switch unit on the left and the second (q-th, q=1,2) 2×2 switch unit on the right of this optical switch, the microprocessor sends control signals to the two 1×2M analog switches, causing the left and right analog optical switches to switch to the 2N-2 (2×i-2+p) and 2N-2 (2×i-2+q) paths respectively, connecting to the second on-chip photodetectors on the left and right of the (N-1)th (i-th)th 2×2 optical switch in the intermediate stage (T=log2N stage). The input optical signal is converted into a photocurrent by the photodetector, passes through the analog switch, and enters the transimpedance amplifier. The transimpedance amplifier converts the input photocurrent into a voltage signal, which is then acquired by the analog-to-digital converter and fed back to the microprocessor. At this point, the microprocessor reads the voltage feedback from the analog-to-digital converter and sends a control signal to adjust the polarization controller state, causing the photodetectors on both sides to output a larger photocurrent. The entire process is... Figure 4 "Select calibration path"

[0052] 3) Continue Figure 4 In the "calibrate all switch units in the path" process, select Figure 3 Path to be calibrated I m -O n The initial voltage required for routing state is applied to the optical switch units along this path, enabling the photodetectors on both sides of the intermediate stage switch unit to detect a large photocurrent. The initial voltage values ​​for the "Bar" and "Cross" states of the switch units can be obtained using testing equipment. Furthermore, since the photodetectors are not on the black path, to obtain a large photocurrent for feedback on changes in the link's optical signal, the 2×2 optical switch units on both sides of the intermediate stage (stage T) need to operate in the opposite state to that under the black path ("Bar→Cross"). At this time, the lower left and lower right 2×2 switch units of stage T on the black path are both loaded with the voltage value of the "Cross" state. This completes the process. Figure 4 The "Apply initial voltage" step.

[0053] 4) Then proceed. Figure 4 The "calibrate switching unit" step in the document. First, calibrate the load voltage of the first-stage switching unit. From... Figure 3 The calibrated path shows that the optical signal is routed from the first-stage optical switch unit in the 'Bar' state to the photodetector (2×i-2+q) on the right side of the 2×2 switch unit in the intermediate stage (stage T). Additionally, from... Figure 5 It can be seen that when the phase difference of the optical signals in the upper and lower arms of the 2×2 optical switch unit is within When the optical power input from port 1 to output from port 3 changes, it becomes more sensitive to phase variations. Therefore, the difference between the two phase arms of the switching unit can be determined by whether the optical power output from port 3 reaches its minimum value. Whether the value is 0 or not, the calibration status of the switch can be determined by detecting whether the photodetector receives the minimum photocurrent. To quickly calibrate the voltage value of the first-stage switching unit in the "Cross" state, a one-dimensional golden section search algorithm can be used within the range near the initial "Cross" voltage to find the optimal voltage value for the "Cross" state. The process of the one-dimensional golden section search algorithm is as follows: Figure 4 As shown by the dashed line, if the voltage value that satisfies the algorithm's convergence within a given voltage range, it indicates that the optimal "Cross" state voltage value has been found. If not, the search range is expanded and the search continues until the voltage value is found. The specific implementation process is as follows: given an initial voltage range where the switch operates in the "Cross" state, the microprocessor calculates the next voltage value to be applied to the switch and then... Figure 1The digital-to-analog converter and drive amplifier shown are applied to this switching unit. The microprocessor compares the new feedback voltage signal with the previous voltage signal, calculates the next driving voltage for this unit, and applies it to the switching unit. This process is repeated until the driving voltage value that minimizes the photocurrent of the photodetector is found. This voltage value is the optimal voltage for the first-stage switch on the black path to operate in the "Cross" state, and is recorded. Figure 7 The diagram illustrates the search process for calibrating the "Cross" state of the first-stage switching unit using the one-dimensional golden section method. This method, through 24 iterations, found the voltage value of 1860mV in the "Cross" state, achieving a calibration accuracy of 3mV. Next, the initial voltage of the "Bar" state is applied to the first-stage optical switching unit again, causing the photodetector of the (T+1)th stage to obtain a larger photocurrent value, which is then used to mark the state of the next optical switching unit. This completes the process. Figure 4 The "calibration switch unit" step.

[0054] from Figure 4 As shown in the flowchart, the second optical switch unit and the remaining switch units on the left can be calibrated sequentially using the above method until the states of all switch units (levels 1 to T-1, left side of level T) on the left side of the path are calibrated. Similarly, the photodetector on the left switch unit at level T is used to calibrate the states of all switch units on the right side of the path (levels T+1 to 2T-1, right side of level T).

[0055] 5) After all switching units along this path have completed calibration, return. Figure 4 The second step in the flowchart selects the next calibration path. Similar to steps 3-4), the microprocessor sends control signals again to switch the output ports of the left and right 1×N optical switches and the 1×2M analog selection switch, adjusting the programmable polarization controller to ensure a large photocurrent in the photodetectors on both sides. This process is repeated. Figure 4 The step of "calibrating all units along the path" completes the calibration of the states of all switching units along the path to be calibrated. This process is repeated until all states of all units in the optical switch array are calibrated. The entire calibration process is as follows: Figure 4 As shown.

[0056] The structure of the 2×2MZI optical switch unit is as follows: Figure 5 As shown, when the switching unit operates in Cross or Bar mode, the optical signal input from port 1 and output from port 4 is defined as "Cross1" (1-4), the input from port 2 and output from port 3 is defined as "Cross2", the input from port 1 and output from port 3 is defined as "Bar1", and the input from port 2 and output from port 4 is defined as "Bar2". Due to the influence of process error, the phase of the light output after passing through the 3dB coupler has a slight phase deviation. Figure 6For definition When all other parameters are ideal, the transmission matrix spectral diagram of the 2×2 optical switch unit is as follows: Figure 6 It is known that optical signals input from ports 1 and 2 cannot achieve the "Bar" and "Cross" states with the maximum extinction ratio under the same phase difference. If the phase difference at which any port achieves the highest extinction ratio is used to represent the operating state of the entire switch at this time, it will result in the other port not achieving a high extinction ratio. Therefore, the phase difference calibration method under single-port optimal conditions cannot reflect the optimal operating performance of this 2×2 optical switch unit. Therefore, in actual testing, the average of the operating voltage at which the optimal extinction ratio is achieved in "Cross1" and "Cross2" can be used to represent the operating voltage of the switch in the "Cross" state, so that the optical signal input from either port 1 or port 2 can simultaneously achieve a high extinction ratio, such as... Figure 6 As shown by the black dot.

[0057] Therefore, the input signal only needs to pass through the "All-Cross" and "All-Bar" paths (a total of 2N paths) to complete the calibration of all required states of all switches. Using this method, each 2×2 switch unit will obtain 4 driving voltages, namely the circuits in the "Cross1", "Cross2", "Bar1", and "Bar2" states. Among them, if the routing of the left switch unit changes to the "Cross1", "Cross2", "Bar1", and "Bar2" states, in the calibration process of obtaining the minimum photocurrent, the actual operating voltage obtained is the operating voltage in the "Bar1", "Bar2", "Cross1", and "Cross2" states. The right side obtains the operating voltage in the opposite state of the routing. The voltage values ​​of all units in the N×N switch array under all operating states can be obtained by averaging in step 6, that is, each 2×2 switch unit has two operating voltages, "Cross" and "Bar". All operating voltages are stored in the microprocessor through a lookup table.

[0058] Figure 8 The voltage distribution of the "Cross" and "Bar" states after calibration of an extended Benes32×32 optical switch array shows that the "Cross" state voltage is mainly distributed around 2000mV, while the "Bar" state voltage is mainly distributed around 3200mV. By applying the calibration voltage to the switching unit of the transmission path and detecting the output power of the target port and the crosstalk port, the transmission spectrum of this path can be obtained. Figure 9The transmission spectrum of the optical signal from input 5 to path 4 is shown. With an 80nm bandwidth, the optical isolation between the target output port and the irrelevant port can reach about 28dB, which is consistent with the extinction ratio of the test switch unit device. This indicates that the switch unit on the path is working in the target state, and the calibration accuracy of the entire calibration system is relatively high.

Claims

1. An automatic calibration system for silicon-based N×N optical switch chips, characterized in that, include: A light source used to generate two single-wavelength input optical signals of equal energy; Two symmetrically arranged programmable polarization controllers are used to receive the input optical signal respectively, and adjust the polarization state of the input optical signal through the control signals they receive. Two symmetrically arranged 1×N optical switches are used to receive feedback signals and control the input optical signal to be input from one input port and output from any one of the N output ports, or to control the input optical signal to be input from any one of the N input ports and output from one output port. The silicon-based N×N optical switch chip includes 4M photodetectors, and a first-stage 2×2 optical switch, a second-stage 2×2 optical switch, ..., a T-stage 2×2 optical switch, ..., a 2T-2-stage 2×2 optical switch and a 2T-1-stage 2×2 optical switch; the T-stage 2×2 optical switch is composed of M 2×2 optical switches, and each 2×2 optical switch contains 4 redundant ports, 2 at each of the left and right ends, which are respectively connected to the photodetectors; Two symmetrically arranged 1×2M analog selection switches, each with 2M ports connected to 2M photodetectors, are used to output the real-time photocurrent of the photodetectors on different paths and transmit it to the corresponding transimpedance amplifier. Two symmetrically arranged transimpedance amplifiers are used to amplify the received photocurrent and convert it into a voltage signal; Two symmetrically arranged analog-to-digital converters are used to read the voltage signal output by the transimpedance amplifier and convert it into a digital signal; The microprocessor is a hardware platform for implementing the automatic calibration algorithm. It receives the voltage value fed back by the analog-to-digital converter, outputs a feedback signal and a feedback voltage value to the digital-to-analog converter, and automatically switches the output port of the 1×N optical switch unit according to the automatic correction algorithm, simulating the switch output port number, and feeding back the new voltage value to the digital-to-analog converter. A digital-to-analog converter is used to read the feedback signal from the microprocessor and convert it into an analog signal, which is then fed back to the driver amplifier. The driver amplifier converts the digital signal fed back from the digital-to-analog converter into a corresponding voltage value and applies it to the corresponding 2×2 switching unit.

2. The silicon-based N×N optical switch chip automatic calibration system according to claim 1, characterized in that, The network topology of the silicon-based N×N optical switch chip includes Benes, extended Benes, Crossbar, and dual-layer network (DLN) structures. The 2×2 optical switches are arranged in a certain network topology, and their number is determined by the topology. They are either 2×2 Mach-Zehnder interferometers or 2×2 microring resonators. If the T-level 2×2 optical switch does not have a redundant port, then the above-mentioned 2×2 optical switch is formed by cross-connecting four 2×2 optical switches.

3. The silicon-based N×N optical switch chip automatic calibration system according to claim 2, characterized in that, The photodetector is a silicon-germanium PIN detector.

4. An automatic calibration method for a silicon-based N×N optical switch chip, characterized in that, Includes the following steps: Output optical signal: The microprocessor turns on the light source and introduces the two equal-energy single-wavelength input optical signals into their respective programmable polarization controllers; Select calibration path: Select a path to be calibrated. m -O n (I) m and O n These are the m-th input port and n-th output port of the silicon-based N×N optical switch chip, respectively (m, n=1,2,…,N). The optical signal is input to the 1×N optical switch array from the left and right sides, that is, the optical signal on the left is input to the N×N optical switch array chip from the m-th port, and the optical signal on the right is input to the N×N optical switch chip from the n-th port. Path to be calibrated I m -O n After passing through the i-th (i=1,2,…M) optical switch in the intermediate stage, the microprocessor sends control signals to the two 1×2M analog switches on both sides, causing the two 1×2M analog switches on the left and right to switch to the 2×i-2+p and 2×i-2+q paths (p, q=1,2) respectively, which are connected to the p-th photodetector on the left and the q-th photodetector on the right of the i-th optical switch unit in the intermediate stage; the microprocessor obtains the optical signal input to the intermediate stage optical switch by reading the voltage signals input from the two analog-to-digital converters; Calibration path initialization: Based on the read voltage signal, the microprocessor sends a control signal to the programmable polarization controller to adjust the polarization state of the introduced input optical signal, maximizing the optical signal of the intermediate-stage optical switch; it also sends a control signal to the digital-to-analog converter to initialize the calibration path I. m -O n The initial voltage required to load all optical switching units in the circuit is such that the voltage signal read from the analog-to-digital converter is large. Calibration switch unit: calibrate the path I to be calibrated sequentially. m -O n In the optical switch unit, the microprocessor sends control signals to the corresponding digital-to-analog converter (DAC) to change the driving voltage applied to the optical switch unit to be calibrated. If the optical switch to be calibrated is on the right side of the middle stage, the voltage signal of the left DAC is read; otherwise, the voltage signal of the right DAC is read. The search algorithm continuously searches for the driving voltage applied to the optical switch unit to be calibrated until the convergence condition is met. This process is repeated until the calibration path I is reached. m -O n All optical switching units in the system have reached the convergence condition; Select the next path to be calibrated and repeat the above steps until the driving voltage values ​​of all units of the N×N optical switch are obtained. The obtained driving voltage is written into the lookup table, and the calibration is complete.

5. The automatic calibration method for silicon-based N×N optical switch chips according to claim 4, characterized in that, The initial voltage of the switch can be obtained through past experience or by testing equipment.

6. The automatic calibration method for silicon-based N×N optical switch chips according to claim 4, characterized in that, The search algorithms mentioned include one-dimensional golden section, linear scan, gradient descent, and particle swarm optimization.

7. The automatic calibration method for silicon-based N×N optical switch chips according to claim 4, characterized in that, The convergence condition is that the voltage signal read from the digital-to-digital converter is at its maximum or minimum. When the voltage signal is at its maximum, it means that the unit is in the state required by the calibrated path. When the voltage signal is at its minimum, it means that the unit is in the opposite state of the calibrated path.

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