A digital drive protection system and method for power electronic switching devices

Abstract

The invention discloses a digital drive protection system and method for a power electronic switch device, comprising a plurality of electronic switches and drive units Mxx; the electronic switch and drive unit Mxx comprises a power isolation unit U04, a signal isolation unit U03, a desaturation detection unit U01, a drive unit U02 and a power electronic switch device Q01; a temperature measuring resistor R01 is thermally connected to the power electronic switch device Q01, the temperature measuring resistor R01 is connected to a TEMP end of an analog-to-digital conversion unit B01, a SAMP end of the analog-to-digital conversion unit B01 is connected to a protection processing unit B02, a PWM end of the protection processing unit B02 is connected to a power isolation unit U04, a completely digital drive protection system, the fault judgment is handed over to the protection processing unit, and the flexibility is good; the protection processing unit and the core processing unit are connected through a single-line bus, the configuration of protection parameters and the query of the power electronic switch module status are realized, and only a few IO resources of the core processing unit are occupied.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic switches, and in particular to a digital drive protection system and method for a power electronic switch device. Background Art

[0002] With the rise of new energy technologies and markets, power converters are widely used, and their reliability has also attracted much attention. The core components of power converters are power electronic switching devices, such as IGBT, MOSFET, etc. The reliability of power electronic switches largely determines the reliability of power converters.

[0003] Therefore, in reality, manufacturers often improve the ability of power electronic switches to ride through faults by driving protection circuits to improve their reliability.

[0004] The existing drive protection circuit is implemented as follows: the drive protection circuit detects the tube voltage drop of the power electronic switch to determine whether it has desaturated. When desaturation is detected, the timing capacitor will be charged. When the voltage of the timing capacitor reaches the circuit preset value, the drive protection action is executed, the power electronic switch is turned off and blocked for a period of time, and almost at the same time, the fault status is sent to the control unit.

[0005] There are three problems with this protection mechanism:

[0006] 1. All protection parameters are solidified in the hardware circuit, and the system flexibility is insufficient;

[0007] 2. In order to reduce costs, some power electronic switches are designed to withstand short-circuit currents only for a very short time, and the drive protection circuit implemented by hardware is prone to malfunction;

[0008] 3. When a short circuit occurs in the diode neutral point clamped three-level (NPC) circuit, if the inner tube is turned off first, the outer tube will most likely be damaged by overvoltage. It is necessary to protect it by turning off the outer tube first and then the inner tube.

[0009] To this end, a digital drive protection system and method for a power electronic switch device are proposed. Summary of the invention

[0010] The object of the present invention is to provide a digital drive protection system and method for a power electronic switch device to solve the problems raised in the above background technology.

[0011] To achieve the above-mentioned object, the present invention provides the following technical solutions: A digital drive protection system and method for a power electronic switch device, comprising a plurality of electronic switches and a drive unit Mxx;

[0012] The electronic switch and drive unit Mxx includes a power isolation unit U04, a signal isolation unit U03, a desaturation detection unit U01, a drive unit U02 and a power electronic switch device Q01;

[0013] A temperature measuring resistor R01 is thermally connected to the power electronic switch device Q01, and the temperature measuring resistor R01 is connected to the TEMP terminal of the analog-to-digital conversion unit B01, and the SAMP terminal of the analog-to-digital conversion unit B01 is connected to the protection processing unit B02, and the PWM terminal of the protection processing unit B02 is connected to the power isolation unit U04, and the power isolation unit U04 is connected to the desaturation detection unit U01 and the drive unit U02, and the desaturation detection unit U01 and the drive unit U02 are connected to the signal isolation unit U03, and one path of the signal isolation unit U03 is connected to the DSAT terminal of the protection processing unit B02;

[0014] The DIO port, STA terminal and DRV terminal of the protection processing unit B02 are connected to the core processing unit B03, and the DRV terminal of the core processing unit B03 is connected to another path of the signal isolation unit U03.

[0015] Preferably: the SUPP port of the analog-to-digital conversion unit B01 collects the power supply VCC voltage through analog-to-digital conversion, and sends it to the protection processing unit B02 through the SAMP port.

[0016] Preferably, the desaturation detection unit U01 is connected to two ends of the power electronic switch device Q01.

[0017] Preferably, the driving signal output by the driving unit U02 is connected to the control port of the power electronic switching device Q01.

[0018] A method for a digital drive protection system of a power electronic switch device using any one of the above, including an over-temperature protection method, a power supply under-voltage protection method, a mode error protection method and a desaturation protection method;

[0019] The over-temperature protection method comprises the following steps:

[0020] A1, obtain the analog-to-digital conversion value of the voltage across the temperature measuring resistor R01 through the analog-to-digital conversion unit B01;

[0021] A2. Convert the conversion value to the temperature of the temperature measuring resistor R01;

[0022] A3. Determine whether overheating occurs;

[0023] A4. If overtemperature occurs, set the STA port to 0, otherwise return to 1.

[0024] Preferably: the power supply undervoltage protection method comprises the following steps:

[0025] B1, obtain the analog-to-digital conversion value of the VCC voltage through the analog-to-digital conversion unit B01;

[0026] B2. Determine whether power supply undervoltage occurs;

[0027] B3. If power undervoltage occurs, the STA port is set to 0, otherwise it returns to 1.

[0028] Preferably: the mode error protection method comprises the following steps:

[0029] C1, obtain the DRV port level;

[0030] C2. Determine whether the DRV mode matches the error mode. The mode that causes the power electronic switch to short-circuit or the mode in which the outer tube is turned on and the inner tube is turned off in the NPC topology are both error modes.

[0031] C3. If the error pattern is matched, the STA port is set to 0, otherwise it returns to 1.

[0032] Preferably: the desaturation protection method comprises the following steps:

[0033] D1, when DRV[x] is 1 and DSAT[x] is 1, start timer TMR[x];

[0034] D2, when DRV[x] is 0 or DSAT[x] is 0, TMR[x] is reset;

[0035] D3. When TMR[x] is 0, set the STA port to 0;

[0036] Preferably: when 4 electronic switches are included, x=1, 2, 3, 4.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] 1. The completely digital drive protection system entrusts the fault judgment to the protection processing unit, which has good flexibility.

[0039] 2. The protection processing unit and the core processing unit are connected through a single-line bus to realize the configuration of protection parameters and the status query of the power electronic switch module, occupying only a small amount of IO resources of the core processing unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a system circuit block diagram of the present invention;

[0041] Figure 2 It is intended to represent the frame format of the present invention;

[0042] Figure 3This is a schematic diagram of the data address of the present invention. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Example

[0044] See also Figure 1-3 The present invention provides a technical solution: comprising the following parts: an analog-to-digital conversion unit B01, a protection processing unit B02, a core processing unit B03, an electronic switch and drive unit Mxx (preferably, when 4 electronic switches are included, they are M01, M02, M03, and M04), and a temperature measuring resistor R01.

[0045] The electronic switch and drive unit Mxx comprises: a power isolation unit U04, a signal isolation unit U03, a desaturation detection unit U01, a drive unit U02, and a power electronic switch device Q01.

[0046] The temperature measuring resistor R01 and one of the power electronic switches (preferably, Q01 in M01) have a good thermal connection. The TEMP port of B01 obtains the voltage across R01 through analog-to-digital conversion and sends it to B02 through the SAMP port of B01.

[0047] The SUPP port of B01 collects the power supply VCC voltage through analog-to-digital conversion and sends it to B02 through the SAMP port of B01.

[0048] The PWM port of B02 controls U04 to convert the VCC voltage into an isolated power supply to power U01 and U02. U01 detects the voltage across the switch Q01 to determine whether Q01 is working in the saturation region, and inputs the detection result to U03. The isolated signal enters the DSAT port of B02.

[0049] The DRV port of B03 outputs the control signal of Q01, and this control signal is input to U03. The isolated signal is connected to the signal input of U02, and the drive signal output by U02 is connected to the control port of Q01.

[0050] The control signal output by the DRV port of B03 is also connected to the DRV port of B02.

[0051] B02 communicates with B03 through the DIO port and informs B03 of the error through the STA port.

[0052] The method of driving the protection system of the present invention includes four protection methods: an over-temperature protection method, a power supply under-voltage protection method, a mode error protection method, and a desaturation protection method.

[0053] The over-temperature protection steps are as follows:

[0054] A1. Obtain the analog-to-digital conversion value of the voltage across R01;

[0055] A2. Convert the conversion value to the temperature of R01;

[0056] A3. Determine whether overheating occurs;

[0057] A4. If overtemperature occurs, set the STA port to 0, otherwise return to 1.

[0058] The steps of power undervoltage protection are as follows:

[0059] B1. Get the analog-to-digital conversion value of VCC voltage;

[0060] B2. Determine whether power supply undervoltage occurs;

[0061] B3. If power undervoltage occurs, the STA port is set to 0, otherwise it returns to 1.

[0062] The steps of mode error protection are as follows:

[0063] C1, obtain the DRV port level;

[0064] C2. Determine whether the DRV mode matches the error mode. The mode that causes the power electronic switch to short-circuit or the mode in which the outer tube is turned on and the inner tube is turned off in the NPC topology are both error modes.

[0065] C3. If the error pattern is matched, the STA port is set to 0, otherwise it returns to 1.

[0066] The desaturation protection steps are as follows:

[0067] D1, when DRV[x] is 1 and DSAT[x] is 1, start timer TMR[x];

[0068] D2, when DRV[x] is 0 or DSAT[x] is 0, TMR[x] is reset;

[0069] D3. When TMR[x] is 0, set the STA port to 0.

[0070] Among them, when 4 electronic switches are included, x=1, 2, 3, 4.

[0071] Preferably, the communication between B02 and B03 adopts the following protocol:

[0072] 1. B03 is the master and B02 is the slave;

[0073] 2. The host sends a single-byte read / write command frame, and the slave replies with a response frame;

[0074] 3. The frame generally contains: device address / command, data address, data, checksum (preferably CRC-8);

[0075] 4. Frame format such as Figure 2 As shown (taking device address 1 as an example);

[0076] 5. The interval between frames is greater than 2 bytes of transmission time;

[0077] 6. Data address table such as Figure 3 As shown;

[0078] 7. This protocol supports bus mode. B03 can communicate with multiple B02s. Different B02s have their own device addresses.

[0079] Among them, Dx represents DSAT error; Mx represents mode error; x is 1-4, indicating 1-4 tubes; P represents power error; RO represents read-only, and the data written to this address will be discarded; RW represents readable and writable.

[0080] The error flag is cleared after a reset is written, which also sets the STA port to 1.

[0081] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A digital drive protection system for power electronic switch devices, comprising a plurality of electronic switches and a drive unit Mxx, characterized in that: The electronic switch and drive unit Mxx includes a power isolation unit U04, a signal isolation unit U03, a desaturation detection unit U01, a drive unit U02 and a power electronic switch device Q01; A temperature measuring resistor R01 is thermally connected to the power electronic switch device Q01, and the temperature measuring resistor R01 is connected to the TEMP terminal of the analog-to-digital conversion unit B01, and the SAMP terminal of the analog-to-digital conversion unit B01 is connected to the protection processing unit B02, and the PWM terminal of the protection processing unit B02 is connected to the power isolation unit U04, and the power isolation unit U04 is connected to the desaturation detection unit U01 and the drive unit U02, and the desaturation detection unit U01 and the drive unit U02 are connected to the signal isolation unit U03, and one path of the signal isolation unit U03 is connected to the DSAT terminal of the protection processing unit B02; The DIO port, STA port and DRV port of the protection processing unit B02 are connected to the core processing unit B03, and the DRV port of the core processing unit B03 is connected to another path of the signal isolation unit U03; The core processing unit B03 is the host, and the protection processing unit B02 is the slave. The host sends a single-byte read / write command frame, and the slave replies with a response frame. The frame generally includes: device address / command, data address, data and checksum, and the interval between frames is greater than the 2-byte transmission time; The core processing unit B03 communicates with multiple protection processing units B02, and the multiple protection processing units B02 have respective device addresses.

2. A digital drive protection system for power electronic switch devices according to claim 1, characterized in that: The SUPP port of the analog-to-digital conversion unit B01 collects the power supply VCC voltage through analog-to-digital conversion, and sends it to the protection processing unit B02 through the SAMP port.

3. A digital drive protection system for power electronic switch devices according to claim 1, characterized in that: The desaturation detection unit U01 is connected to two ends of the power electronic switch device Q01.

4. The digital drive protection system for power electronic switch devices according to claim 1, characterized in that: The driving signal output by the driving unit U02 is connected to the control port of the power electronic switch device Q01.

5. A method for a digital drive protection system of a power electronic switch device according to any one of claims 1 to 4, characterized in that: Including over-temperature protection method, power supply under-voltage protection method, mode error protection method and desaturation protection method; The over-temperature protection method comprises the following steps: A1, obtain the analog-to-digital conversion value of the voltage across the temperature measuring resistor R01 through the analog-to-digital conversion unit B01; A2. Convert the conversion value to the temperature of the temperature measuring resistor R01; A3. Determine whether overheating occurs; A4. If overtemperature occurs, set the STA port to 0, otherwise return to 1.

6. The method for digitally driving and protecting a power electronic switch device according to claim 5, characterized in that: The power supply undervoltage protection method comprises the following steps: B1, obtain the analog-to-digital conversion value of the VCC voltage through the analog-to-digital conversion unit B01; B2. Determine whether power supply undervoltage occurs; B3. If power undervoltage occurs, the STA port is set to 0, otherwise it returns to 1.

7. The method for digitally driving and protecting a power electronic switch device according to claim 5, characterized in that: The mode error protection method comprises the following steps: C1, obtain the DRV port level; C2. Determine whether the DRV mode matches the error mode. The mode that causes the power electronic switch to short-circuit or the mode in which the outer tube is turned on and the inner tube is turned off in the diode midpoint clamped three-level NPC topology are both error modes. C3. If the error pattern is matched, the STA port is set to 0, otherwise it returns to 1.

8. The method for digitally driving and protecting a power electronic switch device according to claim 5, characterized in that: The desaturation protection method comprises the following steps: D1, when DRV[x] is 1 and DSAT[x] is 1, start timer TMR[x]; D2, when DRV[x] is 0 or DSAT[x] is 0, TMR[x] is reset; D3. When TMR[x] is 0, set the STA port to 0.

9. The method for digitally driving and protecting a power electronic switch device according to claim 8, characterized in that: When 4 electronic switches are involved, x=1, 2, 3, 4.

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