Forming Nanotwinned Regions with Tunable Volume Fractions in Ceramic Coatings
By forming a ceramic film with nanotwin zone in the PVD system, the problem of light metal poor performance in mechanical wear and hardness is solved, and the mechanical properties optimization of the ceramic film is achieved.
Patent Information
- Application Number
- CN202180017613.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-15
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2041-07-15
AI Technical Summary
Lightweight metals such as titanium alloys do not perform well in mechanical wear and hardness, resulting in insufficient fatigue resistance and fracture toughness when used in some applications.
By performing a cosputtering process in the PVD system, a ceramic film with a nanotwin region is formed. This technology allows adjustment of the volume fraction of the nanotwin region in a ceramic film, thereby optimizing its mechanical properties.
By adjusting the volume fraction of the nanotwin region in the ceramic film, the fatigue resistance, fracture toughness and hardness of the ceramic film are significantly improved, and are suitable for handling components with complex geometric shapes under mild conditions.
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Figure CN115812002B_ABST
Abstract
Description
BACKGROUND OF THE INVENTION
[0001] The following description relates to forming nano-twinned regions with tunable volume fractions in ceramic films.
[0002] Light metals (such as titanium alloys) have become an integral part of the automotive, aerospace, transportation, and many other industries. They contribute to improving the efficiency, performance, and sustainable manufacturing of these industries by offering the possibility of weight reduction and cost-effective performance. Despite the good strength-to-weight ratio of light metals, they tend to have low hardness and exhibit poor resistance to mechanical wear, making surface engineering and advanced coatings crucial for the use of light metals in many applications. BRIEF DESCRIPTION OF THE DRAWINGS
[0003] Figure 1 is a block diagram showing various aspects of an exemplary physical vapor deposition (PVD) system.
[0004] Figure 2 is a schematic diagram showing a top view and a cross-sectional view of an exemplary device.
[0005] Figure 3 is a flowchart showing various aspects of an exemplary process.
[0006] Figure 4A is an in-plane transmission electron microscopy (TEM) image showing various aspects of an exemplary ceramic film.
[0007] Figure 4B shows Figure 4A a cross-sectional TEM image showing various aspects of the exemplary ceramic film shown.
[0008] Figure 4C shows Figure 4B a cross-sectional high-resolution TEM (HRTEM) image of the exemplary ceramic film shown, a fast Fourier transform (FFT) pattern of the nano-twinned regions in the exemplary ceramic film, and a corresponding inverse FFT (IFFT) image.
[0009] Figure 5 is an optical micrograph of the surface of various ceramic films after hardness testing.
[0010] Figures 6A - 6E is a cross-sectional TEM image of various ceramic films and corresponding selected area diffraction (SAD) patterns.
[0011] Figure 7A is a cross-sectional TEM image of a ceramic film deposited on a single-crystal MgO(111) substrate and a corresponding SAD pattern.
[0012] Figure 7Bis a cross-sectional TEM image of a ceramic film deposited on a titanium alloy substrate and a corresponding SAD pattern. Detailed implementation manners
[0013] In some aspects described herein, a physical vapor deposition (PVD) system is used to fabricate a ceramic film on the surface of a substrate. The ceramic film is formed by performing a co-sputtering process of two or more sputtering materials in a processing chamber of the PVD system. The co-sputtering process can be carried out at a controlled pressure level in a controlled gas atmosphere. In some embodiments, a ceramic film containing titanium, boron, and nitrogen is prepared by co-sputtering a titanium metal target and a titanium diboride target in a nitrogen environment. The ceramic film from the co-sputtering deposition process has a heterogeneous structure in which grains are embedded in an amorphous matrix. Each grain includes a nano-twin region.
[0014] In some embodiments, the systems and techniques described herein can provide technical advantages and improvements. For example, the ceramic films formed using the methods and systems introduced herein are deposited on the surface of a component or assembly to improve its mechanical properties, such as fatigue resistance, fracture toughness, hardness, and other mechanical properties. The volume fraction of nano-twin regions in the ceramic film can be adjusted in the range of 30% to 80% by adjusting the deposition conditions (such as power, substrate bias, gas composition, substrate temperature, etc.) to optimize the mechanical properties. Forming the ceramic film using the methods and systems introduced herein can be carried out under mild conditions, such as at a temperature in the range of room temperature to 400 degrees Celsius (°C) and a pressure in the range of 0.1 to 0.35 pascals (Pa). The low-cost processing disclosed herein significantly reduces the processing time and energy requirements and allows such ceramic films to be formed on the surface of components or assemblies with complex geometries on an industrial scale. In certain cases, combinations of these and potential other advantages and improvements can be obtained.
[0015] Figure 1 is a schematic diagram showing various aspects of an exemplary physical vapor deposition (PVD) system 100. The exemplary physical vapor deposition (PVD) system 100 is used to form a heterogeneous ceramic film. The heterogeneous ceramic film formed using the exemplary PVD system includes grains and an amorphous matrix in which the grains are embedded. In some embodiments, each grain in the ceramic film fabricated using the PVD system 100 includes one or more nano-twin regions. The nano-twin regions are identified as mobile segments of crystals at grain boundaries, where the lattice on each edge is connected across a hypothetical twin plane by mirror symmetry. The volume fraction of nano-twin regions in the ceramic film can be adjusted by adjusting one or more deposition conditions during the manufacturing process. By adjusting the volume fraction of nano-twin regions in the ceramic film, the mechanical properties (such as fatigue resistance, fracture toughness, hardness, and other properties) of the ceramic film can be adjusted and optimized.
[0016] As Figure 1As shown, the PVD system 100 includes a processing chamber 102; and the processing chamber 102 includes targets 105 coupled to respective cathodes 104. As shown in the example here, the PVD system 100 includes three targets 105A, 105B, 105C coupled to three respective cathodes 104A, 104B, 104C. In some cases, the processing chamber 102 may include more cathodes 104 coupled to more targets 105, and the cathodes 104 in the processing chamber 102 may be arranged in another way. In some embodiments, the target 105 contains a sputtering material, and the sputtering material includes transition metals (such as titanium Ti, tungsten W, molybdenum Mo, niobium Nb, etc.), metal alloys, transition metal borides (such as titanium diboride TiB 2 2), transition metal carbides (such as tungsten carbide WC), or other sputtering materials (such as carbon C).
[0017] As Figure 1 shown, the processing chamber 102 includes a substrate holder 106 configured to hold a substrate 107, and the substrate 107 faces the target 105 during the manufacturing process. The substrate holder 106 in the PVD system 100 is located at the center of the processing chamber 102. The substrate holder 106 with the substrate 107 can be loaded into the PVD system 100 by a mechanical transfer arm. In some cases, the substrate holder 106 in the PVD system 100 is equipped with temperature control elements (such as temperature sensors, heaters, or other elements). Each temperature control element is communicatively coupled to a temperature control unit 114. The temperature control unit 114 may be located inside the processing chamber 102 (e.g., enclosed in a Faraday shield to protect the electronic circuit from RF interference), or outside the processing chamber 102. In certain examples, the targets 105A, 105B, 105C and the respective cathodes 104A, 104B, 104C can be cooled by a coolant controlled by the temperature control unit 114.
[0018] In some cases, the substrate 107 may include semiconductor materials (such as silicon and germanium), metals (such as stainless steel), metal alloys (such as titanium alloys), metal oxides (such as magnesium oxide), metal nitrides, or other materials including group III, group IV, and group V elements. In some cases, the substrate 107 may be crystalline, polycrystalline, or amorphous. In some cases, the substrate 107 may include metal parts or components on which surface treatment is required to improve mechanical properties.
[0019] Each cathode 104A, 104B, 104C in the processing chamber 102 is coupled to a power supply 112. In some embodiments, the PVD system 100 is a DC magnetron sputtering system configured with a cathode target / anode shield arrangement. In this case, the power supply 112 of the exemplary PVD system 100 connected to each of the cathodes 104A, 104B is a DC discharge power supply. In some cases, the power supply 112 is a radio frequency (RF) power supply and a corresponding matching circuit operating at a frequency ranging from a few tens of kilohertz (kHz) to a few tens of megahertz (MHz). In some cases, other techniques such as inductively coupled plasma, electron cyclotron resonance, microwave, or helicon wave can be integrated with the power supply 112 to generate a high-density discharge, thereby obtaining desired deposition properties. By applying electrical energy to the cathode 104, a plasma (e.g., a gas containing ionized atoms or molecules) can be formed in the space near the target 105 in the processing chamber 102. In some cases, the substrate holder 106 can also be coupled to the power supply 112 to attract charged particles in the plasma, and these charged particles are bombarded by charged processing gas molecules (e.g., Ar + ) away from the surface of the target 105. In some cases, the substrate holder 106 can be coupled to electrical ground.
[0020] The exemplary PVD system 100 includes one or more gas supply ports 110 for receiving a processing gas from one or more corresponding external gas lines and supplying the processing gas into the processing chamber 102. As Figure 1 shown, the exemplary PVD system 100 further includes a vacuum port 108 connected to a vacuum line having one or more pressure control units (e.g., a vacuum pump, a pressure gauge, or another unit). In some embodiments, the processing gas is supplied into the processing chamber 102 through one or more gas supply ports 110 and pumped out of the processing chamber 102 through the vacuum port 108. One or more pressure control units are configured to evacuate the processing chamber 102 and create an environment in the processing chamber 102 with a pressure in the range of 0.1 - 0.35 Pa. In some embodiments, the processing gas includes nitrogen (N 2 ), argon (Ar), or other types of gases. In some other cases, the processing gas can include a reactive gas, depending on the type of sputter deposition process and the composition of the ceramic thin film. For example, the processing gas can include oxygen (O 2 ), methane (CH 4 ), acetylene (C 2 H 2 ), ammonia (NH 3 ), hydrogen sulfide (H 2 S), or other types of reactive gases. One or more gas supply ports 110 can be adjacent to the target 105 (e.g., behind the cathode 104).
[0021] In some cases, the processing chamber 102 may also be equipped with a thickness monitoring system (such as a quartz crystal monitor, spectroscopic ellipsometer, reflection high energy electron diffraction detector (RHEED), or other types of systems). In some cases, the processing chamber 102 also includes shutters, rotational manipulators, viewing ports, transfer ports, induction coils, and other components for the respective targets 105.
[0022] The PVD system 100 can be used to fabricate ceramic thin films on a substrate 107. For example, a ceramic thin film can be deposited on the surface of the substrate 107 according to a specified recipe. The recipe specifies the parameters for establishing an appropriate environment in the processing chamber 102 to deposit a ceramic thin film with desired properties. In some embodiments, the recipe specifies one or more of the following parameters: the processing gases supplied to the processing chamber 102, the pressure in the processing chamber 102 during deposition, the electrical energy parameters (such as power, voltage, frequency, etc.) supplied to each of the cathodes 104A, 104B, 104C, and / or the substrate holder 106, the temperature of the substrate 107, the deposition time, or other parameters.
[0023] As Figure 1 shown, the temperature control unit 114 and the power supply 112 are communicatively coupled to the control system 116. In some cases, the control system 116 may include a processor, a memory, and a communication interface that receives user input and controls the operations of the temperature control unit 114, the power supply 112, and other components (such as a pressure control unit) of the PVD system 100 to perform operations (such as operations regarding Figure 3 the example process 300 in
[0024] The processor of the control system 116 can be implemented as a general-purpose processor, a chip multi-processor (CMP), a dedicated processor, an embedded processor, a digital signal processor (DSP), a network processor, an input / output (I / O) processor, a media access control (MAC) processor, a radio baseband processor, a coprocessor, a microprocessor (such as a complex instruction set computer (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor), or other processing devices. The processor can also be implemented by a controller, a microcontroller, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a programmable logic device (PLD), or other devices.
[0025] The memory of control system 116 may include machine-readable or computer-readable media capable of storing data, which includes volatile / non-volatile memory and removable / non-removable memory. The memory may include at least one non-volatile storage unit. The non-volatile storage unit is capable of storing one or more software programs. The software programs may, for example, contain application programs, user data, device data, and / or configuration data or other types of data.
[0026] In some examples, the memory may include read-only memory (ROM), random access memory (RAM), dynamic RAM (DRAM), double data rate DRAM (DDR-RAM), synchronous DRAM (SDRAM), static RAM (SRAM), programmable ROM (PROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory (e.g., NOR or NAND flash), content addressable memory (CAM), polymer memory (e.g., ferroelectric polymer memory), phase change memory (e.g., ovonic memory), ferroelectric memory, silicon oxide-nitride-oxide-silicon (SONOS) memory, disk memory (e.g., floppy disk, hard disk, optical disk, magnetic disk), or card (e.g., magnetic card, optical card) or any other type of medium suitable for storing information. In some cases, at least one non-transitory computer-readable storage medium is included in the memory having computer-executable instructions that, when executed by a processor, may cause the processor to perform a manufacturing process (e.g., Figure 3 example process 300 in
[0027] In some examples, the communication interface of control system 116 may include suitable mechanisms or components to at least enable a user to provide input to control system 116 and enable control system 116 to provide output to the user. For example, the communication interface may include buttons, keypads, keyboards, click wheels, touchscreens, or motion sensors. In some cases, the communication interface may include a visual peripheral output device for providing a display visible to the user. For example, the visual peripheral output device includes a screen (e.g., a liquid crystal display (LCD) screen) incorporated into control system 116 of PVD system 100. In some cases, the visual peripheral output device may include an encoder / decoder (also referred to as a codec) for converting digital media data into an analog signal. For example, the visual peripheral output device may include a video codec, an audio codec, or any other suitable type of codec.
[0028] In some examples, the communication interface can include any suitable hardware, software, or combination of hardware and software capable of coupling the temperature control unit 114 and the power supply 112 to the control system 116. The communication interface can be arranged to operate using any suitable technique for controlling information signals with a desired set of communication protocols, services, or operating procedures. The communication interface can include appropriate physical connectors to connect to the corresponding communication medium (e.g., wired or wireless).
[0029] Figure 2 is a schematic diagram showing a top view and a cross-sectional view of an example device 200. The example device 200 includes a substrate 202, an intermediate layer 210, and a ceramic film 204. The substrate 202 can be implemented as the substrate 107 as shown, or in another way. In some cases, the substrate 202 can be part of a mechanical component or tool in a variety of industrial applications. In certain cases, the ceramic film 204 can be used to improve the mechanical properties of the substrate 202. For example, the ceramic film 204 can be used to increase the hardness of the substrate 202, increase the lifespan of the substrate 202, increase the wear resistance of the substrate 202, or for other purposes. In some embodiments, a PVD system (such as Figure 1 the PVD system 100 shown) or in another way causes the ceramic film 204 to form on the substrate 202. As Figure 1 shown, the ceramic film 204 has a heterogeneous structure that includes grains 206 embedded in an amorphous matrix 208. The heterogeneous structure and mechanical properties of the ceramic film 204 can be manipulated by adjusting the deposition conditions of the manufacturing process (such as the example process 300 shown in Figure 2 ) or in other ways. Figure 3
[0030] In some embodiments, the intermediate layer 210 includes Ti metal or another type of material. The intermediate layer 210 can be formed on the surface of the substrate 202 to improve the bonding or adhesion of the ceramic film 204 to the substrate 202. In some embodiments, the intermediate layer 210 can be formed using a PVD system before the co-sputtering deposition of the ceramic film 204. The intermediate layer 210 can have a thickness in the range of 10 - 150 nm.
[0031] In Figure 2 the example device 200 shown, each grain 206 extends along the growth direction of the ceramic film 204 (e.g., the length direction along the Z-axis). In some other cases, each grain 206 can extend in a direction having a small offset (e.g., 1 degree, 5 degrees, 10 degrees, or other values) relative to the growth direction of the ceramic film. As Figure 2As shown, each grain 206 is an elongated particle with one dimension (e.g., along the Z-axis) greater than the other two dimensions (e.g., the width direction in the X-Y plane). In some cases, the width of the grains 206 in the ceramic film 204 is in the range of 3 to 30 nanometers (nm), 8 to 16 nm, or other ranges. In some embodiments, the thickness of the ceramic film 204 is in a range greater than 400 nm, greater than 1000 nm, greater than 2000 nm, or other ranges. In some embodiments, each of the grains 206 and the amorphous matrix 208 in the ceramic film 204 includes one or more transition metals, boron, and nitrogen. For example, the transition metal in the ceramic film 204 is titanium (Ti). In some embodiments, the boron concentration in the ceramic film 204 is in the range of 2 to 18 atomic percent.
[0032] In some embodiments, one or more grains 206 in the ceramic film 204 include nano-twin regions. In some cases, the nano-twin regions in the grains 206 are identified as shifted segments of the crystal at the grain boundaries, where the lattice on each edge is connected across a hypothetical twin plane by mirror symmetry. The volume fraction of the nano-twin regions in the ceramic film 204 is in the range of 30 to 80%. In some embodiments, the twin spacing in each of the one or more nano-twin regions in the grains is in the range of 0.35 to 0.65 nanometers or in another range.
[0033] Figure 3 is a flowchart showing various aspects of an exemplary manufacturing process 300. Various aspects of the exemplary manufacturing process 300 can be performed in a PVD system (e.g., Figure 1 the PVD system 100 shown) or in another system. The exemplary manufacturing process 300 can be used to form a ceramic film (e.g., Figure 2 the ceramic film 204 shown) or to manufacture a device (e.g., Figure 2 the device 200 shown in). The exemplary process 300 can include other or different operations, and these operations can be performed in the order shown or in another order. In some cases, the operations in the exemplary process 300 can be combined, iterated, or repeated, or performed in another way.
[0034] At 302, two or more targets are provided. In some cases, two or more targets (e.g., Figure 1 the target 105 in) are coupled to the corresponding cathodes (e.g., Figure 1 the cathode 104 in) in a PVD system (e.g., Figure 1 the PVD system 100 in). In some cases, two or more targets include a titanium metal target and a titanium diboride target. In some cases, the titanium metal target is a high-purity titanium target (99.95%). In some cases, each of the respective cathodes is electrically coupled to a power supply (e.g., Figure 1a power supply 112), which can adjust the electrical energy applied to two or more targets. In some embodiments, the power supply is a DC power supply that supplies DC electrical energy to two or more targets in the PVD system.
[0035] In some embodiments, one or more substrates are loaded onto a substrate holder (such as Figure 1 the substrate holder 106 in the processing chamber 102) in the processing chamber of the PVD system. One or more substrates are configured on the substrate holder facing the targets. Each of the one or more substrates can be implemented as a substrate 107 as shown in Figure 1 Figure 1 Figure
[0036] At 304, a gas atmosphere is formed. In some embodiments, a gas atmosphere is formed in the processing chamber of the PVD system. In some embodiments, the gas atmosphere includes a mixture of Ar and N 2 . In some embodiments, the N 2 fraction in the gas atmosphere is about 20%. During co-sputtering deposition, the flow rate of Ar is 20 sccm (standard cubic centimeters per minute); the flow rate of N 2 is 5 sccm. During co-sputtering deposition, the flow rates remain constant in the processing chamber. The processing chamber is pumped, for example, by the operation of a pressure control unit; and during the co-deposition process, the gas atmosphere in the processing chamber is maintained at a pressure of 0.2 Pa.
[0037] At 306, sputtering materials from two or more targets are co-sputtered. In some embodiments, the substrate can be heated. For example, by Figure 1 the operation of the temperature control unit 114 in
[0038] , the temperature of the substrate during co-sputtering deposition can be maintained at a temperature equal to or less than 400 degrees Celsius. In some embodiments, no heating or cooling is applied to the substrate during co-sputtering deposition. Figure 1 Electrical energy is applied to two or more targets by the operation of the power supply 112 in -1 to cause co-sputtering. For example, when the ceramic film contains titanium boride nitride, 450 watts of direct current is applied to a high-purity titanium metal target, and direct current in the range of 50 - 200 watts is applied to a titanium diboride target. In some embodiments, a substrate bias voltage is applied to the substrate holder during co-sputtering deposition. In some cases, the substrate bias voltage is in the range of -150 to -50 volts. Under these deposition conditions, a ceramic film is deposited on the surface of the substrate at a deposition rate in the range of 0.1 - 0.8 nanometers per second (nm s
[0039] In some embodiments, before the co-sputtering deposition of the ceramic film, an intermediate layer may be formed on the surface of the substrate to improve the adhesion between the surface of the ceramic film and the substrate. For example, a titanium metal intermediate layer may be deposited on the surface of the substrate by performing a sputtering deposition process. For example, in a gas atmosphere composed of argon, at a working pressure of 0.2 Pa, 450 watts of direct current power may be applied to a high-purity titanium metal target with a substrate bias voltage of -110 V. After the intermediate layer is formed on the surface of the substrate, co-sputtering deposition is performed, during which the ceramic film may subsequently be formed on the intermediate layer.
[0040] Figure 4A Are in-plane transmission electron microscope (TEM) images 400, 402 showing various aspects of an exemplary ceramic film. Figure 4B Shows Figure 4A Cross-sectional TEM image 410 showing various aspects of the exemplary ceramic film shown. Figure 4C Shows Figure 4B Cross-sectional high-resolution TEM (HRTEM) images 420 of the exemplary ceramic film shown, fast Fourier transform (FFT) pattern 422 of the nanotwin region, and corresponding inverse FFT (IFFT) image 424. As Figure 3 In the exemplary manufacturing process 300 as described, the exemplary ceramic film is deposited by performing co-sputtering deposition of Ti metal and TiB 2 on a single-crystalline silicon-based substrate. Specifically, the first electric power provided on the Ti target is equal to 450 watts (W), and the second electric power provided on the TiB 2 target is equal to 120 W. During the co-sputtering deposition, the silicon-based substrate on the substrate holder is heated to 400 degrees Celsius, and a substrate bias voltage of -110 V is applied to the substrate holder. Nitrogen (N 2 ) and argon (Ar) are supplied to the processing chamber at flow rates of 5 sccm and 20 sccm, respectively. The working pressure in the processing chamber is maintained at 0.2 Pa during the deposition process.
[0041] Before characterizing the exemplary ceramic film using TEM, the device including the ceramic film on the silicon-based substrate is cut in directions along the X-Y plane and perpendicular to the X-Y plane (e.g., the X-Z plane) using a focused ion beam (FIB). As Figure 4AAs shown in the in-plane TEM image 400, the ceramic film includes nanocrystals embedded in an amorphous matrix. The nanocrystals are randomly and uniformly embedded in the amorphous matrix. The width of the nanocrystals in the X-Y plane ranges from 8 to 16 nm. The twin boundaries are perpendicular to the film growth direction, and the middle of the two twin phase regions is the amorphous phase. The figure in the upper right corner is the result of FFT. The spots in the FFT pattern indicate the presence of twins. This corresponds to the observation of the surface TEM sample. Nanotwin regions can be observed in the grains embedded in the amorphous matrix. In some cases, the nanotwin regions are surrounded by or embedded in the amorphous matrix.
[0042] As shown in the cross-sectional HRTEM image 420, the FFT pattern 422 and the inverse FFT image 424 corresponding to the box in the cross-sectional HRTEM image 420 represent the presence of nanotwin regions and the atomic arrangement between two adjacent nanotwins. The thickness of the nanotwins is about 2 to 3 atomic layers, or in the range of 0.35 to 0.65 nanometers.
[0043] Figure 5 are optical micrographs 500 of the surfaces of various ceramic films after hardness testing. Using a physical vapor deposition system (such as Figure 1 the physical vapor deposition system 100 shown in Figure 3 ), the ceramic films are prepared by performing the operations of the exemplary manufacturing process 300 shown in 2 . Each exemplary ceramic film is deposited on a single-crystalline silicon substrate heated to 400 degrees Celsius at a constant substrate bias voltage of -110V. The ceramic films are deposited on the silicon substrate by co-sputtering a Ti target (constant DC power of 450W) and a TiB Figure 5 target (various DC powers, such as 50W, 80W, 120W, and 200W). All the ceramic films prepared here have the same thickness (about 2 micrometers (μm)). Then the toughness of the ceramic films is tested using the Vickers hardness test method. As 2 shown, residual imprints are observed on all the surfaces of the ceramic films. The ceramic films deposited with 80W and 120W DC power on the TiB
[0044] Figures 6A - 6E is as Figure 5Cross-sectional TEM images 600, 610, 620, 630, 640 of various ceramic films shown and corresponding selected area diffraction (SAD) patterns 602, 612, 622, 632, 642. Each exemplary ceramic film was deposited on a single-crystalline silicon-based substrate heated to 400 degrees Celsius at a constant substrate bias voltage of -110V. By co-sputtering Ti (at a constant DC power value of 450W) and TiB 2 (at various DC power values, such as 50W( Figure 6A ), 80W( Figure 6B ), 120W( Figure 6C ), 160W( Figure 6D ), and 200W( Figure 6E )) to prepare ceramic films on the silicon-based substrate. The thickness of all ceramic films is approximately 2μm.
[0045] The atomic ratio (Ti:B:N) in the ceramic films was determined by performing energy-dispersive X-ray analysis (EDX) equipped in the TEM instrument. Specifically, the atomic ratio (Ti:B:N) of the first ceramic film deposited with a DC power of 50W applied to the TiB 2 target was determined to be 1:0.04:1.06. The cross-sectional morphology and corresponding SAD pattern of the first ceramic film are as Figure 6A shown. The atomic ratio of B in the first ceramic film is approximately 1.9%. The volume fraction of the nano-twin regions in the first ceramic film is approximately 45%. The hardness of the first ceramic film is approximately 43.2GPa.
[0046] The atomic ratio (Ti:B:N) of the second ceramic film deposited with a DC power of 80W applied to the TiB 2 target was determined to be 1:0.14:1.16. The cross-sectional morphology and corresponding SAD pattern of the second ceramic film are as Figure 6B shown. The atomic ratio of B in the second ceramic film is approximately 6.0%. The volume fraction of the nano-twin regions in the second ceramic film is approximately 65%. The hardness of the second ceramic film is approximately 41.5GPa.
[0047] The atomic ratio (Ti:B:N) of the third ceramic film deposited with a DC power of 120W applied to the TiB 2 target was determined to be 1:0.26:1.20. The cross-sectional morphology and corresponding SAD pattern of the third ceramic film are as Figure 6C shown. The atomic ratio of B in the third ceramic film is approximately 10.6%. The volume fraction of the nano-twin regions in the third ceramic film is approximately 55%. The hardness of the third ceramic film is approximately 38.8GPa.
[0048] The atomic ratio (Ti:B:N) of the fourth ceramic film deposited with a DC power of 160W applied to the TiB 2The atomic ratio (Ti:B:N) of the fourth ceramic film deposited with a DC power of 160 W applied to the target was determined to be 1:0.31:1.19. The cross-sectional morphology and the corresponding SAD pattern of the fourth ceramic film are as shown in Figure 6D . The atomic ratio of B in the fourth ceramic film is approximately 12.4%. The volume fraction of the nanotwinned regions in the fourth ceramic film is approximately 42%. The hardness of the fourth ceramic film is approximately 35.9 GPa.
[0049] On the TiB 2 The atomic ratio (Ti:B:N) of the fifth ceramic film deposited with a DC power of 200 W applied to the target was determined to be 1:0.40:1.32. The cross-sectional morphology and the corresponding SAD pattern of the fifth ceramic film are as shown in Figure 6E . The atomic ratio of B in the fifth ceramic film is 14.7%. As shown in the cross-sectional TEM image 640 in Figure 6E , no nanotwinned regions were observed in the fifth ceramic film. The hardness of the fifth ceramic film is approximately 33.1 GPa.
[0050] Figures 7A - 7B are cross-sectional TEM images 700, 710 and the corresponding SAD patterns 702, 712 of the ceramic films deposited on single-crystal MgO(111) substrates ( Figure 7A ) and titanium alloy substrates ( Figure 7B ). The ceramic films were prepared by operating a physical vapor deposition (PVD) system (such as the physical vapor deposition system 100 shown in Figure 1 ) according to the exemplary manufacturing process 300 shown in Figure 3 . Specifically, a high-purity Ti target (99.99%) and a TiB 2 target were used for co-sputtering the ceramic films in a JCP500 PVD sputtering system. The deposition of all ceramic films was carried out at a constant substrate temperature of 400 °C and a constant substrate bias voltage of -110 V. Co-sputtering deposition was performed at a flow rate ratio of 20 sccm (Ar) / 5 sccm (N 2 ) in a gas atmosphere including an Ar / N 2 gas mixture. During the co-sputtering deposition process, the gas atmosphere in the processing chamber was maintained at a pressure of 0.2 Pa. The DC powers applied to the Ti target and the TiB 2 target were set to constant values of 450 W and 80 W, respectively. The titanium alloy substrate is a Ti6-Al4-V substrate.
[0051] The atomic ratio (Ti:B:N) in the ceramic film was determined by performing energy-dispersive X-ray analysis (EDX) equipped in a TEM instrument. The atomic ratio (Ti:B:N) of the ceramic film on the single-crystalline MgO (111) substrate was determined to be 1:0.12:1.18. The atomic ratio of B in the ceramic film on the single-crystalline MgO (111) substrate was approximately 5.2%. The volume fraction of the nanotwinned regions in the ceramic film on the single-crystalline MgO (111) substrate was approximately 60.8%. The hardness of the ceramic film on the single-crystalline MgO (111) substrate was approximately 41.9 GPa.
[0052] The atomic ratio (Ti:B:N) of the ceramic film on the titanium alloy substrate was determined to be 1:0.12:1.18. The atomic ratio of B in the ceramic film on the titanium alloy substrate was 5.8%. The volume fraction of the nanotwinned regions in the ceramic film on the titanium alloy substrate was approximately 63.6%. The hardness of the ceramic film on the titanium alloy substrate was approximately 40.9 GPa.
[0053] Some of the subject matters and operations described in this specification may be implemented in digital electronic circuits or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or combinations of one or more of them. Some of the subject matters described in this specification may be implemented as one or more computer programs encoded on a computer storage medium, i.e., one or more modules of computer program instructions, which are executed by, or control the operation of, a data processing apparatus. The computer storage medium may be or may be included in a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination of one or more of them. Additionally, although a computer storage medium is not a propagated signal, a computer storage medium may be the source or destination of computer program instructions encoded in an artificially generated propagated signal. The computer storage medium may also be or be included in one or more separate physical components or media.
[0054] Some of the operations described in this specification may be implemented as operations performed by a data processing apparatus on data stored on one or more computer-readable storage devices or received from other sources.
[0055] The term "data processing apparatus" includes all types of apparatuses, devices, and machines for processing data, such as including programmable processors, computers, system-on-chips, or multiples or combinations of the foregoing. The apparatus may include dedicated logic circuits, such as field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). In addition to hardware, the apparatus may also include code that creates an execution environment for the computer programs being discussed, such as code including a processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime code environment, a virtual machine, or a combination of one or more of them.
[0056] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and a computer program can be deployed in any form (including as a stand-alone program or as a module, component, subroutine, object, or other unit suitable for use in a computing environment). A computer program can, but need not, correspond to a file in a file system. The program can be stored in a part of a file that contains other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or portions of code). A computer program can be deployed to execute on one computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a communication network.
[0057] Some of the steps and logical flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input data and generating output. The steps and logical flows can also be performed by dedicated logic circuitry, and the apparatus can also be implemented as dedicated logic circuitry (e.g., an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit)).
[0058] In an overall aspect of the above, a method of manufacturing a ceramic film having a nanotwinned region is disclosed.
[0059] In a first example, a method of manufacturing a ceramic film on a surface of a substrate in a vacuum chamber is disclosed. The ceramic film includes a plurality of grains; each grain includes one or more nanotwinned regions. The volume fraction of the one or more nanotwinned regions is in the range of 30% to 80% of the ceramic film. A plurality of targets including a variety of sputtering materials are prepared. A gas atmosphere is formed in the vacuum chamber. Electrical energy is supplied to the plurality of targets to cause co-sputtering of the variety of sputtering materials, thereby forming a ceramic film having one or more nanotwinned regions.
[0060] Embodiments of the first example can include one or more of the following features. The substrate includes one of stainless steel, a metal alloy, silicon, or magnesium oxide. The substrate includes a titanium alloy. The plurality of targets includes a first target and a second target. The first target includes titanium metal; the second target includes titanium boride. The gas atmosphere includes nitrogen. The ceramic film includes titanium, nitrogen, and boron. The plurality of grains in the ceramic film are embedded in an amorphous matrix. The grains and the amorphous matrix include titanium, boron, and nitrogen. The gas atmosphere further includes argon; the nitrogen fraction in the gas atmosphere is about 20%. The boron concentration of the ceramic film is in the range of 2 to 18 atomic percent. The size of each grain is in the range of 8 to 16 nanometers. The twin spacing in each of the one or more nanotwinned regions is in the range of 0.35 to 0.65 nanometers.
[0061] Embodiments of the first example may include one or more of the following features. A plurality of sputtering materials are co-sputtered on the surface of a substrate at a deposition rate in the range of 0.1 to 0.8 nanometers per second. The thickness of the ceramic film is equal to or greater than 400 nanometers. A substrate bias voltage in the range of -150 to -50 volts is applied to the substrate. The plurality of sputtering materials are co-sputtered on the surface of the substrate at a temperature equal to or less than 400 degrees Celsius. The plurality of sputtering materials are co-sputtered without applying heating or cooling to the substrate. When electrical energy is supplied, a first DC power is applied to a first target; a second DC power is applied to a second target. The first DC power is equal to 450 watts, and the second DC power is in the range of 50 to 200 watts. Before supplying electrical energy to the plurality of targets, an intermediate layer is formed on the surface of the substrate; and a ceramic film is formed by co-sputtering the plurality of sputtering materials on the intermediate layer.
[0062] In a second example, a method of manufacturing a ceramic film on a surface of a substrate in a vacuum chamber is disclosed. The ceramic film includes a plurality of grains. Each grain includes one or more nanotwin regions. A plurality of targets including a plurality of sputtering materials are provided. A gas atmosphere is formed in the vacuum chamber. Electrical energy is supplied to the plurality of targets to cause co-sputtering of the plurality of sputtering materials, thereby forming a ceramic film including one or more nanotwin regions at a deposition rate of 0.1 to 0.8 nanometers per second.
[0063] In a third example, an apparatus includes: a substrate having a surface; and a ceramic film. The ceramic film is located on the surface of the substrate to enhance the mechanical properties of the substrate. The ceramic film includes a plurality of grains. Each grain includes one or more nanotwin regions, and the volume fraction of the nanotwin regions is in the range of 30 to 80% of the ceramic film.
[0064] In a fourth example, the ceramic film includes a plurality of grains. Each grain contains one or more nanotwin regions, and the volume fraction of the nanotwin regions is in the range of 30 to 80% of the ceramic film.
[0065] Although this specification contains many details, these should not be construed as limiting the scope of the claims, but rather as descriptions of specific features of specific examples. Certain features described in this specification or shown in the drawings in the context of separate embodiments may also be combined. Conversely, the individual features described or shown in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination.
[0066] Similarly, although the various operations are described in the drawings in a particular order, this should not be construed as requiring that the operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed to obtain the desired result. In some cases, multitasking and parallel processing may be advantageous. Additionally, the separation of various system components in the above-described embodiments should not be construed as requiring such separation in all embodiments, but rather that the described program components and systems can generally be integrated in one product or packaged into multiple products.
[0067] Numerous embodiments have been described. However, it should be understood that various modifications can be made. Accordingly, other embodiments are within the scope of the following claims.
Claims
1. A method for fabricating a ceramic film on a surface of a substrate in a vacuum chamber, the ceramic film comprising a plurality of grains, wherein, each of the plurality of grains comprises one or more nanotwin regions, a volume fraction of the nanotwin regions being in a range of 30% to 80% of the ceramic film, the ceramic film comprising titanium, nitrogen, and boron, the method comprising: providing a plurality of targets comprising a plurality of sputtering materials; forming a gas atmosphere in the vacuum chamber; and supplying electrical energy to the plurality of targets to cause co-sputtering of the plurality of sputtering materials, thereby forming the ceramic film comprising the one or more nanotwin regions.
2. The method according to claim 1, wherein, the substrate comprises one of stainless steel, a metal alloy, silicon, or magnesium oxide.
3. The method according to claim 1, wherein, the substrate comprises a titanium alloy.
4. The method according to claim 1, wherein, the plurality of targets comprises a first target and a second target, the first target comprising titanium metal, and the second target comprising titanium boride, the gas atmosphere comprising nitrogen.
5. The method according to claim 4, wherein, the plurality of grains in the ceramic film are embedded in an amorphous matrix.
6. The method according to claim 5, wherein, the plurality of grains and the amorphous matrix comprise titanium, boron, and nitrogen.
7. The method according to claim 4, wherein, the gas atmosphere further comprises argon, and a nitrogen fraction in the gas atmosphere is 20%.
8. The method according to claim 4, wherein, a boron concentration of the ceramic film is in a range of 2 to 18 atomic percent.
9. The method according to claim 4, wherein, a size of each of the plurality of grains is in a range of 8 to 16 nanometers.
10. The method according to claim 4, wherein, a twin spacing in each of the one or more nanotwin regions is in a range of 0.35 to 0.65 nanometers.
11. The method according to claim 4, which comprises: co-sputtering the plurality of sputtering materials on the surface of the substrate at a deposition rate of 0.1 to 0.8 nanometers per second.
12. The method according to claim 4, wherein, a thickness of the ceramic film is equal to or greater than 400 nanometers.
13. The method according to claim 4, which comprises: applying a substrate bias voltage on the substrate, the substrate bias voltage being in a range of -150 to -50 volts.
14. The method according to claim 4, which comprises: co-sputtering the plurality of sputtering materials on the surface of the substrate at a certain temperature, the temperature being equal to or less than 400 degrees Celsius.
15. The method according to claim 4, which comprises: co-sputtering the plurality of sputtering materials without applying heating or cooling to the substrate.
16. The method according to claim 4, wherein, the supplying of electrical energy comprises: applying a first DC power on the first target; and applying a second DC power on the second target, wherein the first DC power is equal to 450 watts, and the second DC power is in a range of 50 to 200 watts.
17. The method according to claim 4, which comprises: Form an intermediate layer on the surface of the substrate before supplying electrical energy to the plurality of targets; and Form the ceramic film by co-sputtering the plurality of sputtering materials on the intermediate layer.
18. A method for manufacturing a ceramic film on the surface of a substrate in a vacuum chamber, the ceramic film including a plurality of grains, wherein, Each of the plurality of grains includes one or more nanotwin regions, the ceramic film includes titanium, nitrogen, and boron, and the method includes: Provide a plurality of targets including a plurality of sputtering materials; Form a gas atmosphere in the vacuum chamber; Supply electrical energy to the plurality of targets to cause co-sputtering of the plurality of sputtering materials, thereby forming the ceramic film including the one or more nanotwin regions at a deposition rate of 0.1 to 0.8 nanometers per second.
19. An apparatus, which includes: A substrate having a surface; and A ceramic film located on the surface of the substrate to enhance the mechanical properties of the substrate, the ceramic film including a plurality of grains, wherein each of the plurality of grains includes one or more nanotwin regions, the volume fraction of the nanotwin regions is in the range of 30 to 80% of the ceramic film, and the ceramic film includes titanium, nitrogen, and boron.
20. A ceramic film, which includes: A plurality of grains, wherein each of the plurality of grains includes one or more nanotwin regions, the volume fraction of the nanotwin regions is in the range of 30 to 80% of the ceramic film, and the ceramic film includes titanium, nitrogen, and boron.
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