Method for Determining Diffusion Layer Thickness, Testing Equipment and Storage Medium
By measuring the doping concentration and resistance of the PN junction and calculating the diffusion layer thickness, the accuracy of the measurement of the thickness of the minority diffusion layer in the PN junction is solved, and the determination of the junction leakage and carrier diffusion coefficient is improved.
Patent Information
- Application Number
- CN202211404094.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-10
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2042-11-10
AI Technical Summary
The prior art is difficult to accurately measure the thickness of the minority diffusion layer in PN junctions, which affects the determination of junction leakage and carrier diffusion coefficients.
By obtaining the first doping concentration of the first semiconductor and the second doping concentration of the second semiconductor in the PN junction, the depletion region equivalent resistance and the bulk-equivalent resistance are determined, and the diffusion layer thickness is calculated based on the doping concentration and the junction area.
Accurate measurement of the thickness of the minority diffusion layer in the PN junction is achieved, junction leakage is improved and the carrier diffusion coefficient is provided as an accurate basis.
Smart Images

Figure CN115854850B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and in particular, to a method for determining the thickness of a diffusion layer, a testing device, and a storage medium. Background Art
[0002] The PN junction is the basic structure of various semiconductor devices. Among them, the PN junction can refer to: on a complete silicon wafer, different doping processes are used to form an N-type semiconductor on one side and a P-type semiconductor on the other side. Thus, a PN junction is formed near the interface between the two semiconductors. Obtaining the thickness data of the minority carrier diffusion layer in the PN junction is particularly important for improving junction leakage and measuring the diffusion coefficient. Summary of the Invention
[0003] Embodiments of the present disclosure provide a method for determining the thickness of a diffusion layer, a testing device, and a storage medium.
[0004] In a first aspect, embodiments of the present disclosure provide a method for determining the thickness of a diffusion layer, including:
[0005] Obtaining a first doping concentration of a first semiconductor in the PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration;
[0006] Determining an equivalent resistance of the depletion region and an equivalent resistance of the bulk phase of the PN junction;
[0007] Determining a first bulk phase length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk phase, and the junction area of the PN junction;
[0008] Determining a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region;
[0009] Determining the thickness of the diffusion layer of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length.
[0010] In some embodiments, the first semiconductor is a P-type semiconductor and the second semiconductor is an N-type semiconductor; or, the first semiconductor is an N-type semiconductor and the second semiconductor is a P-type semiconductor.
[0011] In some embodiments, the determining the equivalent resistance of the depletion region and the equivalent resistance of the bulk phase of the PN junction includes:
[0012] Applying a preset alternating current signal to the PN junction when the PN junction is in a reverse bias state;
[0013] Perform an AC impedance test on the PN junction according to the preset AC signal to determine the AC impedance spectrum;
[0014] Determine the depletion region equivalent resistance and the bulk equivalent resistance of the PN junction according to the AC impedance spectrum.
[0015] In some embodiments, the P-type semiconductor in the PN junction is connected to a first power supply, and the N-type semiconductor in the PN junction is connected to a second power supply and the preset AC signal.
[0016] In some embodiments, when performing the AC impedance test on the PN junction according to the preset AC signal, the method further includes:
[0017] Change the perturbation frequency of the preset AC signal from a first frequency to a second frequency to obtain the AC impedance spectrum; wherein, the first frequency is greater than the second frequency.
[0018] In some embodiments, the determining the first bulk length of the first semiconductor according to the first doping concentration, the bulk equivalent resistance, and the junction area of the PN junction includes:
[0019] Determine the first resistivity of the first semiconductor according to the first doping concentration;
[0020] Perform calculations according to the first resistivity, the bulk equivalent resistance, and the junction area of the PN junction to determine the first bulk length.
[0021] In some embodiments, the determining the depletion region length according to the first doping concentration, the second doping concentration, and the depletion region equivalent resistance includes:
[0022] Determine the depletion region voltage drop of the PN junction according to the depletion region equivalent resistance;
[0023] Perform calculations according to the depletion region voltage drop, the first doping concentration, and the second doping concentration to determine the depletion region length.
[0024] In some embodiments, the determining the depletion region voltage drop of the PN junction according to the depletion region equivalent resistance includes:
[0025] Determine the bias current when the PN junction is in the reverse bias state;
[0026] Determine the depletion region voltage drop according to the bias current and the depletion region equivalent resistance.
[0027] In some embodiments, the determining the depletion region length according to the depletion region voltage drop, the first doping concentration, and the second doping concentration includes:
[0028] Determine a first potential difference according to the first doping concentration and the second doping concentration, where the first potential difference represents the built-in potential difference when the PN junction is at zero bias;
[0029] Calculate according to the first potential difference, the depletion region voltage drop, and the first doping concentration to determine the length of the depletion region.
[0030] In some embodiments, the determining the first potential difference according to the first doping concentration and the second doping concentration includes:
[0031] Determine the first potential difference according to the first doping concentration and the second doping concentration using a first calculation model;
[0032] Wherein, the first calculation model is: V represents the first potential difference, k represents the Boltzmann constant, T represents the absolute temperature, e represents the natural constant, N1 represents the first doping concentration, N2 represents the second doping concentration, and n i represents the carrier concentration of the intrinsic semiconductor.
[0033] In some embodiments, the determining the length of the depletion region according to the first potential difference, the depletion region voltage drop, and the first doping concentration includes:
[0034] Determine the length of the depletion region according to the first potential difference, the depletion region voltage drop, the first doping concentration, and a second calculation model;
[0035] Wherein, the second calculation model is: L dep represents the length of the depletion region, ε r represents the relative permittivity of the first semiconductor, ε0 represents the vacuum permittivity, V represents the first potential difference, ΔU dep represents the depletion region voltage drop, q represents the elementary charge quantity, and N1 represents the first doping concentration.
[0036] In some embodiments, the determining the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the length of the depletion region includes:
[0037] Subtract the first bulk phase length and the length of the depletion region from the length of the first semiconductor to obtain the diffusion layer thickness of the first semiconductor.
[0038] In a second aspect, embodiments of the present disclosure provide a testing device, which includes an acquisition unit, a first determination unit, and a second determination unit, where:
[0039] The obtaining unit is configured to obtain a first doping concentration of a first semiconductor in a PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration;
[0040] The first determining unit is configured to determine an equivalent resistance of a depletion region and an equivalent bulk resistance of the PN junction;
[0041] The second determining unit is configured to determine a first bulk length of the first semiconductor according to the first doping concentration, the equivalent bulk resistance, and a junction area of the PN junction; and determine a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; and determine a diffusion layer thickness of the first semiconductor according to a length of the first semiconductor, the first bulk length, and the depletion region length.
[0042] In a third aspect, an embodiment of the present disclosure provides another testing device, including a memory and a processor, wherein,
[0043] The memory is used to store a computer program that can run on the processor;
[0044] The processor is configured to execute the method according to any one of the first aspect when running the computer program.
[0045] In a fourth aspect, an embodiment of the present disclosure provides a computer storage medium, and the computer storage medium stores a computer program, and the computer program, when executed by at least one processor, implements the method according to any one of the first aspect.
[0046] An embodiment of the present disclosure provides a method, a testing device, and a storage medium for determining a diffusion layer thickness. The method includes: obtaining a first doping concentration of a first semiconductor in a PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration; determining an equivalent resistance of a depletion region and an equivalent bulk resistance of the PN junction; determining a first bulk length of the first semiconductor according to the first doping concentration, the equivalent bulk resistance, and a junction area of the PN junction; determining a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; determining a diffusion layer thickness of the first semiconductor according to a length of the first semiconductor, the first bulk length, and the depletion region length. In this way, based on this method, an embodiment of the present disclosure can measure the thickness of the minority carrier diffusion layer in a PN under any reverse bias state, which is beneficial to improving junction leakage, and can calculate an accurate carrier diffusion coefficient. Description of the Drawings
[0047] Figure 1 It is a schematic diagram of a relationship curve between an applied voltage and a current density of a PN junction;
[0048] Figure 2 Schematic flowchart of a method for determining the thickness of a diffusion layer provided by an embodiment of the present disclosure;
[0049] Figure 3 Schematic diagram of the composition structure of a PN junction provided by an embodiment of the present disclosure;
[0050] Figure 4 Another schematic diagram of the composition structure of a PN junction provided by an embodiment of the present disclosure;
[0051] Figure 5 Schematic diagram of the equivalent circuit of a PN junction provided by an embodiment of the present disclosure;
[0052] Figure 6 Schematic diagram of a Nyquist plot provided by an embodiment of the present disclosure;
[0053] Figure 7 Detailed flowchart of a method for determining the thickness of a diffusion layer provided by an embodiment of the present disclosure;
[0054] Figure 8 Schematic diagram of the composition structure of a test device provided by an embodiment of the present disclosure;
[0055] Figure 9 Another schematic diagram of the composition structure of a test device provided by an embodiment of the present disclosure. Detailed implementation manners
[0056] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. It can be understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than limiting the disclosure. Additionally, it should be noted that for the sake of description, only parts related to the relevant disclosure are shown in the drawings.
[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.
[0058] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments. However, it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with each other without conflict.
[0059] It should be noted that the terms "first", "second", and "third" involved in the embodiments of the present disclosure are only used to distinguish similar objects, and do not represent a specific order for the objects. Understandably, "first", "second", and "third" can be interchanged with a specific order or sequence when allowed, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.
[0060] Figure 1 Fig. shows a schematic diagram of the relationship curve between the externally applied voltage and the current density of a PN junction. Among them, the abscissa represents the externally applied voltage V of the PN junction, and the ordinate represents the current density J1. As Figure 1 shown, within the dashed box, the current density J1 no longer changes with the change of the externally applied voltage V. Therefore, the magnitude of the current density in this part is determined by the diffusion flux of the minority carriers, and at this time, the diffusion flux of the minority carriers is at the maximum value. The relationship between the diffusion flux and the diffusion coefficient is as follows: where J2 represents the diffusion flux, D h represents the diffusion coefficient, C1 represents the concentration of the minority carriers in the bulk (i.e., the concentration of the minority carriers in the low-doped semiconductor bulk phase in the PN junction), C0 represents the concentration of the minority carriers at the boundary of the depletion region, C1 - C0 is the concentration difference between the two boundaries of the diffusion layer, L represents the thickness of the diffusion layer, and in the limit case (the case where the diffusion flux of the minority carriers is at the maximum value): At this time, the current density = J2 极限 . It can be seen that only by knowing the thickness of the diffusion layer can the carrier diffusion coefficient be obtained by measuring the reverse bias current.
[0061] That is to say, obtaining the thickness data of the minority carrier diffusion layer is particularly important for the measurement of the diffusion coefficient. At the same time, the thickness data of the minority carrier diffusion layer is also of great significance for improving the junction leakage of the PN junction. Therefore, it is necessary to provide a feasible method to determine the thickness of the minority carrier diffusion layer.
[0062] Based on this, the embodiments of the present disclosure provide a method for determining the thickness of the diffusion layer. The method includes: obtaining the first doping concentration of the first semiconductor in the PN junction and the second doping concentration of the second semiconductor in the PN junction; where the first doping concentration is less than the second doping concentration; determining the equivalent resistance of the depletion region and the equivalent resistance of the bulk phase of the PN junction; determining the first bulk phase length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk phase, and the junction area of the PN junction; determining the length of the depletion region according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; and determining the thickness of the diffusion layer of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the length of the depletion region. In this way, based on this method, it is possible to measure the thickness of the minority carrier diffusion layer in the PN under any reverse bias state, which is beneficial to improving the junction leakage, and at the same time provides a basis for determining the carrier diffusion coefficient, etc., to obtain an accurate carrier diffusion coefficient.
[0063] The following will describe each embodiment of the present disclosure in detail with reference to the accompanying drawings.
[0064] In one embodiment of the present disclosure, refer to Figure 2 , which shows a schematic flowchart of a method for determining the thickness of a diffusion layer provided by an embodiment of the present disclosure. As Figure 2 shown, the method may include:
[0065] S201: Obtain the first doping concentration of the first semiconductor in the PN junction and the second doping concentration of the second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration.
[0066] It should be noted that this method can be applied to a test device for determining the thickness of the diffusion layer. Among them, the test device can be a test instrument such as a tester, or a computer, etc., or even a combination of multiple devices, which is not specifically limited here.
[0067] It should also be noted that this method is used to determine the thickness of the diffusion layer of the semiconductor in the PN junction, and more specifically, it is used to determine the thickness of the minority carrier diffusion layer of the lightly doped semiconductor in the PN junction. Among them, minority carriers are also called minority carriers. In semiconductor materials, there are usually two types of carriers, electrons and holes. If a certain type of carrier accounts for the majority in the semiconductor material and plays a major role in conduction, it is called the majority carrier, and vice versa is called the minority carrier. For a PN junction, usually one of the two semiconductors is lightly doped and the other is heavily doped. Since the thickness of the minority carrier diffusion layer of the lightly doped semiconductor is much larger than that of the heavily doped semiconductor, the thickness data of the minority carrier diffusion layer of the lightly doped semiconductor are often more valuable. Therefore, the thickness of the minority carrier diffusion layer of the lightly doped semiconductor in the PN junction is determined in the embodiments of the present disclosure, that is, the embodiments of the present disclosure provide a method for testing the thickness of the minority carrier diffusion layer of a PN junction.
[0068] It should also be noted that in the embodiments of the present disclosure, the first semiconductor and the second semiconductor form a PN junction. Denote the doping concentration of the first semiconductor as the first doping concentration, and denote the doping concentration of the second semiconductor as the second doping concentration, and the first doping concentration is less than the second doping concentration, that is, the first semiconductor is a lightly doped semiconductor and the second semiconductor is a heavily doped semiconductor.
[0069] Since the PN junction is composed of a P-type semiconductor and an N-type semiconductor, the specific types of the first semiconductor and the second semiconductor can be: the first semiconductor is a P-type semiconductor and the second semiconductor is an N-type semiconductor; or, the first semiconductor is an N-type semiconductor and the second semiconductor is a P-type semiconductor.
[0070] Refer to Figure 3, which shows a schematic diagram of the composition structure of a PN junction provided by an embodiment of the present disclosure. Taking the first semiconductor as a P-type semiconductor and the second semiconductor as an N-type semiconductor as an example (that is, the P-type semiconductor is a low-doped semiconductor and the N-type semiconductor is a high-doped semiconductor), as Figure 3 shown, the length of the P-type semiconductor is the first length (L1), and the length of the N-type semiconductor is the second length (L2). For a PN junction, the first length and the second length are both data that can be directly obtained. At the same time, the doping concentrations of the first semiconductor and the second semiconductor in the PN junction and the junction area (S) of the PN junction are also data that can be directly obtained. Denote the doping concentration of the first semiconductor as the first doping concentration (N1), and denote the doping concentration of the second semiconductor as the second doping concentration (N2).
[0071] That is to say, in the embodiment of the present disclosure, the first length, the second length, the first doping concentration, the second doping concentration, and the junction area of the PN junction are all data that can be directly obtained. When obtaining the first doping concentration of the first semiconductor in the PN junction and the second doping concentration of the second semiconductor in the PN junction, the method may further include: obtaining the first length of the first semiconductor, the second length of the second semiconductor, and the junction area of the PN junction.
[0072] S202: Determine the depletion region equivalent resistance and the bulk equivalent resistance of the PN junction.
[0073] It should be noted that, as Figure 3 shown, denote the bulk phase and the minority carrier diffusion layer of the P-type semiconductor as the first bulk phase and the first diffusion layer respectively, and denote the bulk phase and the minority carrier diffusion layer of the N-type semiconductor as the second bulk phase and the second diffusion layer respectively. The junction between the P-type semiconductor and the N-type semiconductor is the depletion region, and the depletion region is divided into the left part and the right part of AA'. Among them, the depletion region of the left part of AA' belongs to the P-type semiconductor, and the depletion region on the right side of AA' belongs to the N-type semiconductor. Since here the P-type semiconductor is taken as a low-doped semiconductor and the N-type semiconductor is taken as a high-doped semiconductor as an example, the depletion region length of the P-type semiconductor is much larger than the depletion region length of the N-type semiconductor, and it can be considered that the depletion region length of the P-type semiconductor is equal to the length of the entire depletion region, that is, the depletion region length of the P-type semiconductor is equal to the junction width (Junction width).
[0074] For the determination methods of the depletion region equivalent resistance and the bulk equivalent resistance, in some embodiments, determining the depletion region equivalent resistance and the bulk equivalent resistance of the PN junction may include:
[0075] When the PN junction is in the reverse bias state, apply a preset AC signal to the PN junction;
[0076] Perform an AC impedance test on the PN junction according to the preset AC signal to determine the AC impedance spectrum;
[0077] According to the alternating current impedance spectrum, the equivalent resistance of the depletion region and the equivalent resistance of the bulk phase of the PN junction are determined.
[0078] It should be noted that in the embodiments of the present disclosure, when the PN junction is reverse-biased, the equivalent resistance of the depletion region and the equivalent resistance of the bulk phase of the PN junction can be determined by applying a small-signal alternating current perturbation. At this time, the P-type semiconductor in the PN junction is connected to the first power supply, and the N-type semiconductor in the PN junction is connected to the second power supply and a preset alternating current signal. Among them, the voltage of the first power supply is the ground voltage (GND), and the voltage of the second power supply is the power supply voltage (VDD).
[0079] That is to say, as Figure 3 shown, the PN junction is in a reverse-biased state. Among them, the P-type semiconductor of the PN junction is grounded (GND), and the N-type semiconductor is connected to the power supply (VDD). At the same time, on the basis of the reverse-biased direct current voltage (in the embodiments of the present disclosure, the reverse-biased direct current voltage is VDD, and in addition, it can also be set according to actual needs), a preset alternating current signal (ΔE) is further applied to the N-type semiconductor in the PN junction. That is, in addition to being connected to VDD, the N-type semiconductor is also additionally connected to the preset alternating current signal ΔE. Here, ΔE is usually a small-signal alternating current perturbation, and ΔE can be any periodic signal, such as a square wave signal or a sine wave signal.
[0080] Furthermore, on the basis of Figure 3 , in combination with Figure 4 shown, there are three parts in the PN junction that divide the voltage of ΔE: (1) the ohmic resistance voltage division η hom (it is considered to only include the bulk phase resistance of the semiconductor, ignoring the wire resistance and contact resistance, specifically including the first bulk phase voltage division η ohm1 of the P-type semiconductor and the second bulk phase voltage division η ohm2 of the N-type semiconductor); (2) the depletion layer voltage division η dep ; (3) the minority carrier diffusion layer voltage division η diff (specifically including the first diffusion layer voltage division η diff1 of the P-type semiconductor and the second diffusion layer voltage division η diff2 of the N-type semiconductor).
[0081] Among them, the response of the ohmic resistance is "majority carrier electromigration", which is synchronized with ΔE; the response of the depletion layer is "carriers crossing the interface", and its response speed is much greater than the diffusion process caused by the concentration difference; the response of the diffusion layer comes from "carrier diffusion", that is, the change in the concentration distribution, and its response speed is the slowest. On this basis, by applying perturbation signals of different frequencies, the "ohmic voltage drop" and "depletion region voltage drop" can be obtained, and then the "minority carrier diffusion layer thickness" can be calculated. Figure 4 The △I leakage in
[0082] It can be seen that based on the voltage distribution of the preset alternating current signal in the PN junction, the bulk phase voltage division and depletion region voltage division of the semiconductor in the PN junction can be obtained, etc. Finally, the diffusion layer thickness can be further calculated according to these data.
[0083] It should be noted that one of the two semiconductors in the PN junction is lightly doped and the other is heavily doped. At this time, it can be considered that the bulk phase resistance R ohm is completely contributed by the lightly doped semiconductor, and this simplification has no effect on the evaluation of the "minority carrier diffusion layer thickness". Therefore, for Figure 3 the PN junction shown, the bulk phase equivalent resistance of this PN junction is also the equivalent resistance of the first bulk phase. At the same time, the equivalent resistance of the depletion region in the P-type semiconductor can also be regarded as approximately equal to the equivalent resistance of the entire depletion region. Therefore, the depletion region equivalent resistance represents the equivalent resistance of the depletion region in the P-type semiconductor or the equivalent resistance of the entire depletion region.
[0084] In some embodiments, when performing an AC impedance test on the PN junction according to the preset alternating current signal, the method may further include:
[0085] changing the perturbation frequency of the preset alternating current signal from the first frequency to the second frequency to obtain an AC impedance spectrum; wherein, the first frequency is greater than the second frequency.
[0086] It should be noted that Figure 5 is the schematic diagram of the equivalent circuit corresponding to the Figure 3 shown PN junction. As Figure 5 shown, R ohm represents the bulk phase equivalent resistance of the PN junction, that is, the equivalent resistance of the first bulk phase, R dep represents the depletion region equivalent resistance, R dif represents the equivalent resistance of the first diffusion layer, C dep represents the equivalent capacitance of the depletion region, C dif represents the equivalent capacitance of the first diffusion layer.
[0087] It should also be noted that using a small-amplitude sinusoidal alternating current signal, etc. as the excitation signal for perturbation and measuring the follow-up situation of the measurement system to the perturbation, or directly measuring the electrode impedance as the alternating current signal frequency changes, the method for studying the electrode system in this way is the AC impedance method. The essence of the AC impedance method is to study the characteristics and applications of a resistor-capacitor circuit (RC circuit) under the action of alternating current. Since the PN junction can be equivalent to an equivalent circuit composed of a resistor and capacitor network (such as Figure 5 ), the AC impedance method can be used to test the PN junction to obtain the bulk phase equivalent resistance and depletion region equivalent resistance of the PN junction.
[0088] When performing an AC impedance test on a PN junction, the full spectrum of the AC impedance is tested from high frequency (the first frequency) to low frequency (the second frequency), and the test results can be presented in the form of a Nyquist plot. Figure 6 is Figure 3 a schematic diagram of the Nyquist plot obtained from the AC impedance test of the shown PN junction. As Figure 6 shown, the abscissa represents the real part of the impedance (Z’), and the ordinate represents the opposite of the imaginary part of the impedance (-Z”), and the bulk equivalent resistance R ohm and the depletion region equivalent resistance R dep can be extracted from this Nyquist plot.
[0089] In this way, the embodiments of the present disclosure use a preset AC signal to perform an AC impedance test on the PN by disturbing from high frequency to low frequency under the reverse bias of the PN junction to obtain a Nyquist plot, and then the bulk equivalent resistance and the depletion region equivalent resistance can be extracted from the Nyquist plot.
[0090] S203: Determine the first bulk length of the first semiconductor according to the first doping concentration, the bulk equivalent resistance, and the junction area of the PN junction.
[0091] S204: Determine the depletion region length according to the first doping concentration, the second doping concentration, and the depletion region equivalent resistance.
[0092] S205: Determine the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk length, and the depletion region length.
[0093] It should be noted that in the embodiments of the present disclosure, taking the P-type semiconductor as the low-doped semiconductor and the N-type semiconductor as the high-doped semiconductor as an example, the finally obtained diffusion layer thickness refers to the minority carrier diffusion layer thickness of the P-type semiconductor, that is, the thickness L D1 of the first diffusion layer. As Figure 3 shown, the sum of the first bulk length L B1 , the thickness L D1 of the first diffusion layer, and the depletion region length L dep is the first length L1. Since the first length L1 is known, as long as the first bulk length L B1 and the depletion region length L dep can be obtained, the thickness L D1 of the first diffusion layer can be obtained.
[0094] Among them, for the first bulk length L B1 , it can be determined according to the first doping concentration N1, the bulk equivalent resistance R ohm and the junction area S of the PN junction. Among them, the first doping concentration N1 and the junction area S of the PN junction are known, and the bulk equivalent resistance Rohm It has also been determined according to the foregoing method.
[0095] Specifically, for the method of determining the first bulk phase length, in some embodiments, according to the first doping concentration, the bulk phase equivalent resistance, and the junction area of the PN junction, determining the first bulk phase length of the first semiconductor may include:
[0096] Determine the first resistivity of the first semiconductor according to the first doping concentration;
[0097] Perform calculations based on the first resistivity, the bulk phase equivalent resistance, and the junction area of the PN junction to determine the first bulk phase length.
[0098] It should be noted that the first bulk phase length is specifically calculated based on the resistivity of the first semiconductor (denoted as the first resistivity ρ1), the bulk phase equivalent resistance, and the junction area of the PN junction. Among them, the first resistivity can be determined by the first doping concentration, and at the same time, the resistivity of the second semiconductor (denoted as the second resistivity ρ2) can also be determined according to the second doping concentration. That is to say, when the doping concentration of the semiconductor is known, the resistivity of the semiconductor can be determined at the same time. For different doping types, the resistivity corresponding to each doping concentration can be obtained by querying data (for example: querying the conversion table of doping concentration and resistivity, etc.).
[0099] It should also be noted that the relationship between the bulk phase equivalent resistance, the first resistivity, the first bulk phase length, and the junction area of the PN junction can be expressed by the following formula: Among them, R ohm represents the bulk phase equivalent resistance, ρ1 represents the first resistivity, L1 represents the first bulk phase length, and S represents the junction area of the PN junction; from this, the calculation method of the first bulk phase length can be obtained as: In this way, substituting each value for calculation, the first bulk phase length is obtained.
[0100] For the depletion region length L dep , it can be determined according to the first doping concentration N1, the second doping concentration N2, and the depletion region equivalent resistance R dep . Among them, the first doping concentration N1 and the second doping concentration N2 are known, and the depletion region equivalent resistance R dep It has also been determined according to the foregoing method.
[0101] Specifically, for the method of determining the depletion region length, in some embodiments, determining the depletion region length according to the first doping concentration, the second doping concentration, and the depletion region equivalent resistance includes:
[0102] Determine the depletion region voltage division of the PN junction according to the depletion region equivalent resistance;
[0103] The depletion region length is determined by calculating according to the depletion region division voltage, the first doping concentration, and the second doping concentration.
[0104] Among them, determining the depletion region division voltage of the PN junction according to the equivalent resistance of the depletion region may include:
[0105] Determining the bias current when the PN junction is in the reverse bias state;
[0106] Determining the depletion region division voltage according to the bias current and the equivalent resistance of the depletion region.
[0107] It should be noted that as the following formula: ΔU dep = I bia ×R dep , where ΔU dep represents the depletion region division voltage; I bia represents the bias current, and I bia is the junction leakage current caused by the reverse bias voltage VDD, and I bia can be directly obtained through current measurement; R dep represents the depletion region division voltage. In this way, the division voltage of the depletion region for the reverse bias voltage (in this embodiment, the reverse bias voltage refers to VDD), that is, the depletion region division voltage, can be calculated, providing a data basis for calculating the diffusion layer thickness in the subsequent steps.
[0108] At this time, the first doping concentration, the second doping concentration, and the depletion region division voltage are all known. Determining the depletion region length according to the depletion region division voltage, the first doping concentration, and the second doping concentration may include:
[0109] Determining the first potential difference according to the first doping concentration and the second doping concentration, and the first potential difference represents the built-in potential difference when the PN junction is at zero bias;
[0110] Calculating and determining the depletion region length according to the first potential difference, the depletion region division voltage, and the first doping concentration.
[0111] It should be noted that when calculating the depletion region length, it is also necessary to calculate the built-in potential difference when the PN junction is at zero bias according to the first doping concentration and the second doping concentration, and further calculate the depletion region length in combination with the depletion region division voltage and the first doping concentration.
[0112] For the determination method of the first potential difference, in some embodiments, determining the first potential difference according to the first doping concentration and the second doping concentration may include:
[0113] Determining the first potential difference according to the first doping concentration and the second doping concentration by using the first calculation model; where the first calculation model is: V represents the first potential difference, k represents the Boltzmann constant, T represents the absolute temperature, e represents the natural constant, N1 represents the first doping concentration, N2 represents the second doping concentration, and n i represents the carrier concentration of the intrinsic semiconductor.
[0114] Among them, both k and e are constants, both N1 and N2 are known parameters, T can be directly measured, and n i is only related to temperature and can be obtained by query. In this way, substituting each data into the first calculation model for calculation can obtain the specific value of the first potential difference.
[0115] In some embodiments, determining the depletion region length according to the first potential difference, the depletion region voltage, and the first doping concentration may include:
[0116] Determining the depletion region length according to the first potential difference, the depletion region voltage, the first doping concentration, and the second calculation model, where the second calculation model is: L dep represents the depletion region length, ε r represents the relative dielectric constant of the first semiconductor, ε0 represents the vacuum dielectric constant (also known as the absolute dielectric constant), V represents the first potential difference, ΔU dep represents the depletion region voltage, q represents the elementary charge amount (1.6×10 -19 Coulomb), and N1 represents the first doping concentration.
[0117] In this way, both ε r , ε0, and q are constants, V is calculated according to the first calculation model, ΔU dep has been determined according to the foregoing method, and N1 is a known parameter. Substituting these data into the second calculation model for calculation can obtain the depletion region length. So far, the first length, the first bulk phase length, and the depletion region length are all known. Then, subtracting the first bulk phase length and the depletion region length from the first length can obtain the thickness of the first diffusion layer, which is the diffusion layer thickness sought in the embodiments of the present disclosure.
[0118] In some embodiments, determining the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length may include:
[0119] Subtracting the first bulk phase length and the depletion region length from the length of the first semiconductor to obtain the diffusion layer thickness of the first semiconductor.
[0120] It should be noted that as Figure 3 shown, the length of the first semiconductor (P-type semiconductor) (the first length L1) includes the first bulk phase length L B1 , the thickness L D1 of the first diffusion layer, and the depletion region length L dep, that is: L1 = L B1 +L D1 +L dep , from which we can obtain: L D1 = L1 - L B1 -L dep . Thus, by subtracting the first bulk length and the depletion region length from the first length, the diffusion layer thickness of the P-type semiconductor is obtained.
[0121] In this way, through the above steps, the thickness of the first diffusion layer is obtained, which is also the diffusion layer thickness sought in the embodiments of the present disclosure (the minority carrier diffusion layer thickness of the lightly doped semiconductor).
[0122] It should be noted that in the embodiments of the present disclosure, there is no strict order limitation between the steps. The serial numbers here are only for convenience of description. In practice, this solution can be implemented through any feasible steps. For example, the first doping concentration of the first semiconductor, the second doping concentration of the second semiconductor, the first length of the first semiconductor, the second length of the second semiconductor, and the junction area of the PN junction can be obtained first; then the first resistivity of the first semiconductor is determined according to the first doping concentration, and the second resistivity of the second semiconductor is determined according to the second doping concentration; then the reverse-biased PN junction is subjected to an AC impedance test using a preset AC signal to obtain the depletion region equivalent resistance and the bulk equivalent resistance; then the first bulk length is calculated by combining the first resistivity, the bulk equivalent resistance, and the junction area of the PN junction; then the depletion region voltage division is determined according to the depletion region equivalent resistance, and the depletion region length is determined by combining the first doping concentration, the second doping concentration, and the depletion region voltage division; finally, the diffusion layer thickness is determined according to the first length, the first bulk length, and the depletion region length.
[0123] In addition, in the embodiments of the present disclosure, the implementation of this solution is exemplarily described with the first semiconductor being a P-type semiconductor and the second semiconductor being an N-type semiconductor. If the first semiconductor (lightly doped semiconductor) is an N-type semiconductor and the second semiconductor (heavily doped semiconductor) is a P-type semiconductor, the same method is still used for calculation, that is, the relevant parameters of the P-type semiconductor are replaced with the relevant parameters of the N-type semiconductor, and the relevant parameters of the N-type semiconductor are replaced with the relevant parameters of the P-type semiconductor, etc., which will not be elaborated here.
[0124] An embodiment of the present disclosure provides a method for determining the thickness of a diffusion layer, which relates to the field of semiconductor memory devices and manufacturing, and specifically is a method for measuring the thickness of a minority carrier diffusion layer in a reverse-biased state of a PN junction. The method includes: obtaining a first doping concentration of a first semiconductor in the PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration; determining an equivalent resistance of the depletion region and an equivalent resistance of the bulk phase of the PN junction; determining a first bulk phase length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk phase, and the junction area of the PN junction; determining a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; determining the thickness of the diffusion layer of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length. In this way, based on this method, the embodiment of the present disclosure can measure the thickness of the minority carrier diffusion layer in a PN under any reverse-biased state, which is beneficial to improving junction leakage, and at the same time provides a basis for determining the carrier diffusion coefficient, etc., and obtains an accurate carrier diffusion coefficient.
[0125] In another embodiment of the present disclosure, referring to Figure 7 , which shows a detailed flow schematic diagram of a method for determining the thickness of a diffusion layer provided by the embodiment of the present disclosure. As Figure 7 shown, the method may include:
[0126] S701: Obtain data such as the lengths and doping concentrations of the N-type semiconductor and the P-type semiconductor, and obtain the resistivity of the N-type semiconductor and the P-type semiconductor according to the doping concentration.
[0127] It should be noted that here, still taking the first semiconductor in the PN junction as the P-type semiconductor and the second semiconductor as the N-type semiconductor as an example. The length, doping concentration, and resistivity of the P-type semiconductor are the first length, the first doping concentration, and the first resistivity, denoted as (L1, N1, ρ1); the length, doping concentration, and resistivity of the N-type semiconductor are the second length, the second doping concentration, and the second resistivity, denoted as (L2, N2, ρ2); denote the junction area of the PN junction as S.
[0128] S702: Apply an AC small signal ΔE on the basis of VDD.
[0129] It should be noted that, as Figure 3 shown, the P-type semiconductor is connected to the ground GND, the N-type semiconductor is connected to the power supply VDD, and an AC small signal ΔE (i.e., a preset AC signal) is applied on the basis of VDD. Among them, ΔE can be any periodic signal, such as a square wave signal or a sine wave signal.
[0130] S703: Change the perturbation frequency of ΔE, and extract the equivalent resistance of the semiconductor bulk phase and the equivalent resistance of the depletion region.
[0131] It should be noted that the perturbation frequency that changes ΔE is tested for the full AC impedance spectrum from high frequency to low frequency and presented in the form of a Nyquist plot; according to the equivalent circuit of the PN junction under reverse bias ( Figure 5 ), when the perturbation signal frequency range is large enough, the Nyquist plot is as shown in Figure 6 ; according to the Nyquist plot, the equivalent resistance R ohm of the semiconductor bulk phase and the equivalent resistance R dep of the depletion layer are directly extracted. Among them, the equivalent resistance R ohm of the semiconductor bulk phase refers to the equivalent resistance of the bulk phase of the lightly doped semiconductor, that is, the equivalent resistance of the P-type semiconductor in this embodiment.
[0132] S704: Calculate the first bulk phase length.
[0133] It should be noted that usually in a PN junction, one semiconductor is highly doped and the other is lightly doped. It can be considered that R ohm is completely contributed by the lightly doped semiconductor. This simplification has no impact on evaluating the "minority carrier diffusion layer thickness" because the "minority carrier diffusion layer" of the lightly doped semiconductor is much thicker than that of the highly doped semiconductor. Therefore, the thickness data of the "minority carrier diffusion layer" of the lightly doped semiconductor is more valuable. Here, it is assumed that the P-type semiconductor is lightly doped, and L1 is obtained according to .
[0134] S705: Calculate the depletion layer partial voltage.
[0135] It should be noted that according to ΔU dep = I bia × R dep , the partial voltage ΔU dep of the depletion layer on the reverse bias voltage is obtained. I bia is the junction current of the reverse bias voltage VDD. Here, it is assumed that the P-type semiconductor is lightly doped, and the length of the depletion region of the P-type semiconductor is approximately the junction width.
[0136] S706: Calculate the depletion region length.
[0137] It should be noted that by referring to the data, for the depletion region length in the presence of an applied bias voltage ΔU dep : Among them, V is the built-in potential difference at zero bias, In this way, when the doping concentration N1 is known, L dep can be obtained.
[0138] S707: Subtract the first bulk phase length and the depletion region length to obtain the minority carrier diffusion layer thickness.
[0139] It should be noted that subtracting the first bulk length and the depletion region length from the first length gives the diffusion layer thickness of the P-type semiconductor, that is, the thickness of the "minority carrier diffusion layer" of the P-type semiconductor.
[0140] An embodiment of the present disclosure provides a method for determining the diffusion layer thickness. Through this embodiment, the specific implementation of the foregoing embodiment is elaborated in detail. It can be seen therefrom that this method can measure the thickness of the minority carrier diffusion layer under any reverse bias voltage state; when the semiconductor doping concentration is known, its resistivity is known, the relationship between the depletion layer width and the built-in potential is known, and subtracting the bulk length and the depletion region length from the semiconductor length can obtain the "minority carrier diffusion layer thickness", and then the accurate diffusion coefficient can be calculated, which is beneficial to improving the performance of semiconductor materials.
[0141] In another embodiment of the present disclosure, refer to Figure 8 , which shows a schematic structural diagram of a test device 80 provided by an embodiment of the present disclosure. As Figure 8 shown, the determination device 80 may include an acquisition unit 801, a first determination unit 802, and a second determination unit 803, where:
[0142] The acquisition unit 801 is configured to acquire the first doping concentration of the first semiconductor in the PN junction and the second doping concentration of the second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration;
[0143] The first determination unit 802 is configured to determine the depletion region equivalent resistance and the bulk equivalent resistance of the PN junction;
[0144] The second determination unit 803 is configured to determine the first bulk length of the first semiconductor according to the first doping concentration, the bulk equivalent resistance, and the junction area of the PN junction; and determine the depletion region length according to the first doping concentration, the second doping concentration, and the depletion region equivalent resistance; and determine the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk length, and the depletion region length.
[0145] In some embodiments, the first semiconductor is a P-type semiconductor and the second semiconductor is an N-type semiconductor; or, the first semiconductor is an N-type semiconductor and the second semiconductor is a P-type semiconductor.
[0146] In some embodiments, as Figure 8 shown, the test device 80 may further include a test unit 804, configured to apply a preset AC signal to the PN junction when the PN junction is in a reverse bias state; and perform an AC impedance test on the PN junction according to the preset AC signal to determine the AC impedance spectrum;
[0147] The first determination unit 802 is further configured to determine the depletion region equivalent resistance and the bulk equivalent resistance of the PN junction according to the AC impedance spectrum.
[0148] In some embodiments, the P-type semiconductor in the PN junction is connected to a first power supply, and the N-type semiconductor in the PN junction is connected to a second power supply and a preset alternating current signal.
[0149] In some embodiments, the first determination unit 802 is further configured to change the disturbance frequency of the preset alternating current signal from a first frequency to a second frequency to obtain an alternating current impedance spectrum; wherein, the first frequency is greater than the second frequency.
[0150] In some embodiments, the second determination unit 803 is further configured to determine the first resistivity of the first semiconductor according to the first doping concentration; and calculate according to the first resistivity, the bulk equivalent resistance and the junction area of the PN junction to determine the first bulk phase length.
[0151] In some embodiments, the second determination unit 803 is further configured to determine the depletion region voltage division of the PN junction according to the depletion region equivalent resistance; and calculate according to the depletion region voltage division, the first doping concentration and the second doping concentration to determine the depletion region length.
[0152] In some embodiments, the second determination unit 803 is further configured to determine the bias current when the PN junction is in the reverse bias state; and determine the depletion region voltage division according to the bias current and the depletion region equivalent resistance.
[0153] In some embodiments, the second determination unit 803 is further configured to determine a first potential difference according to the first doping concentration and the second doping concentration, where the first potential difference represents the built-in potential difference when the PN junction is at zero bias; and calculate according to the first potential difference, the depletion region voltage division and the first doping concentration to determine the depletion region length.
[0154] In some embodiments, the second determination unit 803 is further configured to determine the first potential difference according to the first doping concentration and the second doping concentration by using a first calculation model;
[0155] Wherein, the first calculation model is: V represents the first potential difference, k represents the Boltzmann constant, T represents the absolute temperature, e represents the natural constant, N1 represents the first doping concentration, N2 represents the second doping concentration, and n i represents the carrier concentration of the intrinsic semiconductor.
[0156] In some embodiments, the second determination unit 803 is further configured to determine the depletion region length according to the first potential difference, the depletion region voltage division, the first doping concentration and a second calculation model;
[0157] Wherein, the second calculation model is: L dep represents the depletion region length, ε rrepresents the relative permittivity of the first semiconductor, ε0 represents the permittivity of vacuum, V represents the first potential difference, and ΔU dep represents the depletion region breakdown voltage, q represents the elementary charge quantity, and N1 represents the first doping concentration.
[0158] In some embodiments, the second determination unit 803 is further configured to subtract the first bulk length and the depletion region length from the length of the first semiconductor to obtain the diffusion layer thickness of the first semiconductor.
[0159] It can be understood that in this embodiment, the "unit" can be a part of a circuit, a part of a processor, a part of a program or software, etc. Of course, it can also be a module or non-modular. Moreover, the components in this embodiment can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional module.
[0160] If the integrated unit is implemented in the form of a software functional module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the method described in this embodiment. The aforementioned storage medium includes: USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks, or optical discs, etc., which can store program codes.
[0161] Therefore, this embodiment provides a computer storage medium that stores a computer program. When the computer program is executed by at least one processor, it implements the steps of the method described in any one of the foregoing embodiments.
[0162] Based on the above computer storage medium, refer to Figure 9 , which shows a schematic structural diagram of another test device 80 provided by an embodiment of the present disclosure. As Figure 9As shown, it may include: a communication interface 501, a memory 502, and a processor 503; each component is coupled together through a bus system 504. It can be understood that the bus system 504 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 504 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clear illustration, in Figure 9 all kinds of buses are labeled as the bus system 504. Among them, the communication interface 501 is used for receiving and sending signals during the process of receiving and sending information between it and other external network elements;
[0163] the memory 502 is used for storing a computer program that can run on the processor 503;
[0164] the processor 503 is used for, when running the computer program, executing:
[0165] obtaining a first doping concentration of a first semiconductor in a PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration;
[0166] determining an equivalent resistance of the depletion region and an equivalent resistance of the bulk phase of the PN junction;
[0167] determining a first bulk phase length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk phase, and the junction area of the PN junction;
[0168] determining a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region;
[0169] determining a diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length.
[0170] It can be understood that the memory 502 in the embodiments of the present disclosure may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), DRAM, synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DRRAM). The memory 502 of the systems and methods described herein is intended to include but not be limited to these and any other suitable types of memory.
[0171] The processor 503 may be an integrated circuit chip with the ability to process signals. In the implementation process, the steps of the above method can be completed by the integrated logic circuit in hardware or instructions in software form in the processor 503. The above-mentioned processor 503 may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present disclosure. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present disclosure can be directly embodied as being executed and completed by a hardware decoding processor, or executed and completed by a combination of hardware and software modules in the decoding processor. The software module may be located in a mature storage medium in the art such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers, etc. This storage medium is located in the memory 502, and the processor 503 reads the information in the memory 502 and combines its hardware to complete the steps of the above method.
[0172] It can be understood that these embodiments described herein can be implemented using hardware, software, firmware, middleware, microcode, or a combination thereof. For a hardware implementation, the processing unit can be implemented in one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described in the present disclosure, or a combination thereof.
[0173] For a software implementation, the technologies described herein can be implemented by modules (such as procedures, functions, etc.) that execute the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented inside or outside the processor.
[0174] Optionally, as another embodiment, the processor 503 is further configured to execute the method described in any one of the foregoing embodiments when running the computer program.
[0175] In this way, the test device 80 can measure the thickness of the minority carrier diffusion layer in the PN under any reverse bias state, which is beneficial to improving the junction leakage, and can calculate the accurate carrier diffusion coefficient, which is beneficial to improving the performance of the semiconductor.
[0176] The above is only an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.
[0177] It should be noted that in the present disclosure, the terms "include", "comprise" or any other variation thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.
[0178] The above serial numbers of the embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.
[0179] The methods disclosed in the several method embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments. The features disclosed in the several product embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments. The features disclosed in the several method or device embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.
[0180] The above is only the specific implementation manner of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present disclosure, and all of them should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.
[0181] The above is only the preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.
[0182] It should be noted that in this disclosure, the terms "including", "comprising", or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a series of elements includes not only those elements but also other elements not expressly listed, or elements that are inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "including a..." does not preclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.
[0183] The serial numbers of the above embodiments of the present disclosure are only for description and do not represent the superiority or inferiority of the embodiments.
[0184] The methods disclosed in several method embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.
[0185] The features disclosed in several product embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.
[0186] The features disclosed in several method or device embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.
[0187] As described above, the above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily think of changes or substitutions, which should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.
Claims
1. A method for determining the thickness of a diffusion layer, characterized in that, The method includes: Obtaining a first doping concentration of a first semiconductor in a PN junction and a second doping concentration of a second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration; Determining an equivalent resistance of the depletion region and an equivalent resistance of the bulk of the PN junction; Determining a first bulk length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk, and the junction area of the PN junction; Determining a depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; Determining a diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk length, and the depletion region length.
2. The method according to claim 1, wherein The first semiconductor is a P-type semiconductor and the second semiconductor is an N-type semiconductor; or, the first semiconductor is an N-type semiconductor and the second semiconductor is a P-type semiconductor.
3. The method according to claim 1, characterized in that, The determining the equivalent resistance of the depletion region and the equivalent resistance of the bulk of the PN junction includes: Applying a preset AC signal to the PN junction when the PN junction is in a reverse-biased state; Performing an AC impedance test on the PN junction according to the preset AC signal to determine an AC impedance spectrum; Determining the equivalent resistance of the depletion region and the equivalent resistance of the bulk of the PN junction according to the AC impedance spectrum.
4. The method according to claim 3, characterized in that, The P-type semiconductor in the PN junction is connected to a first power supply, and the N-type semiconductor in the PN junction is connected to a second power supply and the preset AC signal.
5. The method according to claim 3, wherein When performing the AC impedance test on the PN junction according to the preset AC signal, the method further includes: Changing a perturbation frequency of the preset AC signal from a first frequency to a second frequency to obtain the AC impedance spectrum; wherein, the first frequency is greater than the second frequency.
6. The method according to claim 1, wherein The determining the first bulk length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk, and the junction area of the PN junction includes: Determining a first resistivity of the first semiconductor according to the first doping concentration; Calculating according to the first resistivity, the equivalent resistance of the bulk, and the junction area of the PN junction to determine the first bulk length.
7. The method according to claim 1, characterized in that, The determining the depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region includes: Determining a depletion region voltage division of the PN junction according to the equivalent resistance of the depletion region; Calculating according to the depletion region voltage division, the first doping concentration, and the second doping concentration to determine the depletion region length.
8. The method according to claim 7, characterized in that, The determining the depletion region voltage division of the PN junction according to the equivalent resistance of the depletion region includes: Determining a bias current when the PN junction is in a reverse-biased state; Determining the depletion region voltage division according to the bias current and the equivalent resistance of the depletion region.
9. The method according to claim 7, wherein The determining the depletion region length according to the depletion region voltage division, the first doping concentration, and the second doping concentration includes: Determining a first potential difference according to the first doping concentration and the second doping concentration, the first potential difference representing a built-in potential difference when the PN junction is at zero bias; Calculating according to the first potential difference, the depletion region voltage division, and the first doping concentration to determine the depletion region length.
10. The method according to claim 9, characterized in that Determining the first potential difference according to the first doping concentration and the second doping concentration includes: Determining the first potential difference according to the first doping concentration and the second doping concentration by using a first calculation model; Among them, the first calculation model is as follows: V represents the first potential difference, k represents the Boltzmann constant, T represents the absolute temperature, e represents the natural constant, N1 represents the first doping concentration, N2 represents the second doping concentration, and n i represents the carrier concentration of the intrinsic semiconductor.
11. The method according to claim 9, characterized in that, Determining the depletion region length according to the first potential difference, the depletion region voltage drop, and the first doping concentration includes: Determining the depletion region length according to the first potential difference, the depletion region voltage drop, the first doping concentration, and a second calculation model; Among them, the second calculation model is as follows: L dep represents the depletion region length, ε r represents the relative permittivity of the first semiconductor, ε0 represents the vacuum permittivity, V represents the first potential difference, ΔU dep represents the depletion region voltage division, q represents the elementary charge amount, and N1 represents the first doping concentration.
12. The method according to any one of claims 1 to 11, characterized in that, Determining the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length includes: Subtracting the first bulk phase length and the depletion region length from the length of the first semiconductor to obtain the diffusion layer thickness of the first semiconductor.
13. A test device, characterized in that, The test device includes an acquisition unit, a first determination unit, and a second determination unit, where: The acquisition unit is configured to acquire the first doping concentration of the first semiconductor in the PN junction and the second doping concentration of the second semiconductor in the PN junction; wherein, the first doping concentration is less than the second doping concentration; The first determination unit is configured to determine the equivalent resistance of the depletion region and the equivalent resistance of the bulk phase of the PN junction; The second determination unit is configured to determine the first bulk phase length of the first semiconductor according to the first doping concentration, the equivalent resistance of the bulk phase, and the junction area of the PN junction; and determine the depletion region length according to the first doping concentration, the second doping concentration, and the equivalent resistance of the depletion region; and determine the diffusion layer thickness of the first semiconductor according to the length of the first semiconductor, the first bulk phase length, and the depletion region length.
14. A test device, the test device includes a memory and a processor, where, The memory is used to store a computer program that can run on the processor; The processor is used to execute the method according to any one of claims 1 to 12 when running the computer program.
15. A computer storage medium, characterized in that, The computer storage medium stores a computer program, and when the computer program is executed by at least one processor, the method according to any one of claims 1 to 12 is implemented.
Citation Information
Patent Citations
Structure and method for testing effective channel length of metal oxide semiconductor (MOS) transistor
CN102945841A
Method of measuring lateral diffusion length of semiconductor device
CN108807203A