Micro LED display device and preparation method thereof

Abstract

The application discloses a Micro LED display device and a preparation method thereof, and belongs to the technical field of micro display. The Micro LED display device adopts a twice passivation process, a first passivation layer is used to protect the sidewall of an LED unit, so that surface states are avoided to cause an increase in electric leakage; then, the first passivation layer is directly used as a mask, a hole groove is formed in a metal bonding layer without additionally arranging a mask, and after metal etching, the mask does not need to be removed, the influence of a glue removing process on the metal bonding layer does not need to be considered, and therefore, the selection range of bonding metal is wider; after the hole groove is formed, a second passivation layer is used to cover the sidewall of the hole groove, so that the bonding metal exposed by the sidewall can be covered, electrical isolation is formed, electric leakage is reduced, and the device performance and reliability are guaranteed.

Description

Technical Field

[0001] This application belongs to the field of micro-display technology, specifically relating to a MicroLED display device and its fabrication method. Background Technology

[0002] For MicroLEDs used in AR / VR applications, high pixel density is required, typically with pixel sizes below 10µm, or even below 5µm. To achieve this pixel density, MicroLEDs are generally manufactured using a monolithic integration approach. This involves bonding the entire epitaxial wafer to a CMOS driver via bonding (usually metal bonding) before pixelation. This method uses photolithography to align the LED units with the CMOS driver, resulting in extremely high precision. To maximize this high precision, the metal bonding is typically not patterned beforehand. Therefore, during the subsequent pixelation process, the metal between the LED units needs to be etched for electrical isolation, enabling independent control of each individual LED unit.

[0003] In traditional MicroLED processes, after etching, the mask typically needs to be removed before subsequent processes can proceed. During mask removal, the exposed bonding metal sidewalls inevitably come into contact with chemicals, such as metals reacting with solutions or gases, which can damage the overall structure and affect product performance and reliability. Summary of the Invention

[0004] Purpose of the invention: This application provides a MicroLED display device and its fabrication method, aiming to overcome the technical problem that the removal of the mask in the existing MicroLED process inevitably affects the exposed bonding metal sidewalls, resulting in damage to the overall structure and affecting product performance and reliability.

[0005] Technical solution: The method for fabricating the MicroLED display device described in the embodiments of this application includes:

[0006] A driving substrate, a metal bonding layer, and LED units are provided, wherein the metal bonding layer is disposed on the driving substrate, and a plurality of LED units are arranged in an array on the metal bonding layer;

[0007] A first passivation layer is formed, which covers the LED unit;

[0008] The first passivation layer is patterned and used as a mask to form a plurality of holes or grooves on the metal bonding layer. The holes or grooves are located between adjacent LED units, and the bottom of the holes or grooves exposes the driving substrate.

[0009] A second passivation layer is formed, which covers the first passivation layer and fills the hole or groove;

[0010] The first passivation layer and the second passivation layer are etched to expose at least the light-emitting surface of the LED unit;

[0011] A transparent electrode layer is formed, which covers the light-emitting surface and is electrically connected to the LED unit.

[0012] In some embodiments, the LED unit includes a stepped structure formed by etching the LED epitaxial layer, the stepped structure including a first doped semiconductor layer, a second doped semiconductor layer and an active layer located between the two; the stepped structure at least disconnects and electrically isolates the second doped semiconductor layers of adjacent LED units from each other;

[0013] The light-emitting surface is located on the second doped semiconductor layer.

[0014] In some embodiments, the active layer can be a multi-quantum-well structure to confine electron and hole carriers to the quantum well region. When electrons and holes recombine, the carriers will emit photons after radiative recombination, converting electrical energy into light energy.

[0015] In some embodiments, the LED unit is a miniature light-emitting diode.

[0016] In some embodiments, the first doped semiconductor layer and the second doped semiconductor layer may include one or more layers based on II-VI materials such as ZnSe or ZnO or III-V materials such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs, and alloys thereof.

[0017] In some embodiments, the size of the LED unit is 0.1 to 5 micrometers, and the spacing between adjacent LED units is 1 to 10 micrometers.

[0018] In some embodiments, the provision of the driving substrate, the metal bonding layer, and the LED unit includes:

[0019] An LED epitaxial layer is provided, wherein the LED epitaxial layer is disposed on a substrate;

[0020] The metal bonding layer is formed on the driving substrate and / or the LED epitaxial layer to bond the driving substrate to the LED epitaxial layer;

[0021] Remove the substrate;

[0022] The LED epitaxial layer is etched into the stepped structure;

[0023] The driving substrate includes a plurality of first contacts, which are located between adjacent LED units.

[0024] In some embodiments, when a plurality of holes or grooves are formed on the metal bonding layer, the bottom of the holes or grooves is exposed to the first contact.

[0025] The first passivation layer and the second passivation layer are etched to expose the light-emitting surface of the LED unit and the first contact point;

[0026] The transparent electrode layer covers the light-emitting surface and the hole or groove to electrically connect the second doped semiconductor layer of the LED unit to the corresponding first contact, so that the LED unit can be driven individually through the first contact.

[0027] In some embodiments, the provision of the driving substrate, the metal bonding layer, and the LED unit includes:

[0028] An LED epitaxial layer is provided, wherein the LED epitaxial layer is disposed on a substrate;

[0029] The metal bonding layer is formed on the driving substrate and / or the LED epitaxial layer to bond the driving substrate to the LED epitaxial layer;

[0030] Remove the substrate;

[0031] The LED epitaxial layer is etched into the stepped structure;

[0032] The driving substrate includes a plurality of first contacts, the first contacts being located below the LED unit, and the metal bonding layer electrically connecting the first contacts and the first doped semiconductor layer.

[0033] In some embodiments, when a plurality of holes or grooves are formed on the metal bonding layer, the holes or grooves are spaced apart and electrically isolated from the metal bonding layer below the adjacent LED units;

[0034] The first passivation layer and the second passivation layer are etched to expose the light-emitting surface of the LED unit;

[0035] The transparent electrode layer covers the light-emitting surface of the adjacent LED unit to electrically connect the second doped semiconductor layer of the adjacent LED unit, so that the LED unit can be driven individually through the first contact.

[0036] In some embodiments, forming the first passivation layer includes:

[0037] A atomic layer deposition and plasma chemical vapor deposition media materials are sequentially used to form a stacked media layer, wherein the stacked media layer is the first passivation layer.

[0038] In some embodiments, the atomic layer deposition and the plasma chemical vapor deposition are performed alternately multiple times to form the stacked dielectric layer.

[0039] In some embodiments, the material of the first passivation layer may be an inorganic dielectric material and / or an organic dielectric material; and / or, the inorganic dielectric material may be selected from one or more of SiO2, Si3N4, and Al2O3.

[0040] In some embodiments, the hole groove is formed by a metal etching process;

[0041] When forming the hole, the thickness of the first passivation layer is reduced to 20-300 nm.

[0042] Accordingly, the MicroLED display device of this application embodiment includes:

[0043] Drive substrate;

[0044] A metal bonding layer is disposed on the driving substrate, and the metal bonding layer has a plurality of holes or grooves that penetrate through it, the bottom of which exposes the driving substrate.

[0045] LED unit, wherein multiple LED units are arranged in an array on the metal bonding layer, and the holes or slots are located between adjacent LED units;

[0046] A first passivation layer covers the LED unit and exposes the hole or slot;

[0047] A second passivation layer covers the first passivation layer and fills the hole or groove;

[0048] The first passivation layer and the second passivation layer at least expose the light-emitting surface of the LED unit;

[0049] A transparent electrode layer covers the light-emitting surface and is electrically connected to the LED unit.

[0050] In some embodiments, the LED unit includes a stepped structure formed by etching the LED epitaxial layer, the stepped structure including a first doped semiconductor layer, a second doped semiconductor layer and an active layer located between the two; the stepped structure at least disconnects and electrically isolates the second doped semiconductor layers of adjacent LED units from each other;

[0051] The light-emitting surface is located on the second doped semiconductor layer.

[0052] In some embodiments, the driving substrate includes a plurality of first contacts located between adjacent LED units.

[0053] In some embodiments, the bottom of the hole or groove exposes the first contact, the first passivation layer and the second passivation layer also expose the first contact, and the transparent electrode layer covers the light-emitting surface and the hole or groove to electrically connect the second doped semiconductor layer of the LED unit to the corresponding first contact, so that the LED unit can be driven individually through the first contact.

[0054] In some embodiments, the driving substrate includes a plurality of first contacts located below the LED unit, and the metal bonding layer electrically connects the first contacts and the first doped semiconductor layer.

[0055] In some embodiments, the metal bonding layer beneath the LED cells, which are spaced apart by holes or slots and electrically isolated from each other;

[0056] The transparent electrode layer covers the light-emitting surface of the adjacent LED unit to electrically connect the second doped semiconductor layer of the adjacent LED unit, so that the LED unit can be driven individually through the first contact.

[0057] In some embodiments, the first passivation layer is a stacked dielectric layer formed sequentially by atomic layer deposition and plasma chemical vapor deposition.

[0058] In some embodiments, the first passivation layer is a stacked dielectric layer formed by alternating atomic layer deposition and plasma chemical vapor deposition.

[0059] In some embodiments, the material of the first passivation layer may be an inorganic dielectric material and / or an organic dielectric material; and / or, the inorganic dielectric material may be selected from one or more of SiO2, Si3N4, and Al2O3.

[0060] In some embodiments, the thickness of the first passivation layer is 20 to 300 mm.

[0061] Beneficial Effects: Compared with the prior art, the fabrication method of the MicroLED display device in this application includes: providing a driving substrate, a metal bonding layer, and LED units, wherein the metal bonding layer is disposed on the driving substrate, and a plurality of LED units are arranged in an array on the metal bonding layer; forming a first passivation layer, the first passivation layer covering the LED units; patterning the first passivation layer and using the first passivation layer as a mask to form a plurality of holes or trenches on the metal bonding layer, the holes or trenches being located between adjacent LED units, and the bottom of the holes or trenches exposing the driving substrate; forming a second passivation layer, the second passivation layer covering the first passivation layer and filling the holes or trenches; etching the first passivation layer and the second passivation layer to at least expose the light-emitting surface of the LED units; forming a transparent electrode layer, the transparent electrode layer covering the light-emitting surface and electrically connecting to the LED units. This application employs a two-stage passivation process. The first passivation layer protects the sidewalls of the LED unit, preventing the formation of surface states that could increase leakage current. Then, the first passivation layer is directly used as a mask, eliminating the need for an additional mask to form vias in the metal bonding layer. After metal etching, there is no need to remove the mask, and the impact of the resist removal process on the metal bonding layer is eliminated, thus allowing for a wider range of bonding metals. After forming the vias, a second passivation layer is used to cover the sidewalls of the vias, thereby covering the exposed bonding metal on the sidewalls, forming electrical isolation, reducing leakage current, and ultimately ensuring device performance and reliability.

[0062] Compared with the prior art, the MicroLED display device of this application includes: a driving substrate; a metal bonding layer disposed on the driving substrate, the metal bonding layer having a plurality of holes or grooves through it, the bottom of the holes or grooves exposing the driving substrate; LED units, a plurality of LED units arranged in an array on the metal bonding layer, the holes or grooves being located between adjacent LED units; a first passivation layer, the first passivation layer covering the LED units and exposing the light-emitting surface and the holes or grooves of the LED units; a second passivation layer, the second passivation layer covering the first passivation layer and filling the holes or grooves; and a transparent electrode layer, the transparent electrode layer covering the light-emitting surface and electrically connected to the LED units. This display device protects the sidewalls of the LED units through the first passivation layer and protects the bonding metal through the second passivation layer, preventing them from being affected by the process, reducing leakage current, and thus ensuring device performance and reliability. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0064] Figure 1 This is a top view of the MicroLED display device in the first embodiment of this application;

[0065] Figure 2 This is a schematic diagram of the MicroLED display device in the first embodiment of this application along line AA.

[0066] Figure 3 This is a cross-sectional schematic diagram of the driving substrate and the LED epitaxial layer in the first embodiment of this application;

[0067] Figure 4 This is a cross-sectional schematic diagram of the metal bonding layer formed in the first embodiment of this application;

[0068] Figure 5 This is a cross-sectional schematic diagram of the bonding process in the first embodiment of this application;

[0069] Figure 6 This is a cross-sectional schematic diagram of the LED unit formed in the first embodiment of this application;

[0070] Figure 7 This is a top view schematic diagram of the LED unit formed in the first embodiment of this application;

[0071] Figure 8 This is a cross-sectional schematic diagram of the formation of the first passivation layer in the first embodiment of this application;

[0072] Figure 9 This is a top view schematic diagram of the formation of the first passivation layer in the first embodiment of this application;

[0073] Figure 10 This is a cross-sectional schematic diagram of the patterned mask formed by the first passivation layer in the first embodiment of this application;

[0074] Figure 11 yes Figure 8 The state shown is to Figure 10 A top-view diagram showing the state shown;

[0075] Figure 12 This is a cross-sectional schematic diagram of the formation of a hole in the metal bonding layer in the first embodiment of this application;

[0076] Figure 13 yes Figure 10 The state shown is to Figure 12 A top-view diagram showing the state shown;

[0077] Figure 14 This is a cross-sectional schematic diagram of the formation of the second passivation layer in the first embodiment of this application;

[0078] Figure 15 yes Figure 12 The state shown is to Figure 14 A top-view diagram showing the state shown;

[0079] Figure 16This is a cross-sectional schematic diagram after etching the first passivation layer and the second passivation layer in the first embodiment of this application;

[0080] Figure 17 yes Figure 14 The state shown is to Figure 16 A top-view diagram showing the state shown;

[0081] Figure 18 yes Figure 16 The state shown is to Figure 1 A top-view diagram showing the state shown;

[0082] Figure 19 This is a cross-sectional schematic diagram of the MicroLED display device in the second embodiment of this application;

[0083] Figure 20 This is a cross-sectional schematic diagram of the patterning of the first passivation layer to form a mask in the second embodiment of this application;

[0084] Figure 21 This is a top view schematic diagram of the patterning of the first passivation layer to form a mask in the second embodiment of this application;

[0085] Figure 22 This is a cross-sectional schematic diagram of the formation of a hole in the metal bonding layer in the second embodiment of this application;

[0086] Figure 23 yes Figure 20 The state shown is to Figure 22 A top-view diagram showing the state shown;

[0087] Figure 24 This is a cross-sectional schematic diagram of the formation of the second passivation layer in the second embodiment of this application;

[0088] Figure 25 This is a cross-sectional view of the second embodiment of this application after etching the first passivation layer and the second passivation layer;

[0089] Figure 26 yes Figure 24 The state shown is to Figure 25 A top-view diagram showing the state shown;

[0090] Reference numerals: 10-driving substrate; 100-first contact; 20-LED epitaxial layer; 200-LED unit; 210-first doped semiconductor layer; 220-active layer; 230-second doped semiconductor layer; 201-light-emitting surface; 30-substrate; 300-metal bonding layer; 310-hole or trench; 400-first passivation layer; 410-first through-hole; 500-second passivation layer; 510-second through-hole; 520-third through-hole; 600-transparent electrode layer. Detailed Implementation

[0091] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0092] In the description of this application, it should be understood that, specifically, the terms “on,” “above,” “on top of,” and “above” should be interpreted in the broadest sense, meaning that a description containing these terms is interpreted as “a component may be disposed on another component in direct contact, or there may be an intermediate component or layer between the components.”

[0093] Furthermore, for ease of description, this application may also use spatial relative terms such as "below," "under," "below," "above," "on top," "upper part," "lower part," and "upper part" to describe the relationship of one element or component to another element or component shown in the accompanying drawings. In addition to the orientations described in the figures, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90° or otherwise), and the spatial relative descriptive terms used in this application may be interpreted accordingly.

[0094] As used in this application, the term "layer" refers to a portion of material comprising a region of a certain thickness. A layer may extend over the entire underlying or upper layer structure, or it may extend over a localized area of ​​the underlying or upper layer structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a tapered surface. A single layer may comprise multiple layers. For example, a semiconductor layer may comprise one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0095] In the description of this application, the terms "micro" LED and "micro" device refer to the descriptive dimensions of certain devices or structures according to embodiments of this application. The term "micro" device or structure as used herein is intended to indicate a scale of 100 nanometers to 100 micrometers. However, it should be understood that embodiments of the invention are not necessarily limited thereto, and certain aspects of the embodiments can be applied to larger and possibly smaller size scales.

[0096] The applicant notes that in traditional MicroLED processes, photoresist or dielectric layers are typically used as masks, and metals are etched using methods such as reactive ion etching (RIE), inductively coupled plasma (ICP), or ion beam etching (IBE). Because the bonding metals are generally composed of multiple layers, the preferred etching method is one that minimizes the difference in etching rates between the layers, with IBE being commonly used. In these etching processes, the semiconductor material is typically etched first, followed by metal isolation etching. After etching, the mask is usually removed, and then a dielectric layer is deposited to passivate the semiconductor sidewalls and encapsulate the etched metal sidewalls, forming electrical isolation. Commonly used resist removers can react with certain metals. Therefore, the removal of the mask can affect the metal bonding layer, narrowing the range of selectable bonding metals and making it difficult to obtain optimal performance. Furthermore, using oxygen plasma resist removers can also cause the bonding metals to react with oxygen, resulting in certain changes in their properties.

[0097] In view of the above, embodiments of this application provide a MicroLED display device and a method for manufacturing the same, to overcome at least one of the above-mentioned defects.

[0098] This application describes a MicroLED display device and a method for fabricating the device. The MicroLED display device of this application uses Micro-LEDs (Micro light-emitting diodes), with the size of the micro-LEDs reduced to 100 nanometers to 100 micrometers. In Micro-LEDs, the Micro-LED array is highly integrated, and the distance between the LED units in the array is further reduced to the 5-micrometer level. The Micro-LED display method involves connecting Micro-LEDs of 5-micrometer size or even smaller to a driving substrate, achieving precise control over the brightness of each Micro-LED. The fabrication method of this application is applicable to Micro-LED structures, enabling the fabrication of micro-sized MicroLED display devices.

[0099] For details, please refer to Figure 1 , Figure 2 as well as Figure 19As shown, the MicroLED display device of this application embodiment includes a driving substrate 10, a metal bonding layer 300, LED units 200, a first passivation layer 400, a second passivation layer 500, and a transparent electrode layer 600. The metal bonding layer 300 is disposed on the driving substrate 10 and has multiple through holes or grooves, the bottom of which exposes the driving substrate 10. Multiple LED units 200 are arrayed on the metal bonding layer 300, with the holes or grooves located between adjacent LED units 200. The first passivation layer 400 covers the LED units 200 and exposes the light-emitting surface 201 of the LED units 200 and the holes or grooves. The second passivation layer 500 covers the first passivation layer 400 and fills the holes or grooves. The transparent electrode layer 600 covers the light-emitting surface 201 and is electrically connected to the LED units 200.

[0100] Understandably, the MicroLED display device protects the sidewalls of the LED unit 200 with the first passivation layer 400 and the metal bonding layer 300 with the second passivation layer 500, so that it is not affected by the process, reduces leakage current, and thus ensures the performance and reliability of the device.

[0101] In some embodiments, the driving substrate 10 may include semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, and cobalt phosphide. In some embodiments, the driving substrate 10 may be made of a non-conductive material such as glass, plastic, or a sapphire wafer. In some embodiments, the driving substrate 10 may have driving circuitry formed therein, and the driving substrate 10 may be a CMOS (Complementary Metal Oxide Semiconductor) backplane or a TFT glass substrate. The driving circuitry provides electrical signals to the LED cells 200 to control brightness. In some embodiments, the driving circuitry may include an active matrix driving circuitry, wherein each individual LED cell 200 corresponds to an independent driver.

[0102] In some embodiments, the LED unit 200 includes a stepped structure formed by etching the LED epitaxial layer 20. The stepped structure includes a first doped semiconductor layer 210, a second doped semiconductor layer 230, and an active layer 220 located between them. The stepped structure at least disconnects and electrically isolates the second doped semiconductor layers 230 of adjacent LED units 200 from each other. The light-emitting surface 201 is located on the second doped semiconductor layer 230, and the light-emitting surface 201 may be located at the top of the stepped structure.

[0103] Please see Figure 6 and Figure 20The first doped semiconductor layer 210 is disposed on the metal bonding layer 300, the active layer 220 is disposed on the side of the first doped semiconductor layer 210 away from the metal bonding layer 300, and the second doped semiconductor layer 230 is disposed on the side of the active layer 220 away from the first doped semiconductor layer 210.

[0104] In some embodiments, the driving substrate 10 includes a plurality of first contacts 100, which are located between adjacent LED units 200.

[0105] In some embodiments, the hole or groove is specifically a hole 310, the bottom of which exposes the first contact 100. The transparent electrode layer 600 covers the light surface 201 and the hole 310 to electrically connect the second doped semiconductor layer 230 of the LED unit 200 with the corresponding first contact 100, so that the LED unit 200 can be driven individually through the first contact 100.

[0106] In some embodiments, the first doped semiconductor layers 210 of adjacent LED units 200 are disconnected from each other and electrically isolated; the first contact 100 is located below the LED unit 200, and the metal bonding layer 300 electrically connects the first contact 100 and the first doped semiconductor layer 210.

[0107] In some embodiments, the hole or groove is specifically a groove 310, the groove 310 being spaced apart and electrically isolating the metal bonding layer 300 below the adjacent LED unit 200; the transparent electrode layer 600 covers the light-emitting surface 201 of the adjacent LED unit 200 and the common contact of the driving substrate 10 to electrically connect the second doped semiconductor layer 230 of the adjacent LED unit 200, so that the LED unit 200 can be driven individually through the first contact 100.

[0108] For details, please refer to the following document again. Figure 1 and Figure 2 In the first embodiment of this application, the driving substrate 10 includes a plurality of first contacts 100, the plurality of first contacts 100 are arranged in an array, and the first contacts 100 are located between adjacent LED units 200.

[0109] A metal bonding layer 300 is disposed on the driving substrate 10 for bonding the LED epitaxial layer 20 to the driving substrate 10 and for electrically connecting the first doped semiconductor layer 210 of each LED unit 200. The bonding metal of the metal bonding layer 300 includes Au, Sn, In, Cu or Ti.

[0110] Please refer to the following: Figure 12 and Figure 13A plurality of holes 310 are provided through the metal bonding layer 300, arranged in an array, and the holes 310 are located between adjacent LED units 200 and positioned relative to the first contact 100. The bottom of the hole 310 exposes the driving substrate 10 and the corresponding first contact 100. In the first embodiment, the hole 310 can be a circular hole, and the metal bonding layer 300 is penetrated through the hole 310, exposing the sidewall.

[0111] Multiple LED units 200 are arrayed on a metal bonding layer 300 to be connected to the driving substrate 10 as a whole through the metal bonding layer 300. The first doped semiconductor layer 210 of each LED unit 200 is electrically connected to each other through the metal bonding layer 300.

[0112] The first passivation layer 400 covers the LED unit 200, and the first passivation layer 400 exposes the light-emitting surface 201 and the hole 310 of the LED unit 200. That is to say, the first passivation layer 400 at least covers the sidewall of the LED unit 200 to protect the sidewall of the LED unit 200 and prevent it from forming surface states during the fabrication process.

[0113] The second passivation layer 500 covers the first passivation layer 400 and the sidewalls of the hole 310 to protect the sidewalls formed by etching the metal bonding layer 300, prevent damage to its overall structure, and thus ensure the performance and stability of the product.

[0114] The transparent electrode layer 600 covers the light surface 201 and holes or grooves to electrically connect the LED unit 200 and the corresponding first contact 100 of the driving substrate 10, so that the LED unit 200 can be driven individually through the first contact 100.

[0115] For details, please refer to Figure 19 In the second embodiment of this application, the driving substrate 10 includes a plurality of first contacts 100, which are arranged in an array and located below the LED unit 200 and opposite to the LED unit 200. In addition, the driving substrate 10 may also include a common contact (not shown in the figure), which is disposed near the edge of the driving substrate 10.

[0116] A metal bonding layer 300 is disposed on the driving substrate 10 for bonding the LED epitaxial layer 20 to the driving substrate 10 and for electrically connecting the first doped semiconductor layer 210 and the first contact 100 of the LED unit 200. The bonding metal of the metal bonding layer 300 includes Au, Sn, In, Cu or Ti.

[0117] Please refer to the following: Figure 22 and Figure 23A groove 310 is provided through the metal bonding layer 300. Multiple grooves 310 can be provided and arranged in an array, spaced apart from adjacent LED units 200. The bottom of the groove 310 exposes the driving substrate 10. The groove 310 can also be a through-slot. In the second embodiment, the groove 310 is a trench penetrating the thickness direction of the metal bonding layer 300. The groove 310 forms gaps in the metal bonding layer 300, dividing it into multiple arrayed metal bonding portions. Each metal bonding portion is correspondingly disposed below the LED unit 200, with adjacent metal bonding portions spaced apart by the groove 310.

[0118] In the second embodiment, multiple LED units 200 are arrayed on the metal bonding layer 300 to be connected to the driving substrate 10 as a whole through the metal bonding layer 300. The first doped semiconductor layer 210 of each LED unit 200 is electrically connected to the first contact 100 through the metal bonding portion formed by the metal bonding layer 300.

[0119] The first passivation layer 400 covers the LED unit 200, and the first passivation layer 400 exposes the light-emitting surface 201 and the groove 310 of the LED unit 200. That is to say, the first passivation layer 400 at least covers the sidewall of the LED unit 200 to protect the sidewall of the LED unit 200 and prevent it from forming surface states during the fabrication process.

[0120] The second passivation layer 500 covers the first passivation layer 400 and the sidewalls of the trench 310 to protect the sidewalls formed by etching the metal bonding layer 300, prevent damage to its overall structure, and thus ensure the performance and stability of the product.

[0121] The transparent electrode layer 600 covers the light-emitting surface 201 of each LED unit to electrically connect the second doped semiconductor layer 230 of each LED unit 200, and can electrically connect the second doped semiconductor layer 230 to the common contact of the driving substrate 10 so that the LED unit 200 can be driven individually through the first contact 100.

[0122] In some embodiments, the first passivation layer 400 is a stacked dielectric layer formed sequentially by atomic layer deposition and plasma chemical vapor deposition.

[0123] Specifically, the material of the first passivation layer 400 can be selected from inorganic dielectric materials such as SiO2, Si3N4, and Al2O3, or other feasible organic dielectric materials. Since the dielectric material is also etched by the ion beam, its thickness should be greater than the thickness etched away during the etching process. After etching, the remaining thickness of the dielectric layer, i.e., the thickness of the first passivation layer 400, should ideally be 20-300 nm. In this embodiment, the dielectric layer formed by atomic layer deposition (ALD) has very high density and is not easily etched, resulting in better passivation of the sidewalls of the LED unit 200. Plasma-chemical vapor deposition (PECVD) can thicken the dielectric layer, and the resulting stacked dielectric layer allows the final dielectric layer to be etched onto the ALD dielectric layer, significantly improving product consistency and meeting the thickness requirements of the first passivation layer 400.

[0124] Furthermore, in some embodiments, the first passivation layer 400 is a stacked dielectric layer formed by alternating atomic layer deposition (ALD) and plasma chemical vapor deposition (PCVDC). For example, alternating ALD / PECVD / ALD / PECVD deposition processes can be performed to form the desired first passivation layer 400.

[0125] Accordingly, embodiments of this application also provide a method for fabricating a MicroLED display device, characterized by:

[0126] A driving substrate 10, a metal bonding layer 300, and LED units 200 are provided. The metal bonding layer 300 is disposed on the driving substrate 10, and multiple LED units 200 are arranged in an array on the metal bonding layer 300.

[0127] A first passivation layer 400 is formed, and the first passivation layer 400 covers the LED unit 200;

[0128] The first passivation layer 400 is patterned and used as a mask to form a plurality of holes or grooves on the metal bonding layer 300. The holes or grooves are located between adjacent LED units 200, and the bottom of the holes or grooves exposes the driving substrate 10.

[0129] A second passivation layer 500 is formed, which covers the first passivation layer 400 and the sidewall of the hole or groove.

[0130] The first passivation layer 400 and the second passivation layer 500 are etched to expose at least the light-emitting surface 201 of the LED unit 200;

[0131] A transparent electrode layer 600 is formed, which covers the light-emitting surface 201 and is electrically connected to the LED unit 200.

[0132] Understandably, this fabrication method employs a two-stage passivation process. The first passivation layer 400 protects the sidewalls of the LED unit 200, preventing the formation of surface states that could increase leakage current. Then, the first passivation layer 400 is directly used as a mask, eliminating the need for additional masks to form holes or trenches in the metal bonding layer 300. After metal etching, there is no need to remove the mask, and the impact of the resist removal process on the metal bonding layer 300 is not considered, thus allowing for a wider range of bonding metals. After forming the holes or trenches, a second passivation layer 500 is used to cover the sidewalls of the holes or trenches, thereby covering the exposed bonding metals on the sidewalls, forming electrical isolation, reducing leakage current, and thus ensuring device performance and reliability.

[0133] Specifically, the LED unit 200 includes a stepped structure formed by etching the LED epitaxial layer 20. The stepped structure includes a first doped semiconductor layer 210, a second doped semiconductor layer 230, and an active layer 220 located between them. The stepped structure at least disconnects and electrically isolates the second doped semiconductor layers 230 of adjacent LED units 200 from each other. The light-emitting surface 201 is located on the second doped semiconductor layer 230, specifically at the top of the stepped structure.

[0134] In the first embodiment, please refer to Figure 3 The system provides a driving substrate 10, a metal bonding layer 300, and an LED unit 200, including: providing an LED epitaxial layer 20, which is disposed on a substrate 30; wherein, the substrate 30 is a semiconductor material, such as silicon, GaN, SiC, etc., or the substrate 30 is a non-conductive material, such as sapphire or glass; the LED epitaxial layer generally includes an N-type doped layer, a P-type doped layer, and a multiple quantum well layer.

[0135] Please see Figure 4 Metal bonding layers 300 are formed on the driving substrate 10 and the LED epitaxial layer 20 respectively, bonding the driving substrate 10 and the LED epitaxial layer 20, exposing the substrate 30.

[0136] Please see Figure 5 The substrate 30 of the bonded wafer can be removed by dry or wet methods.

[0137] Please see Figure 6 and Figure 7 The LED epitaxial layer 20 can be etched using either dry or wet methods to form a stepped structure, i.e., etching out multiple LED units 200 arranged in an array. The LED units 200 are arranged in an array on the metal bonding layer 300, so that the first doped semiconductor layers 210 of adjacent LED units 200 are electrically connected to each other through the metal bonding layer 300; wherein, the first contact 100 of the driving substrate 10 is located between adjacent LED units 200.

[0138] For further details, please refer to Figure 8 and Figure 9 As shown, inorganic or organic dielectric materials are used to passivate the sidewall of the LED unit 200 for the first time, forming a first passivation layer 400. At this time, the thickness of the first passivation layer 400 is greater than the thickness of the first passivation layer 400 after etching the metal bonding layer 300. In order to match the subsequent metal etching process, the material and thickness of the first passivation layer 400 can be designed.

[0139] Specifically, the material of the first passivation layer 400 can be selected from inorganic dielectric materials such as SiO2, Si3N4, and Al2O3, or other feasible organic dielectric materials, such as polyimide, SU-8 photoresist, or other photo-patternable polymers. Conventional methods for depositing dielectric layers include plasma chemical vapor deposition (PECVD) and atomic layer deposition (ALD). Dielectric layers deposited using ALD have very high density and are not easily etched. Therefore, the material for the first passivation layer can employ a multi-layer dielectric structure. For example, an ALD dielectric layer can be deposited first (ALD-deposited dielectric layers have better passivation effects on semiconductor sidewalls), followed by a thickened dielectric layer deposited using PECVD. Alternatively, multiple dielectric layer pairs can be used as the first passivation layer, such as ALD / PECVD / ALD / PECVD, etc. Because the etching rate of the ALD dielectric layer is slow, the stacked dielectric layer design allows the final dielectric layer to be etched onto the ALD dielectric layer, significantly improving product consistency.

[0140] Please see Figure 10 and Figure 11 As shown, the first passivation layer 400 is patterned to form a plurality of first through holes 410 that penetrate the first passivation layer 400 and are arranged in an array. The first through holes 410 are disposed above the first contact 100.

[0141] Please see Figure 12 and Figure 13 As shown, using the first passivation layer 400 as a mask, the metal bonding layer 300 is etched through to the surface dielectric layer of the driving substrate 10 to form an array of holes 310, with the bottom of the holes 310 exposing the first contact 100. The metal etching process can be conventional ion beam etching, or inductively coupled plasma etching and reactive ion etching. During the formation of the holes 310, the thickness of the first passivation layer 400 is reduced to 20–300 nm.

[0142] Please see Figure 14 and Figure 15As shown, after the metal bonding layer 300 is etched, there is no need to remove the mask. Instead, a second passivation is performed directly. Inorganic or organic dielectric materials are used to cover the exposed bonding metal sidewalls of the hole 310 to form a second passivation layer 500. This provides electrical isolation to the sidewalls of the hole 310 to prevent short circuits in subsequent metal traces. At the same time, it protects the highly reactive metal and improves the compatibility of subsequent processes.

[0143] Please see Figure 16 and Figure 17 As shown, the dielectric layer above the stepped structure and the first contact 100 of the driving substrate 10 is etched to form a second through hole 510 and a third through hole 520, i.e., the first passivation layer 400 and the second passivation layer 500 are etched to form the second through hole 510 and the third through hole 520, so that the second through hole 510 exposes the first contact 100 and the third through hole 520 exposes the light-emitting surface 201 of the LED unit 200.

[0144] Please see Figure 2 and Figure 18 A transparent electrode layer 600 is deposited, covering the light-emitting surface 201 and the aperture 310, to electrically connect the second doped semiconductor layer 230 of the LED unit 200 to the corresponding first contact 100, so that the LED unit 200 can be driven individually through the first contact 100. The transparent electrode layer 600 is made of a transparent material, such as ITO.

[0145] Please see Figure 19 Unlike the first embodiment, in the second embodiment, the first contact 100 of the provided driving substrate 10 is located below the LED unit 200, and the first contact 100 is electrically connected to the first doped semiconductor layer 210 of the LED unit 200 through the metal bonding layer 300.

[0146] Inorganic or organic dielectric materials are used to passivate the sidewall of the LED unit 200 for the first time, forming a first passivation layer 400. At this time, the thickness of the first passivation layer 400 is greater than the thickness of the first passivation layer 400 after etching the metal bonding layer 300. In order to match the subsequent metal etching process, the material and thickness of the first passivation layer 400 can be designed.

[0147] Specifically, the material of the first passivation layer 400 can be selected from inorganic dielectric materials such as SiO2, Si3N4, and Al2O3, or other feasible organic dielectric materials, such as polyimide, SU-8 photoresist, or other photo-patternable polymers. Conventional methods for depositing dielectric layers include plasma chemical vapor deposition (PECVD) and atomic layer deposition (ALD). Dielectric layers deposited using ALD have very high density and are not easily etched. Therefore, the material for the first passivation layer can employ a multi-layer dielectric structure. For example, an ALD dielectric layer can be deposited first (ALD-deposited dielectric layers have better passivation effects on semiconductor sidewalls), followed by a thickened dielectric layer deposited using PECVD. Alternatively, multiple dielectric layer pairs can be used as the first passivation layer, such as ALD / PECVD / ALD / PECVD, etc. Because the etching rate of the ALD dielectric layer is slow, the stacked dielectric layer design allows the final dielectric layer to be etched onto the ALD dielectric layer, significantly improving product consistency.

[0148] For further details, please refer to Figure 20 and Figure 21 As shown, the first passivation layer 400 is patterned to form a plurality of first through holes 410 that penetrate the first passivation layer 400 and are arranged in an array. In the second embodiment, the first through holes 410 are through slot structures, and the through slot structures are spaced apart from the first passivation layer 400 covering adjacent LED units 200.

[0149] Please see Figure 22 and Figure 23 As shown, using the first passivation layer 400 as a mask, the metal bonding layer 300 is etched through to the surface dielectric layer of the driving substrate 10, forming an array of trenches 310. The metal etching process can be conventional ion beam etching, or inductively coupled plasma etching and reactive ion etching. The trenches 310 are located between adjacent LED units 200, with the bottom of the trenches 310 exposing the driving substrate 10. Specifically, the trenches 310 are trenches penetrating the thickness direction of the metal bonding layer 300. The trenches 310 form gaps in the metal bonding layer 300, dividing the metal bonding layer 300 into multiple arrayed metal bonding portions. Each metal bonding portion is correspondingly disposed below the LED unit 200, with adjacent metal bonding portions spaced apart by the trenches 310. During the formation of the trenches 310, the thickness of the first passivation layer 400 is reduced to 20–300 nm.

[0150] Please see Figure 24As shown, after the metal bonding layer 300 is etched, there is no need to remove the mask. Instead, a second passivation is performed directly. Inorganic or organic dielectric materials are used to cover the exposed bonding metal sidewalls of the trench 310 to form a second passivation layer 500. This provides electrical isolation to the sidewalls of the trench 310 to prevent short circuits in subsequent metal traces. It also protects the highly reactive metals and improves the compatibility of subsequent processes.

[0151] Please see Figure 25 and Figure 26 As shown, the dielectric layer above the stepped structure and the common contact of the driving substrate 10 is etched with an opening, that is, the first passivation layer 400 and the second passivation layer 500 are etched to form a third through hole 520, which exposes the light-emitting surface 201 of the LED unit 200.

[0152] Please refer to it again. Figure 19 A transparent electrode layer 600 is deposited, covering the light-emitting surface 201 of each LED unit 200 to electrically connect the second doped semiconductor layer 230 of each LED unit 200. The second doped semiconductor layer 230 is further connected to a common contact of the driving substrate 10, allowing each LED unit 200 to be driven individually via a first contact 100. The transparent electrode layer 600 is made of a transparent material, such as ITO.

[0153] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0154] The MicroLED display device and its fabrication method provided in the embodiments of this application have been described in detail above, and specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for fabricating a MicroLED display device, characterized in that, include: A driving substrate (10), a metal bonding layer (300), and LED units (200) are provided. The metal bonding layer (300) is disposed on the driving substrate (10), and a plurality of LED units (200) are arranged in an array on the metal bonding layer (300). A first passivation layer (400) is formed, which covers the LED unit (200), and the initial thickness of the first passivation layer (400) is greater than the thickness etched during the etching of the metal bonding layer (300). The first passivation layer (400) is patterned and a plurality of holes or trenches are formed on the metal bonding layer (300) using the first passivation layer (400) as a mask. The holes or trenches are located between adjacent LED units (200), and the bottom of the holes or trenches exposes the driving substrate (10). A second passivation layer (500) is formed, which covers the first passivation layer (400) and fills the hole or trench, and covers the bonded metal exposed on the sidewall of the hole or trench to form electrical isolation; The first passivation layer (400) and the second passivation layer (500) are etched to expose at least the light-emitting surface (201) of the LED unit (200). A transparent electrode layer (600) is formed, which covers the light-emitting surface (201) and is electrically connected to the LED unit (200).

2. The method for fabricating a MicroLED display device according to claim 1, characterized in that, The LED unit (200) includes a stepped structure formed by etching the LED epitaxial layer (20), the stepped structure including a first doped semiconductor layer (210), a second doped semiconductor layer (230) and an active layer (220) located between the two; the stepped structure at least disconnects and electrically isolates the second doped semiconductor layers (230) of adjacent LED units (200) from each other; The light-emitting surface (201) is located on the second doped semiconductor layer (230).

3. The method for fabricating a MicroLED display device according to claim 2, characterized in that, The provision of the driving substrate (10), the metal bonding layer (300), and the LED unit (200) includes: An LED epitaxial layer (20) is provided, the LED epitaxial layer (20) being disposed on a substrate (30); The metal bonding layer (300) is formed on the driving substrate (10) and / or the LED epitaxial layer (20) to bond the driving substrate (10) to the LED epitaxial layer (20); Remove the substrate (30); The LED epitaxial layer (20) is etched into the stepped structure; The driving substrate (10) includes a plurality of first contacts (100) located between adjacent LED units (200).

4. The method for fabricating a MicroLED display device according to claim 3, characterized in that, When forming a plurality of holes or grooves on the metal bonding layer (300), the bottom of the holes or grooves is exposed to the first contact (100). The first passivation layer (400) and the second passivation layer (500) are etched to expose the light-emitting surface (201) of the LED unit (200) and the first contact (100). The transparent electrode layer (600) covers the light-emitting surface (201) and the hole or groove to electrically connect the second doped semiconductor layer (230) of the LED unit (200) with the corresponding first contact (100), so that the LED unit (200) can be driven individually through the first contact (100).

5. The method for fabricating a MicroLED display device according to claim 2, characterized in that, The provision of the driving substrate (10), the metal bonding layer (300), and the LED unit (200) includes: An LED epitaxial layer (20) is provided, the LED epitaxial layer (20) being disposed on a substrate (30); The metal bonding layer (300) is formed on the driving substrate (10) and / or the LED epitaxial layer (20) to bond the driving substrate (10) to the LED epitaxial layer (20); Remove the substrate (30); The LED epitaxial layer (20) is etched into the stepped structure; The driving substrate (10) includes a plurality of first contacts (100), the first contacts (100) being located below the LED unit (200), and the metal bonding layer (300) electrically connecting the first contacts (100) and the first doped semiconductor layer (210).

6. The method for fabricating a MicroLED display device according to claim 5, characterized in that, When a plurality of holes or grooves are formed on the metal bonding layer (300), the holes or grooves are spaced apart and electrically isolated from the metal bonding layer (300) below the adjacent LED units (200). The first passivation layer (400) and the second passivation layer (500) are etched to expose the light-emitting surface (201) of the LED unit (200). The transparent electrode layer (600) covers the light-emitting surface (201) of the adjacent LED unit (200) to electrically connect the second doped semiconductor layer (230) of the adjacent LED unit (200), so that the LED unit (200) can be driven individually through the first contact (100).

7. The method for fabricating a MicroLED display device according to claim 1, characterized in that, Forming the first passivation layer (400) includes: A atomic layer deposition and plasma chemical vapor deposition media materials are used sequentially to form a stacked media layer, wherein the stacked media layer is the first passivation layer (400).

8. The method for fabricating a MicroLED display device according to claim 7, characterized in that, The atomic layer deposition and the plasma chemical vapor deposition are performed alternately multiple times to form the stacked dielectric layer.

9. The method for fabricating a MicroLED display device according to claim 7, characterized in that, The material of the first passivation layer (400) is an inorganic dielectric material, which is selected from one or more of SiO2, Si3N4, and Al2O3.

10. The method for fabricating a MicroLED display device according to claim 7, characterized in that, The material of the first passivation layer (400) is an organic dielectric material.

11. The method for fabricating a MicroLED display device according to any one of claims 1 to 10, characterized in that, The holes or grooves are formed by a metal etching process; Before forming the hole or trench, the thickness of the first passivation layer (400) is reduced to 20-300 nm.

12. A MicroLED display device, characterized in that, include: Drive substrate (10); A metal bonding layer (300) is disposed on the driving substrate (10). The metal bonding layer (300) is provided with a plurality of holes or grooves through it, and the bottom of the holes or grooves exposes the driving substrate (10). LED units (200), a plurality of LED units (200) are arranged in an array on the metal bonding layer (300), and the holes or slots are located between adjacent LED units (200); A first passivation layer (400) covers the LED unit (200) and exposes the hole or groove. The first passivation layer (400) covers the sidewall of the LED unit (200) and has a thickness of 20~300nm on the sidewall. A second passivation layer (500) covers the first passivation layer (400) and fills the hole or trench, and covers the bonded metal exposed on the sidewall of the hole or trench to form electrical isolation; The first passivation layer (400) and the second passivation layer (500) expose at least the light-emitting surface of the LED unit (200); A transparent electrode layer (600) covers the light-emitting surface (201) and is electrically connected to the LED unit (200).

13. The MicroLED display device according to claim 12, characterized in that, The LED unit (200) includes a stepped structure formed by etching the LED epitaxial layer (20), the stepped structure including a first doped semiconductor layer (210), a second doped semiconductor layer (230) and an active layer (220) located between the two; the stepped structure at least disconnects and electrically isolates the second doped semiconductor layers (230) of adjacent LED units (200) from each other; The light-emitting surface (201) is located on the second doped semiconductor layer (230).

14. The MicroLED display device according to claim 13, characterized in that, The driving substrate (10) includes a plurality of first contacts (100) located between adjacent LED units (200).

15. The MicroLED display device according to claim 14, characterized in that, The bottom of the hole or groove exposes the first contact (100), the first passivation layer (400) and the second passivation layer (500) also expose the first contact (100), the transparent electrode layer (600) covers the light-emitting surface (201) and the hole or groove to electrically connect the second doped semiconductor layer (230) of the LED unit (200) to the corresponding first contact (100), so that the LED unit (200) can be driven individually through the first contact (100).

16. The MicroLED display device according to claim 13, characterized in that, The driving substrate (10) includes a plurality of first contacts (100), the first contacts (100) being located below the LED unit (200), and the metal bonding layer (300) electrically connecting the first contacts (100) and the first doped semiconductor layer (210).

17. The MicroLED display device according to claim 16, characterized in that, The metal bonding layer (300) below the LED units (200) that are spaced apart by holes or slots and electrically isolated from each other. The transparent electrode layer (600) covers the light-emitting surface (201) of the adjacent LED unit (200) to electrically connect the second doped semiconductor layer (230) of the adjacent LED unit (200), so that the LED unit (200) can be driven individually through the first contact (100).

18. The MicroLED display device according to claim 12, characterized in that, The first passivation layer (400) is a stacked dielectric layer formed sequentially by atomic layer deposition and plasma chemical vapor deposition.

19. The MicroLED display device according to claim 18, characterized in that, The first passivation layer (400) is a stacked dielectric layer formed by alternating atomic layer deposition and plasma chemical vapor deposition.

20. The MicroLED display device according to claim 18, characterized in that, The material of the first passivation layer (400) is an inorganic dielectric material, which is selected from one or more of SiO2, Si3N4, and Al2O3.

21. The MicroLED display device according to claim 18, characterized in that, The material of the first passivation layer (400) is an organic dielectric material.

22. The MicroLED display device according to any one of claims 12 to 21, characterized in that, The thickness of the first passivation layer (400) is 20~300mm.

Images