A method for improving light extraction efficiency of LED chip side surface

By forming a two-slope MESA structure on the surface of the LED chip and using selective etching of SiO2 thin film and GaN, the problem of low side light extraction efficiency in the prior art is solved, achieving high-efficiency light extraction and improved reliability.

CN115911191BActive Publication Date: 2025-12-19SHANDONG INSPUR HUAGUANG OPTOELECTRONICS
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Patent Information

Application Number
CN202110992519.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-08-27
Publication Date
2025-12-19
Estimated Expiration
2041-08-27

AI Technical Summary

Technical Problem

Existing technologies have limited effectiveness in improving the side light extraction efficiency of GaN-based LEDs and pose reliability risks, making it difficult to achieve simple and effective improvements based on existing processes.

Method used

By forming a MESA structure consisting of two slopes on the surface of the LED chip, and using selective etching of SiO2 thin film and GaN, the light emission area and angle combination are increased, and the light emission path is optimized.

Benefits of technology

It improves the side light emission efficiency of LED chips, with LOP reaching over 267mW, which is more than 1.2% higher than existing technologies. It also boasts high process reliability, low cost, and is suitable for industrial application.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to a kind of methods for improving the light extraction efficiency of LED chip side face.The steps are as follows:(1) providing LED epitaxial wafer, growing SiO2 film on epitaxial wafer GaN layer;(2) evenly coating photoresist on SiO2 film, making photoresist mask pattern;(3) the epitaxial wafer is placed in buffer oxide etching solution and etched for 50-150s;(4) the epitaxial wafer is subjected to ICP dry etching to form MESA structure;(5) the epitaxial wafer is subjected to conventional degumming operation, and transparent conductive layer, P / N electrode and passivation layer are prepared.The LED chip prepared by the present application has a MESA structure with two slopes, which first increases the light extraction area of LED chip;Secondly, it increases the angle combination in the side light path, increases the escape opportunity of waveguide or multiple reflection light in GaN;Finally, it is more conducive to the lateral propagation of light from MQW, and the light emitting efficiency of LED chip with conventional MESA structure is improved by more than 1.2%.
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Description

TECHNICAL FIELD

[0001] The application relates to a method for improving the side light-emitting efficiency of an LED chip and belongs to the technical field of semiconductor processing. BACKGROUND

[0002] Light emitting diodes (LED) have been greatly supported by the government since the beginning of development due to the advantages of small size, low energy consumption, long service life, high stability and the like. Since 2010, the LED lighting market has shown a rapid development trend, and currently, the domestic LED has achieved great development. However, the key problem restricting the brightness improvement of GaN-based LED is the low light-emitting efficiency. According to the current situation, the internal quantum efficiency of GaN-based LED has reached 90%, but the external quantum efficiency of the conventional LED structure is only about 5% due to the influence of total reflection. In order to improve the light-emitting efficiency as much as possible, related technical means such as a patterned substrate (PSS), roughening of each film layer surface or interface, a back reflection layer and the like are favored by people. However, the improvement degree of the light-emitting efficiency of the LED based on the improvement of the forward light-emitting is still limited, and therefore, it is very necessary to improve the side light-emitting of the LED chip for further improving the light-emitting efficiency.

[0003] Chinese patent document CN202957285U discloses an epitaxial structure for improving the side light-emitting of an LED and a manufacturing method thereof. The method adopts a GaN / AlGaN superlattice structure to replace a common GaN epitaxial layer, and based on the principle that the etching speed of GaN and AlGaN is different, the etching speed of GaN and AlGaN is realized to achieve the sawtooth-shaped profile of the side of the LED chip, so as to increase the light-emitting area of the side wall of the chip. In the patent, the microstructure roughening effect is realized on the side wall of the chip to improve the side wall light-emitting effect, but the side wall angle is not optimized. Meanwhile, the method needs to change the epitaxial structure to achieve the purpose, and Al element is introduced into the epitaxial layer. Since Al element has instability to hydrogen ions, it may have an influence on the water vapor / acid gas corrosion resistance of the chip, thereby bringing about a reliability risk, and is not suitable for scale application.

[0004] Chinese patent document CN104538511A discloses an LED chip for improving the light-emitting efficiency and a manufacturing method thereof. The method utilizes a mesa pattern as a mask, etches a groove at the edge position in the formed mesa pattern area, and etches to the N-type semiconductor layer, so as to form a trapezoidal reflecting surface, increase the reflection of the side light, and thereby improve the output of the forward light. However, the method etches an additional groove in the mesa edge area, greatly reduces the effective utilization area of the front of the chip, and is not conducive to the improvement of the unit area light-emitting efficiency.

[0005] Therefore, it is necessary to study a process scheme which is high in reliability, simple and effective, and easy to implement, to further improve the side light emission of the chip on the basis of the existing process, so as to improve the light emitting efficiency of the chip. SUMMARY

[0006] In view of the deficiencies of the prior art, the present application provides a method for improving the side light emission efficiency of an LED chip. The present application forms a MESA side structure composed of two slopes by increasing a SiO2 film and using selective etching of SiO2 and GaN, introduces a new light emission route in the entire LED chip light emission design, and improves the external quantum efficiency. The scheme is high in reliability, simple, does not need to introduce additional equipment, and has high feasibility.

[0007] The technical scheme of the present application is as follows:

[0008] A method for improving the side light emission efficiency of an LED chip, comprising the following steps:

[0009] (1) providing an LED epitaxial wafer, the epitaxial wafer comprising a substrate and a GaN layer on the substrate, and growing a SiO2 film on the GaN layer by a PECVD method;

[0010] (2) uniformly coating photoresist on the SiO2 film to make a photoresist mask pattern;

[0011] (3) placing the epitaxial wafer obtained in step (2) into a buffer oxide etching solution for etching for 50-150s;

[0012] (4) performing ICP dry etching on the epitaxial wafer obtained in step (3) to form a MESA structure;

[0013] The MESA structure is an irregular side structure composed of two slopes.

[0014] (5) performing a conventional photoresist removal operation on the epitaxial wafer obtained in step (4), and preparing a transparent conductive layer, evaporating P / N electrodes, and preparing a passivation layer.

[0015] According to the present application, preferably, in step (1), the thickness of the GaN layer is 4-5μm, and the thickness of the SiO2 film is 200-250nm.

[0016] According to the present application, preferably, in step (2), the thickness of the photoresist is 2.2-3.0μm.

[0017] According to the present application, preferably, in step (2), the photoresist mask pattern is a conventional MESA geometric mask pattern of an LED chip.

[0018] According to the application, preferably, in step (2), the photoresist mask pattern is made by the following method: transferring the pattern on the photoresist by an exposure machine, then developing and baking to complete the photoresist mask pattern.

[0019] According to the application, preferably, in step (3), the buffer oxide etching solution is mixed in the volume ratio of 49% HF aqueous solution: 40% NH4F aqueous solution = 1:20, and the etching temperature is 20-30℃.

[0020] According to the application, preferably, in step (3), the etching time is 90-120s, so that the SiO2 in the area not covered by the photoresist is etched clean, and the SiO2 film under the photoresist is laterally etched 0.5-3.0μm.

[0021] According to the application, preferably, in step (4), the ICP dry etching is carried out in the plasma gas composed of chlorine, boron trichloride and argon, and the time is 300-500s.

[0022] According to the application, preferably, in step (4), in the two-stage slope formed, the first-stage slope has an angle of 30-35 degrees with the horizontal, and a vertical height of 0.4-0.8μm; the second-stage slope has an angle of 55-60 degrees with the horizontal, and a vertical height of 0.6-1.0μm.

[0023] The application also provides a LED chip with high light extraction efficiency on the side surface, which is prepared by the above method.

[0024] The rest of the application not described in detail can adopt the prior art.

[0025] Technical features of the application:

[0026] The application increases SiO2 film on the basis of the conventional MESA manufacturing process, firstly, the SiO2 film exposed outside the photoresist is etched clean by using the mask effect of the photoresist and the SiO2 film not exposed under the photoresist is eroded laterally by 0.5-3.0 microns. Then the etched epitaxial wafer is etched by the conventional ICP (inductively coupled plasma etching machine), with the etching time, in the initial stage, the MESA sidewall morphology is copied from the photoresist edge morphology, because the etching selectivity ratio of the photoresist and GaN is close to 1:1, the MESA sidewall angle is basically consistent with the photoresist sidewall angle; after etching for a period of time, the photoresist edge is etched off, exposing the SiO2 film, in the subsequent etching process, the MESA edge morphology is determined by the sidewall morphology of the SiO2 film, because the etching selectivity ratio of the SiO2 film and GaN is close to 1:5, so the MESA etching is basically a steep slope in this stage. Based on the different etching angles in the two stages, the MESA appearance morphology with two slopes is obtained after the final etching is completed.

[0027] The application has the advantages that:

[0028] 1. The LED chip manufactured by the application has a MESA structure with two slopes, which effectively increases the light-emitting area of the LED chip; secondly, the MESA structure increases the angle combination in the light-emitting route, so that the waveguide or multiple reflection light in the GaN increases the escape opportunity; finally, because the MESA sidewall angle of the MESA structure close to the GaN surface is steeper, it is more conducive to the lateral propagation of the light emitted from the MQW (multiple quantum hydrazine). Based on these advantages, the MESA structure with two slopes improves the side light-emitting efficiency of the LED chip, and the LOP of a 9*25mil GaN-based LED wafer reaches more than 267mW under a test current of 150mA, which is more than 1.2% higher than the existing LED chip light-emitting efficiency. 2

[0029] 2. The method provided by the application has high reliability, simple scheme, low cost, does not need to introduce additional equipment, and is conducive to industrial popularization and use. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 is a schematic diagram of the MESA structure manufacturing method of the application;

[0031] Figure 2 is a schematic diagram of the conventional MESA structure manufacturing method;

[0032] Figure 3 is a side SEM picture of the MESA structure manufactured by the method of the application;

[0033] Figure 4 ​is a side SEM picture of the MESA structure made by the conventional method. DETAILED DESCRIPTION

[0034] In order to make the technical problems, technical solutions and advantages of the present application more clear, the present application is further described below by embodiments and in conjunction with the drawings, but is not limited thereto, and the present application not described in detail is according to the conventional technology in the art.

[0035] Embodiment 1

[0036] A method for improving the light extraction efficiency of the side of an LED chip, comprising the following steps:

[0037] (1) providing an LED epitaxial wafer, the epitaxial wafer comprising a substrate and a GaN layer with a thickness of 4.5 μm on the substrate, and a SiO2 film with a thickness of 220 nm grown on the GaN layer by a PECVD method;

[0038] (2) uniformly coating a photoresist with a thickness of 2.5 μm on the SiO2 film, transferring the pattern on the photoetching plate to the photoresist by an exposure machine, and then performing a developing and baking process to complete the fabrication of the photoresist mask pattern;

[0039] (3) placing the epitaxial wafer obtained in step (2) into a buffer oxide etching solution for etching for 100 s; the buffer oxide etching solution is prepared by mixing 49% HF aqueous solution and 40% NH4F aqueous solution at a volume ratio of 1:20, and the etching temperature is 25°C;

[0040] (4) performing ICP dry etching on the epitaxial wafer obtained in step (3) in a plasma gas composed of chlorine, boron trichloride and argon, and the etching time is 400 s to form a MESA structure;

[0041] The MESA structure is an irregular structure formed by two slopes, wherein the first slope has an angle of 32 degrees with the horizontal and a vertical height of 0.6 μm, and the second slope has an angle of 58 degrees with the horizontal and a vertical height of 0.75 μm;

[0042] (5) performing a conventional photoresist removal operation on the epitaxial wafer obtained in step (4), and evaporating P / N electrodes and preparing a passivation layer.

[0043] The schematic diagram of the fabrication method of the MESA structure in this embodiment is shown in Figure 1 , and the side SEM picture of the formed MESA structure is shown in Figure 3 .

[0044] Embodiment 2

[0045] A method for improving the light extraction efficiency of the side of an LED chip, comprising the following steps:

[0046] (1) providing an LED epitaxial wafer, the epitaxial wafer comprising a substrate and a GaN layer with a thickness of 4.5 μm on the substrate, and growing a SiO2 film with a thickness of 200 nm on the GaN layer by a PECVD method;

[0047] (2) uniformly coating a photoresist with a thickness of 2.2 μm on the SiO2 film, transferring the pattern on a photoetching plate to the photoresist by an exposure machine, and then performing a developing and baking process to complete the production of a photoresist mask pattern;

[0048] (3) placing the epitaxial wafer obtained in step (2) into a buffer oxide etching solution for etching for 90 s, wherein the buffer oxide etching solution is prepared according to a volume ratio of 49% HF aqueous solution: 40% NH4F aqueous solution = 1:20, and the etching temperature is 25°C;

[0049] (4) performing ICP dry etching on the epitaxial wafer obtained in step (3) in a plasma gas composed of chlorine, boron trichloride and argon for 300 s to form a MESA structure;

[0050] The MESA structure is an irregular structure formed by two slopes, wherein the first slope has an angle of 34 degrees with the horizontal and a vertical height of 0.55 μm, and the second slope has an angle of 58 degrees with the horizontal and a vertical height of 0.8 μm.

[0051] (5) performing a conventional photoresist removing operation on the epitaxial wafer obtained in step (4), and evaporating P / N electrodes and preparing a passivation layer.

[0052] Example 3

[0053] A method for improving the light extraction efficiency of the side surface of an LED chip, comprising the following steps:

[0054] (1) providing an LED epitaxial wafer, the epitaxial wafer comprising a substrate and a GaN layer with a thickness of 4.5 μm on the substrate, and growing a SiO2 film with a thickness of 250 nm on the GaN layer by a PECVD method;

[0055] (2) uniformly coating a photoresist with a thickness of 3 μm on the SiO2 film, transferring the pattern on a photoetching plate to the photoresist by an exposure machine, and then performing a developing and baking process to complete the production of a photoresist mask pattern;

[0056] (3) placing the epitaxial wafer obtained in step (2) into a buffer oxide etching solution for etching for 120 s, wherein the buffer oxide etching solution is prepared according to a volume ratio of 49% HF aqueous solution: 40% NH4F aqueous solution = 1:20, and the etching temperature is 25°C;

[0057] (4) The epitaxial wafer obtained in step (3) is subjected to ICP dry etching in a plasma gas composed of chlorine, boron trichloride and argon for 500 s to form a MESA structure;

[0058] The MESA structure is an irregular structure formed by two slopes, the first slope has an angle of 34 degrees with the horizontal and a vertical height of 0.7 μm, and the second slope has an angle of 58 degrees with the horizontal and a vertical height of 0.7 μm.

[0059] (5) The epitaxial wafer obtained in step (4) is subjected to conventional stripping, and P / N electrodes and a passivation layer are formed.

[0060] Comparative Example 1

[0061] A MESA structure and a method for making the same, comprising the following steps:

[0062] (1) An LED epitaxial wafer is provided, which comprises a substrate and a GaN layer on the substrate. A photoresist with a thickness of 2.5 μm is uniformly coated on the surface of the GaN layer. A pattern on a photoetching plate is transferred to the photoresist by an exposure machine, and then a developing and baking process is performed to complete the fabrication of a photoresist mask pattern.

[0063] (2) The epitaxial wafer obtained in step (1) is placed in an ICP (inductively coupled plasma etching machine) cavity, and a plasma formed by chlorine, boron trichloride and argon is used to bombard and etch for 400 s.

[0064] (3) The epitaxial wafer obtained in step (2) is subjected to conventional stripping to complete the fabrication of a MESA structure.

[0065] The method for making the MESA structure in the comparative example is shown in Figure 2 , and the SEM picture of the side surface of the formed MESA structure is shown in Figure 4 .

[0066] Test Example

[0067] MESA structures are prepared according to the methods described in Example 1 and Comparative Example 1, and subsequent transparent conductive layers, P / N electrodes and passivation layers are fabricated to obtain 25 GaN-based LED wafers with a size of 9*25 mil 2 . The brightness is then tested at a current of 150 mA, and the average value of the test values is taken. The specific test results are shown in Table 1.

[0068] Table 1

[0069] Sample LOP brightness / mW Example 1 269.5 Comparative Example 1 266.3

[0070] As shown in Table 1, the LOP brightness of the LED chip with two-stage slope structure prepared in Example 1 is 269.5 mW, while the LOP brightness of the MESA structure LED chip prepared in Comparative Example 1 is 266.3 mW, which indicates that the method provided in the present application can effectively increase the light emitting area of the LED chip; secondly, the angle combination in the light emitting path is increased, so that the light rays in the waveguide or multiple reflections in GaN increase the escape opportunity; finally, it is more conducive to the lateral propagation of light rays from the MQW, and the external quantum efficiency of the LED chip is improved, and the light emitting efficiency of the LED chip in Example 1 is increased by more than 1.2% compared with that in Comparative Example 1.

Claims

1. A method for improving the side light extraction efficiency of an LED chip, characterized in that, The method comprises the following steps: (1) providing an LED epitaxial wafer, the epitaxial wafer comprising a substrate and a GaN layer on the substrate, and a SiO2 film grown on the GaN layer by a PECVD method; (2) uniformly coating photoresist on the SiO2 film to form a photoresist mask pattern; (3) placing the epitaxial wafer obtained in step (2) into a buffer oxide etching solution for etching for 50-150 s; (4) performing ICP dry etching on the epitaxial wafer obtained in step (3) to form a MESA structure; wherein the MESA structure is an irregular side surface structure composed of two slopes; in the two slopes, the first slope has an angle of 30-35 degrees with the horizontal and a vertical height of 0.4-0.8 μm; and the second slope has an angle of 55-60 degrees with the horizontal and a vertical height of 0.6-1.0 μm; (5) performing a conventional photoresist removal operation on the epitaxial wafer obtained in step (4), and preparing a transparent conductive layer, evaporating P / N electrodes, and preparing a passivation layer.

2. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: In step (1), the thickness of the GaN layer is 4-5 μm, and the thickness of the SiO2 film is 200-250 nm. ​ 3. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: In step (2), the thickness of the photoresist is 2.2-3.0 μm. ​ 4. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: forming a plurality of protrusions on the side surface of the LED chip; and forming a plurality of protrusions on the side surface of the LED chip. In step (2), the photoresist mask pattern is a conventional MESA geometric mask pattern of an LED chip.

5. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: forming a plurality of protrusions on the side surface of the LED chip; and forming a plurality of protrusions on the side surface of the LED chip. In step (2), the photoresist mask pattern is prepared by transferring the pattern on a photoetching plate onto the photoresist by an exposure machine, and then performing a developing and baking process.

6. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: In step (3), the buffer oxide etching solution is prepared by mixing 49% HF aqueous solution and 40% NH4F aqueous solution at a volume ratio of 1:20, and the etching temperature is 20-30 °C. ​ 7. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: forming a plurality of protrusions on the side surface of the LED chip; and forming a plurality of protrusions on the side surface of the LED chip. In step (3), the etching time is 90-120 s, so that the SiO2 in the area not covered by the photoresist is etched clean, and the SiO2 film under the photoresist is laterally etched by 0.5-3.0 μm.

8. The method of claim 1, wherein the LED chip side surface light extraction efficiency is improved by the steps of: forming a plurality of protrusions on the side surface of the LED chip; and forming a plurality of protrusions on the side surface of the LED chip. In step (4), the ICP dry etching is performed in a plasma gas composed of chlorine, boron trichloride and argon for 300-500 s.

9. A LED chip with high side light extraction efficiency, characterized in that, The LED chip is prepared according to the method of any one of claims 1-8.

Citation Information

Patent Citations

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    CN104538511A

  • Epitaxial structure of improving LED lateral luminous efficiency effectively

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    CN103915757A

  • Preparation method of GaN-based light-emitting diode chip

    CN106252476A