Light-emitting diode epitaxial wafer, preparation method thereof, and light-emitting diode

Abstract

The present invention discloses a light-emitting diode epitaxial wafer, a method for preparing the same, and a light-emitting diode. The light-emitting diode epitaxial wafer includes a substrate and a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate. The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer. The first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked. The second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked. The third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked. The light-emitting diode epitaxial wafer provided by the present invention can further improve the droop effect, increase the probability of radiative recombination, and achieve better photoelectric performance.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic technology, and in particular to a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode. Background Art

[0002] The internal quantum efficiency of a diode will first increase and then decrease as the injected current increases. This phenomenon is called the Efficiency Droop phenomenon. Currently, the maximum luminous efficiency of Group III nitride LEDs falls at a relatively small current density of about 2A / cm 2 -10A / cm 2 The current density is between 20A / cm2 and 20A / cm3 respectively. 2 -80A / cm 2 The internal quantum efficiency at this current density is in a declining stage. If the efficiency decline phenomenon can be slowed down or even eliminated, the LED will be able to maintain high luminous efficiency even under high current operation, which can save more costs in lighting applications. The main factors causing the droop effect include carrier overflow caused by the polarization electric field, carrier overflow caused by electron transport, efficiency drop caused by Auger recombination, and hole injection efficiency. In order to reduce the droop effect, the existing technology generally uses InGaN / GaN superlattice or quantum well structure as a stress release layer to reduce the polarization effect caused by stress, while increasing the probability of radiative recombination of electrons and holes. On the other hand, by inserting an AlGaN electron blocking layer between the quantum well and P-type GaN, the electron overflow into the P-type GaN layer is blocked for non-radiative recombination. Although the design of the stress release layer and the electron blocking layer has reduced the overflow of some carriers, there is still a lot of room for improvement in the droop effect. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a light emitting diode epitaxial wafer, which can further improve the droop effect, increase the probability of radiative recombination, and obtain better photoelectric performance.

[0004] The technical problem to be solved by the present invention is also to provide a method for preparing a light emitting diode epitaxial wafer, which has a simple process and can stably produce the light emitting diode epitaxial wafer with good performance.

[0005] In order to solve the above technical problems, the present invention provides a light-emitting diode epitaxial wafer, comprising a substrate and a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate;

[0006] The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked;

[0007] The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.5.

[0008] In one embodiment, the stacking period of the first quantum well layer and the first quantum barrier layer is 5-10;

[0009] The stacking period of the second quantum well layer and the second quantum barrier layer is 2-6;

[0010] The stacking period of the third quantum well layer and the third quantum barrier layer is 1-3.

[0011] In one embodiment, the thickness of the second quantum barrier layer is less than the thickness of the first quantum barrier layer;

[0012] The thickness of the second quantum barrier layer is smaller than the thickness of the third quantum barrier layer.

[0013] In one embodiment, the thickness of the second quantum barrier is: the thickness of the first quantum barrier layer is ≤ 0.8;

[0014] The thickness of the second quantum barrier: the thickness of the third quantum barrier layer is ≤0.8.

[0015] In one embodiment, the Si doping concentration of the second quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm 3 ;

[0016] The Si doping concentration of the third quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm3 .

[0017] In one embodiment, the Si doping concentration of the second quantum barrier layer is 1.3 to 1.5 times the Si doping concentration of the third quantum barrier layer.

[0018] The present invention also provides a method for preparing a light-emitting diode epitaxial wafer, comprising the following steps:

[0019] preparing the substrate;

[0020] Depositing a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer in sequence on the substrate;

[0021] The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked;

[0022] The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.5.

[0023] In one embodiment, depositing the active layer on the stress release layer comprises the following steps:

[0024] The temperature of the reaction chamber is controlled at 800° C.-900° C., the pressure is controlled at 100 torr-200 torr, N2 and H2 are introduced as carrier gases, and the first active layer, the second active layer and the third active layer are sequentially deposited on the stress release layer.

[0025] In one embodiment, during the deposition of the first quantum barrier layer of the first active layer, the gas introduction ratio of N2 / H2 is (3-5):1;

[0026] During the deposition of the second quantum barrier layer of the second active layer, the gas introduction ratio of N2 / H2 is (5-8):1;

[0027] During the deposition of the third quantum barrier layer of the third active layer, the gas introduction ratio of N2 / H2 is (3-5):1.

[0028] Correspondingly, the present invention further provides a light emitting diode, which includes the light emitting diode epitaxial wafer described above.

[0029] The implementation of the present invention has the following beneficial effects:

[0030] The first quantum barrier layer of the present invention is inserted into Al y Ga 1-y N layer, so the potential barrier is relatively high, so that more carriers are confined in the effective light-emitting well layer, increasing the probability of effective radiative recombination and improving the luminous efficiency. The second active layer serves as the main light-emitting layer, and the second quantum barrier is designed to be thin in order to reduce the compressive stress on the second quantum well layer, thereby reducing the QCES effect and improving the coupling between the electron and hole wave functions in the second active layer, thereby improving the luminous efficiency of the device. At the same time, the thin barrier structure can promote the injection of holes into the light-emitting well and increase the probability of carrier recombination. The first active layer and the third active layer serve as carrier confinement layers, and the thick barrier structure can improve the crystal quality and reduce non-radiative recombination caused by poor lattice quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a structural schematic diagram of the light emitting diode epitaxial wafer provided by the present invention.

[0032] Among them: substrate 1, buffer layer 2, N-type GaN layer 3, stress release layer 4, active layer 5, electron blocking layer 6, P-type GaN layer 7, first active layer 51, second active layer 52 and third active layer 53. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0034] Unless otherwise specified or incompatible herewith, the terms and phrases used herein shall have the following meanings:

[0035] In the present invention, "combinations thereof", "any combination thereof", "any combination thereof" and the like include all suitable combinations of any two or more of the listed items.

[0036] In the present invention, “preferred” is only used to describe an implementation method or embodiment with better effects, and it should be understood that it does not constitute a limitation on the scope of protection of the present invention.

[0037] In the present invention, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features.

[0038] In the present invention, when a numerical range is involved, unless otherwise specified, both endpoints of the numerical range are included.

[0039] In order to solve the above problems, the present invention provides a light emitting diode epitaxial wafer, such as Figure 1 As shown, it includes a substrate 1 and a buffer layer 2, an N-type GaN layer 3, a stress release layer 4, an active layer 5, an electron blocking layer 6, and a P-type GaN layer 7 sequentially stacked on the substrate 1;

[0040] The active layer 5 includes a first active layer 51, a second active layer 52, and a third active layer 53 sequentially stacked on the stress release layer 4, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked;

[0041] The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.5.

[0042] The first quantum barrier layer of the present invention is inserted into Al y Ga 1-y N layer, so the potential barrier is relatively high, so that more carriers are confined in the effective light-emitting well layer, increasing the probability of effective radiative recombination and improving the luminous efficiency. The second active layer serves as the main light-emitting layer, and the second quantum barrier is designed to be thin in order to reduce the compressive stress on the second quantum well layer, thereby reducing the QCES effect and improving the coupling between the electron and hole wave functions in the second active layer, thereby improving the luminous efficiency of the device. At the same time, the thin barrier structure can promote the injection of holes into the light-emitting well and increase the probability of carrier recombination. The first active layer and the third active layer serve as carrier confinement layers, and the thick barrier structure can improve the crystal quality and reduce non-radiative recombination caused by poor lattice quality.

[0043] In one embodiment, the stacking period of the first quantum well layer and the first quantum barrier layer is 5-10; the stacking period of the second quantum well layer and the second quantum barrier layer is 2-6; and the stacking period of the third quantum well layer and the third quantum barrier layer is 1-3. It should be noted that due to the special carrier transport mechanism, the light-emitting wells are mainly concentrated in the second to fifth quantum wells from the P side. Therefore, in order to ensure that all periodically stacked quantum well layers in the second active layer just become the main light-emitting well layers, the number of periods in the three-stage active layer is designed to be a structure with a decreasing number of periods, that is, the first active layer has the largest number of periods, the second active layer has a medium number of periods, and the third active layer has the smallest number of periods.

[0044] In one embodiment, the thickness of the second quantum barrier layer is less than that of the first quantum barrier layer; the thickness of the second quantum barrier layer is also less than that of the third quantum barrier layer. Preferably, the thickness of the second quantum barrier is: ≤0.8 of the thickness of the first quantum barrier layer; the thickness of the second quantum barrier is: ≤0.8 of the thickness of the third quantum barrier layer. The second active layer serves as the primary light-emitting layer, and the thin design of the second quantum barrier is intended to reduce the compressive stress on the second quantum well, thereby reducing the QCES effect and enhancing the coupling between the electron and hole wave functions in the second active layer, thereby improving the device's luminescence efficiency. Furthermore, the thin barrier structure promotes hole injection into the light-emitting well, increasing the probability of carrier recombination. The first and third active layers serve as carrier confinement layers, and the thick barrier structure improves crystal quality and reduces non-radiative recombination caused by poor lattice quality.

[0045] In one embodiment, the Si doping concentration of the second quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm 3 The Si doping concentration of the third quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm 3 Preferably, the Si doping concentration of the second quantum barrier layer is 1.3 to 1.5 times the Si doping concentration of the third quantum barrier layer.

[0046] It should be noted that the presence of Si as a donor in the quantum barriers of the GaN structure lowers the band structure of the active region due to the influence of the Fermi level, increasing the barrier height for holes and hindering hole transmission to the N side. The Si doping concentration from the second to the third quantum barrier layers decreases, which can cause the distribution of holes from the second active layer to the third active layer to decrease. This, in turn, confines more holes to the second active layer, the light-emitting layer, increasing the probability of radiative recombination and improving luminescence efficiency.

[0047] In addition to the above-mentioned active layer, other characteristics of the layered structure of the present invention are as follows:

[0048] In one embodiment, the substrate is selected from one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate.

[0049] Preferably, the substrate is a sapphire substrate. Sapphire is currently the most commonly used substrate material for GaN-based LEDs, and most GaN-based LEDs on the market use sapphire as their substrate material. The biggest advantages of sapphire substrates are mature technology, good stability, and low production costs.

[0050] In one embodiment, the buffer layer is an AlGaN buffer layer or an AlN buffer layer. Preferably, the buffer layer is an AlN buffer layer. Using an AlN buffer layer to control crystal defects can improve the quality of subsequently grown crystals and alleviate stress caused by lattice and thermal mismatch between the substrate and the epitaxial layer. In one embodiment, the buffer layer has a thickness of 10 nm to 30 nm.

[0051] In one embodiment, the thickness of the N-type GaN layer is 2 μm-3 μm, the N-type GaN layer is Si-doped, and the Si doping concentration is 1×10 19 cm -3 -1×10 20 cm -3 .

[0052] In one embodiment, the stress release layer is a periodic structure of alternately grown GaN and InGaN, and the Si doping concentration is controlled to be 1×10 15 cm -3 -1×10 17 cm -3 ; The number of cycles is 5-8;

[0053] In one embodiment, the electron blocking layer is an AlInGaN layer, and the thickness of the electron blocking layer is 10 nm-40 nm.

[0054] In one embodiment, the thickness of the P-type GaN layer is 50 nm to 80 nm; the N-type GaN layer is doped with Mg, and the doping concentration of Mg is 1×10 19 cm -3 -1×10 20 cm -3 .

[0055] Accordingly, the present invention also provides a method for preparing the above-mentioned light-emitting diode epitaxial wafer, comprising the following steps:

[0056] S1. Prepare substrate;

[0057] In one embodiment, the substrate is a sapphire substrate.

[0058] Depositing a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer in sequence on the substrate;

[0059] The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked;

[0060] The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.5.

[0061] In one embodiment, step S2 comprises the following steps:

[0062] S21, depositing the buffer layer on the front surface of the substrate:

[0063] In one embodiment, the AlN buffer layer is deposited in Applied Materials PVD with a thickness of 15 nm.

[0064] S22, depositing the N-type GaN layer on the buffer layer:

[0065] The temperature of the reaction chamber is controlled at 1000°C-1200°C, and Si source, N source and Ga source are introduced to complete the deposition.

[0066] S23, depositing the stress release layer on the N-type GaN layer:

[0067] The temperature of the reaction chamber is controlled at 800°C-900°C, and N source, Si source and Ga source are introduced to complete the deposition of the GaN layer; then N source, Si source, In source and Ga source are introduced to complete the deposition of the InGaN layer; the GaN layer and the InGaN layer are alternately grown in a superimposed manner for 5-8 cycles.

[0068] S24, depositing the active layer on the N-type GaN layer:

[0069] The temperature of the reaction chamber is controlled at 800° C.-900° C., the pressure is controlled at 100 torr-200 torr, N2 and H2 are introduced as carrier gases, and the first active layer, the second active layer and the third active layer are sequentially deposited on the stress release layer.

[0070] The deposition step of the first active layer includes: introducing N source, Si source, In source and Ga source to complete In x Ga 1-x The N layer is deposited to form the first quantum well layer; then the N source, Si source, Al source and Ga source are introduced to complete the Al y Ga 1-y The N layer and the GaN layer are deposited to form a first quantum barrier layer; the first quantum well layer and the first quantum barrier layer are grown alternately and superimposed.

[0071] The deposition step of the second active layer includes: introducing N source, Si source, In source and Ga source to complete In z Ga 1-z The N layer is deposited to form a second quantum well layer; then the N source, Si source and Ga source are introduced to complete the deposition of the GaN layer to form a second quantum barrier layer; the second quantum well layer and the second quantum barrier layer are alternately superimposed and grown.

[0072] The deposition step of the third active layer includes: introducing N source, Si source, In source and Ga source to complete In z Ga 1-z The N layer is deposited to form a third quantum well layer; then an N source, a Si source and a Ga source are introduced to complete the deposition of a GaN layer to form a third quantum barrier layer; the third quantum well layer and the third quantum barrier layer are alternately and superimposedly grown.

[0073] In one embodiment, the gas introduction ratio of N2 / H2 during the deposition of the first quantum barrier layer of the first active layer is (3-5):1; the gas introduction ratio of N2 / H2 during the deposition of the second quantum barrier layer of the second active layer is (5-8):1; and the gas introduction ratio of N2 / H2 during the deposition of the third quantum barrier layer of the third active layer is (3-5):1.

[0074] It should be noted that, due to the influence of InGaN / GaN quantum well In-rich clusters, the well-barrier interface usually produces a large number of misfit dislocations and stacking faults. In the first quantum barrier and the third quantum barrier, the H2 atmosphere with the N2 / H2 ratio under the above conditions can effectively promote the thermal desorption of In atoms at the well-barrier interface, thereby improving the crystal quality of the well-barrier interface. On the other hand, the second active layer is the main light-emitting area. Excessive H2 atoms increase the mobility of Ga atoms on the surface of the epitaxial layer. More Ga atoms fill the V-shaped pits, resulting in a smaller opening of the V-shaped pits, which hinders the ability to inject holes from the V-shaped sidewalls. When the N2 / H2 ratio is (5-8):1, the surface mobility of Ga atoms can be effectively reduced, ultimately achieving a higher hole injection efficiency.

[0075] S25, depositing the electron blocking layer on the active layer:

[0076] First, the temperature of the reaction chamber is controlled at 900°C-1000°C, and N source, Ga source, In source and Al source are introduced to complete the deposition of the AlInGaN layer.

[0077] S26, depositing the P-type GaN layer on the electron blocking layer:

[0078] In one embodiment, the growth temperature of the P-type GaN layer is 800°C-980°C, and the N source, Ga source and Mg source are introduced to complete the deposition of the P-type GaN layer, and the Mg doping concentration is 1×10 19 cm -3 -1×10 20 cm -3 .

[0079] Correspondingly, the present invention further provides a light emitting diode, which includes the light emitting diode epitaxial wafer described above.

[0080] The deposition process is accomplished using MOCVD, CVD, or PVD equipment, though the present invention does not limit the deposition method. High-purity N2 (nitrogen) and H2 (hydrogen) are used as carrier gases. High-purity NH3 (ammonia) provides the nitrogen (nitrogen) source. The aluminum source is TMAl (trimethylaluminum), the magnesium source is Cp2Mg (cyclopentadienyl magnesium), TMGa (trimethylgallium) and TEGa (triethylgallium) are used as gallium sources, respectively. TMIn (trimethylindium) is used as the indium source, and silane (SiH4) is used as the N-type dopant, without limitation to the above.

[0081] The present invention is further described below with specific examples:

[0082] Example 1

[0083] This embodiment provides a light-emitting diode epitaxial wafer, comprising a substrate and a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate;

[0084] The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked;

[0085] The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein x is 0.005, the value range of y is 0.005, and the value range of z is 0.3.

[0086] Wherein, the thickness of the second quantum barrier: the thickness of the first quantum barrier layer is 0.8;

[0087] The Si doping concentration of the second quantum barrier layer is 2×10 17 atoms / cm 3 ;

[0088] The Si doping concentration of the third quantum barrier layer is 1.3×10 17 atoms / cm 3 .

[0089] The method for preparing the light-emitting diode epitaxial wafer comprises the following steps:

[0090] S1. Prepare substrate;

[0091] S2. Depositing a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer in sequence on the substrate;

[0092] The step S2 comprises the following steps:

[0093] S21 . Depositing the buffer layer on the front side of the substrate: depositing an AlN buffer layer with a thickness of 15 nm in an Applied Materials PVD process.

[0094] S22, depositing the N-type GaN layer on the buffer layer:

[0095] The temperature of the reaction chamber was controlled at 1100° C., and Si source, N source, and Ga source were introduced to complete the deposition.

[0096] S23, depositing the stress release layer on the N-type GaN layer:

[0097] The temperature of the reaction chamber was controlled at 850°C, and N source, Si source and Ga source were introduced to complete the deposition of the GaN layer; then N source, Si source, In source and Ga source were introduced to complete the deposition of the InGaN layer; the GaN layer and the InGaN layer were alternately grown in a superimposed manner for 6 cycles.

[0098] S24, depositing the active layer on the N-type GaN layer:

[0099] The temperature of the reaction chamber is controlled at 850° C., the pressure is controlled at 150 torr, N 2 and H 2 are introduced as carrier gases, and the first active layer, the second active layer and the third active layer are sequentially deposited on the stress release layer.

[0100] The deposition step of the first active layer includes: introducing N source, Si source, In source and Ga source to complete In x Ga 1-x The N layer is deposited to form the first quantum well layer; then the N source, Si source, Al source and Ga source are introduced to complete the Al y Ga 1-y The N layer and the GaN layer are deposited to form a first quantum barrier layer; the first quantum well layer and the first quantum barrier layer are alternately superimposed for 8 cycles.

[0101] The deposition step of the second active layer includes: introducing N source, Si source, In source and Ga source to complete In z Ga 1-z The N layer is deposited to form a second quantum well layer; then the N source, Si source and Ga source are introduced to complete the deposition of the GaN layer to form a second quantum barrier layer; the second quantum well layer and the second quantum barrier layer are alternately superimposed for 4 cycles.

[0102] The deposition step of the third active layer includes: introducing N source, Si source, In source and Ga source to complete In z Ga 1-z The N layer is deposited to form a third quantum well layer; then an N source, a Si source and a Ga source are introduced to complete the deposition of a GaN layer to form a third quantum barrier layer; the third quantum well layer and the third quantum barrier layer are alternately superimposed for 2 cycles.

[0103] Among them, the gas introduction ratio of N2 / H2 during the deposition of the first quantum barrier layer is 3:1; the gas introduction ratio of N2 / H2 during the deposition of the second quantum barrier layer is 6:1; and the gas introduction ratio of N2 / H2 during the deposition of the third quantum barrier layer is 3:1.

[0104] S25, depositing the electron blocking layer on the active layer:

[0105] First, the temperature of the reaction chamber is controlled at 950° C., and N source, Ga source, In source and Al source are introduced to complete the deposition of the AlInGaN layer.

[0106] S26, depositing the P-type GaN layer on the electron blocking layer:

[0107] In one embodiment, the growth temperature of the P-type GaN layer is 900°C, and the N source, Ga source and Mg source are introduced to complete the deposition of the P-type GaN layer, and the Mg doping concentration is 5×10 19 cm -3 .

[0108] Example 2

[0109] This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that the Si doping concentration of the second quantum barrier layer is 4×10 17 atoms / cm 3 The Si doping concentration of the third quantum barrier layer is 2.7×10 17 atoms / cm 3 The rest is as in Example 1.

[0110] Example 3

[0111] This embodiment provides a light-emitting diode epitaxial wafer. This embodiment differs from Embodiment 1 in that during the deposition of the first quantum barrier layer, the N2 / H2 gas ratio is 4:1; during the deposition of the second quantum barrier layer, the N2 / H2 gas ratio is 7:1; and during the deposition of the third quantum barrier layer, the N2 / H2 gas ratio is 4:1. The remainder of the process is the same as in Embodiment 1.

[0112] Example 4

[0113] This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that: the Si doping concentration of the second quantum barrier layer is 4×10 17 atoms / cm 3 The Si doping concentration of the third quantum barrier layer is 2.7×10 17 atoms / cm 3 During the deposition of the first quantum barrier layer, the N2 / H2 gas introduction ratio was 4:1; during the deposition of the second quantum barrier layer, the N2 / H2 gas introduction ratio was 7:1; and during the deposition of the third quantum barrier layer, the N2 / H2 gas introduction ratio was 4:1. The remainder is as in Example 1.

[0114] Example 5

[0115] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that the thickness of the second quantum barrier is 0.9 of the thickness of the first quantum barrier layer. All other aspects are the same as Example 1.

[0116] Example 6

[0117] This comparative example provides a light-emitting diode epitaxial wafer. This comparative example differs from Example 1 in that the N2 / H2 gas ratio during the deposition of the first quantum barrier layer is 2:1; the N2 / H2 gas ratio during the deposition of the second quantum barrier layer is 9:1; and the N2 / H2 gas ratio during the deposition of the third quantum barrier layer is 2:1. All other conditions are the same as in Example 1.

[0118] Comparative Example 1

[0119] This comparative example provides a light emitting diode epitaxial wafer, which is different from Example 1 in that: the first quantum barrier layer does not have Al y Ga 1-y The N layer is only a GaN layer. The rest is the same as in Example 1.

[0120] Comparative Example 2

[0121] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that the active layer comprises InGaN layers and GaN layers grown in alternating cycles.

[0122] The light-emitting diode epitaxial wafers prepared in Examples 1 to 6 and Comparative Examples 1 to 2 were used to make chips for performance testing. The testing method was to use the same chip process conditions to prepare the above-mentioned light-emitting diode epitaxial wafers into chips, conduct the test, and then calculate the PO improvement and EQE improvement based on the comparative example. The specific test results are shown in Table 1.

[0123] Table 1 shows the performance test results of the light emitting diode epitaxial wafers obtained in Examples 1 to 6 and Comparative Example 1.

[0124]

[0125] From the above results, it can be seen that the first quantum barrier layer of the present invention is inserted into Al y Ga 1-yN layer, so the potential barrier is relatively high, so that more carriers are confined in the effective light-emitting well layer, increasing the probability of effective radiative recombination and improving the luminous efficiency. The second active layer serves as the main light-emitting layer, and the second quantum barrier is designed to be thin in order to reduce the compressive stress on the second quantum well layer, thereby reducing the QCES effect and improving the coupling between the electron and hole wave functions in the second active layer, thereby improving the luminous efficiency of the device. At the same time, the thin barrier structure can promote the injection of holes into the light-emitting well and increase the probability of carrier recombination. The first active layer and the third active layer serve as carrier confinement layers, and the thick barrier structure can improve the crystal quality and reduce non-radiative recombination caused by poor lattice quality.

[0126] The above is a preferred embodiment of the invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A light-emitting diode epitaxial wafer, characterized in that: It includes a substrate and a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer stacked on the substrate in sequence; The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked; The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.5; The thickness of the second quantum barrier layer is less than the thickness of the first quantum barrier layer; The thickness of the second quantum barrier layer is smaller than the thickness of the third quantum barrier layer.

2. The light emitting diode epitaxial wafer according to claim 1, wherein: The stacking period of the first quantum well layer and the first quantum barrier layer is 5-10; The stacking period of the second quantum well layer and the second quantum barrier layer is 2-6; The stacking period of the third quantum well layer and the third quantum barrier layer is 1-3.

3. The light emitting diode epitaxial wafer according to claim 1, wherein: The thickness of the second quantum barrier: the thickness of the first quantum barrier layer is ≤0.8; The thickness of the second quantum barrier: the thickness of the third quantum barrier layer is ≤0.

8.

4. The light emitting diode epitaxial wafer according to claim 1, wherein: The Si doping concentration of the second quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm 3 ; The Si doping concentration of the third quantum barrier layer is 1×10 17 atoms / cm 3 -1×10 18 atoms / cm 3 .

5. The light emitting diode epitaxial wafer according to claim 4, wherein: The Si doping concentration of the second quantum barrier layer is 1.3 to 1.5 times the Si doping concentration of the third quantum barrier layer.

6. A method for preparing a light emitting diode epitaxial wafer according to any one of claims 1 to 5, characterized in that: The following steps are involved: preparing the substrate; Depositing a buffer layer, an N-type GaN layer, a stress release layer, an active layer, an electron blocking layer, and a P-type GaN layer in sequence on the substrate; The active layer includes a first active layer, a second active layer, and a third active layer sequentially stacked on the stress release layer, wherein the first active layer includes a first quantum well layer and a first quantum barrier layer that are periodically stacked, the second active layer includes a second quantum well layer and a second quantum barrier layer that are periodically stacked, and the third active layer includes a third quantum well layer and a third quantum barrier layer that are periodically stacked; The first quantum well layer is In x Ga 1-x N layer, the first quantum barrier layer comprises Al y Ga 1-y N layer and GaN layer, the second quantum well layer and the third quantum well layer are both In z Ga 1-z N layer, the second quantum barrier layer and the third quantum barrier layer are both GaN layers, wherein the value range of x is 0.01-0.1, the value range of y is 0.001-0.01, and the value range of z is 0.1-0.

5.

7. The method for preparing a light emitting diode epitaxial wafer according to claim 6, wherein: Depositing the active layer on the stress release layer comprises the following steps: The temperature of the reaction chamber is controlled at 800° C.-900° C., the pressure is controlled at 100 torr-200 torr, N2 and H2 are introduced as carrier gases, and the first active layer, the second active layer and the third active layer are sequentially deposited on the stress release layer.

8. The method for preparing a light emitting diode epitaxial wafer according to claim 6, wherein: During the deposition of the first quantum barrier layer of the first active layer, the gas introduction ratio of N2 / H2 is (3-5):1; During the deposition of the second quantum barrier layer of the second active layer, the gas introduction ratio of N2 / H2 is (5-8):1; During the deposition of the third quantum barrier layer of the third active layer, the gas introduction ratio of N2 / H2 is (3-5):

1.

9. A light emitting diode, characterized in that: The light emitting diode comprises the light emitting diode epitaxial wafer according to any one of claims 1 to 5.

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