PCB board card, connector, pin definition method, system, device and medium

Abstract

This application discloses a PCB board, connector, pin definition method, system, device, and medium, relating to the field of board optimization design. The PCB board includes N signal vias corresponding to signal pins on the connector and M first GND vias corresponding to GND pins on the connector. The signal vias are designed to be centrally symmetrical, with a length along a first axis of symmetry greater than its length along a second axis of symmetry. That is, the signal vias have a larger length along the first axis of symmetry. When fanning out the signal vias on the PCB board, routing is easier compared to using circular holes of the same area.

Description

Technical Field

[0001] This application relates to the field of board optimization design, and in particular to a PCB board, connector, pin definition method, system, device and medium. Background Technology

[0002] In Incloud server design, especially in PCIe 5.0 high-speed signal interconnect topologies, the increasing signal speed necessitates new connector specifications to meet transmission rate requirements. This necessitates reliable, standardized interconnect solutions to achieve the required speed and design flexibility, while also satisfying innovative needs. Therefore, providing a simple and easy-to-route PCB board for use with connectors is a pressing technical challenge in this field. Summary of the Invention

[0003] The purpose of this application is to provide a PCB board, connector, pin definition method, system, device and medium, wherein the signal via has a large length along the first axis of symmetry, and when the signal via is fanned out on the PCB board, the wiring is easier compared with a circular hole of the same area.

[0004] To address the aforementioned technical problems, this application provides a PCB board for use in connectors, comprising:

[0005] N signal vias corresponding to the signal pins on the connector and M first GND vias corresponding to the GND pins on the connector, where N and M are positive integers;

[0006] The pattern obtained by the signal via along any radial section is a centrally symmetric pattern, and the length along the first axis of symmetry is greater than the length along the second axis of symmetry. The first axis of symmetry is perpendicular to the second axis of symmetry.

[0007] Preferably, the M signal vias are divided into N / 2 signal via groups, and each signal via group includes two adjacent signal vias, with a first GND via provided between each pair of adjacent signal via groups;

[0008] In the signal via group, the two pins corresponding to the two signal vias are used to transmit the first signal and the second signal corresponding to the differential signal, respectively.

[0009] Preferably, in the signal via group, the first axis of symmetry of the first signal via is parallel to the first axis of symmetry of the second signal via, the second axis of symmetry of the first signal via coincides with the second axis of symmetry of the second signal via, and a preset distance is provided between the first signal via and the second signal via.

[0010] Preferably, the PCB board is rectangular, and the first axis of symmetry is parallel to the first edge of the PCB board, the second axis of symmetry is parallel to the second edge of the PCB board, and the first edge and the second edge are adjacent to each other.

[0011] Preferably, the shape of the first GND through hole along any radial cross section is centrally symmetrical, and the width along the second axis of symmetry is greater than the width along the first axis of symmetry.

[0012] Preferably, the shape of the first GND through hole along any radial cross section is elliptical.

[0013] Preferably, it further includes Z second GND vias, and the first GND via or the second GND via is provided around any of the signal via groups.

[0014] Preferably, the signal via is elliptical in shape when the cross-section is along any radial direction.

[0015] To address the aforementioned technical problems, this application also provides a connector, including the PCB board as described above, wherein the pins fanned out from the signal vias on the PCB board are the signal pins of the connector, and the pins fanned out from the first GND via on the PCB board are the GND pins of the connector.

[0016] To address the aforementioned technical problems, this application also provides a pin definition method applied to the aforementioned connector, wherein the pins of the connector are connected to the pins of a transmission chip, the method comprising:

[0017] When the transmission chip is connected to the connector, the pin order of the transmission chip is obtained;

[0018] The signal vias and the first GND via in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin of the transmission chip in a one-to-one correspondence.

[0019] Preferably, obtaining the pin order of the transmission chip includes:

[0020] Obtain the identifier of the transmission chip, wherein the identifier includes at least the chip model;

[0021] The pin order of the transmission chip is determined based on the identifier.

[0022] Preferably, it further includes:

[0023] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0024] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip.

[0025] To address the aforementioned technical problems, this application also provides a pin definition system applied to the aforementioned connector, wherein the pins of the connector are connected to the pins of a transmission chip, and the system includes:

[0026] The acquisition unit is used to acquire the pin order of the transmission chip when the transmission chip is connected to the connector;

[0027] The pin definition unit is used to predefine the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

[0028] Preferably, the acquisition unit includes:

[0029] The acquisition unit is used to acquire the identifier of the transmission chip, wherein the identifier includes at least the chip model.

[0030] A pin order determination unit is used to determine the pin order of the transmission chip based on the identifier.

[0031] Preferably, it further includes:

[0032] The judgment unit is used to determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector.

[0033] An execution unit is configured to, when the pin order of the transmission chip currently connected to the connector is different from the pin order of the transmission chip previously connected to the connector, obtain the pin order of the transmission chip currently connected to the connector, and proceed to the step of predefining the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip.

[0034] To address the aforementioned technical problems, this application also provides a pin definition device, comprising:

[0035] Memory, used to store computer programs;

[0036] A processor, when storing a computer program, implements the steps of the pin definition method as described above:

[0037] When the transmission chip is connected to the connector, the pin order of the transmission chip is obtained;

[0038] The signal vias and the first GND via in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin of the transmission chip in a one-to-one correspondence.

[0039] Preferably, obtaining the pin order of the transmission chip includes:

[0040] Obtain the identifier of the transmission chip, wherein the identifier includes at least the chip model;

[0041] The pin order of the transmission chip is determined based on the identifier.

[0042] Preferably, it further includes:

[0043] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0044] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip.

[0045] To address the aforementioned technical problems, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the pin definition method described above:

[0046] When the transmission chip is connected to the connector, the pin order of the transmission chip is obtained;

[0047] The signal vias and the first GND via in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin of the transmission chip in a one-to-one correspondence.

[0048] Preferably, obtaining the pin order of the transmission chip includes:

[0049] Obtain the identifier of the transmission chip, wherein the identifier includes at least the chip model;

[0050] The pin order of the transmission chip is determined based on the identifier.

[0051] Preferably, it further includes:

[0052] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0053] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip.

[0054] This application provides a PCB board, relating to the field of optimized board design. The PCB board includes N signal vias corresponding to signal pins on the connector and M first GND vias corresponding to GND pins on the connector. The signal vias are shaped to be centrally symmetrical, with a length along a first axis of symmetry greater than its length along a second axis of symmetry. That is, the signal vias have a larger length along the first axis of symmetry. When fanning out the signal vias on the PCB board, routing is easier compared to using circular holes of the same area.

[0055] This application also provides a connector, pin definition method, system, device, and medium that have the same beneficial effects as the PCB board described above. Attached Figure Description

[0056] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 This application provides a structural block diagram of a PCB board.

[0058] Figure 2 A schematic diagram of the fan-out structure of the TX pin in another PCB board provided in this application;

[0059] Figure 3 This application provides a schematic diagram of the fan-out of the RX pin in a PCB board.

[0060] Figure 4 A flowchart illustrating a pin definition method provided in this application;

[0061] Figure 5 A specific example schematic diagram of a pin provided in this application;

[0062] Figure 6 A structural block diagram of a pin definition system provided in this application;

[0063] Figure 7 A structural block diagram of a pin definition device provided in this application;

[0064] Figure 8A structural block diagram of a computer-readable storage medium provided in this application. Detailed Implementation

[0065] The core of this application is to provide a PCB board, connector, pin definition method, system, device and medium, wherein the signal via has a large length along the first axis of symmetry. When the signal via is fanned out on the PCB board, the wiring is easier compared with a circular hole of the same area.

[0066] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0067] Please refer to Figure 1 , Figure 1 This application provides a structural block diagram of a PCB board, which is used in connectors and includes:

[0068] N signal vias 11 corresponding to the signal pins on the connector and M first GND vias 12 corresponding to the GND pins on the connector, where N and M are positive integers;

[0069] The pattern obtained by the signal via 11 along any radial section is a centrally symmetric pattern, and the length along the first axis of symmetry is greater than the length along the second axis of symmetry. The first axis of symmetry is perpendicular to the second axis of symmetry.

[0070] Specifically, in the prior art, when drilling holes on PCB boards, circular through holes are usually used. The length of a circular through hole in a certain axis is relatively small, making it difficult to implement wiring. However, if the length is increased by increasing the diameter of the circular through hole, the area of ​​the PCB board will be too large.

[0071] Therefore, in this application, when setting the signal vias 11 on the PCB board, they are designed such that their length along the first direction is greater than their length along the second direction, where the first direction is the extension direction of the first axis of symmetry and the second direction is the extension direction of the second axis of symmetry. Furthermore, to make the via arrangement on the PCB board more regular, the shapes obtained by the radial cross-section of the vias in this application are all set as centrally symmetrical figures.

[0072] The shapes that satisfy central symmetry and whose length along the first axis of symmetry is greater than the length along the second axis of symmetry (the first axis of symmetry is perpendicular to the second axis of symmetry) are all within the scope of protection of this application, such as rectangles or ellipses, etc., depending on the actual situation, and are not limited here.

[0073] As a preferred embodiment, the signal via 11 is elliptical in shape along any radial cross section.

[0074] Using through holes with an elliptical cross-section allows for smaller connector sizes, thereby increasing market competitiveness.

[0075] In a preferred embodiment, the M signal vias 11 are divided into N / 2 signal via groups, and each signal via group includes two adjacent signal vias 11, with a first GND via 12 provided between each two adjacent signal via groups.

[0076] In the signal via group, the two pins corresponding to the two signal vias 11 are used to transmit the first signal and the second signal corresponding to the differential signal, respectively.

[0077] Furthermore, in one specific embodiment, when the connector pins are used to transmit differential signals, the PCB board in this application designs the signal vias 11 by setting every two adjacent signal vias 11 as a signal via group. These two signal via groups and their corresponding pins are used to transmit the first and second signals in the differential signal, respectively, so that the difference between the first and second signals can be processed subsequently to obtain the differential signal. In addition, the two signal vias 11 used to transmit the first and second signals in this application are adjacent in position, which can avoid interference from other signals to this differential signal. Furthermore, the wiring is also neater and simpler.

[0078] Furthermore, in this application, the first GND via 12 can isolate signals between each pair of adjacent signal via groups, thereby preventing signal interference between adjacent signal via groups. For details, please refer to... Figure 1 .

[0079] In a preferred embodiment, the first axis of symmetry of the first signal through hole 11 in the signal through hole group is parallel to the first axis of symmetry of the second signal through hole 11, the second axis of symmetry of the first signal through hole 11 coincides with the second axis of symmetry of the second signal through hole 11, and a preset distance is provided between the first signal through hole 11 and the second signal through hole 11.

[0080] Furthermore, in order to make the arrangement of the various through holes on the PCB board more orderly, in this application, when designing the positions of the first signal through hole 11 and the second signal through hole 11, the first axis of symmetry of the two signal through holes 11 is set to be parallel, and a preset distance is provided between the first signal through hole 11 and the second signal through hole 11. In addition, the second axis of symmetry of the two signal through holes 11 coincides, that is, the two signal through holes 11 are arranged along the second axis of symmetry.

[0081] For details, please refer to Figure 1 , Figure 1 The two horizontal ellipses are two signal vias 11, and the vertical ellipse is the first GND via 12. The axis of symmetry of the horizontal ellipse along the horizontal direction is the first axis of symmetry, and the axis of symmetry of the horizontal ellipse along the vertical direction is the second axis of symmetry.

[0082] In a preferred embodiment, the PCB board is rectangular, with a first axis of symmetry parallel to the first edge of the PCB board, a second axis of symmetry parallel to the second edge of the PCB board, and the first edge and the second edge being adjacent to each other.

[0083] Furthermore, when the PCB board is rectangular, in order to make the arrangement of each through hole on the PCB board more neat, in this application, the first axis of symmetry of each through hole is set to be parallel to the first edge of the PCB board (that is, one side of the rectangle), and the second pair of through holes is set to be parallel to the second edge of the PCB board (that is, the other side of the rectangle, and adjacent to the edge corresponding to the first edge), so that each through hole is neatly arranged on the PCB board.

[0084] In a preferred embodiment, the shape of the first GND through hole 12 along any radial cross section is centrally symmetrical and the width along the second axis of symmetry is greater than the width along the first axis of symmetry.

[0085] Furthermore, in one specific embodiment, the shape of the first GND via 12 along the radial section is also defined as centrally symmetrical, and the width along the second axis of symmetry is greater than the width along the first axis of symmetry. In one specific embodiment, the first GND via 12 may have the same shape as the signal via 11 along any radial section.

[0086] In a preferred embodiment, the first GND through hole 12 is elliptical in shape along any radial cross section.

[0087] For details, please refer to Figure 1 It can be, but is not limited to, an ellipse. In this case, the longitudinal length of the ellipse is greater than the transverse length. When it is placed between two signal vias 11 used to transmit differential signals, it can better isolate the two adjacent signal via groups and thus prevent signal interference between the two adjacent signal via groups.

[0088] Please refer to Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the fan-out structure of the TX pin in another PCB board provided in this application. Figure 3 This is a schematic diagram of the RX pin fan-out in a PCB board provided in this application. Figure 2 The upper and middle half of the circuit fans out the TX pin, while the lower half, where no circuit is connected, is the RX pin. Figure 3 The upper half without a trace is the TX pin, and the lower half with a trace fanning out is the RX pin. The circular holes above and below the signal holes are the second GND via 13.

[0089] As a preferred embodiment, it also includes Z second GND vias 13, with a first GND via 12 or a second GND via 13 provided around any signal via group.

[0090] This second GND via 13 is a GND via that is usually required in PCB design to isolate via crosstalk between different differential signals.

[0091] To address the aforementioned technical problems, this application also provides a connector, including the PCB board as described above. The pins fanned out from the signal via 11 on the PCB board are the signal pins of the connector, and the pins fanned out from the first GND via 12 on the PCB board are the GND pins of the connector. For a description of the connector, please refer to the above embodiments; further details are omitted here.

[0092] To address the aforementioned technical problems, this application also provides a pin definition method, please refer to... Figure 4 , Figure 4 A flowchart illustrating a pin definition method provided in this application is shown. This method is applied to the aforementioned connector, where the connector pins are connected to the pins of a transmission chip. The method includes:

[0093] S41: Obtain the pin sequence of the transmission chip when it is connected to the connector;

[0094] S42: Predefine the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

[0095] Considering that some connector manufacturers (such as CDFP connectors) do not recommend pin customization, and if there is no unified standard for CDFP pins on each PCB, when connecting CDFPs on two PCBs with cables, custom cables need to be made each time, which is time-consuming, laborious, and increases costs; and it is not conducive to reusing previous PCBs in other projects later.

[0096] Therefore, in this application, when a transmission chip and a connector are connected, the pin order of the transmission chip is obtained so that the signal via 11 and the first GND via 12 in the PCB board can be predefined according to the pin order of the transmission chip. Thus, when the connector and the transmission chip are connected, their pins can be connected one by one, so that there is no need to customize the cable for connection and reduce costs.

[0097] Normally, when the pins of a transmission chip are arranged in a sequentially increasing or decreasing order, the method described in this application allows the pin order of each signal via 11 of the connector to also be arranged in a sequentially increasing or decreasing order. This ensures that the pin fan-out order corresponds to that of the transmission chip. (See reference...) Figure 5 , Figure 5 This is a schematic diagram illustrating a specific pin configuration provided in this application. Customizing the pins enables standard fan-out on the PCB, which improves the quality of PCIe signals, unifies fan-out standards, broadens the application of reference fan-out, increases its reference value, and simplifies PCB design, reducing its complexity.

[0098] Furthermore, by customizing the pins, the routing during pin fan-out becomes more regular and orderly, thus requiring less PCB trace area. For example, when using the existing circular hole method for fan-out of CDFP connectors, four PCB signal layers are needed. However, using the elliptical pin distribution in this application, which allows for sequential fan-out, only two signal layers are required to fan out all TX and RX signals. Figure 2 and Figure 3 As shown, the elliptical pin distribution in this application can reduce the number of signal layers, thereby reducing the number of PCB layers, reducing costs, and increasing product market competitiveness.

[0099] As a preferred embodiment, obtaining the pin order of the transmission chip includes:

[0100] Obtain the identifier of the transmission chip, which must include at least the chip model.

[0101] The pin order of the transmission chip is determined by the identifier.

[0102] This embodiment aims to provide a specific implementation method for obtaining the pin order of a transmission chip. Specifically, it can be, but is not limited to, identifying the type of transmission chip by its identifier, thereby determining the pin order of the transmission chip.

[0103] The identifier for the transmission chip is a unique identifier corresponding to the transmission chip. The unique identifier only needs to correspond one-to-one with the transmission chip. For example, the identifier can be the chip model or other identifiers that can represent the transmission chip.

[0104] As a preferred embodiment, it also includes:

[0105] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0106] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip.

[0107] Furthermore, when the transmission chip is reconnected to the connector, if this connector is not the first time the transmission chip has been connected, it is determined whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector. If they are the same, it means that the transmission chips connected in the two consecutive connections are of the same type. In this case, the previously predefined pin order can be used to complete the docking with the currently connected transmission chip. Otherwise, it is necessary to obtain the pin order of the transmission chip currently connected to the connector again, and predefine the signal via 11 and the first GND via 12 according to the obtained pin order of the transmission chip currently connected to the connector.

[0108] One way to determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector is as follows: obtain the chip model of the transmission chip currently connected to the connector, and determine whether it is the same as the chip model of the transmission chip previously connected. If they are the same, then determine that the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector; otherwise, determine that the pin order is different.

[0109] The predefined pin configuration in this application allows the connector to be adapted to different transmission chips.

[0110] To address the aforementioned technical problems, this application also provides a pin definition system, please refer to... Figure 6 , Figure 6 This application provides a structural block diagram of a pin definition system, which is applied to the aforementioned connector. The connector pins are connected to the pins of a transmission chip. The system includes:

[0111] The acquisition unit 61 is used to acquire the pin order of the transmission chip when the transmission chip is connected to the connector;

[0112] The pin definition unit 62 is used to predefine the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

[0113] In a preferred embodiment, the acquisition unit includes:

[0114] This indicates an acquisition unit used to acquire the identifier of the transmission chip, which includes at least the chip model.

[0115] The pin order determination unit is used to determine the pin order of the transmission chip based on the identifier.

[0116] As a preferred embodiment, it also includes:

[0117] The judgment unit is used to determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector.

[0118] The execution unit is configured to, when the pin order of the transmission chip currently connected to the connector differs from the pin order of the transmission chip previously connected to the connector, obtain the pin order of the transmission chip currently connected to the connector, and proceed to the step of predefining the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip. For a description of the pin definition system, please refer to the above embodiment; this application will not repeat it here.

[0119] To address the aforementioned technical problems, this application also provides a pin definition device, please refer to... Figure 7 , Figure 7 A structural block diagram of a pin definition device provided in this application, the device comprising:

[0120] Memory 71 is used to store computer programs;

[0121] Processor 72 is configured to implement the pin definition method described above when storing a computer program:

[0122] When the transmission chip is connected to the connector, obtain the pin order of the transmission chip;

[0123] The signal via 11 and the first GND via 12 in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

[0124] As a preferred embodiment, obtaining the pin order of the transmission chip includes:

[0125] Obtain the identifier of the transmission chip, which must include at least the chip model.

[0126] The pin order of the transmission chip is determined by the identifier.

[0127] As a preferred embodiment, it also includes:

[0128] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0129] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip. For a description of the pin definition device, please refer to the above embodiment; it will not be repeated here.

[0130] To address the aforementioned technical problems, this application also provides a computer-readable storage medium, please refer to... Figure 8 , Figure 8 This application provides a structural block diagram of a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of the pin definition method described above.

[0131] When the transmission chip is connected to the connector, obtain the pin order of the transmission chip;

[0132] The signal via 11 and the first GND via 12 in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

[0133] As a preferred embodiment, obtaining the pin order of the transmission chip includes:

[0134] Obtain the identifier of the transmission chip, which must include at least the chip model.

[0135] The pin order of the transmission chip is determined by the identifier.

[0136] As a preferred embodiment, it also includes:

[0137] Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector;

[0138] If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal via 11 and the first GND via 12 in the PCB board according to the pin order of the transmission chip.

[0139] For a description of the computer-readable storage medium, please refer to the above embodiments; this application will not repeat it here.

[0140] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0141] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A PCB board, characterized in that, Applications in connectors, including: N signal vias corresponding to the signal pins on the connector and M first GND vias corresponding to the GND pins on the connector, where N and M are positive integers; The pattern obtained by the signal via along any radial section is a centrally symmetric pattern, and the length along the first axis of symmetry is greater than the length along the second axis of symmetry. The first axis of symmetry is perpendicular to the second axis of symmetry. The M signal vias are divided into N / 2 signal via groups, and each signal via group includes two adjacent signal vias, with a first GND via between each pair of adjacent signal via groups; In the signal via group, the two pins corresponding to the two signal vias are used to transmit the first signal and the second signal corresponding to the differential signal, respectively.

2. The PCB board as described in claim 1, characterized in that, In the signal via group, the first axis of symmetry of the first signal via is parallel to the first axis of symmetry of the second signal via, the second axis of symmetry of the first signal via coincides with the second axis of symmetry of the second signal via, and a preset distance is provided between the first signal via and the second signal via.

3. The PCB board as described in claim 1, characterized in that, The PCB board is rectangular, and the first axis of symmetry is parallel to the first edge of the PCB board, the second axis of symmetry is parallel to the second edge of the PCB board, and the first edge and the second edge are adjacent to each other.

4. The PCB board as described in claim 2, characterized in that, The shape of the first GND through hole along any radial cross section is centrally symmetrical, and the width along the second axis of symmetry is greater than the width along the first axis of symmetry.

5. The PCB board as described in claim 4, characterized in that, The first GND through hole has an elliptical shape when its cross-section is arranged along any radial direction.

6. The PCB board as described in claim 2, characterized in that, It also includes Z second GND vias, and the first GND via or the second GND via is provided around any of the signal via groups.

7. The PCB board as described in any one of claims 1-6, characterized in that, The signal via has an elliptical shape when crossed along any radial section.

8. A connector, characterized in that, The PCB board as described in any one of claims 1-7 is provided, wherein the pins after the signal vias on the PCB board are the signal pins of the connector, and the pins after the first GND via on the PCB board are the GND pins of the connector.

9. A pin definition method, characterized in that, Applied to the connector of claim 8, wherein the pins of the connector are connected to the pins of a transmission chip, the method includes: When the transmission chip is connected to the connector, the pin order of the transmission chip is obtained; The signal vias and the first GND via in the PCB board are predefined according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin of the transmission chip in a one-to-one correspondence.

10. The pin definition method as described in claim 9, characterized in that, Obtaining the pin order of the transmission chip includes: Obtain the identifier of the transmission chip, wherein the identifier includes at least the chip model; The pin order of the transmission chip is determined based on the identifier.

11. The pin definition method as described in claim 9, characterized in that, Also includes: Determine whether the pin order of the transmission chip currently connected to the connector is the same as the pin order of the transmission chip previously connected to the connector; If they are different, the pin order of the transmission chip currently connected to the connector is obtained, and the process proceeds to the step of predefining the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip.

12. A pin definition system, characterized in that, Applied to the connector of claim 8, wherein the pins of the connector are connected to the pins of a transmission chip, the system comprises: The acquisition unit is used to acquire the pin order of the transmission chip when the transmission chip is connected to the connector; The pin definition unit is used to predefine the signal vias and the first GND via in the PCB board according to the pin order of the transmission chip, so that each pin of the connector is connected to each pin in the transmission chip in a one-to-one correspondence.

13. A pin definition device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the pin definition method as described in any one of claims 9-11 while storing a computer program.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the pin definition method as described in any one of claims 9-11.

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