Wafer Test Classification Method, Device, and Computer-Readable Storage Medium
Through the integrated wafer test classification method of online and offline, the complexity and misjudgment of test entries in high-performance processor wafer tests are solved, and fast and flexible classification and resource utilization are achieved, reducing production costs and time waste.
Patent Information
- Application Number
- CN202211652369.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-21
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2042-12-21
AI Technical Summary
During the wafer testing process of high-performance processors in the prior art, there are many and complex test entries, which leads to insufficient unreasonable testing conditions, prone to misjudgment, affecting yield and production costs, and the test program upgrade cycle is long, has poor flexibility, and cannot quickly adapt to the differentiated requirements of market demand.
The initial classification of online tests is adopted and flexible processing of offline test results. Each test entry of each chip in the wafer is classified to form the initial classification result, and the final classification is performed according to the trigger file after mass production. The offline classification priority configuration table is used to determine the final classification result to avoid misjudgment of the test.
It realizes the rational classification of wafer test results, reduces the test program upgrade cycle and cost, improves yield, and can flexibly configure chip usage according to different market specifications to maximize the utilization of chip resources.
Smart Images

Figure CN115938450B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and particularly to a wafer test classification method, device, and computer-readable storage medium. Background Art
[0002] High-performance processors are one of the manifestations of high technical requirements in today's chip industry, characterized by powerful product performance, advanced chip manufacturing processes, high design and manufacturing costs, etc. High-performance processors are widely used in fields such as supercomputers, servers, and terminal personal computers. In the production of high-performance processors, diverse product specifications need to be formulated according to different market demands, and there are also differences in the specification configurations, performance requirements, and application conditions of high-performance processors among different product specifications.
[0003] Before the chips of high-performance processors are put into package production, it is necessary to determine the specification configurations that the chips can meet and complete the corresponding classification based on the results of wafer sort. The result of this classification will be used as the basis for deciding which product specifications the chips can be used for production feeding. When the classification result of the chips is determined, the production and usage scope of the chips is correspondingly clarified. Once the chips are put into production in a certain clear package form and specification, the subsequent adjustment space is extremely limited, and if the product cannot meet the specification requirements, it can only be scrapped. Therefore, on the premise of taking into account production costs, it is necessary to quickly and effectively achieve an accurate match between the configuration requirements of different product specifications and production demands, and complete the rapid and accurate classification of the chips. This is the main basis for subsequent chip packaging, testing, and specification finalization. The classification result of the chips after wafer sort will directly affect the costs of subsequent production links such as packaging and testing and the degree of meeting market specifications.
[0004] At the same time, due to the high manufacturing cost of high-performance processors, they are very sensitive to the yield of chips during the test and screening process. Especially in wafer sort, the test result of each test item will directly determine whether the chip can be judged as a defective chip and scrapped. Therefore, various factors such as whether the test conditions of each test item are reasonable, whether the test vectors are accurate, and whether they can cover the fluctuations of the product manufacturing process corners will all affect the rationality and yield of product testing. In the testing of high-performance processors, the number of test items is numerous and the test requirements are very complex. Therefore, in product production testing, there may often be a situation where during the adjustment and optimization cycle of product test conditions, chips are misjudged due to insufficient rationality of test items, resulting in unnecessary yield losses and waste of production costs. Summary of the Invention
[0005] The wafer test classification method, device, and computer-readable storage medium provided by the present invention can achieve reasonable classification according to the wafer test results and avoid test misjudgments at the same time.
[0006] In a first aspect, the present invention provides a wafer test classification method, the method comprising:
[0007] Performing wafer tests on each test item of each chip in the wafer, and determining an initial classification result for each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file;
[0008] Parsing and sorting out the wafer test result record file to obtain the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip;
[0009] After receiving a trigger file sent after all related mass production processes of the wafer batch are completed, according to the marking information of the chip in the trigger file, obtaining the wafer test results of each test item of the chip and the initial classification result of the chip from the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip, and determining the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip.
[0010] Optionally, the attributes of all test items are divided into a first test category and a second test category. The first test category is a test item that needs to be interrupted, has no test condition rationality problem, or cannot be used with a reduced specification in the wafer test; the second test category is a test item that requires more verification of the rationality of the test condition or has requirements for specification configuration differences.
[0011] Optionally, the determining an initial classification result for each chip according to the test category to which each test item belongs and its corresponding wafer test result includes: finding the initial classification result corresponding to each chip in a test item result matching table according to the test category to which each test item belongs and its corresponding wafer test result.
[0012] Optionally, the parsing and sorting out the wafer test result record file to obtain the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip includes:
[0013] Numbering each chip in the wafer one by one according to the batch, chip number, and coordinate position, recording the initial classification result of each chip, and the marking information includes the batch, chip number, and coordinate position;
[0014] According to the number of each chip, parsing and recording the test results of each test item in each second test category.
[0015] Optionally, determining the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip includes:
[0016] When the preprocessing identifier corresponding to the initial classification result of the chip is a predetermined identifier, according to the initial classification result of the chip and the test results of each test item in the second test category, the final classification result of the chip is obtained by looking up in the offline processing classification priority configuration table, where the offline processing classification priority configuration table includes the initial classification result of the chip, the test results of each test item in the second test category, and the corresponding relationship between the priority and the final classification result;
[0017] When the preprocessing identifier corresponding to the initial classification result of the chip is not a predetermined identifier, the initial classification result is used as the final classification result of the chip.
[0018] In a second aspect, the present invention provides a wafer test classification device, and the device includes:
[0019] A first classification unit, configured to perform wafer tests on each test item of each chip in the wafer, and determine the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file;
[0020] An analysis unit, configured to analyze and organize the wafer test result record file to obtain the corresponding relationship between the mark information of the chip, the wafer test results of the chip under each test item, and the initial classification result of the chip;
[0021] A second classification unit, configured to, after receiving a trigger file sent after all related mass production processes of a wafer batch are completed, obtain the wafer test results of the chip under each test item and the initial classification result of the chip from the corresponding relationship between the mark information of the chip, the wafer test results of the chip under each test item, and the initial classification result of the chip according to the mark information of the chip in the trigger file, and determine the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip
[0022] Optionally, the attributes of all test items are divided into a first test category and a second test category. The first test category is a test item that needs to be interrupted, has no test condition rationality problem, or cannot be used with a reduced specification during wafer testing; the second test category is a test item that requires more verification of the rationality of test conditions or has different specification configuration requirements.
[0023] Optionally, the first classification unit is configured to look up the initial classification result corresponding to each chip in a test item result matching relationship table according to the test category to which each test item belongs and its corresponding wafer test result.
[0024] Optionally, the parsing unit is further configured to number each chip in the wafer one by one according to batch number, chip number, and coordinate position, record the initial classification result of each chip, and the marking information includes batch number, chip number, and coordinate position; according to the number of each chip, parse and record the test results of each test item in each second test category.
[0025] Optionally, the second classification unit is configured to, when the preprocessing identifier corresponding to the initial classification result of the chip is a predetermined identifier, obtain the final classification result of the chip from the offline processing classification priority configuration table according to the initial classification result of the chip and the test results of each test item in the second test category, where the offline processing classification priority configuration table includes the correspondence between the initial classification result of the chip, the test results of each test item in the second test category, priority, and the final classification result; when the preprocessing identifier corresponding to the initial classification result of the chip is not a predetermined identifier, use the initial classification result as the final classification result of the chip.
[0026] In a third aspect, the present invention provides a computer-readable storage medium, where the computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the above-mentioned wafer test classification method is implemented.
[0027] The wafer test classification method, device, and readable storage medium provided by the embodiments of the present invention adopt a combination of online test preliminary classification and flexible offline processing based on test results, which can achieve reasonable classification according to wafer test results and avoid test misjudgment; at the same time, the online test results of the wafer are re-classified offline, and the classification method and requirements are flexibly configured offline, without frequent adjustment and upgrade of the test program, greatly saving the cycle of test program upgrade and adjustment, and also saving the production capacity waste and increased test cost caused by test program upgrade; in addition, through flexible configuration and classification of some test items with requirements offline, the chips can be maximally utilized according to the needs of all market specifications. Description of the Drawings
[0028] Figure 1 It is a flowchart of the wafer test classification method according to an embodiment of the present invention;
[0029] Figure 2 It is a flowchart of the wafer test classification method according to another embodiment of the present invention;
[0030] Figure 3 It is a schematic diagram of the correspondence between the marking information and the initial classification result of each chip in the wafer provided by the embodiment of the present invention;
[0031] Figure 4Schematic diagram of the content of the trigger file generated by the mass production passing system provided by the embodiment of the present invention;
[0032] Figure 5 Schematic diagram of the structure of the wafer test classification device according to an embodiment of the present invention. Detailed implementation manners
[0033] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part rather than all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0034] The wafer test classification method according to the embodiment of the present invention is to solve the following two problems existing in the prior art:
[0035] One is to solve the contradiction between complex product specification requirements and insufficient flexibility of the wafer test classification method. During the production process of chips, due to different market demands, various differential requirements such as packaging requirements, specification configuration, high and low performance need to be realized. Considering various factors such as production cost and flexibility of later production, in the actual solution of wafer test mass production, it is impossible to make customized distinctions for the test process according to various differential requirements of products. Using wafer tests with unified test conditions and unified classification definitions may cause difficulties in classifying using test programs due to overly complex test program logic. At the same time, the wafer test of chips is carried out according to the fixed logic preset in the ATE (Automatic-Test-Equipment, automated test equipment) test program. Any change in conditions such as test logic requires an upgrade of the test program version to achieve. In mass production, according to the standards required by test quality regulations, usually any upgrade of the test program needs to go through a very strict verification process, and the cycle is usually as long as 2 to 3 weeks. The flexibility of change is relatively poor, resulting in the timeliness of test program update being affected.
[0036] Second, it is to solve how to balance the reasonable classification according to the chip test results and avoid test misjudgment when the test rationality is not yet clear during the test process. Similar to the first point, the test conditions and classification definitions are clearly defined in the ATE test program. Especially in the initial stage of product mass production, due to insufficient optimization of test conditions and other reasons, some chips are misjudged in the wafer test results, resulting in a decrease in yield or quality problems. As a remedial measure, only by upgrading the classification definition in the wafer test program and then retesting the wafer can the yield reduction or quality problems in chip production be saved. However, this update cycle of up to two to three weeks will cause a delay in the progress of product mass production and an increase in product test costs.
[0037] To solve the above problems, an embodiment of the present invention provides a wafer test classification method, as Figure 1 shown, the method includes:
[0038] S11. Perform wafer testing on each test item of each chip in the wafer, and determine the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file.
[0039] S12. Parse and organize the wafer test result record file to obtain the correspondence between the chip's marking information, the wafer test results of each test item of the chip, and the initial classification result of the chip.
[0040] S13. After receiving the trigger file sent after all relevant mass production processes of the wafer batch are completed, obtain the wafer test results of each test item of the chip and the initial classification result of the chip from the correspondence between the chip's marking information, the wafer test results of each test item of the chip, and the initial classification result of the chip according to the chip's marking information in the trigger file, and determine the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip.
[0041] The wafer test classification method provided by the embodiment of the present invention adopts a combination of online test preliminary classification and offline flexible processing and classification according to test results, which can realize reasonable classification according to wafer test results and avoid test misjudgment at the same time; at the same time, it realizes secondary classification processing of wafer online test results offline, and the classification method and requirements are flexibly configured offline, without frequent adjustment and upgrade of the test program, greatly saving the cycle of test program upgrade and adjustment, and also saving the production capacity waste and increased test costs caused by test program upgrade; in addition, through flexible configuration and classification of some test items with requirements offline, the chips can be maximally utilized according to the needs of all market specifications.
[0042] The following is a detailed description of the wafer test classification method of the present invention in combination with specific embodiments.
[0043] As Figure 2 shown, the wafer test classification method provided by the embodiment of the present invention includes the following steps:
[0044] S21. Differentiate and define whether each test item of the wafer test needs to be classified offline, and then perform the first rough classification according to the wafer test results through the ATE to obtain the initial classification results of each chip, and form a wafer test result record file.
[0045] (1) As shown in Table 1, in the test program, the attributes of all test items are divided into test category A and test category B. Test category A is the test items that need to be interrupted, have no test condition rationality problems or cannot be used with reduced specifications in the wafer test, such as OS (open short), PS (power short), and test failures that trigger hardware protection. The test items in test category B mainly include some test items that require more verification of the test condition rationality or have specification configuration difference requirements. Among them, the part of the test items with specification configuration difference requirements, that is, the test items that are required in the test of specification F but not required in specification E. Among them, HB (Hard Bin) in Table 1 represents the large category, SB (Soft Bin) represents the small category, and HBSB (Hard Bin Soft Bin) represents the test classification result.
[0046] Table 1
[0047] Test Category Test Item SB# HB# HBSB# Category A Test Item 1 800 5 50800 Category A Test Item 2 801 5 50801 Category B Test Item 3 802 5 50802 Category A Test Item 4 803 5 50803 Category B Test Item 5 804 5 50804 Category A Test Item 6 805 5 50805 Category A Test Item 7 806 5 50806 Category B Test Item 8 807 5 50807 Category A Test Item 9 808 5 50808 Category B Test Item 10 615 6 60615 Category A Test Item 11 616 6 60616 Category B Test Item 12 617 6 60617 Category B Test Item 13 618 6 60618 Category A Test Item 14 619 6 60619 Category A Test Item 15 620 6 60620 Category B Test Item 16 621 6 60621 Category A Test Item 17 622 6 60622 Category B Test Item 18 623 6 60623 … … … … …
[0048] (2) In the test program, for the test items in test category A, use whether a single test item passes as the basis for classification; for the test items in test category B, only record the failure content in the test record file, and then continue the test of the next test item.
[0049] (3) Synthesize the test results of all test items including test category A and test category B, and the test program realizes the first online classification of each chip to obtain the initial classification results of each chip.
[0050] First, according to requirements, a test item result matching relationship table for the failure records and classification results of each test item is formulated and imported into the test program for implementation. Secondly, after the wafer test is completed, the ATE will perform the first online classification according to the test results of each chip and each test item, in accordance with the definition of the test item result matching relationship table, and assign the HBSB# defined in the relationship table, which is recorded in the wafer test result file. As shown in Table 2, the classification result HBSB# is the result of the first online rough classification. In the test result, 1 represents pass, 0 represents fail, and 1 / 0 means that it does not matter whether the test result is pass or fail. Finally, the classification result HBSB# will be recorded in the test file as the final result of this chip in the wafer test stage, serving as the basis for subsequent offline classification processing.
[0051] For example, the test result of chip M in test item 6 = 0. Since the attribute of the test item is category A, the classification result HBSB# of chip M in the online wafer test = 50805. The test result of chip P in test item 12 = 0. Since the attribute of test item 12 is category B, and all other test results of chip P = 1, the final online wafer test classification result of chip P is 4001. And so on, each chip will be classified for the online test results of the wafer test one by one according to the test results of each of its test items and the attributes of the corresponding items through the following test item result matching relationship table.
[0052] Table 2 Test item result matching relationship table
[0053]
[0054] S22. Parsing and transmission of the wafer test result record file.
[0055] (1) After each wafer completes the wafer test and generates a wafer test result record file, the wafer test result record file is transmitted to the wafer test data storage server. The wafer test data storage server parses and organizes the data in the wafer test result record file in a fixed format according to the formulated format, which is used as the data source for data analysis and the historical test data query required by the next station.
[0056] (2) As Figure 3 shown, each chip in the wafer is numbered one by one according to the batch, wafer number, and XY coordinate position, and the initial classification result of each chip in the wafer test is recorded. The purpose of this data record is to facilitate subsequent offline processing and recording of each chip one by one. The data is stored in the server through key fields, and the results can be queried through key information such as the wafer batch, wafer number, and XY coordinate position.
[0057] (3) Analyze and record the historical test data of each chip, and according to the number of each chip, analyze and record the test results of each test item in each test category B respectively for query during offline processing. As shown in Table 3, 1 in the record represents that the test result is passed, and 0 represents that the test result is not passed.
[0058] Table 3
[0059]
[0060] S23. Achieve secondary processing classification of chips through offline configuration to obtain the final classification result.
[0061] (1) Trigger timing and method of offline secondary classification processing
[0062] After the wafer lot completes all relevant mass production processes such as all wafer tests and bump back gold processes, when importing the lot into the packaging process, a trigger file will be generated through the mass production pass. As Figure 4 shown, the content of the trigger file defines information such as the lot number, the number of wafers, the wafer number, and the completed test stations of this pass. The purpose of this trigger file is to trigger offline processing classification and start working according to the information defined in the file.
[0063] (2) Preprocess the wafer test classification results through the offline processing classification scope configuration table
[0064] After the offline processing classification system receives the trigger file, it will process according to the information defined in the trigger file and complete the preliminary judgment on whether the relevant chips use the offline processing scope. The offline processing classification specifically includes:
[0065] 1. Analyze the trigger file and intercept key field information, such as product name, lot number, wafer number, and wafer test station, etc.;
[0066] 2. Grab relevant information from the wafer test data storage system according to the information defined in the trigger file;
[0067] 3. According to the product name defined in the trigger file, retrieve the offline processing classification scope configuration table. As shown in Table 4, the offline processing classification scope configuration table defines which of the classification results HBSB# achieved by the online wafer test program for each chip are applicable to the conditions of offline processing classification. Only when the corresponding preprocessing flag of HBSB# = 1 can the next offline processing classification be carried out. If flag = 0, the final classification result of this chip is the initial classification result currently achieved by the online wafer test program.
[0068] Table 4 Offline processing classification scope configuration table
[0069] HBSB Preprocessing flag 1001 1 1002 1 1003 1 1004 1 2001 1 2002 1 3001 0 3002 0 4001 1 4002 1 4003 1 4004 1 4005 0 5010 0 5011 0 5012 0 … …
[0070] (3) Perform offline processing and classification according to the priority configuration table
[0071] When the classification result HBSB# implemented by the on-chip wafer test program corresponds to the preprocessing flag = 1, look-up table classification will be performed according to the results defined in the offline processing classification priority configuration table. As shown in Table 5, the offline processing classification priority configuration table defines the test items to be queried corresponding to each on-line classification result HBSB#. According to the priority, if the test result = 0 appears in the category B test items defined in the table, the corresponding processing target HBSB# defined in the table will be returned, and the classification result HBSB# originally implemented by the on-chip wafer test program will be replaced and used as the final classification result for the subsequent process feeding production of the product specifications for the corresponding use. If the results of all listed category B test items are 1, the initial classification result currently implemented by the on-chip wafer test program will be returned as the final classification result.
[0072] For example, the on-line ATE test classification result of chip M is HBSB# = 1002, the test results of test item #B-1, test item #B-2, and test item #B-3 are 1, and the test result of test item #B-4 is 0. According to the definition in the following classification priority configuration table, the final offline classification result of chip M is HBSB# = 4038, which will be used for the feeding production of product specification D.
[0073] Table 5 Offline Processing Classification Priority Configuration Table
[0074] HBSB Test Item # Test Result Priority Processing Target HBSB Usage 1001 Test Item #B-1 0 1 4030 Product Specification A 1001 Test Item #B-2 0 2 4033 Product Specification F 1001 Test Item #B-3 0 3 4033 Product Specification F 1001 Test Item #B-4 0 4 4033 Product Specification F 1001 Test Item #B-5 0 5 4035 Product Specification F 1001 Test Item #B-6 0 6 4035 Product Specification F 1002 Test Item #B-1 0 1 4031 Product Specification C 1002 Test Item #B-2 0 2 4031 Product Specification C 1002 Test Item #B-3 0 3 4031 Product Specification C 1002 Test Item #B-4 0 4 4038 Product Specification D 1002 Test Item #B-5 0 5 4038 Product Specification D 1002 Test Item #B-6 0 6 4038 Product Specification D 4001 Test Item #B-1 0 1 4032 Product Specification E 4001 Test Item #B-2 0 2 4032 Product Specification E 4001 Test Item #B-3 0 3 4032 Product Specification E 4001 Test Item #B-4 0 4 4032 Product Specification E 4001 Test Item #B-5 0 5 4032 Product Specification E 4001 Test Item #B-6 0 6 4032 Product Specification E 4002 Test Item #B-9 0 1 5102 Failure Classification 4003 Test Item #B-9 0 1 5103 Failure Classification … … … … … …
[0075] By using the wafer test classification method provided by the embodiment of the present invention, the final output is the basic information required for the production packaging drawing, that is, after combining the wafer test ATE wafer test classification result and the result of offline secondary processing classification, the information that can be used to define the final drawing of each chip is generated. The drawing of this information is for production packaging, and the wafer will be cut and packaged according to this packaging drawing. Chips with different classification results will thus be used for the production of different specification products.
[0076] The wafer test classification method provided by the embodiment of the present invention has the following beneficial technical effects:
[0077] First, it is beneficial to collect a large amount of test data and quickly finalize the test conditions for the product in the mass production stage. Especially in the initial stage of chip mass production, the test conditions need to be verified with a large amount of test data. The rationality of the test conditions will directly affect the product yield and test quality. Therefore, it is crucial to collect sufficient test results in a timely and effective manner during the wafer test stage while avoiding test misjudgment. Adjusting the classification method of wafer tests from being solely implemented online during the test process in the test program to preliminary online classification and flexible offline classification based on the results will help effectively achieve this goal.
[0078] Second, it effectively reduces the cycle consumed by the development and upgrade of test programs. By implementing secondary classification processing of wafer online test results offline, the classification methods and requirements can be flexibly configured offline without frequent adjustment and upgrade of the test program. This greatly saves the cycle of test program upgrade and adjustment, and also saves the production capacity waste and increased test costs caused by test program upgrade.
[0079] Third, it realizes flexible configuration of product specifications. High-performance chip products have large differences in specification requirements, and various specifications of chips may have different requirements in different market specifications. This embodiment can flexibly configure and classify some required test items offline, enabling the chips to be maximally utilized according to the requirements of all market specifications.
[0080] The embodiment of the present invention also provides a wafer test classification device, as Figure 5 shown, the device includes:
[0081] A first classification unit 11, configured to perform wafer tests on each test item of each chip in the wafer, and determine the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file;
[0082] An analysis unit 12, configured to analyze and organize the wafer test result record file to obtain the correspondence between the chip's marking information, the wafer test results of each test item of the chip, and the initial classification result of the chip;
[0083] A second classification unit 13, configured to, after receiving a trigger file sent after all relevant mass production processes of a wafer batch are completed, obtain the wafer test results of each test item of the chip and the initial classification result of the chip from the correspondence between the chip's marking information, the wafer test results of each test item of the chip, and the initial classification result of the chip according to the chip's marking information in the trigger file, and determine the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip
[0084] The wafer test classification device provided by the embodiment of the present invention adopts a combination of online test preliminary classification and flexible offline processing and classification according to test results, which can realize reasonable classification according to wafer test results and avoid test misjudgment at the same time. At the same time, the online test results of wafers are re-classified offline. The classification method and requirements are flexibly configured offline, without frequent adjustment and upgrade of test programs, which greatly saves the cycle of test program upgrade and adjustment, and also saves the production capacity waste and increased test costs caused by test program upgrade. In addition, through flexible configuration and classification of some test items with requirements offline, the chips can be maximally utilized according to the requirements of all market specifications.
[0085] Optionally, the attributes of all test items are divided into a first test category and a second test category. The first test category is the test items that need to be interrupted, have no rationality problem of test conditions or cannot be used with reduced specifications in wafer testing; the second test category is the test items that require more verification of the rationality of test conditions or have requirements for specification configuration differences.
[0086] Optionally, the first classification unit 11 is configured to find the initial classification result corresponding to each chip in the test item result matching table according to the test category to which each test item belongs and its corresponding wafer test result.
[0087] Optionally, the parsing unit 12 is further configured to number each chip in the wafer one by one according to batch number, chip number and coordinate position, record the initial classification result of each chip, and the marking information includes batch number, chip number and coordinate position; according to the number of each chip, parse and record the test results of each test item in each second test category.
[0088] Optionally, the second classification unit 13 is configured to, when the preprocessing identifier corresponding to the initial classification result of the chip is a predetermined identifier, obtain the final classification result of the chip from the offline processing classification priority configuration table according to the initial classification result of the chip and the test results of each test item in the second test category, where the offline processing classification priority configuration table includes the corresponding relationship between the initial classification result of the chip, the test results of each test item in the second test category, the priority and the final classification result; when the preprocessing identifier corresponding to the initial classification result of the chip is not a predetermined identifier, use the initial classification result as the final classification result of the chip.
[0089] The device of this embodiment can be used to execute the technical solutions of the above method embodiments, and its implementation principle and technical effects are similar, which will not be elaborated here.
[0090] An embodiment of the present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the above-mentioned wafer test classification method is implemented.
[0091] Those of ordinary skill in the art can understand that all or part of the processes in the above method embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the above method embodiments. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM), etc.
[0092] The above is only a specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. A wafer test classification method, characterized in that, The method includes: Performing wafer testing on each test item of each chip in the wafer, and determining the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file; Parsing and organizing the wafer test result record file to obtain the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip; After receiving the trigger file sent after the wafer batch completes all relevant mass production processes, obtaining the wafer test results of each test item of the chip and the initial classification result of the chip from the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip according to the marking information of the chip in the trigger file, and determining the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip.
2. The method according to claim 1, characterized in that, The attributes of all test items are divided into a first test category and a second test category. The first test category is the test items that need to be interrupted, have no test condition rationality problems, or cannot be used with reduced specifications in wafer testing; the second test category is the test items that require more verification of the rationality of test conditions or have requirements for specification configuration differences.
3. The method according to claim 1 or 2, characterized in that, The determining the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result includes: looking up the initial classification result corresponding to each chip in the test item result matching table according to the test category to which each test item belongs and its corresponding wafer test result.
4. The method according to claim 3, wherein The parsing and organizing the wafer test result record file to obtain the correspondence relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip includes: Numbering each chip in the wafer one by one according to the batch, chip number, and coordinate position, recording the initial classification result of each chip, and the marking information includes the batch, chip number, and coordinate position; Parsing and recording the test results of each test item in each second test category according to the number of each chip.
5. The method according to claim 4, characterized in that The determining the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip includes: When the preprocessing identifier corresponding to the initial classification result of the chip is a predetermined identifier, obtaining the final classification result of the chip by looking up the offline processing classification priority configuration table according to the initial classification result of the chip and the test results of each test item in the second test category, where the offline processing classification priority configuration table includes the correspondence relationship between the initial classification result of the chip, the test results of each test item in the second test category, the priority, and the final classification result; When the preprocessing identifier corresponding to the initial classification result of the chip is not the predetermined identifier, taking the initial classification result as the final classification result of the chip.
6. A wafer test classification device, characterized in that, The device includes: The first classification unit is used to perform wafer testing on each test item of each chip in the wafer, and determine the initial classification result of each chip according to the test category to which each test item belongs and its corresponding wafer test result, so as to form a wafer test result record file; The parsing unit is used to parse and sort out the wafer test result record file to obtain the corresponding relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip; The second classification unit is used to, after receiving the trigger file sent after all relevant mass production processes of the wafer batch are completed, obtain the wafer test results of each test item of the chip and the initial classification result of the chip from the corresponding relationship between the marking information of the chip, the wafer test results of each test item of the chip, and the initial classification result of the chip according to the marking information of the chip in the trigger file, and determine the final classification result of the chip according to the preprocessing identifier corresponding to the initial classification result of the chip.
7. The device according to claim 6, wherein The attributes of all test items are divided into a first test category and a second test category. The first test category is the test items that need to be interrupted, have no test condition rationality problems, or cannot be used with reduced specifications in wafer testing; the second test category is the test items that require more verification of the rationality of test conditions or specification configuration difference requirements.
8. The device according to claim 6 or 7, characterized in that, The first classification unit is used to find the initial classification result corresponding to each chip in the test item result matching table according to the test category to which each test item belongs and its corresponding wafer test result.
9. The device according to claim 8, characterized in that, The parsing unit is further used to number each chip in the wafer one by one according to the batch, chip number, and coordinate position, record the initial classification result of each chip, and the marking information includes the batch, chip number, and coordinate position; according to the number of each chip, parse and record the test results of each test item in each second test category.
10. The device according to claim 9, characterized in that, The second classification unit is used to, when the preprocessing identifier corresponding to the initial classification result of the chip is a predetermined identifier, obtain the final classification result of the chip from the offline processing classification priority configuration table according to the initial classification result of the chip and the test results of each test item in the second test category, where the offline processing classification priority configuration table includes the corresponding relationship between the initial classification result of the chip, the test results of each test item in the second test category, the priority, and the final classification result; when the preprocessing identifier corresponding to the initial classification result of the chip is not a predetermined identifier, use the initial classification result as the final classification result of the chip.
11. A computer-readable storage medium, wherein, The computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the method described in any one of claims 1 to 5 is implemented.
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