Test method and test system

Abstract

The embodiments of the present application relate to the field of semiconductor circuit testing, and in particular to a testing method and a testing system, comprising: writing first initial data into a storage module, and an ECC module, based on the first initial data, encodes and generates first verification data corresponding to the first initial data; writing second initial data into the same address of the storage module, and the ECC module, based on the second initial data, encodes and generates second verification data corresponding to the second initial data; writing the first initial data into the same address of the storage module; reading the first initial data and the second verification data in the storage module, and the ECC module, based on the first initial data, encodes and generates third verification data corresponding to the first initial data, and verifies and corrects the second verification data based on the third verification data; reading the first read data of the memory, and judging whether the function of the ECC module is abnormal based on the first read data, so as to provide a simple and reliable testing method for the ECC function of the memory.

Description

Technical Field

[0001] The present application relates to the field of semiconductor circuit testing, and in particular to a testing method and a testing system. Background Art

[0002] Dynamic Random Access Memory (DRAM) is widely used in modern electronic systems due to its high storage density and fast transmission speed. With the development of semiconductor technology, DRAM technology is becoming more and more advanced, and the integration of storage units is becoming higher and higher; at the same time, various applications have higher and higher requirements on DRAM performance, power consumption and reliability.

[0003] In order to ensure that data is stored error-free, an error correction function (Error Correction Code, ECC) is introduced to verify the stored data to improve the accuracy of DRAM data storage. That is, ensuring the correct operation of the ECC function can ensure that the stored data is error-free to a certain extent.

[0004] However, the applicant has found that the current testing environment for the ECC function in DRAM is relatively limited, and there is an urgent need to design a simple and reliable testing method to test whether the ECC function in DRAM is normal. Summary of the invention

[0005] The embodiments of the present application provide a testing method and a testing system, which can also test whether the ECC function in the memory is normal after the memory is put into use.

[0006] The embodiment of the present application provides a testing method, which is applied to a memory, wherein the memory includes a memory module and an ECC module, and includes: writing first initial data into the memory module, wherein the ECC module encodes and generates first verification data corresponding to the first initial data based on the first initial data, and writes the first verification data into the memory module; writing second initial data into the same address of the memory module, wherein the ECC module encodes and generates second verification data corresponding to the second initial data based on the second initial data, and writes the second verification data into the memory module, wherein the second initial data stored in the memory module covers the first initial data, and the second verification data covers the first verification data, wherein the first initial data and the second initial data have data differences; writing the first initial data into the same address of the memory module, wherein the first initial data stored in the memory module covers the second initial data; reading the first initial data and the second verification data in the memory module, wherein the ECC module encodes and generates third verification data corresponding to the first initial data based on the first initial data, and verifies and corrects the second verification data based on the third verification data; reading first read data of the memory, and judging whether the function of the ECC module is abnormal based on the first read data, wherein the first read data is the first initial data read from the memory module.

[0007] An embodiment of the present application provides a test system, which is applied to the above-mentioned test method, including: a first data providing module, configured to provide first initial data to a memory; a second data providing module, configured to provide second initial data to the memory, and the first initial data and the second initial data have data differences; a control module, configured to control the opening or closing of an ECC module of the memory according to a control signal; a data analysis module, configured to obtain first read data output by the memory, and based on the first read data, determine whether the function of the ECC module is abnormal, and the first read data is the first initial data read from the memory.

[0008] After calibrating the correct data by storing the first initial data and the first verification data in the storage module, firstly store the second initial data and the second verification data in the storage module, and then store the first initial data in the storage module, that is, an error is annotated on the verification data, and then judge whether the ECC function of the memory is normal through the first read data read out of the memory, that is, after the memory is put into use, the ECC function can still be verified in a relatively simple way, the test environment is real, and the obtained test data is more reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A schematic diagram of the structure of a memory provided in one embodiment of the present application;

[0010] Figure 2 A flow chart of a testing method provided in one embodiment of the present application;

[0011] Figure 3 A specific data flow diagram of a test method provided in one embodiment of the present application;

[0012] Figure 4 A schematic diagram of the structure of another memory provided in one embodiment of the present application;

[0013] Figure 5 A schematic diagram of the structure of a test system provided in another embodiment of the present application;

[0014] Figure 6 A schematic diagram of the structure of another testing system provided in another embodiment of the present application. DETAILED DESCRIPTION

[0015] In order to ensure that data is stored error-free, an error correction function (Error Correction Code, ECC) is introduced to verify the stored data to improve the accuracy of DRAM data storage. That is, ensuring the correct operation of the ECC function can ensure that the stored data is error-free to a certain extent.

[0016] The applicant has found that the current testing environment for the ECC function in DRAM is relatively limited, and there is an urgent need to design a simple and reliable testing method to test whether the ECC function in DRAM is normal.

[0017] An embodiment of the present application provides a test method, which is applied to a memory, wherein the memory includes a memory module and an ECC module, and includes: writing first initial data into the memory module, wherein the ECC module encodes and generates first verification data corresponding to the first initial data based on the first initial data, and writes the first verification data into the memory module; writing second initial data into the same address of the memory module, wherein the ECC module encodes and generates second verification data corresponding to the second initial data based on the second initial data, and writes the second verification data into the memory module, wherein the second initial data stored in the memory module covers the first initial data, and the second verification data covers the first verification data, wherein the first initial data and the second initial data have data differences; writing the first initial data into the same address of the memory module, wherein the first initial data stored in the memory module covers the second initial data; reading the first initial data and the second verification data from the memory module, wherein the ECC module encodes and generates third verification data corresponding to the first initial data based on the first initial data, and verifies and corrects the second verification data based on the third verification data; reading first read data from the memory, and judging whether the function of the ECC module is abnormal based on the first read data, wherein the first read data is the first initial data read from the memory module.

[0018] Those skilled in the art will appreciate that, in the various embodiments of the present application, many technical details are provided in order to enable readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can also be implemented.

[0019] Figure 1 A schematic diagram of the structure of a memory provided in this embodiment, Figure 2 A flow chart of a testing method provided in this embodiment, Figure 3 A specific data flow diagram of a test method provided in this embodiment, Figure 4 This is a schematic diagram of the structure of another memory provided in this embodiment. The test method provided in this embodiment is further described in detail below in conjunction with the accompanying drawings, as follows:

[0020] It should be noted that the test for ECC in the present application is specifically used to test whether ECC will use erroneous check data to repair real data, and whether it repairs erroneous check data based on real data, wherein the real data represents the data to be stored, and the check data is the inspection data compiled and generated by the ECC module based on the data to be stored.

[0021] In one example, refer to Figure 1 , a test method is applied to a memory, the memory comprising: an interface module 100, a storage module 300 and an ECC module 200, wherein the ECC module 200 is used to perform error detection and correction on data stored in the storage module 300, the storage module 300 is used to store real data and check data, the interface module 100 is used to obtain real data to be stored in the storage module 300, and is used to output the read data of the memory, wherein the data between the interface module 100 and the ECC module 200 is transmitted via a first data path 115.

[0022] for Figure 1 , the real data includes the first initial data Data1, the read data of the memory includes the first read data Read1, and the verification data includes the first verification data Parity1.

[0023] refer to Figure 2 , the testing method specifically includes steps 101 to 105.

[0024] Step 101 : writing first initial data Data1 and first verification data Parity1 into the storage module 300 .

[0025] Specifically, the first initial data Data1 is written into the storage module 300 , the ECC module 200 encodes the first parity data Parity1 corresponding to the first initial data Data1 based on the first initial data Data1 , and writes the first parity data Parity1 into the storage module 300 .

[0026] Combination Figure 1 and Figure 3 The interface module 100 obtains the first initial data Data1 and transmits the first initial data Data1 to the ECC module 200. The ECC module 200 compiles and generates the first verification data Parity1 according to the first initial data Data1. Then, the ECC module 200 stores the first initial data Data1 and the first verification data Parity1 in the storage module 300.

[0027] The first initial data Data1 and the first check data Parity1 are used to indicate the correct data that the ECC module 200 needs to check later.

[0028] It should be noted that, in the present embodiment, the first initial data Data1 is illustrated by taking a 128-bit binary number as an example, which does not constitute a limitation of the present embodiment; in specific applications, the data length of the first initial data Data1 can be adjusted according to the data length required to be stored in the memory, and accordingly, the first check data Parity1 compiled and generated by the ECC module 200 based on the first initial data Data1 is an 8-bit binary number.

[0029] In one example, the first initial data Data1 is stored in the data storage area of ​​the storage module 300, and the first verification data Parity1 is stored in the verification storage area of ​​the storage module 300; further, the first initial data Data1 stored in the data storage area is stored in 16 groups of 8 bits to ensure that the storage space of each storage unit in the data storage area is consistent with the storage space of the storage unit in the verification storage area. It should be noted that the real data stored in the data storage area can be divided according to the division method of the storage space of the memory storage unit, and this embodiment does not constitute a limitation on the division of data during data storage.

[0030] Step 102 , writing the second initial data Data2 and the second verification data Parity2 into the storage module 300 .

[0031] Specifically, the second initial data Data2 is written to the same address in the storage module 300, the ECC module 200 encodes the second verification data Parity2 corresponding to the second initial data Data2 based on the second initial data Data2, and writes the second verification data Parity2 into the storage module 300, wherein the first initial data Data1 and the second initial data Data2 have data differences.

[0032] Since the first initial data Data1 and the second initial data Data2 have data differences, the first parity data Parity1 generated from the first initial data Data1 and the second parity data Parity2 generated from the second initial data Data2 also have data differences.

[0033] Combination Figure 1 and Figure 3 The interface module 100 obtains the second initial data Data2 and transmits the second initial data Data2 to the ECC module 200. The ECC module 200 compiles and generates the second verification data Parity2 according to the second initial data Data2. Then, the ECC module 200 stores the second initial data Data2 and the second verification data Parity2 in the storage module 300.

[0034] It should be noted that, in this embodiment, the second initial data Data2 is illustrated by taking a 128-bit binary number as an example, which does not constitute a limitation to this embodiment.

[0035] Regarding the second initial data Data2 and the second verification data Parity2, the second initial data Data2 stored in the storage module covers the first initial data Data1, and the second verification data Parity2 covers the first verification data Parity1.

[0036] Step 103 , writing the first initial data Data1 into the storage module 300 .

[0037] Specifically, the first initial data Data1 is written into the same address of the storage module 300 , and the first initial data Data1 stored in the storage module 300 covers the second initial data Data2 .

[0038] Combination Figure 1 and Figure 3 Before writing the first initial data Data1 into the storage module 300, the ECC module 200 is turned off, the interface module 100 writes the first initial data Data1 into the storage module 300, and after the first initial data Data1 is written into the storage module 300, the ECC module 200 is turned on.

[0039] Since the memory stores data in the form of level storage, and the level stored data may cause the written data and the read data to be different due to the change of the level, it is necessary to use ECC to detect and correct the written data and the read data. This embodiment controls the opening and closing of the ECC module 200 to prevent the ECC module 200 from transmitting the first check data Parity1 compiled and generated according to the first initial data Data1 to the storage module 300, thereby injecting errors into the check data, thereby simulating errors in the check data stored in the storage module 300.

[0040] In one example, disabling the ECC module 200 includes disabling the encoding function of the ECC module 200, and enabling the ECC module 200 includes enabling the encoding function of the ECC module 200. That is, by disabling the encoding function of the ECC module 200, the ECC module 200 is prevented from encoding the first initial data Data1 to generate the first parity data Parity1.

[0041] In another example, closing the ECC module 200 includes: closing the data transmission channel for accessing the verification data between the ECC module 200 and the storage module 300; opening the ECC module 200 includes: opening the data transmission channel for accessing the verification data between the ECC module 200 and the storage module 300. That is, by closing the data transmission channel for accessing the verification data between the ECC module 200 and the storage module 300, it is ensured that the second verification data Parity2 in the storage module 300 is not overwritten, and although the ECC module 200 generates the first verification data Parity1 according to the first initial data Data1 encoding, it cannot be stored in the storage module 300.

[0042] For the ECC function of commonly used memories, if only one bit of the check data of the memory in the storage module 300 is changed, the check data can be repaired according to the real data. If the bit of the check data that has changed is greater than 1, the ECC module 200 cannot repair the check data. Therefore, in this embodiment, the first initial data Data1 and the second initial data Data2 have one and only one data difference, that is, the first check data Parity1 generated by the first initial data Data1 and the second check data Parity2 generated by the second initial data Data2 also have one and only one data difference, to ensure that the second check data Parity2 after the injection error can be repaired by the ECC module.

[0043] Step 104 , reading out the first initial data Data1 and the second parity data Parity2 in the storage module 300 .

[0044] Specifically, the first initial data Data1 and the second check data Parity2 in the storage module 300 are read out, the ECC module 200 encodes the first initial data Data1 to generate the third check data Parity3 corresponding to the first initial data Data1, and checks and corrects the second check data Parity2 based on the third check data Parity3.

[0045] Combination Figure 1 and Figure 3 The storage module 300 reads the first initial data Data1 and the second check data Parity2 to the ECC module 200. The ECC module 200 encodes the first initial data Data1 to generate the third check data Parity3 corresponding to the first initial data Data1. The ECC module 200 checks and corrects the second check data Parity2 according to the third check data Parity3.

[0046] Step 105 , obtaining the first read data Read1 of the memory, and determining whether the ECC module function is abnormal based on the first read data Read1 .

[0047] Specifically, the first read data Read1 of the memory is read, and based on the first read data Read1, it is determined whether the function of the ECC module 200 is abnormal, wherein the first read data Read1 is the first initial data Data1 read from the storage module 300 .

[0048] In an example, if the read first read data Read1 is the same as the first initial data Data1 to be written, it means that the check data after the error is repaired by the ECC module 200, the initial data has not changed, and the ECC module 200 functions normally; if the read first read data Read1 is different from the first initial data Data1 to be written, it means that the check data after the error is not repaired, the initial data is incorrectly repaired by the ECC module 200, and the ECC module 200 functions abnormally.

[0049] In addition, refer to Figure 4 In one example, the process of reading the first read data Read1 of the memory also includes: reading the second read data Read2 of the memory, the second read data Read2 is the second check data Parity2 checked and corrected by the ECC module 200 based on the third check data Parity3.

[0050] In one example, the second read data Read2 is outputted using a mask pad of the memory.

[0051] The normal data reading and writing process of the memory may involve mask operation, and the memory mask operation is based on whether the control end sends a mask and whether the relevant mask function is turned on. The mask operation will not be used when testing the ECC of the memory, that is, when testing the ECC, the mask pad of the memory is equivalent to having no effect. Therefore, the mask pad is used to output the second read data Read2, and there is no need to add a pad to the memory, and the external structure of the memory will not be changed.

[0052] In one example, the first data path 115 is used for the interface module 100 to transmit real data to the ECC module 200; the second data path 125 is used for the ECC module 200 to transmit verification data to the interface module 100, and the accuracy of data transmission is ensured by classified transmission of data.

[0053] For a memory in normal operation, its ECC function will not output verification data after verification and repair. In some embodiments, the second data path 125 is turned on based on an external control signal, which further ensures that the memory will output the second read data Read2 only when the ECC function is tested.

[0054] For the second read data Read2, judging whether the function of the ECC module 200 is abnormal includes: obtaining the first verification data Parity1 corresponding to the first initial data Data1 based on the encoding method of the ECC module 200; if the second read data Read2 is the same as the first verification data Parity1, and the read first read data Read1 is the same as the first initial data Data1, the ECC module 200 functions normally; if the second read data Read2 is different from the first verification data Parity1, or the read first read data Read1 is different from the first initial data Data1, the ECC module 200 functions abnormally. The above test method combining real data and verification data provides double protection to further ensure the accuracy of the test results.

[0055] Since the memory stores data in the form of level storage, and the level stored data may cause the written data and the read data to be different due to the change of the level, it is necessary to use ECC to detect and correct the written data and the read data. In this embodiment, after the correct data is calibrated by storing the first initial data and the first verification data in the storage module, the second initial data and the second verification data are first stored in the storage module, and then the first initial data is stored in the storage module, that is, the verification data is annotated with errors, and then the first read data read out of the memory is used to determine whether the ECC function of the memory is normal. That is, after the memory is put into use, a relatively simple method can still be used to verify the ECC function, the test environment is real, and the obtained test data is more reliable.

[0056] The above division of various steps is only for clear description. When implemented, they can be combined into one step or some steps can be split and decomposed into multiple steps. Adding insignificant modifications to the process or introducing insignificant designs that do not change the core design of the process are all within the scope of protection of this patent.

[0057] Another embodiment of the present application provides a test system, which is applied to the above-mentioned test method, including: a first data providing module, configured to provide first initial data to the memory; a second data providing module, configured to provide second initial data to the memory, and the first initial data and the second initial data have data differences; a control module, configured to control the opening or closing of the ECC module of the memory according to a control signal; a data analysis module, configured to obtain the first read data output by the memory, and based on the first read data, determine whether the function of the ECC module is abnormal, and the first read data is the first initial data read from the memory.

[0058] Figure 5 A schematic diagram of the structure of a test system provided in this embodiment, Figure 6 This is a schematic diagram of the structure of another test system provided in this embodiment. The test system provided in this embodiment is further described in detail below in conjunction with the accompanying drawings, as follows:

[0059] refer to Figure 5 , a test system 400, for testing an ECC module of a memory, comprising:

[0060] The first data providing module 401 is configured to provide first initial data Data1 to the memory.

[0061] It should be noted that, in the present embodiment, the first initial data Data1 is illustrated by taking a 128-bit binary number as an example, which does not constitute a limitation of the present embodiment; in specific applications, the data length of the first initial data Data1 can be adjusted according to the data length required to be stored in the memory, and accordingly, the first check data Parity1 generated by the ECC module of the memory based on the first initial data Data1 is an 8-bit binary number.

[0062] The second data providing module 402 is configured to provide second initial data Data2 to the memory, wherein the first initial data Data1 and the second initial data Data2 have data differences.

[0063] Since the memory stores data in the form of level storage, and the level stored data may cause the written data and the read data to be different due to the change of the level, it is necessary to use ECC to detect and correct the written data and the read data. This embodiment controls the opening and closing of the ECC module to prevent the ECC module from transmitting the first check data Parity1 compiled and generated according to the first initial data Data1 to the storage module, thereby injecting errors into the check data, thereby simulating errors in the data stored in the storage module.

[0064] For the ECC function of commonly used memories, if only one bit of the check data of the memory in the storage module changes, the check data can be repaired according to the real data. If the number of bits of the check data that changes is greater than 1, the ECC module cannot repair the check data. Therefore, in this embodiment, the first initial data Data1 and the second initial data Data2 have one and only one data difference, that is, the first check data Parity1 generated by the first initial data Data1 and the second check data Parity2 generated by the second initial data Data2 also have one and only one data difference, to ensure that the second check data Parity2 after the injection error can be repaired by the ECC module.

[0065] The control module 403 is configured to control the opening or closing of the ECC module of the memory according to the control signal.

[0066] In one example, disabling the ECC module includes: disabling the encoding function of the ECC module; and enabling the ECC module includes: enabling the encoding function of the ECC module. That is, by disabling the encoding function of the ECC module, the ECC module is prevented from encoding the first initial data Data1 to generate the first parity data Parity1.

[0067] In another example, closing the ECC module includes: closing the data transmission channel for accessing the verification data between the ECC module and the storage module; opening the ECC module includes: opening the data transmission channel for accessing the verification data between the ECC module and the storage module. That is, by closing the data transmission channel for accessing the verification data between the ECC module and the storage module, it is ensured that the second verification data Parity2 in the storage module is not overwritten. Although the ECC module generates the first verification data Parity1 according to the first initial data Data1 encoding, it cannot be stored in the storage module.

[0068] The data analysis module 404 is configured to obtain the first read data Read1 output by the memory, and determine whether the function of the ECC module of the memory is abnormal based on the first read data Read1, wherein the first read data Read1 is the first initial data Data1 read by the memory.

[0069] Specifically, the data analysis module 404 includes: an acquisition unit 414, configured to acquire the first read data Read1 of the memory data; a judgment unit 424, connected to the first data providing module 401 and the acquisition unit 414, and judging whether the function of the memory ECC module is abnormal based on the first read data Read1 and the first initial data Data1.

[0070] For the judgment unit 424, if the read first read data Read1 is the same as the first initial data Data1 to be written, it means that the check data after the error is repaired by the ECC module, the initial data has not changed, and the ECC module functions normally; if the read first read data Read1 is different from the first initial data Data1 to be written, it means that the initial data after the error is repaired by the ECC module incorrectly, and the ECC module functions abnormally.

[0071] In one example, the process of reading the first read data Read1 from the memory further includes: reading the second read data Read2 from the memory, where the second read data Read2 is the second parity data Parity2 corrected by the ECC module.

[0072] Specifically, refer to Figure 6 The data analysis module 504 is configured to also obtain the second read data Read2 output by the memory, where the second read data Read2 is the second parity data Parity2 corrected by the ECC module.

[0073] Judging whether the function of the ECC module of the memory is abnormal based on the first read data Read1 includes: judging whether the function of the ECC module is abnormal based on the first read data Read1 and the second read data Read2.

[0074] In this example, the data analysis module 504 includes: an acquisition unit 514, configured to acquire the first read data Read1 and the second read data Read2 output by the memory; a processing unit 524, connected to the first data providing module 401, configured to acquire the first verification data Parity1 corresponding to the first initial data Data1 based on the encoding method of the ECC module; a judgment unit 534, connected to the acquisition unit 514 and the processing unit 524, and judging whether the function of the ECC module is abnormal based on the first verification data Parity1, the first read data Read1, the second read data Read2 and the first initial data Data1.

[0075] For the judgment unit 534, based on the encoding method of the ECC module 200, the first verification data Parity1 corresponding to the first initial data Data1 is obtained; if the second read data Read2 is the same as the first verification data Parity1, and the read first read data Read1 is the same as the first initial data Data1, the ECC module 200 functions normally; if the second read data Read2 is different from the first verification data Parity1, or the read first read data Read1 is different from the first initial data Data1, the ECC module 200 functions abnormally. The above test method combining real data and verification data provides double protection to further ensure the accuracy of the test results.

[0076] Since the memory stores data in the form of level storage, and the level stored data may cause the written data and the read data to be different due to the change of the level, it is necessary to use ECC to detect and correct the written data and the read data. In this embodiment, after the correct data is calibrated by storing the first initial data and the first verification data in the storage module, the second initial data and the second verification data are first stored in the storage module, and then the first initial data is stored in the storage module, that is, the verification data is annotated with errors, and then the first read data read out of the memory is used to determine whether the ECC function of the memory is normal. That is, after the memory is put into use, a relatively simple method can still be used to verify the ECC function, the test environment is real, and the obtained test data is more reliable.

[0077] It is worth mentioning that all units involved in this embodiment are logical units. In practical applications, a logical unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by this application, but this does not mean that there are no other units in this embodiment.

[0078] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. A testing method, applied to a memory, wherein the memory comprises a storage module and an ECC module, characterized in that: include: Writing first initial data into the storage module, wherein the ECC module encodes and generates first verification data corresponding to the first initial data based on the first initial data, and writes the first verification data into the storage module; Writing second initial data into the same address of the storage module, the ECC module encoding and generating second verification data corresponding to the second initial data based on the second initial data, and writing the second verification data into the storage module, the second initial data stored in the storage module covering the first initial data, and the second verification data covering the first verification data, wherein the first initial data and the second initial data have data differences; Writing the first initial data into the same address of the storage module, so that the first initial data stored in the storage module covers the second initial data; The first initial data and the second verification data in the storage module are read out, the ECC module generates third verification data corresponding to the first initial data by encoding based on the first initial data, and verifies and corrects the second verification data based on the third verification data; First read data of the memory is read out, and based on the first read data, it is determined whether the function of the ECC module is abnormal, wherein the first read data is the first initial data read out from the storage module.

2. The testing method according to claim 1, characterized in that: Writing the first initial data into the same address of the storage module includes: closing the ECC module, writing the first initial data into the storage module, and opening the ECC module after the first initial data is written into the storage module.

3. The testing method according to claim 2, characterized in that: include: The shutting down the ECC module comprises: shutting down the encoding function of the ECC module; The enabling of the ECC module includes: enabling an encoding function of the ECC module.

4. The testing method according to claim 2, characterized in that: include: The shutting down of the ECC module comprises: shutting down a data channel where the ECC module stores verification data between the storage modules; The enabling of the ECC module includes: enabling a data channel for storing verification data between the ECC module and the storage module.

5. The testing method according to claim 1, characterized in that: The determining whether the function of the ECC module is abnormal includes: if the first read data read out is the same as the first initial data written in, the ECC module functions normally; if the first read data read out is different from the first initial data written in, the ECC module functions abnormally.

6. The testing method according to claim 1, characterized in that: The process of reading the first read data of the memory also includes: reading the second read data of the memory, where the second read data is the second check data checked and corrected by the ECC module based on the third check data.

7. The testing method according to claim 6, characterized in that: The first initial data and the second initial data have one and only one data difference, and the first verification data and the second verification data have one and only one data difference.

8. The testing method according to claim 7, characterized in that: The determining, based on the first read data, whether the function of the ECC module is abnormal includes: Based on the encoding method of the ECC module, obtaining first verification data corresponding to the first initial data; If the second read data is the same as the first check data, and the read first read data is the same as the written first initial data, the ECC module functions normally; If the second read data is different from the first check data, or the read first read data is different from the written first initial data, the ECC module functions abnormally.

9. A test system, applied to the test method according to any one of claims 1 to 8, characterized in that: include: A first data providing module is configured to provide first initial data to the memory; A second data providing module is configured to provide second initial data to the memory, wherein the first initial data and the second initial data have data differences; A control module, configured to control the opening or closing of the ECC module of the memory according to the control signal; The data analysis module is configured to obtain first read data output by the memory, and determine whether the function of the ECC module is abnormal based on the first read data, wherein the first read data is the first initial data read from the memory.

10. The test system according to claim 9, characterized in that: The first initial data and the second initial data have one and only one data difference.

11. The test system according to claim 9, characterized in that: The data analysis module comprises: An acquisition unit, configured to acquire the first read data output by the memory; A judging unit is connected to the first data providing module and the acquiring unit, and judges whether the function of the ECC module is abnormal based on the first read data and the first initial data.

12. The test system according to claim 11, characterized in that: The determining whether the function of the ECC module is abnormal based on the first read data and the first initial data includes: If the first read data is the same as the first initial data, the judgment unit outputs prompt information indicating that the function of the ECC module is normal; If the first read data is different from the first initial data, the judgment unit outputs prompt information indicating that the ECC module is abnormal in function.

13. The test system according to claim 9, characterized in that: include: The data analysis module is configured to further obtain second read data output by the memory, where the second read data is the second check data corrected by the ECC module; The determining whether the function of the ECC module of the memory is abnormal based on the first read data includes: determining whether the function of the ECC module is abnormal based on the first read data and the second read data.

14. The test system according to claim 13, characterized in that: The data analysis module includes: an acquisition unit, configured to acquire the first read-out data and the second read-out data output by the memory; a processing unit, connected to the first data providing module, and configured to obtain first verification data corresponding to the first initial data based on the encoding method of the ECC module; A judging unit is connected to the acquiring unit, the processing unit and the first data providing module, and judges whether the function of the ECC module is abnormal based on the first read data, the second read data, the first check data and the first initial data.

15. The test system according to claim 14, characterized in that: The judging whether the function of the ECC module is abnormal based on the first read data, the second read data, the first check data and the first initial data includes: if the second read data is the same as the first check data, and the read first read data is the same as the written first initial data, the ECC module functions normally; if the second read data is different from the first check data, or the read first read data is different from the written first initial data, the ECC module functions abnormally.

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