A series-parallel side coordinated control method for UPQC topology

Abstract

The present invention discloses a UPQC topology and a series-parallel side coordinated control method thereof, including: a series side unit, a DC capacitor and a parallel side unit; the series side unit includes a series transformer, a series coupling capacitor, a first filter and a series converter connected in series in sequence; the parallel side unit includes a parallel converter, a second filter and a parallel transformer connected in series in sequence; the series converter, the DC capacitor and the parallel converter are connected in parallel with each other; the first filter includes a first inductor and a first capacitor connected in series, and the second filter includes a second inductor; the series converter includes four insulated gate bipolar transistors; the parallel converter includes four insulated gate bipolar transistors. The present invention can effectively improve the utilization rate of the series side device, and can use the series side converter to reduce the rated capacity of the parallel side converter, further reducing the active capacity of the device.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic power control, and in particular to a UPQC topology structure and a series-parallel side coordinated control method thereof. Background Art

[0002] With the massive access of renewable energy and nonlinear loads, power quality problems in distribution networks are becoming increasingly severe, such as voltage sag, voltage flicker, harmonics, etc. However, precision instruments and sensitive equipment, such as computers, medical equipment, and high-precision production equipment, have extremely high requirements for power quality. As a typical comprehensive power quality management device, the unified power quality conditioner (UPQC) can solve voltage and current quality problems at the same time.

[0003] At present, the typical UPQC topology is that the series-side converter is connected to the grid via an LC filter and a series transformer, and the parallel-side converter is connected to the grid via an L filter and a parallel transformer, and the series-parallel converters are connected via DC capacitors. However, the traditional UPQC device has large active capacity and high cost, which seriously restricts its application and promotion in the distribution network. In addition, due to the low frequency and short duration of voltage fluctuations in the distribution network, the series-side converter is usually idle, which greatly reduces the utilization rate of the device. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a UPQC topology structure and a series-parallel side coordinated control method thereof, which can effectively improve the utilization rate of the series side device and reduce the active capacity of the UPQC device.

[0005] In a first aspect, an embodiment of the present invention provides a UPQC topology structure, wherein the UPQC is connected between a power grid and a load, and includes:

[0006] Series side unit, DC capacitor and parallel side unit;

[0007] The series side unit comprises a series transformer, a series coupling capacitor, a first filter and a series converter which are sequentially connected in series;

[0008] The parallel side unit comprises a parallel converter, a second filter and a parallel transformer connected in series in sequence;

[0009] The series converter, the DC capacitor and the parallel converter are connected in parallel with each other;

[0010] The first filter comprises a first inductor and a first capacitor connected in series, and the second filter comprises a second inductor;

[0011] The series converter includes four insulated gate bipolar transistors, namely a first transistor, a second transistor, a third transistor and a fourth transistor; wherein the first transistor and the third transistor are connected in series, the second transistor and the fourth transistor are connected in series, and the first transistor and the third transistor connected in series are connected in parallel with the second transistor and the fourth transistor connected in series;

[0012] The parallel converter includes four insulated gate bipolar transistors, namely a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor; wherein the fifth transistor and the seventh transistor are connected in series, the sixth transistor and the eighth transistor are connected in series, and the fifth transistor and the seventh transistor connected in series are connected in parallel with the sixth transistor and the eighth transistor connected in series.

[0013] Further, the collector of the first transistor and the collector of the second transistor are connected and connected together to the positive electrode of the DC capacitor, the emitter of the first transistor and the collector of the third transistor are connected and connected together to the positive electrode of the first inductor, the emitter of the second transistor and the collector of the fourth transistor are connected and connected together to the negative electrode of the first capacitor, and the emitter of the third transistor and the emitter of the fourth transistor are connected and connected together to the negative electrode of the DC capacitor.

[0014] Furthermore, the negative electrode of the first inductor is connected to the series coupling capacitor and connected together to one end of the primary side of the series transformer, the negative electrode of the first capacitor is connected to the other end of the primary side of the series transformer, and the secondary side of the series transformer is connected in series to the power grid.

[0015] Further, the collector of the fifth transistor and the collector of the sixth transistor are connected and connected together to the positive electrode of the DC capacitor, the emitter of the fifth transistor and the collector of the seventh transistor are connected and connected together to the positive electrode of the second inductor, the negative electrode of the second inductor is connected to one end of the primary side of the parallel transformer, the emitter of the sixth transistor and the collector of the eighth transistor are connected and connected together to the other end of the primary side of the parallel transformer, and the emitter of the seventh transistor and the emitter of the eighth transistor are connected and connected together to the negative electrode of the DC capacitor.

[0016] Furthermore, one end of the secondary side of the parallel transformer is connected to the power grid, and the other end of the secondary side of the parallel transformer is grounded.

[0017] In a second aspect, an embodiment of the present invention provides a serial-parallel side coordinated control method of a UPQC topology structure, the method being applied to the above-mentioned UPQC topology structure, comprising:

[0018] Determining the grid operating condition according to the voltage value of the grid, wherein the grid operating condition includes a normal voltage operating condition and a voltage drop operating condition;

[0019] If the grid operating condition is the normal voltage condition, the series side unit of the UPQC is controlled to operate in a reactive power control mode, and the load reactive power is compensated by the series side unit and the parallel side unit to maintain the grid operating at a unity power factor;

[0020] If the grid operating condition is the voltage drop condition, the series side unit is controlled to operate in a voltage compensation mode, voltage compensation is performed by the series side unit to keep the load voltage unchanged, and the load reactive power is jointly compensated by the series side unit and the parallel side unit.

[0021] Furthermore, if the grid operating condition is the normal voltage operating condition, the step of controlling the series side unit of the UPQC to operate in the reactive power control mode includes:

[0022] The phase of the series coupling capacitor voltage is set perpendicular to the phase of the grid voltage, and the phase of the series converter output voltage is set in anti-phase to the phase of the grid voltage;

[0023] A preset first series side compensation voltage is injected through the series transformer, so that the compensated load voltage leads the grid voltage by a phase angle difference, and the current output by the parallel transformer is used as the first parallel side compensation current;

[0024] The reactive power output by the series coupling capacitor is used as the first series side compensation power, and the reactive power output by the parallel converter is used as the first parallel side compensation power. The first series side compensation power and the first parallel side compensation power jointly compensate for the load reactive power.

[0025] Further, according to the vector principle of the voltage normal working condition, the first series side compensation voltage and the first parallel side compensation current are calculated;

[0026] The amplitude and phase angle of the first series side compensation voltage are calculated using the following formulas:

[0027]

[0028]

[0029] In the formula, is the load voltage after compensation, is the phase angle of the load voltage after compensation;

[0030] The amplitude and phase angle of the first parallel side compensation current are calculated using the following formulas:

[0031]

[0032]

[0033] In the formula, is the load current after compensation, is the load power factor angle.

[0034] Furthermore, if the grid operating condition is the voltage drop condition, the step of controlling the series side unit to operate in the voltage compensation mode includes:

[0035] The phase of the series coupling capacitor voltage is set perpendicularly to the phase of the grid voltage after the drop, and the phase of the series converter output voltage is set in phase with the phase of the series coupling capacitor voltage;

[0036] A preset second series side compensation voltage is injected through the series transformer, so that the compensated load voltage leads the grid voltage after the drop by a phase angle difference, and the current output by the parallel transformer is used as the second parallel side compensation current;

[0037] The reactive power output by the series coupling capacitor and the reactive power output by the series converter are used as the second series side compensation power, and the reactive power output by the parallel converter is used as the second parallel side compensation power. The second series side compensation power and the second parallel side compensation power jointly compensate for the load reactive power.

[0038] Further, according to the vector principle of the voltage drop working condition, the second series side compensation voltage and the second parallel side compensation current are calculated;

[0039] The amplitude and phase angle of the second series side compensation voltage are calculated using the following formulas:

[0040]

[0041]

[0042] In the formula, is the load voltage after compensation, is the phase angle of the load voltage after compensation;

[0043] The amplitude and phase angle of the second parallel side compensation current are calculated using the following formulas:

[0044]

[0045]

[0046] In the formula, is the load current after compensation, is the load power factor angle, is the grid voltage drop coefficient.

[0047] The present invention provides a UPQC topology structure and a series-parallel side coordinated control method thereof. Compared with the prior art, the UPQC provided by the present invention can not only improve the utilization rate of the series side device, but also use the series side converter to reduce the rated capacity of the parallel side converter, thereby the overall active capacity is smaller than that of the traditional UPQC device and the utilization rate of the device is higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 is a schematic diagram of the UPQC topology structure in an embodiment of the present invention;

[0049] Figure 2 It is a flow chart of a method for coordinated control of the series-parallel side of a UPQC topology structure in an embodiment of the present invention;

[0050] Figure 3 It is a vector schematic diagram under normal working conditions of the grid voltage;

[0051] Figure 4 It is the power flow diagram under normal grid voltage conditions;

[0052] Figure 5 It is a vector principle diagram under the condition of grid voltage drop;

[0053] Figure 6 It is the power flow diagram under the grid voltage drop condition;

[0054] Figure 7 are simulation waveforms of the grid voltage and the load voltage in the simulation experiment of the embodiment of the present invention;

[0055] Figure 8 are simulated waveforms of grid voltage and grid current in a simulation experiment of an embodiment of the present invention;

[0056] Fig. 9 is a simulation waveform of a load current and a parallel-side output current in a simulation experiment of an embodiment of the present invention;

[0057] Fig.10 is a simulation waveform of the series side compensation voltage and the series converter output voltage in the simulation experiment of the embodiment of the present invention;

[0058] Fig.11 is a system active power simulation waveform in a simulation experiment of an embodiment of the present invention;

[0059] Fig.12 It is the system reactive power simulation waveform in the simulation experiment of the embodiment of the present invention. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0061] See also Figure 1 The first embodiment of the present invention proposes a UPQC topology structure, the UPQC topology structure 1 includes a series side unit, a DC capacitor C dc and a parallel side unit, wherein the series side unit includes a series transformer T1, a series coupling capacitor C connected in series in sequence S , a first filter and a series converter 11, the parallel side unit includes a parallel converter 12, a second filter L2 and a parallel transformer T2 connected in series in sequence, the series converter 11, a DC capacitor C dc The first filter is connected in parallel with the parallel converter 12. In the present invention, the first filter is an LC filter, that is, it includes a first capacitor C1 and a first inductor L1, and the second filter is an L filter, that is, it only includes a second inductor L2.

[0062] In order to better explain the topological structure of UPQC, the current, voltage and other parameter values ​​generated by each device are explained below. Figure 1 Middle,U S Indicates the grid voltage, U L Indicates the load voltage, U SC Indicates the series side compensation voltage, U CS Represents the series coupling capacitor voltage, U conv Indicates the output voltage of the series converter, U dc Indicates the DC side voltage, I s Represents the grid current, I pc Indicates the parallel side compensation current, I L Indicates the load current.

[0063] The series converter 11 and the parallel converter 12 in the present invention have the same structure, both of which are composed of four insulated gate bipolar transistors IGBT, that is, the series converter 11 includes four IGBTs from S1 to S4, and the parallel converter 12 includes four IGBTs from S5 to S8.

[0064] The specific connection mode of the series converter 11 is as follows: the collector of the first transistor S1 is connected to the collector of the second transistor S2 and connected to the DC capacitor C dc The positive electrode of the first transistor S1 is connected to the collector of the third transistor S3 and connected to the positive electrode of the first inductor L1; the emitter of the second transistor S2 is connected to the collector of the fourth transistor S4 and connected to the negative electrode of the first capacitor C1, that is, one end of the primary side of the series transformer T1; the emitter of the third transistor S3 is connected to the emitter of the fourth transistor S4 and connected to the DC capacitor C dc The negative electrode of the first inductor L1 (i.e. the positive electrode of the first capacitor C1) and the series coupling capacitor C S After being connected in series, it is connected to the other end of the primary side of the series transformer T1, and the secondary side of the series transformer T1 is connected in series to the power grid.

[0065] The specific connection mode of the parallel converter 12 is as follows: the collector of the fifth transistor S5 and the collector of the sixth transistor S6 are connected and connected to the DC capacitor C dc The positive electrode of the fifth transistor S5 is connected to the collector of the seventh transistor S7 and is connected to the positive electrode of the second inductor L2. The negative electrode of the second inductor L2 is connected to one end of the primary side of the parallel transformer T2. The emitter of the sixth transistor S6 is connected to the collector of the eighth transistor S8 and is connected to the other end of the primary side of the parallel transformer T2. The emitter of the seventh transistor S7 is connected to the emitter of the eighth transistor S8 and is connected to the DC capacitor C. dc The negative pole of the parallel transformer T2 is connected to the grid at one end of the secondary side, and the other end of the parallel transformer T2 is grounded. Figure 2 , the working model of the UPQC topology structure of the present invention is described in detail.

[0066] See also Figure 2 Based on the same inventive concept, a second embodiment of the present invention provides a series-parallel side coordinated control method of a UPQC topology structure, including steps S10 to S30:

[0067] Step S10, judging the grid operating condition according to the voltage value of the grid, wherein the grid operating condition includes a normal voltage condition and a voltage drop condition.

[0068] Step S20: If the grid operating condition is the normal voltage condition, the series side unit of the UPQC is controlled to operate in a reactive power control mode, and the load reactive power is compensated by the series side unit and the parallel side unit to maintain the grid operating at unity power factor.

[0069] Step S30, if the grid operating condition is the voltage drop condition, control the series side unit to operate in a voltage compensation mode, perform voltage compensation through the series side unit to keep the load voltage unchanged, and jointly compensate for the load reactive power through the series side unit and the parallel side unit.

[0070] Generally speaking, the UPQC of the present invention has two main working modes according to different grid conditions. When the grid voltage is normal, the UPQC works in the reactive power control mode, and the series-parallel side jointly compensates the load reactive power to maintain the grid side unit power factor operation. When the grid voltage fluctuates, the UPQC works in the voltage compensation mode. In this mode, the series side will supplement the load voltage to maintain the load voltage unchanged, and the series-parallel side jointly supplements the load reactive power to maintain the grid side unit power factor operation. Figure 1 The topology of the UPQC is described in detail under different grid conditions:

[0071] ① Grid voltage normal condition

[0072] In order to improve the utilization rate of the series converter 11 and reduce the rated capacity of the parallel converter 12, under this condition, the series side of the UPQC is set to work in the reactive power control mode. Figure 3 The vector diagram shows that a compensation voltage U with appropriate amplitude and phase angle is injected into the series side of UPQC through the series transformer T1. sc , while ensuring the load voltage U L Under the premise that the amplitude remains unchanged, the load voltage after compensation Leading grid voltage U s A phase difference , by controlling the phase angle difference That is, the phase angle of the load voltage after compensation. The UPQC system can adjust the reactive power Q injected on the series side. SC The size of the UPQC is controlled by the string and parallel sides to jointly complete the reactive power compensation of the load, thereby achieving the effect of reducing the active capacity of the UPQC.

[0073] In order to fully utilize the series capacitor C S The reactive power compensation capability and the power transmission of the series converter 11 can be reduced by CS The phase relationship with the grid voltage U S The phase is set vertically, and the output voltage U conv The phase relationship with the grid voltage U S The phase is set oppositely, that is, the reactive power Q output by the series converter is conv is 0, according to Figure 3The amplitude and phase angle of the series side compensation voltage under this condition can be calculated:

[0074]

[0075]

[0076] In the formula, is the load voltage after compensation, is the phase angle of the load voltage after compensation;

[0077] Since the series capacitor C S It can withstand most of the compensation voltage, so the output voltage amplitude of the series converter is U conv Much smaller than the series side compensation voltage U SC ,Right now:

[0078]

[0079] Similarly, according to Figure 3 The current vector part in the parallel side can be calculated PC The magnitude and phase angle of:

[0080]

[0081]

[0082] In the formula, is the load current after compensation, is the load power factor angle.

[0083] The system power flow diagram under this condition is as follows: Figure 4 As shown, the reactive power Q of the series side compensation SC The series capacitor C S Provide, that is, Q SC =Q CS The remaining reactive power of the load is provided by the parallel side, i.e. Q PC =Q L -Q CS However, due to the series converter output voltage U conv with I S In the reverse direction, the series converter will absorb a small amount of active power P SC , and the active component will be output through the parallel side, that is, P PC =P SC That is to say, under normal grid voltage conditions, the series and parallel sides of the UPQC jointly compensate for the load reactive power to maintain the grid operating at unity power factor.

[0084] ②Grid voltage drop condition

[0085] When the grid voltage drops, the series side of UPQC works in voltage compensation mode, using a pure reactive power compensation strategy to reduce the series coupling capacitor voltage U CS The phase and grid voltage after the drop The phase is set vertically, and the output voltage U conv The phase of the series coupling capacitor voltage U CS For the phase in-phase setting, see Figure 5 The vector diagram shown is the same as the normal working condition of the grid voltage. A compensation voltage U with appropriate amplitude and phase angle is injected into the series side of UPQC through the series transformer T1. sc , while ensuring the load voltage U L Under the premise that the amplitude remains unchanged, the load voltage after compensation Grid voltage after leading drop A phase difference , you can see the grid voltage after the drop Less than the compensated load voltage , that is, the vector radius is different, and the missing voltage is compensated by the series side in this mode, so that the load voltage remains unchanged. In this working mode, not only can the active power injection be minimized, but also the active power exchange on the series-parallel side of the system can be reduced.

[0086] according to Figure 5 It can be calculated that the amplitude and phase angle of the series side compensation voltage in this working mode are:

[0087]

[0088]

[0089] In the formula, is the load voltage after compensation, is the phase angle of the compensated load voltage, where:

[0090]

[0091] and:

[0092]

[0093]

[0094] In the formula, is the grid voltage drop coefficient.

[0095] Similarly, according to Figure 5 The amplitude and phase angle of the parallel side compensation current can also be calculated:

[0096]

[0097]

[0098] See also Figure 6 As shown in the system power flow diagram, the load reactive compensation task is undertaken by the series and parallel sides of the system. The reactive power output of the series and parallel sides is Q SC and Q PC Among them, Q SC A large part of the series coupling capacitor C S Provided, the rest is output by the series converter.

[0099] It can be seen that under normal grid voltage conditions, the UPQC provided by the present invention can use the series side to compensate for the reactive power of part of the load according to the series-parallel side coordinated control strategy, effectively reducing the capacity of the parallel converter, and under grid voltage drop conditions, the series coupling capacitor can be used to greatly reduce the output voltage amplitude of the series converter, thereby reducing the capacity of the series converter. Therefore, compared with the traditional UPQC device, the UPQC topology structure and its coordinated control method provided by the present invention have a smaller overall active capacity and a higher utilization rate of the device.

[0100] In order to better demonstrate the effectiveness of the collaborative control method provided by the present invention, a simulation example is used for verification. First, a simulation platform is built in MATLAB / Simulink, and the simulation parameters are shown in Table 1 below.

[0101]

[0102] Table 1 Simulation parameters

[0103] like Figure 7 , 8 As shown in the figure, it is assumed that the grid voltage drops by 20% during the period of 0.35-0.45s, and the grid operates normally during the rest of the time. During the period of 0.3-0.35s and 0.45-0.5s, UPQC works in the power regulation mode, U L and U S The amplitude is the same, the phase difference is 30.67°; and the grid voltage U S With the grid current I S Always keep the same phase. Fig. 9 As shown, since the series side compensates for part of the load reactive power, the parallel side output current I PC From 20.2A to 10.29A. Fig.10 As shown, although the series side compensation voltage U SC Very large (164.5V), but the series converter output voltage U conv Very small (49.7V).

[0104] Similarly, if Figure 7 , 8 As shown, during the period of 0.35s-0.45s, UPQC works in voltage compensation mode, U L and U S The amplitude is the same, the phase difference is 36.87°; and the grid voltage U S With the grid current I S Always keep the same phase. Fig. 9 I PC It can be seen that due to I S The increase in amplitude leads to an increase in the reactive power output by the coupling capacitor, and the reactive current required to be provided by the parallel part is reduced to a smaller value (5.4A). Fig.10 As shown, although U SC Very large (186.4V), but due to the existence of coupling capacitors, most of the compensation voltage is shared, U conv The amplitude of remains at a small value (28.3V). Fig.11 and Fig.12 It can also be clearly seen that P S Equal to P L , Q L Equal to Q SC and Q PC The sum of , that is, verifies the reactive power compensation capability of UPQC and the effectiveness of the coordination between the series side and the parallel side.

[0105] In summary, an embodiment of the present invention provides a UPQC topology structure and a series-parallel side coordinated control method thereof, including: a series side unit, a DC capacitor and a parallel side unit; the series side unit includes a series transformer, a series coupling capacitor, a first filter and a series converter connected in series in sequence; the parallel side unit includes a parallel converter, a second filter and a parallel transformer connected in series in sequence; the series converter, the DC capacitor and the parallel converter are connected in parallel with each other; the first filter includes a first inductor and a first capacitor connected in series, and the second filter includes a second inductor; the series converter includes four insulated gate bipolar transistors, which are a first transistor, a second transistor, a third transistor and a fourth transistor. Transistor; wherein the first transistor and the third transistor are connected in series, the second transistor and the fourth transistor are connected in series, and the first transistor and the third transistor connected in series are connected in parallel with the second transistor and the fourth transistor connected in series; the parallel converter includes four insulated gate bipolar transistors, namely the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor; wherein the fifth transistor and the seventh transistor are connected in series, the sixth transistor and the eighth transistor are connected in series, and the fifth transistor and the seventh transistor connected in series are connected in parallel with the sixth transistor and the eighth transistor connected in series. The present invention can effectively improve the utilization rate of the series side device, and can use the series side converter to reduce the rated capacity of the parallel side converter, further reducing the active capacity of the UPQC device.

[0106] Each embodiment in this specification is described in a progressive manner, and the same or similar parts of each embodiment can be directly referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. It should be noted that the technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0107] The above-mentioned embodiments only express several preferred implementation modes of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in the technical field, several improvements and substitutions can be made without departing from the technical principles of the present invention, and these improvements and substitutions should also be regarded as the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be based on the protection scope of the claims.

Claims

1. A series-parallel side coordinated control method of a UPQC topology structure, wherein the UPQC is connected between a power grid and a load, characterized in that: The UPQC topology includes: Series side unit, DC capacitor and parallel side unit; The series side unit comprises a series transformer, a series coupling capacitor, a first filter and a series converter which are sequentially connected in series; The parallel side unit comprises a parallel converter, a second filter and a parallel transformer connected in series in sequence; The series converter, the DC capacitor and the parallel converter are connected in parallel with each other; The first filter comprises a first inductor and a first capacitor connected in series, and the second filter comprises a second inductor; The series converter includes four insulated gate bipolar transistors, namely a first transistor, a second transistor, a third transistor and a fourth transistor; wherein the first transistor and the third transistor are connected in series, the second transistor and the fourth transistor are connected in series, and the first transistor and the third transistor connected in series are connected in parallel with the second transistor and the fourth transistor connected in series; The parallel converter includes four insulated gate bipolar transistors, namely a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor; wherein the fifth transistor and the seventh transistor are connected in series, the sixth transistor and the eighth transistor are connected in series, and the fifth transistor and the seventh transistor connected in series are connected in parallel with the sixth transistor and the eighth transistor connected in series; The series-parallel side coordinated control method comprises: Determining the grid operating condition according to the voltage value of the grid, wherein the grid operating condition includes a normal voltage operating condition and a voltage drop operating condition; If the grid operating condition is the normal voltage condition, the series side unit of the UPQC is controlled to operate in a reactive power control mode, and the load reactive power is compensated by the series side unit and the parallel side unit to maintain the grid operating at a unity power factor; If the grid operating condition is the voltage drop condition, the series side unit is controlled to operate in a voltage compensation mode, voltage compensation is performed by the series side unit so that the load voltage remains unchanged, and the load reactive power is compensated jointly by the series side unit and the parallel side unit; If the grid operating condition is the normal voltage operating condition, the step of controlling the series side unit of the UPQC to operate in the reactive power control mode includes: The phase of the series coupling capacitor voltage is set perpendicular to the phase of the grid voltage, and the phase of the series converter output voltage is set in anti-phase to the phase of the grid voltage; A preset first series side compensation voltage is injected through the series transformer, so that the compensated load voltage leads the grid voltage by a phase angle difference, and the current output by the parallel transformer is used as the first parallel side compensation current; The reactive power output by the series coupling capacitor is used as the first series side compensation power, and the reactive power output by the parallel converter is used as the first parallel side compensation power. The first series side compensation power and the first parallel side compensation power jointly compensate for the load reactive power.

2. According to the series-parallel side collaborative control method of the UPQC topology structure according to claim 1, the collector of the first transistor and the collector of the second transistor are connected and connected together to the positive electrode of the DC capacitor, the emitter of the first transistor and the collector of the third transistor are connected and connected together to the positive electrode of the first inductor, the emitter of the second transistor and the collector of the fourth transistor are connected and connected together to the negative electrode of the first capacitor, and the emitter of the third transistor and the emitter of the fourth transistor are connected and connected together to the negative electrode of the DC capacitor.

3. The series-parallel side collaborative control method of the UPQC topology structure according to claim 2 is characterized in that the negative electrode of the first inductor is connected to the series coupling capacitor and connected together to one end of the primary side of the series transformer, the negative electrode of the first capacitor is connected to the other end of the primary side of the series transformer, and the secondary side of the series transformer is connected in series to the power grid.

4. The series-parallel side collaborative control method of the UPQC topology structure according to claim 1 is characterized in that the collector of the fifth transistor and the collector of the sixth transistor are connected and connected together to the positive electrode of the DC capacitor, the emitter of the fifth transistor and the collector of the seventh transistor are connected and connected together to the positive electrode of the second inductor, the negative electrode of the second inductor is connected to one end of the primary side of the parallel transformer, the emitter of the sixth transistor and the collector of the eighth transistor are connected and connected together to the other end of the primary side of the parallel transformer, and the emitter of the seventh transistor and the emitter of the eighth transistor are connected and connected together to the negative electrode of the DC capacitor.

5. The serial-parallel side coordinated control method of the UPQC topology structure according to claim 4, characterized in that: One end of the secondary side of the parallel transformer is connected to the power grid, and the other end of the secondary side of the parallel transformer is grounded.

6. The serial-parallel side coordinated control method of the UPQC topology structure according to claim 1, characterized in that: According to the vector principle of the voltage normal working condition, the first series side compensation voltage and the first parallel side compensation current are calculated; The amplitude and phase angle of the first series side compensation voltage are calculated using the following formulas: In the formula, is the load voltage after compensation, is the phase angle of the load voltage after compensation; The amplitude and phase angle of the first parallel side compensation current are calculated using the following formulas: In the formula, is the load current after compensation, is the load power factor angle.

7. The serial-parallel side coordinated control method of the UPQC topology structure according to claim 1, characterized in that: If the grid operating condition is the voltage drop condition, the step of controlling the series side unit to operate in the voltage compensation mode includes: The phase of the series coupling capacitor voltage is set perpendicularly to the phase of the grid voltage after the drop, and the phase of the series converter output voltage is set in phase with the phase of the series coupling capacitor voltage; A preset second series side compensation voltage is injected through the series transformer, so that the compensated load voltage leads the grid voltage after the drop by a phase angle difference, and the current output by the parallel transformer is used as the second parallel side compensation current; The reactive power output by the series coupling capacitor and the reactive power output by the series converter are used as the second series side compensation power, and the reactive power output by the parallel converter is used as the second parallel side compensation power. The second series side compensation power and the second parallel side compensation power jointly compensate for the load reactive power.

8. The serial-parallel side coordinated control method of the UPQC topology structure according to claim 7, characterized in that: According to the vector principle of the voltage drop working condition, the second series side compensation voltage and the second parallel side compensation current are calculated; The amplitude and phase angle of the second series side compensation voltage are calculated using the following formulas: In the formula, is the load voltage after compensation, is the phase angle of the load voltage after compensation; The amplitude and phase angle of the second parallel side compensation current are calculated using the following formulas: In the formula, is the load current after compensation, is the load power factor angle, is the grid voltage drop coefficient.

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