Pulse power supply device

Abstract

The pulse power supply device (100) includes pulse power supplies (P1 to Pn) that respectively output unipolar pulse voltages and transformers (Tr1 to Trn). The transformers (Tr1 to Trn) each have a primary winding (La1 to Lan), a secondary winding (T1 to Tn), and a tertiary winding (T1s to Tns). One pulse power supply is connected to one primary winding one by one. The secondary windings (T1 to Tn) are connected in series in sequence, and a load (8) is connected to both ends of the secondary windings (T1 to Tn). The tertiary windings (T1s to Tns) are connected in series in sequence, and a magnetic reset circuit (4) is connected to both ends of the tertiary windings (T1s to Tns). The magnetic reset circuit (4) includes a magnetic reset power supply (E1) and an impedance change circuit (U1) for restricting the induced current that can flow due to the voltage induced in the tertiary windings (T1s to Tns). The impedance change circuit (U1) is configured to be able to change the impedance.

Description

Technical Field

[0001] The present disclosure relates to a pulse power supply device that generates a unipolar high-voltage pulse by overlapping voltages through the operation of a plurality of switching elements. Background Art

[0002] Pulse power supply devices that generate high-voltage pulses are used in sterilization devices, water treatment devices, laser oscillators, exhaust gas purification devices, ozone generators, extreme ultraviolet light (EUV) light sources, etc. that utilize pulsed arc discharge. These devices require extremely high pulsed power instantaneously. Therefore, it is required that the pulse power supply device used in these devices releases the electrical energy released in a pulsed manner, that is, the pulse power, in an extremely short time.

[0003] Conventionally, a gas discharge switch has been used in such a pulse power supply device. However, regarding the gas discharge switch, there are problems such as a short discharge duration and low stability. In recent years, semiconductor switching elements have been used, and by overlapping the induced voltages generated by the semiconductor switching elements through a transformer, it has become possible to generate a unipolar and short pulse width high-voltage pulse.

[0004] In the case of repeatedly outputting a unipolar high-voltage pulse, residual magnetism due to magnetic saturation remains in the magnetic body of the transformer that overlaps the induced voltages. When this residual magnetism is large, there is a problem that the change in magnetic flux in the transformer is small, the overlapping amount of the induced voltages is small, and it is difficult to generate a high-voltage pulse.

[0005] Against such a technical background, the following structure is disclosed in Patent Document 1 below: In order to reduce the magnetic saturation of a saturable reactor, a magnetic reset circuit is provided that supplies a reset current to the reset winding of the saturable reactor to reverse-excite the iron core of the saturable reactor.

[0006] Prior Art Documents

[0007] Patent Documents

[0008] Patent Document 1: Japanese Patent Laid-Open No. 9-83052 Summary of the Invention

[0009] In the magnetic reset circuit, a power supply for flowing the reset current and a suppression coil for suppressing an excessive current generated by the induced voltage are required. In order not to allow an excessive current generated by the induced voltage to flow through the power supply, it is necessary to increase the inductance value of the suppression coil. However, when the inductance value of the suppression coil is large, there is a problem that it affects the output impedance of the power supply unit in the pulse power supply device and it is difficult to obtain an output voltage with a desired pulse width.

[0010] The present disclosure has been made in view of the above, and an object thereof is to obtain a pulse power supply device capable of suppressing the influence of the output impedance of a power supply unit and obtaining an output voltage with a desired pulse width.

[0011] To solve the above problems and achieve the object, the pulse power supply device of the present disclosure includes a plurality of pulse power supplies that respectively output unipolar pulse voltages and a plurality of transformers. Each of the plurality of transformers has a primary winding, a secondary winding, and a tertiary winding, and one pulse power supply is connected to one primary winding one by one. The plurality of secondary windings are connected in series in sequence, and both ends of the plurality of secondary windings connected in series constitute output terminals. A load is connected to the output terminals to form a first closed circuit. The plurality of tertiary windings are connected in series in sequence, and both ends of the plurality of tertiary windings connected in series constitute voltage application terminals. A magnetic reset circuit is connected to the voltage application terminals, and the second closed circuit is constituted by the plurality of tertiary windings and the magnetic reset circuit. The magnetic reset circuit includes a magnetic reset power supply that serves as a power supply for allowing a reset current to flow through the tertiary winding and an impedance change circuit. The impedance change circuit is configured to be able to change the impedance for restricting the induced current that can flow in the second closed circuit due to the voltage induced in the tertiary winding.

[0012] According to the pulse power supply device of the present disclosure, there is an effect that it is possible to suppress the influence of the output impedance of the power supply unit and obtain an output voltage with a desired pulse width. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a diagram showing a structural example of the pulse power supply device of Embodiment 1.

[0014] Figure 2 It is a diagram showing a structural example of the pulse power supply in Embodiment 1.

[0015] Figure 3 It is a diagram showing a structural example for explaining the operation of the pulse power supply device of Embodiment 1.

[0016] Figure 4 It is shown in Figure 3 It is a diagram showing a first example of the induced overlapping voltage generated in the pulse power supply device shown.

[0017] Figure 5 It is shown in Figure 3 It is a diagram showing a second example of the induced overlapping voltage generated in the pulse power supply device shown.

[0018] Figure 6 It is a diagram showing a structural example of the magnetic reset circuit of Embodiment 1.

[0019] Figure 7 It is a diagram for explaining the influence of the inductance value of the impedance change circuit of Embodiment 1 on the output impedance of the power supply unit in the pulse power supply device.

[0020] Figure 8 It is a diagram showing a structural example of the control unit of Embodiment 1.

[0021] Figure 9 It is a flowchart for explaining the operation of the control unit of Embodiment 1.

[0022] Figure 10 It is a diagram showing an example of the operation conditions when the pulse power supply device of Embodiment 1 is operating.

[0023] Figure 11 It is a diagram showing a structural example of the control unit of a modified example of Embodiment 1.

[0024] Figure 12 It is a flowchart for explaining the operation of the control unit of a modified example of Embodiment 1.

[0025] Figure 13 It is a diagram showing a structural example of the magnetic reset circuit of Embodiment 2.

[0026] Figure 14 It is a diagram showing a structural example of the magnetic reset circuit of Embodiment 3.

[0027] (Description of reference numerals)

[0028] 1, 1a: Control unit; 2: Power supply unit; 3: Transformer group; 3a, 3b: Output terminals; 3c, 3d: Voltage application terminals; 3e: Magnetic core; 4, 4A, 4B: Magnetic reset circuit; 5: First closed circuit; 6: Second closed circuit; 7: Drive circuit; 8: Load; 11: Operation condition generation unit; 12: Instruction signal generation unit; 13: Instruction signal data set; 14: Instruction signal data set generation unit; 15: Instruction signal candidate generation unit; 16: Determination unit; 17: Instruction signal output unit; 100: Pulse power supply device; C11~C1j, UCa, UCB: Capacitors; DC1: DC power supply; E1: Magnetic reset power supply; H1~Hk, S11~S1j: Switching elements; L1, L2: Inductance values; La1~Lan, Trb1: Primary windings; P1~Pn: Pulse power supplies; T1~Tn, Trb2: Secondary windings; T1s~Tns: Tertiary windings; Tr1~Trn: Transformers; Trb: Impedance transformation transformer; U1, U1A, U1B: Impedance change circuits; UL1~ULk, ULa, ULb: Suppression coils. Detailed implementation manners

[0029] Hereinafter, with reference to the accompanying drawings, the pulse power supply device according to the embodiments of the present disclosure will be described in detail.

[0030] Embodiment 1.

[0031] Figure 1 This is a diagram showing a structural example of the pulse power supply device according to Embodiment 1. As Figure 1 shown, the pulse power supply device 100 according to Embodiment 1 includes a control unit 1, a power supply unit 2, a transformer group 3, and a magnetic reset circuit 4. The power supply unit 2 has a plurality of pulse power supplies P1, P2, …, Pn that respectively output unipolar pulse voltages. N represents an integer of 2 or more. The transformer group 3 has n transformers, that is, the same number of transformers Tr1, Tr2, …, Trn as the pulse power supplies P1 to Pn. The plurality of transformers Tr1 to Trn each have a primary winding La1, La2, …, Lan, a secondary winding T1, T2, …, Tn, a tertiary winding T1s, T2s, …, Tns, and a magnetic core 3e. The primary windings La1 to Lan, the secondary windings T1 to Tn, and the tertiary windings T1s to Tns are magnetically coupled to each other via the magnetic core 3e.

[0032] The pulse power supply P1 is connected to the primary winding La1, the pulse power supply P2 is connected to the primary winding La2, and the pulse power supply Pn is connected to the primary winding Lan. That is, one pulse power supply is connected to one primary winding one by one.

[0033] The secondary windings T1 to Tn are connected in series in sequence, and both ends of the serially connected secondary windings T1 and Tn constitute output terminals 3a and 3b. A load 8 is connected to the output terminals 3a and 3b, and the first closed circuit 5 is constituted by the secondary windings T1 to Tn and the load 8. Examples of the load 8 are the aforementioned sterilization device, water treatment device, laser oscillator, exhaust gas purification device, ozone generator, EUV light source, etc.

[0034] The tertiary windings T1s to Tns are connected in series in sequence, and both ends of the serially connected tertiary windings T1s and Tns constitute voltage application terminals 3c and 3d. The magnetic reset circuit 4 is connected to the voltage application terminals 3c and 3d, and the second closed circuit 6 is constituted by the tertiary windings T1s to Tns and the magnetic reset circuit 4.

[0035] Figure 2 This is a diagram showing a structural example of the pulse power supply according to Embodiment 1. In Figure 2 it is representatively shown Figure 1 the structure of the pulse power supply P1 among the pulse power supplies P1 to Pn shown in

[0036] The pulse power supply P1 includes a plurality of switching elements S11, S12, …, S1j, a plurality of capacitors C11, C12, …, C1j, a DC power supply DC1, and a drive circuit 7. j represents an integer of 2 or more. The plurality of capacitors C11 to C1j are connected in parallel with each other and are respectively connected in series with each of the switching elements S11 to S1j. The drive circuit 7 drives the switching elements S11, S12, …, S1j to be conductive or non-conductive. The operation of the drive circuit 7 is controlled by the control unit 1. The DC power supply DC1 applies a DC voltage across each of the capacitors C11 to C1j to charge each of the capacitors C11 to C1j. Additionally, in Figure 2 it is shown that the DC power supply DC1 and each of the capacitors C11 to C1j are always connected, but the DC power supply DC1 and each of the capacitors C11 to C1j are connected each time they are charged and are electrically disconnected otherwise. However, in the case where each of the capacitors C11 to C1j has its own DC power supply, they may also be always connected.

[0037] As described above, the pulse power supply P1 includes a plurality of series circuits each formed by connecting one switching element and one capacitor in series, and the plurality of series circuits are connected in parallel with each other to form a series-parallel circuit. According to this structure, by making at least one of the switching elements S11 to S1j conductive, the charge of the capacitor connected to the conductive switching element is released. As a result, a unipolar pulse voltage is output from both ends of the series-parallel circuit and is applied to the primary winding La1 of the transformer Tr1. Additionally, the pulse power supplies P2 to Pn are also configured in the same manner as the pulse power supply P1. Since the content is repetitive, detailed description is omitted.

[0038] In order to obtain a pulse voltage with a desired pulse width, it is preferable to select switching elements S11 to S1j that are fast and have high voltage withstand. In addition, in order not to apply a voltage exceeding the voltage withstand to the switching elements S11 to S1j, the voltage value of the DC power supply DC1 in the pulse power supplies P1 to Pn is selected.

[0039] In the pulse power supply device 100, the pulse voltages output by the n pulse power supplies P1 to Pn are inductively overlapped in the n transformers Tr1 to Trn. As a result, a high-voltage pulse output is obtained on the secondary side of the transformers Tr1 to Trn. For example, if the charging voltages of the pulse power supplies P1 to Pn are 1 [kV], the inductively overlapped voltage becomes 1 × n [kV]. Hereinafter, the inductively overlapped voltage will be referred to as the "inductive overlap voltage".

[0040] Figure 3 It is a diagram showing a structural example for explaining the operation of the pulse power supply device according to Embodiment 1. Figure 3 is Figure 1A structural example in the case where the number of transformers in the structure is 2 shows two pulse power supplies P1 and P2 in accordance with the number of transformers.

[0041] Figure 4 is a diagram showing a first example of the induced overlapping voltage generated in the Figure 3 shown pulse power supply device. Figure 5 is a diagram showing a second example of the induced overlapping voltage generated in the Figure 3 shown pulse power supply device. In Figure 4 and Figure 5 , the T1 output voltage output from the secondary winding T1 of the transformer Tr1 is shown in the upper part on the left side, and the T2 output voltage output from the secondary winding T2 of the transformer Tr2 is shown in the lower part on the left side. In addition, in Figure 4 and Figure 5 , the induced overlapping voltage induced by the secondary windings T1 and T2 is shown on the right side. The horizontal axis of each diagram represents time.

[0042] As Figure 4 shown, if the amplitude values and pulse widths of the pulse voltages output from the secondary windings T1 and T2 are the same, a pulse voltage twice as large is obtained as the output voltage. On the other hand, even if the amplitude values of the pulse voltages output from the secondary windings T1 and T2 are the same, as Figure 5 shown, when the pulse widths of the pulse voltages are different, a stepped pulse voltage is obtained as the output voltage. In addition, Figure 4 and Figure 5 show an example of changing the waveform of the pulse voltage by only changing the pulse width, but it is also possible to change the number of operating transformers, the timing of pulse voltage output, etc. Thus, various pulse voltage waveforms can be formed.

[0043] Figure 6 is a diagram showing a structural example of the magnetic reset circuit of Embodiment 1. The magnetic reset circuit 4 is a circuit portion for preventing the magnetic cores 3e of the transformers Tr1 to Trn from being magnetically saturated due to the output of unipolar pulses. The magnetic reset circuit 4 has a magnetic reset power supply E1. As described above, the second closed circuit 6 is composed of the tertiary windings T1s to Tns and the magnetic reset circuit 4. Therefore, by flowing an inverse excitation current through the tertiary windings T1s to Tns of the transformers Tr1 to Trn using the magnetic reset power supply E1, the magnetic reset of the magnetic cores 3e can be performed. By performing this control, magnetic saturation can be reduced before the next operation, and the transformers Tr1 to Trn can be repeatedly operated. In addition, if the voltage-time product in magnetic reset is increased, the transformers Tr1 to Trn can be further miniaturized.

[0044] In addition, in Figure 6The case where the magnetic reset power supply E1 is a DC power supply is illustrated, but it is not limited thereto. The magnetic reset power supply E1 may also be a pulse power supply. In particular, when it is desired to increase the number of magnetic resets per unit time, it is preferable to use the magnetic reset power supply E1 as a pulse power supply.

[0045] In addition, the magnetic reset circuit 4 has an impedance change circuit U1. As Figure 6 shown, the impedance change circuit U1 is inserted in series between the magnetic reset power supply E1 and the tertiary windings T1s to Tns.

[0046] The impedance change circuit U1 has a plurality of suppression coils UL1 to ULk connected in parallel with each other and a plurality of switching elements H1 to Hk connected in series with each of the suppression coils UL1 to ULk. k represents an integer of 2 or more. Thus, a series circuit portion formed by connecting one suppression coil and one switching element in series constitutes one switchable suppression coil. In addition, it is configured that k switchable suppression coils are connected in parallel with each other.

[0047] The suppression coils UL1 to ULk are circuit elements having inductance values. The suppression coils UL1 to ULk suppress the induced current that can flow due to the induced voltage induced in the tertiary windings T1s to Tns to protect the magnetic reset power supply E1. In the magnetic reset circuit 4, for the suppression coils UL1 to ULk, appropriate suppression coils are selected to prevent an excessive current caused by the induced voltage of the tertiary windings T1s to Tns from flowing through the magnetic reset power supply E1.

[0048] The inductance values of the suppression coils UL1 to ULk may all be the same, or they may be composed of suppression coils with different inductance values. If they are composed of suppression coils with different inductance values, the inductance value inserted into the second closed circuit 6 can be arbitrarily set.

[0049] When the output voltage of the pulse power supply device 100 is large, in order not to allow an excessive current to flow through the magnetic reset power supply E1, it is necessary to increase the inductance value inserted into the second closed circuit 6. That is, the inductance value inserted into the second closed circuit 6 has a proportional relationship with the magnitude of the output voltage. On the other hand, when the inductance value inserted into the second closed circuit 6 is large, it affects the output impedance of the pulse power supplies P1 to Pn magnetically coupled to the magnetic reset circuit 4. In this case, in the pulse power supply device 100, it is difficult to obtain the desired pulse width, especially an output voltage with a short pulse width of 100 [ns] or less.

[0050] Figure 7 It is a diagram for explaining the influence of the inductance value of the impedance change circuit in Embodiment 1 on the output impedance of the power supply unit in the pulse power supply device.

[0051] In Figure 7In the figure, the horizontal axis represents time, and the vertical axis represents the induced overlapping voltage. The dashed line is an example of the waveform of the induced overlapping voltage when the inductance value of the second closed circuit 6 is L1. The solid line is an example of the waveform of the induced overlapping voltage when the inductance value of the second closed circuit 6 is L2. Among the inductance values L1 and L2, there is a relationship of L1 > L2.

[0052] As Figure 7 shown, the larger the inductance value inserted into the second closed circuit 6, the smaller the slopes of the rise and fall. Therefore, in the pulse power supply device 100 of Embodiment 1, in order to reduce the influence of the output impedance, the switching elements H1 to Hk are switched according to the output voltage, that is, the number of driven transformers. The switching of the switching elements H1 to Hk is performed by the control unit 1. The control unit 1 selects a combination within a range that does not allow an excessive current to flow through the magnetic reset power supply E1 among the combinations of the inductance values of the suppression coils UL1 to ULk. As a result, it is possible to suppress the impedance observed from the power supply unit 2 in the pulse power supply device 100, that is, the output impedance of the pulse power supply device 100 from becoming excessively large.

[0053] When performing magnetic reset on the magnetic cores 3e of the transformers Tr1 to Trn, the inductance value of the impedance change circuit U1 is relatively increased, and when outputting a pulse voltage from the transformers Tr1 to Trn, the inductance value of the impedance change circuit U1 is relatively decreased. Thereby, it is possible to appropriately perform magnetic reset of the magnetic core 3e while obtaining an output voltage with a desired pulse width. In addition, it is possible to easily obtain an output voltage with a pulse width shorter than that of a conventional pulse power supply device. In addition, even if the specifications of the transformers Tr1 to Trn, the magnitude of the output voltage, etc. are changed, it is possible to flexibly cope with these situations.

[0054] Next, the control unit 1 will be described. Figure 8 is a diagram showing a structural example of the control unit of Embodiment 1. As Figure 8 shown, the control unit 1 of Embodiment 1 includes: an operation condition generation unit 11, a command signal generation unit 12, a command signal data set 13, and a command signal data set generation unit 14. The operation condition generation unit 11 is externally input with a command voltage. The command signal generation unit 12 generates a command signal Sig pq and outputs it to each drive circuit 7 of the pulse power supplies P1 to Pn. Here, p is an arbitrary integer from 1 to n, and q is an arbitrary integer from 1 to j.

[0055] The operation condition generation unit 11, the command signal generation unit 12, the command signal data set 13, and the command signal data set generation unit 14 operate in cooperation with each other. Regarding these cooperative operations, refer to Figure 9 and Figure 10 for description. Figure 9 is a flowchart for explaining the operation of the control unit of Embodiment 1.Figure 10 This is a diagram showing an example of the operating conditions when the pulse power supply device of Embodiment 1 is operating.

[0056] In Figure 10 it is shown that a set of pulse voltage, pulse width, and the number of transformers corresponding to the command voltage input to the control unit 1 is used as the operating condition (A). The pulse voltage is the amplitude value of the output voltage output from the output terminals 3a and 3b. The pulse width is the pulse width of the output voltage output from the output terminals 3a and 3b. The number of transformers is the number of transformers Tr1 to Trn that operate simultaneously when outputting the output voltage.

[0057] The command signal data set generation unit 14 generates a plurality of operating condition ranges divided for each numerical range and command signals Sig pq (p = 1 to n, q = 1 to j, the same hereinafter) as the command signal data set 13 (step S101).

[0058] More specifically, the command signal data set generation unit 14 determines the number of transformers required to achieve the Figure 10 shown operating condition (A). Then, for the operating condition (A), the command signal Sig pq is determined. The command signal data set generation unit 14 generates the operating conditions of the switching elements S11 to Snj of the pulse power supplies P1 to Pn and the operating conditions of the switching elements H1 to Hk that operate when the suppression coils UL1 to ULk are selected according to the operating condition (A). In addition, regarding the operating conditions of the switching elements S11 to Snj, the command signal Sig pq can be determined with the action based on this operating condition being an action within the reference range of the set of pulse voltage, pulse width, and the number of transformers as the determination criterion. In addition, regarding the operating conditions of the switching elements H1 to Hk, it can be determined with the action based on this operating condition being within the range of the current allowed by the magnetic reset power supply E1 as the determination criterion.

[0059] In addition, in Figure 8 the command signal data set generation unit 14 is shown as a structural element of the control unit 1, but it is not limited thereto. The command signal data set generation unit 14 can also be set as a structural element external to the control unit 1. In addition, the control unit 1 can be configured to have an input unit instead of the command signal data set generation unit 14. The control unit 1 can also be configured to input the command signal data set 13 made by the operator via the input unit.

[0060] In addition, the instruction signal data set 13 can be provided inside the control unit 1 or outside. Further, the instruction signal data set 13 can also be generated according to the specifications of the switching elements S11 to Snj, the specifications of the load 8, test results, calculation results, and the like.

[0061] Return to Figure 9 In the flowchart of, the operation condition generation unit 11 generates the operation conditions of the pulse voltage to be generated based on the command voltage, the measurement results of the past pulse operations, or a combination thereof (step S102).

[0062] Next, the instruction signal generation unit 12 refers to the instruction signal data set 13 generated in step S101. Then, the instruction signal Sig corresponding to the operation condition range including the operation conditions of the pulse voltage to be generated generated in step S102 is output to the drive circuit 7 (step S103). pq Output to the drive circuit 7 (step S103).

[0063] In addition, the processing of step S101 and the processing of step S102 can be arbitrarily swapped and implemented. If the processing of step S101 is completed before the operation of generating the pulse voltage in the pulse power supply device 100 is completed, then step S103 can be implemented immediately after the operation conditions are generated in step S102. Thereby, the time required for the processing can be shortened. Further, in the case where the instruction signal data set generation unit 14 is provided outside the control unit 1, the processing of step S101 can be omitted, so the burden on the calculation of the control unit 1 can be reduced. Figure 9 The processing of step S101, so the burden on the calculation of the control unit 1 can be reduced.

[0064] In addition, in the case where the processing order is set such that step S101 is performed after step S102, the instruction signal data set 13 can be created for the generated operation conditions after the operation conditions are generated. Thereby, there is an advantage that the instruction signal data set 13 can be created for more diverse operation conditions. In addition, the storage device for storing the instruction signal data set 13 can be omitted.

[0065] In addition, the processing order of combining the two can also be set. For example, for the instruction signal data with a high usage frequency, the processing of step S101 is performed before step S102 and stored in the instruction signal data set 13. Then, for the instruction signal data with a low usage frequency, the processing of step S101 can be performed again after the processing of step S102 is executed, and only the required instruction signal data is generated.

[0066] In addition, it can also be as Figure 11 Shown to configure the control unit 1. Figure 11 Is a structural example diagram of the control unit showing a modification of Embodiment 1. As Figure 11As shown, the control unit 1a of the modification of Embodiment 1 includes an operation condition generation unit 11, a command signal candidate generation unit 15, a determination unit 16, and a command signal output unit 17. The operation condition generation unit 11 is input with a command voltage from the outside. The command signal output unit 17 generates a command signal Sig pq and outputs it to each drive circuit 7 of the pulse power supplies P1 to Pn.

[0067] The operation condition generation unit 11, the command signal candidate generation unit 15, the determination unit 16, and the command signal output unit 17 operate in cooperation with each other. Regarding these cooperative operations, refer to Figure 12 for description. Figure 12 is a flowchart for explaining the operation of the control unit of the modification of Embodiment 1. In addition, in Figure 12 , regarding the same or equivalent processing as Figure 9 , the same reference numerals are used for illustration.

[0068] First, the operation condition generation unit 11 generates the operation conditions of the pulse voltage to be generated based on the command voltage, the measurement results of the past pulse operations, or a combination thereof (step S102).

[0069] Next, the command signal candidate generation unit 15 generates candidates for the command signal Sig pq according to the operation conditions generated in step S102 (step S104). Here, the number of candidates generated may be one or more. In addition, the term "candidate" means that it is not determined as the command signal Sig pq to be output, and the generation method itself can use the method of the control unit 1.

[0070] Next, the determination unit 16 determines whether the candidates for the command signal Sig pq generated by the command signal candidate generation unit 15 are within a predetermined reference range, that is, whether they meet the predetermined reference (step S105). If the candidates for the command signal Sig pq meet the predetermined reference (step S105, yes), it proceeds to step S106. On the other hand, if the candidates for the command signal Sig pq do not meet the predetermined reference (step S105, no), it proceeds to step S104, and the processing of steps S104 and S105 is repeated until candidates for the command signal Sig pq are found.

[0071] Next, the command signal output unit 17 outputs the candidate for the command signal Sig pq that is within the reference range as the command signal Sig pq to the drive circuit 7 (step S106).

[0072] In addition, the determination process in step S105 can also be determined using any criterion. For example, it goes without saying that the action conditions generated in step S102 are satisfied, and the determination process can also be performed based on the measurement results of past pulse actions, energy-saving conditions, the usage frequency of pulse power supplies P1 to Pn, and the like.

[0073] Next, the hardware structure of the control units 1 and 1a for implementing the functions of the above-mentioned control units 1 and 1a will be described. The functions of the action condition generation unit 11, the command signal generation unit 12, the command signal data set generation unit 14, the command signal candidate generation unit 15, the determination unit 16, and the command signal output unit 17 in the above-mentioned control units 1 and 1a can be implemented using a processor or a processing circuit. In addition, the command signal data set 13 can be implemented using a storage device. Alternatively, the functions of the control units 1 and 1a can be implemented using both a processor and a processing circuit.

[0074] In addition, some or all of the structural elements in the control units 1 and 1a can also be provided outside the pulse power supply device 100. For example, the control units 1 and 1a can be a computer including a processor and a storage device that is connected to the power supply device through a network.

[0075] Moreover, the above functions can be implemented by causing software, firmware, or a combination thereof to operate using a processor or a processing circuit. The software or firmware can also be described as a program and stored in a storage device, and read and executed by a processor or a processing circuit. It can be said that these programs cause the computer to execute the above actions, that is, the execution order and method.

[0076] Examples of semiconductor memories used as storage devices include RAM (Random Access Memory), ROM (Read Only Memory), flash memory, etc. Further, EPROM (Erasable Programmable Read Only Memory), EEPROM (registered trademark) (Electrically Erasable Programmable Read Only Memory), etc. can be cited.

[0077] The semiconductor memory can be a non-volatile memory or a volatile memory. In addition, the storage device can also use a disk, a floppy disk, an optical disk, a compact disk, a mini disk, or a DVD (Digital Versatile Disc) other than a semiconductor memory.

[0078] In Figure 9The instruction signal data set 13 generated in step S101 is saved in the storage device as a lookup table. In this case, in step S103, by referring to the lookup table, an instruction signal Sig corresponding to the operation condition range can be output pq .

[0079] In addition, the functions of the control units 1 and 1a can also be implemented by one dedicated processing circuit. In addition, for the control units 1 and 1a Figure 9 and Figure 12 a dedicated processing circuit can be provided for each process, and each dedicated processing circuit can perform each process.

[0080] Examples of dedicated processing circuits include a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), and an FPGA (Field Programmable Gate Array). In addition, circuits combining these can be cited as examples.

[0081] As described above, the pulse power supply device of Embodiment 1 includes: a plurality of pulse power supplies that respectively output unipolar pulse voltages, and a plurality of transformers. Each of the plurality of transformers has a primary winding, a secondary winding, and a tertiary winding. Both ends of the plurality of secondary windings connected in series constitute output terminals, and a load is connected to the output terminals. Both ends of the plurality of tertiary windings connected in series constitute voltage application terminals, and a magnetic reset circuit is connected to the voltage application terminals. The magnetic reset circuit has a magnetic reset power supply as a power supply for causing a reset current to flow through the tertiary winding and an impedance change circuit. The impedance change circuit is configured to be able to change the inductance value for limiting the induced current that can flow in the second closed circuit due to the voltage induced in the tertiary winding. With this structure, while appropriately performing magnetic reset of the magnetic core in the plurality of transformers, it is possible to suppress the output impedance of the pulse power supply device from becoming excessively large. Thereby, the influence of the output impedance of the pulse power supply device can be suppressed, and an output voltage with a desired pulse width can be obtained.

[0082] Embodiment 2.

[0083] In Embodiment 1, the impedance change circuit U1 that constitutes the magnetic reset circuit 4 changes the inductor value, but it may also be configured to change the capacitance value. Figure 13 FIG. shows a structural example of the magnetic reset circuit of Embodiment 2.

[0084] In Figure 13 the magnetic reset circuit 4A shown, with respect to Figure 6The magnetic reset circuit 4 shown has the impedance change circuit U1 replaced by an impedance change circuit U1A. Other structures are the same as or equivalent to Figure 6 those shown, and the same or equivalent structural parts are shown with the same reference signs, and repeated descriptions are omitted.

[0085] As Figure 13 shown, the impedance change circuit U1A is inserted in series between the magnetic reset power supply E1 and the tertiary windings T1s to Tns. The impedance change circuit U1A has a suppression coil ULa, a switching element H1 connected in series with the suppression coil ULa, and a capacitor UCa that is a variable capacitor connected in parallel with the switching element H1.

[0086] In the impedance change circuit U1A, the inductance value of the suppression coil ULa is set to a value that does not allow an excessive current generated by the induced voltage of the tertiary windings T1s to Tns to flow through the magnetic reset power supply E1. When performing magnetic reset, the switching element H1 is controlled to be conductive, short-circuiting both ends of the capacitor UCa, and causing a reset current to flow through the tertiary windings T1s to Tns using the magnetic reset power supply E1.

[0087] When suppressing overcurrent, it can be regarded as an LC series circuit of the suppression coil Ula and the capacitor UCa, and the output impedance of the power supply unit 2 is determined according to the combined impedance determined by the inductance value of the suppression coil ULa and the capacitance value of the capacitor UCa. By changing the capacitance value of the capacitor UCa according to the output of the pulse power supply device 100, the output impedance can be appropriately set. Thereby, while appropriately performing the magnetic reset of the magnetic core 3e, an output voltage with a desired pulse width can be obtained. In addition, an output voltage with a pulse width shorter than that of the conventional pulse power supply device can be easily obtained. In addition, even if the specifications of the transformers Tr1 to Trn, the magnitude of the output voltage, etc. are changed, these situations can be flexibly coped with.

[0088] In addition, in Figure 13 it, the capacitor Uca is constituted by a variable capacitor, but it is not limited thereto. A plurality of capacitors can also be prepared, and a part or all of them can be combined to change the capacitance value.

[0089] As described above, the magnetic reset circuit included in the pulse power supply device of Embodiment 2 is configured to be able to change the capacitance value. With this configuration, as in Embodiment 1, while appropriately performing the magnetic reset of the magnetic cores in the plurality of transformers, the output impedance of the pulse power supply device can be prevented from becoming excessively large. Thereby, the influence of the output impedance of the pulse power supply device can be suppressed, and an output voltage with a desired pulse width can be obtained.

[0090] Embodiment 3.

[0091] In Embodiment 1, the impedance changing circuit U1 of the magnetic reset circuit 4 is configured to change the inductance value, but it may also be configured to change the impedance via a transformer. Figure 14 FIG. is a structural example diagram of the magnetic reset circuit according to Embodiment 3.

[0092] In Figure 14 the magnetic reset circuit 4B shown, with respect to Figure 6 the magnetic reset circuit 4 shown, the impedance changing circuit U1 is replaced with an impedance changing circuit U1B. Other structures are the same as or equivalent to Figure 6 those, and the same reference numerals are attached to the same or equivalent structural parts and shown, and repeated descriptions are omitted.

[0093] As Figure 14 shown, the impedance changing circuit U1B is inserted in series between the magnetic reset power supply E1 and the tertiary windings T1s to Tns. The impedance changing circuit U1B includes a suppression coil ULb, a switching element H1, a capacitor UCb that is a capacitance variable capacitor, and an impedance transformation transformer Trb. The switching element H1 is connected in series with the suppression coil ULb. The capacitor UCb is connected in series with the suppression coil ULb and the switching element H1. The impedance transformation transformer Trb has a primary winding Trb1 and a secondary winding Trb2. The primary winding Trb1 is inserted into the second closed circuit 6. The secondary winding Trb2 is connected in series with the suppression coil ULb, the switching element H1, and the capacitor UCb to form a closed circuit.

[0094] The impedance changing circuit U1B of Embodiment 3 can change the voltage across both ends of the impedance changing circuit U1B, boost or step it down, according to the turns ratio of the primary winding Trb1 to the secondary winding Trb2, i.e., the transformer ratio. Since reactors and capacitors are not required for voltage boosting and stepping down, it will not become large-sized and the withstand voltage can be improved. Similar to Embodiment 2, by changing the capacitance value of the capacitor UCb for each voltage pulse, the output impedance can be appropriately set. Thereby, while appropriately performing the magnetic reset of the magnetic core 3e, an output voltage with a desired pulse width can be obtained. In addition, an output voltage with a pulse width shorter than that of the conventional pulse power supply device can be easily obtained. Moreover, even if the specifications of the transformers Tr1 to Trn, the magnitude of the output voltage, etc. are changed, these situations can be flexibly coped with.

[0095] In addition, in Figure 14 , the capacitor UCb is constituted by a capacitance variable capacitor, but it is not limited thereto. A plurality of capacitors may be prepared and a part or all of them may be combined to change the capacitance value. Moreover, instead of this structure or in addition to this structure, a plurality of suppression coils may be prepared and a part or all of them may be combined to change the inductance value.

[0096] As described above, the magnetic reset circuit included in the pulse power supply device of Embodiment 3 is configured to include an impedance transformation transformer and be able to change the impedance. According to this configuration, similar to Embodiment 1, it is possible to appropriately perform magnetic reset of the magnetic cores in the plurality of transformers, and suppress the output impedance of the pulse power supply device from becoming excessively large. As a result, it is possible to suppress the influence of the output impedance of the pulse power supply device and obtain an output voltage with a desired pulse width.

[0097] The configurations shown in the above embodiments illustrate an example, and can also be combined with other known techniques, and can also be combined with each other among the embodiments. Within the scope not departing from the gist, a part of the configuration can also be omitted or changed.

Claims

1. A pulse power supply device, characterized in that, Comprising: Multiple pulse power supplies, each outputting a unipolar pulse voltage; And Multiple transformers, each having a primary winding, a secondary winding, and a tertiary winding, and one of the pulse power supplies is connected to one of the primary windings one by one; Multiple of the secondary windings are connected in series in sequence, and both ends of the multiple secondary windings connected in series constitute output terminals, and a load is connected to the output terminals to form a first closed circuit; Multiple of the tertiary windings are connected in series in sequence, and both ends of the multiple tertiary windings connected in series constitute voltage application terminals, and a magnetic reset circuit is connected to the voltage application terminals, and a second closed circuit is constituted by the multiple tertiary windings and the magnetic reset circuit; The magnetic reset circuit comprises: A magnetic reset power supply, which is a power supply for causing a reset current to flow through the tertiary winding; and An impedance change circuit configured to be able to change the impedance for restricting the induced current that can flow in the second closed circuit due to the voltage induced in the tertiary winding.

2. The pulse power supply device according to claim 1, wherein Each of the pulse power supplies comprises: Multiple switching elements; Multiple capacitors, each capacitor is connected in series with each of the switching elements and are connected in parallel with each other; and A DC power supply that applies a DC voltage to both ends of each of the capacitors, Each of the pulse power supplies has multiple series circuits formed by connecting one of the switching elements in series with one of the capacitors, and the multiple series circuits are connected in parallel with each other to form a series-parallel circuit, and the pulse voltage is output from both ends of the series-parallel circuit.

3. The pulse power supply device according to claim 1 or 2, wherein The impedance change circuit comprises: Multiple suppression coils, which are connected in parallel with each other; and Multiple switching elements, each switching element is connected in series with each of the suppression coils, Select at least one of the multiple suppression coils and insert it into the second closed circuit.

4. The pulse power supply device according to claim 1 or 2, wherein The impedance change circuit comprises: A suppression coil; A switching element, which is connected in series with the suppression coil; and A capacitance variable capacitor, which is connected in parallel with the switching element.

5. The pulse power supply device according to claim 1 or 2, wherein The impedance change circuit comprises: A suppression coil; A switching element, which is connected in series with the suppression coil; A capacitance variable capacitor, which is connected in series with the suppression coil and the switching element; And An impedance transformation transformer, having a primary winding and a secondary winding, The primary winding is inserted into the second closed circuit, The secondary winding is connected in series with the suppression coil, the switching element, and the capacitance variable capacitor to form a closed circuit.

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