A low power reference source circuit for fast switching of power supplies

Abstract

This invention discloses a low-power reference source circuit for rapid power switching, comprising: an external power supply monitoring module for monitoring the power supply voltage and comparing it with a threshold; an internal power supply selection and switching module for selecting the external power supply and generating an internal power supply and switching isolation signal; a reference voltage generation circuit for generating one or more internal reference voltages; a high-drive circuit for enhancing the driving capability of the output voltage; and an isolation control circuit for isolating or enabling the internal reference voltage, enabling and selecting the high-drive circuit, and generating a start-up indicator signal. This invention is applicable to multi-power supply systems where multiple power domains share a single reference, reducing area and power consumption; isolating the output reference voltage during rapid and repeated power switching to prevent reference instability from causing system malfunctions; enabling the high-drive circuit for rapid response during startup, debugging, and special applications, and disabling the high-drive circuit during normal operation to reduce power consumption.

Description

Technical Field

[0001] This invention relates to a low-power reference source circuit for fast power switching, belonging to the field of analog integrated circuit design. Background Technology

[0002] With the booming development of the Internet of Things, smart homes and wearable devices, the types and number of electronic devices are constantly increasing. Many electronic products use dual or multiple power supplies working together, which leads to situations where dual or multiple power supplies need to be switched.

[0003] These products' chips extensively utilize low-power reference sources. In existing dual-power or multi-power systems, a stable power supply is required to generate the reference voltage, or a reference source is used in each power domain. If the power supply changes instantaneously, it can cause significant fluctuations in the output reference voltage, leading to system malfunctions. Currently, there is no low-power reference source that can maintain a stable output during instantaneous switching between multiple power supplies. Therefore, designing a low-power reference source specifically to address this issue is of great significance. Summary of the Invention

[0004] This invention provides a low-power reference source circuit for fast power switching to solve the problems mentioned in the background art.

[0005] This invention provides a low-power reference source circuit for fast power switching, characterized in that:

[0006] The low-power reference source with fast power switching mainly includes an external power monitoring module, an internal power selection and switching module, a reference voltage generation circuit, a high drive circuit, and an isolation control circuit.

[0007] The external power supply monitoring module monitors the voltage of each external power supply and compares it with a threshold. It monitors the voltage of the 1st, 2nd, ..., or nth external power supply signal respectively, and outputs the 1st, 2nd, ..., or nth reset signal respectively by comparing it with the threshold.

[0008] The internal power selection and switching module is connected to the external power monitoring module and is used to receive the comparison results of the external power monitoring module, the first, second, ..., nth reset signals, and select the first, second, ..., nth external power signals through preset logic operations to generate the internal power supply VIN and the first control signal for isolation control.

[0009] The reference voltage generating circuit is connected to the internal power selection switching module and is used to generate an internal reference voltage in the internal power domain. It can output the first, second, ..., nth internal reference signals.

[0010] The high-drive circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the isolation control circuit, and is used to enhance the driving capability of the first internal reference signal and output a high-drive internal reference signal.

[0011] The isolation control circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the high drive circuit. It is used to receive the first control signal from the internal power selection switching module, and through internal logic operations and the isolation switch network circuit, control the first, or second, ..., or nth output reference signal to isolate or enable the first, or second, ..., or nth internal reference signal; it is used to generate the second control signal to enable and select the high drive circuit; and it is used to generate the third control signal as a start-up indicator signal.

[0012] The advantages of the low-power reference source for fast power switching involved in this invention are mainly as follows:

[0013] Suitable for multi-power supply systems, where multiple power domains share a single reference, reducing circuit area and power consumption;

[0014] When the power supply is switched quickly and repeatedly, the output reference voltage can be isolated to ensure the stability of the reference voltage and avoid system malfunction caused by voltage jumps between power supplies.

[0015] It has a high drive function, which can output the reference voltage quickly when the reference source starts up. It can also be used in various debugging and special application scenarios that require high drive function. At the same time, under normal operating conditions, the high drive circuit can be turned off to ensure that the entire reference source meets the low power consumption requirements. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 The overall circuit schematic diagram provided for the embodiments of the present invention

[0018] Figure 2 This is a schematic diagram of the working state of the isolation switch network in startup mode provided by an embodiment of the present invention.

[0019] Figure 3 Timing diagram of the isolation switch network in startup mode provided in an embodiment of the present invention

[0020] Figure 4This is a schematic diagram of the working state of the disconnector network under normal operating mode, provided in an embodiment of the present invention.

[0021] Figure 5 Timing diagram of the disconnector network in normal operating mode provided in an embodiment of the present invention

[0022] Figure 6 This is a schematic diagram illustrating the working state of the disconnector network under special application and debugging modes provided in an embodiment of the present invention.

[0023] Figure 7 Timing diagram of the isolating switch network under special application and debugging modes provided in embodiments of the present invention.

[0024] Figure 8 A schematic diagram of a commonly used reference voltage generation circuit. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The protection scope of the present invention is not limited to the following description. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0026] This invention provides a low-power reference source circuit for fast power switching, see reference. Figure 1 The low-power reference source with fast power switching mainly includes an external power monitoring module, an internal power selection and switching module, a reference voltage generation circuit, a high drive circuit, and an isolation control circuit.

[0027] Specifically, the external power supply monitoring module monitors the voltages of various external power supplies and compares them with thresholds. It monitors the voltages of the first, second, ..., or nth external power supply signals VDD1, VDD2, ..., or VDDn respectively, and outputs the comparison result first, second, ..., or nth reset signal POR1, POR2, ..., or PORn respectively by comparing them with the thresholds.

[0028] The internal power selection and switching module is connected to the external power monitoring module. It is used to receive the comparison results of the external power monitoring module, the first, second, ..., nth reset signals POR1, POR2, ..., PORn. Through preset logic operations, it selects the first, second, ..., nth external power signals VDD1, VDD2, ..., VDDn to generate the internal power supply VIN and the first control signal ISO for isolation control.

[0029] The reference voltage generating circuit is connected to the internal power selection switching module and is used to generate an internal reference voltage in the internal power domain. It can output the first, second, ..., nth internal reference signals VBG1, VBG2, ..., VBGn.

[0030] The high-drive circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the isolation control circuit, and is used to enhance the driving capability of the first internal reference signal VBG1 and output the high-drive internal reference signal VBG1_HDRV.

[0031] The isolation control circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the high drive circuit. It receives the first control signal ISO from the internal power selection switching module and, through internal logic operations and the isolation switch network circuit, controls the first, second, ..., or nth output reference signal VREF1, or VREF2, ..., or VREFn to isolate or enable the first, second, ..., or nth internal reference signal VBG1, or VBG2, ..., or VBGn. It also generates the second control signal DRV_EN to enable and select the high drive circuit, and generates the third control signal BGOK as a start-up indicator signal.

[0032] In specific embodiments, the external power monitoring module described above can employ, but is not limited to, power-on reset circuits such as comparator structures and RC circuit structures. If a common comparator-type power-on reset circuit is used, a reset signal is output based on the comparison result between the comparator reference terminal and the power supply terminal voltage. Furthermore, the voltage switching of the comparator reference terminal can be controlled by the third control signal BGOK. When the third control signal BGOK is low, the comparator reference terminal serves as the internal reference of the external power monitoring module. This internal reference can be, but is not limited to, a diode-based reference source, a reference source based on the threshold voltage of a MOS device, or other bandgap reference sources. When the third control signal BGOK becomes high, the comparator reference terminal switches to the first output reference signal VREF1, and simultaneously, the internal reference of the external power monitoring module can be turned off, reducing power consumption.

[0033] The aforementioned internal power selection and switching module can use 1, 2, ..., or n PMOS switches as selection switches to control the 1st, 2nd, ..., or nth external power signal VDD1, VDD2, ..., or VDDn to select the internal power supply VIN. It can use, but is not limited to, RC charging, clock counting, direct system control, etc., to generate the 1st control signal ISO. The 1st control signal ISO is used for isolation control and can be a low-level pulse signal; a high level indicates a non-isolated state, and a low level indicates an isolated state. A low-level pulse is triggered each time the power is switched, and the low-level duration is T. ISO T ISOIt must be greater than the power switching settling time and less than C1*ΔVREF1 / Ileak, where C1 is the output capacitor of the first output reference signal VREF1, ΔVREF1 is the maximum deviation voltage of the reference voltage accuracy limit, and Ileak is the leakage current on the first output reference signal VREF1 in the isolation state.

[0034] The aforementioned reference voltage generation circuit can be used, but is not limited to commonly used low-power bandgap reference circuits. Please refer to [reference needed]. Figure 8 ;

[0035] The aforementioned high-drive circuits can be used, but are not limited to commonly used unity-gain buffer circuits;

[0036] The aforementioned isolation control circuit can be used, but is not limited to, RC charging, clock counting, threshold comparison, etc., to generate the third control signal BGOK. The third control signal BGOK is a reference start-up indicator signal, which can be used. A high level indicates that the voltage of the first output reference signal VREF1 has reached the expected value, and a low level indicates that the reference has not completed start-up, with a start-up time of Tset. The second control signal DRV_EN is the control signal for the aforementioned high-drive circuit, which can be used. A high level enables and selects the high-drive circuit, and a low level disables and does not select the high-drive circuit. Internal logic operations can be used to control the second control signal DRV_EN with the third control signal BGOK during reference start-up, achieving fast reference start-up. Alternatively, after reference start-up, the system can directly control the second control signal DRV_EN to meet the high-drive requirements for debugging and special applications.

[0037] In this embodiment, refer to Figure 1 The input terminal of the external power monitoring module is connected to the 1st, 2nd, ..., nth external power signals VDD1, VDD2, ..., VDDn, and the output terminal is connected to the 1st, 2nd, ..., nth reset signals POR1, POR2, ..., PORn.

[0038] In this embodiment, refer to Figure 1 The input terminal of the internal power selection switching module is connected to the first, second, ..., nth external power signals VDD1, VDD2, ..., VDDn and the first, second, ..., nth reset signals POR1, POR2, ..., PORn, and the output terminal is connected to the first control signal ISO and the internal power signal VIN.

[0039] In this embodiment, refer to Figure 1 The input terminal of the reference voltage generating circuit is connected to the internal power supply signal VIN, and the output terminal is connected to the first, second, ..., nth internal reference signals VBG1, VBG2, ..., VBGn.

[0040] In a specific embodiment, see [reference] Figure 8The aforementioned reference voltage generation circuit includes 3 MOSFETs, 2 transistors, n+5 resistors, and 1 operational amplifier.

[0041] Specifically, the internal power supply VIN is connected to the source of the first MOSFET M1, the source of the second MOSFET M2, and the source of the third MOSFET M3. The output of the operational amplifier is connected to the gate of the second MOSFET M2 and the gate of the third MOSFET M3. One end of the first resistor R1 is connected to the drain of the first MOSFET M1 and the emitter of the first transistor Q1. The drain of the second MOSFET M2 is connected to one end of the fifth resistor R5 and one end of the second resistor R2. The positive input of the operational amplifier is connected to the other end of the first resistor R1 and one end of the third resistor R3. The negative input of the operational amplifier is connected to the other end of the second resistor R2 and one end of the fourth resistor R4. The other end of resistor R5 is connected to the emitter of transistor Q2. The base and collector of transistor Q1 are grounded. The base and collector of transistor Q2 are grounded. The drain of MOSFET M3 is connected to one end of resistor R6 and the first internal reference signal VBG1. The other end of resistor R6 is connected to one end of resistor R7 and the second internal reference signal VBG2. ... The other end of resistor Rn+4 is connected to one end of resistor Rn+5 and the nth internal reference signal VBGn. The other end of resistor R3, resistor R4, ..., and Rn+5 are grounded.

[0042] In this embodiment, refer to Figure 1 The input terminal of the high drive circuit is connected to the internal power supply signal VIN, the first internal reference voltage signal VBG1, and the second control signal DRV_EN, and the output terminal is connected to the high drive internal reference signal VBG1_HDRV.

[0043] In this embodiment, refer to Figure 1 The input terminal of the isolation control circuit is connected to the internal power supply signal VIN, the high drive internal reference signal VBG1_HDRV, the first control signal ISO, and the first, second, ..., nth internal reference signals VBG1, VBG2, ..., VBGn. The output terminal is connected to the second control signal DRV_EN, the third control signal BGOK, and the first, second, ..., nth output reference signals VREF1, VREF2, ..., VREFn.

[0044] In this embodiment, refer to Figure 2 , 4 6. The isolation switch network inside the isolation control circuit includes 13 switches S1, S2, ..., S13 and 3 capacitors C1, C2, C3.

[0045] Specifically, one end of the third switch S3 is connected to the first internal reference signal VBG1, and the other end of the third switch S3 is grounded. One end of the 13th switch S13 is connected to the high-drive internal reference signal VBG1_HDRV, and the other end of the 13th switch S13 is connected to one end of the first switch S1 and the second switch S2. The other end of the first switch S1 is connected to the first internal reference signal VBG1, and the other end of the second switch S2 is connected to the upper board connection of the first capacitor C1 and the first output reference signal VREF1.

[0046] One end of switch S4 is connected to the second internal reference signal VBG2. The other end of switch S4 is connected to one end of switch S5 and switch S6, and the second output reference signal VREF2. The other end of switch S5 is grounded. The other end of switch S6 is connected to one end of switch S7 and switch S8, and the upper board of capacitor C2. The other end of switch S7 is grounded. The lower board of capacitor C2 is grounded. The other end of switch S8 is connected to one end of switch S9 and switch S10, and the upper board of capacitor C3. The lower board of capacitor C3 is grounded. The other end of switch S9 is connected to the second output reference signal VREF2. The other end of switch S10 is connected to one end of switch S11 and switch S12. The other end of switch S12 is grounded. The other end of switch S11 is connected to the first output reference signal VREF1.

[0047] Among them, switches S4, S5, ..., S12 (4th, 5th, ..., 12th) and capacitors C2 (2nd, 3rd) form a switch network, corresponding to a set of signals: the second internal reference signal VBG2 and the second output reference signal VREF2. The corresponding n-2 sets of signals—the third, or fourth, ..., or nth internal reference signal VBG3, or VBG4, ..., or VBGn, and the third, or fourth, ..., or nth output reference signal VREF3, or VREF4, ..., or VREFn—correspond to n-2 sets of switch networks with the same connection method.

[0048] In a specific embodiment, the aforementioned disconnector network operates in two modes: a startup or high-drive mode and a normal operating mode. In each mode, the disconnector network employs different control logic during power switching.

[0049] Specifically, the operating mode changes upon startup as follows, please refer to [link / reference]. Figure 2 , Figure 3When the third control signal BGOK is low, the second control signal DRV_EN is high, enabling and selecting the high-drive circuit. This closes switches S13, S2, S5, S7, S10, and S11, and opens switches S11, S1, S3, S4, S6, S8, S9, and S12. At this time, the isolation switch network is in either start or high-drive mode. The first output reference signal VREF1 and the high-drive internal reference signal are also activated.

[0050] VBG1_HDRV is connected via switch 13 (S13) and switch 2 (S2). The second output reference signal VREF2 is grounded via switch 5 (S5). Capacitors C1 and C3 are rapidly charged. After a settling time Tset, the first output reference signal VREF1 reaches the expected voltage, and the third control signal BGOK goes high. Then, the second control signal DRV_EN goes low, shutting down the non-selective high-drive circuit. This closes switches 1 (S1), 2 (S2), 4 (S4), 6 (S6), 8 (S8), and 12 (S12), and closes switches 13 (S13), 3 (S3), 5 (S5), 7 (S7), 9 (S9), and 10 (S10). When switch S10 and switch S111 are open, switch S4 will close after a delay of Td. At this time, the isolation switch network is in normal working mode. The first output reference signal VREF1 and the first internal reference signal VBG1 are connected through switch S1 and switch S2. The second output reference signal VREF2 and the second internal reference signal VBG2 are connected through switch S4. The third, or fourth, ..., or nth output reference signal VREF3, or VREF4, ..., or VREFn and the third, or fourth, ..., or nth internal reference signal VBG3, or VBG4, ..., or VBGn, in the corresponding n-2 sets of switch networks, adopt the same control logic as above.

[0051] During the above startup process, at the instant the 8th switch S8 is turned on, the voltage of the positive plate of the 3rd capacitor C3 is VREF1, and the voltage of the positive plate of the 2nd capacitor C2 is 0. There is a proportional relationship between the 2nd capacitor C2 and the 3rd capacitor C3, and VREF1>VREF2>…>VREFn. If the output reference signal VREF1 / VREF2=k, then the capacitor value is C2 / C3=k-1. Since the total charge remains constant, the stable value of the positive plate voltages of the 2nd capacitor C2 and the 3rd capacitor C3 after the 8th switch S8 is turned on is the desired VREF2 voltage value. An RC delay can be used to achieve the Td time, which must be greater than the stabilization time of the positive plate voltages of the 2nd capacitor C2 and the 3rd capacitor C3. In the n-2 sets of switch networks corresponding to the 3rd, 4th, …, or nth output reference signal VREF3, or VREF4, …, or VREFn, the corresponding capacitor value coefficient k and delay time Td can be calculated using the same formula as above.

[0052] Specifically, when a power switch occurs during normal operation, refer to... Figure 4 , Figure 5 The internal power selection switching module controls the first control signal ISO to generate a low-level pulse. When the ISO signal changes from high to low, control switches S1, S3, S6, S8, and S12 close, while control switches S13, S4, S5, S7, S9, S10, and S11 open. At this time, the first and second output reference signals VREF1 and VREF2 and the first and second internal reference signals VBG1 and VBG2 are isolated and disconnected. The first and second output reference signals VREF1 and VREF2 maintain voltage stability through capacitors C1, C2, and C3, while the first and second internal reference signals VBG1 and VBG2 are grounded through the switch. Waiting for T... ISOAfter a certain time, the power switching is complete. The ISO signal changes from low to high. Control switches S1, S2, S4, S6, S8, and S12 close, while control switches S13, S3, S5, S7, S9, S10, and S11 open. At this time, the internal reference signals VBG1 and VBG2 of switches S1 and S2 are disconnected from ground, and the output reference signals VREF1 and VREF2 of switches S1 and S2, and the internal reference signals VBG1 and VBG2 of switches S1 and S2 are re-energized. 4, ..., or the nth output reference signal VREF3, or VREF4, ..., or VREFn and the 3rd, or 4th, ..., or nth internal reference signal VBG3, or VBG4, ..., or VBGn, in the corresponding n-2 sets of switch networks, the corresponding switches are also controlled by the 1st control signal ISO, using the same control logic as above; since the output branch current of the low-power reference voltage generation circuit is very small, the 1st, 2nd, ..., nth internal reference signals VBG1, VBG2, ..., VBGn will quickly recover to a stable value due to the influence of capacitors, ensuring that the output reference voltage is within an acceptable accuracy range throughout the switching process;

[0053] Specifically, when a power switch occurs during startup or high-drive mode, refer to [reference needed]. Figure 6 , Figure 7 The internal power selection switching module controls the first control signal ISO to generate a low-level pulse. When the ISO signal changes from high to low, control switches S13, S3, S4, S7, S9, and S11 close, while control switches S1, S2, S5, S6, S8, S10, and S12 open. At this time, the first output reference signal VREF1 and the first internal reference signal VBG1 are isolated and disconnected, while the second output reference signal VREF2 and the second internal reference signal VBG2 remain conducting. The first output reference signal VREF1 is kept stable through capacitor C1, and the first internal reference signal VBG1 is grounded through a switch. The second output reference signal VREF2 is kept non-zero through capacitor C3 to prevent systemic errors caused by a zero reference voltage during debugging. Waiting for T... ISOAfter a certain time, the power switching is complete. The ISO signal changes from low to high. Control switches S13 (13th), S2 (2nd), S4 (4th), S7 (7th), S10 (10th), and S11 (11th) close. Control switches S1 (1st), S3 (3rd), S5 (5th), S6 (6th), S8 (8th), S9 (9th), and S12 (12th) open. At this time, the first internal reference signal VBG1 is disconnected from ground, the second internal reference signal VBG2 is disconnected from capacitor C3, the first output reference signal VREF1 and the first internal reference signal VBG1 are re-connected, and the second output reference signal VREF2 and the second internal reference signal VBG2 are re-connected. The circuit remains on; the 3rd, or 4th, ..., or nth output reference signal VREF3, or VREF4, ..., or VREFn and the 3rd, or 4th, ..., or nth internal reference signal VBG3, or VBG4, ..., or VBGn, in the corresponding n-2 sets of switch networks, the corresponding switches adopt the same control logic as described above; since the output branch current of the low-power reference voltage generation circuit is very small, the 1st internal reference signal VBG1 will quickly recover to a stable value due to the influence of the capacitor, and the 2nd, 3rd, ..., nth internal reference signals VBG2, VBG3, ..., VBGn will also quickly recover to a stable value, ensuring that the output reference voltage is within an acceptable accuracy range throughout the switching process.

[0054] The technical principles, solutions, and advantages of the present invention have been described in detail through the above examples. It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of the present invention is defined by the appended claims rather than the foregoing description, and thus all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0055] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A low-power reference source circuit for fast power switching, characterized in that: The low-power reference source with fast power switching includes an external power monitoring module, an internal power selection and switching module, a reference voltage generation circuit, a high drive circuit, and an isolation control circuit. The external power supply monitoring module monitors the voltage of each external power supply and compares it with a threshold. It monitors the voltage of the 1st, 2nd, ..., or nth external power supply signal respectively, and outputs the 1st, 2nd, ..., or nth reset signal respectively by comparing it with the threshold. The internal power selection and switching module is connected to the external power monitoring module and is used to receive the comparison results of the external power monitoring module, the first, second, ..., nth reset signals, and select the first, second, ..., nth external power signals through preset logic operations to generate the internal power supply VIN and the first control signal for isolation control. The reference voltage generating circuit is connected to the internal power selection switching module and is used to generate an internal reference voltage in the internal power domain. It can output the first, second, ..., nth internal reference signals. The high-drive circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the isolation control circuit, and is used to enhance the driving capability of the first internal reference signal and output a high-drive internal reference signal. The isolation control circuit is connected to the internal power selection switching module, the reference voltage generation circuit, and the high drive circuit. It is used to receive the first control signal from the internal power selection switching module, and through internal logic operations and the isolation switch network circuit, control the first, or second, ..., or nth output reference signal to isolate or enable the first, or second, ..., or nth internal reference signal; it is used to generate the second control signal to enable and select the high drive circuit; and it is used to generate the third control signal as a start-up indicator signal.

2. The low-power reference source circuit according to claim 1, characterized in that: The external power monitoring module has its input terminals connected to the 1st, 2nd, ..., nth external power signals, and its output terminals connected to the 1st, 2nd, ..., nth reset signals.

3. The low-power reference source circuit according to claim 1, characterized in that: The input terminal of the internal power selection switching module is connected to the 1st, 2nd, ..., nth external power signals and the 1st, 2nd, ..., nth reset signals, and the output terminal is connected to the 1st control signal and the internal power signal.

4. The low-power reference source circuit according to claim 1, characterized in that: The input terminal of the reference voltage generating circuit is connected to the internal power supply signal, and the output terminal is connected to the 1st, 2nd, ..., nth internal reference signals.

5. The low-power reference source circuit according to claim 1, characterized in that: The high drive circuit has an input terminal connected to an internal power supply signal, a first internal reference voltage signal, and a second control signal, and an output terminal connected to a high drive internal reference signal.

6. The low-power reference source circuit according to claim 1, characterized in that: The input terminal of the isolation control circuit is connected to the internal power supply signal, the high-drive internal reference signal, the first control signal, and the first, second, ..., nth internal reference signals, and the output terminal is connected to the second control signal, the third control signal, and the first, second, ..., nth output reference signals.

7. The low-power reference source circuit according to claim 6, characterized in that: The isolation switch network inside the isolation control circuit includes 13 switches (1st, 2nd, ..., 13th) and 3 capacitors (1st, 2nd, and 3rd). One end of the third switch is connected to the first internal reference signal, and the other end of the third switch is grounded. One end of the 13th switch is connected to the high drive internal reference signal, and the other end of the 13th switch is connected to one end of the first switch and the second switch. The other end of the first switch is connected to the first internal reference signal, and the other end of the second switch is connected to the first capacitor upper board connection and the first output reference signal. One end of the 4th switch is connected to the 2nd internal reference signal. The other end of the 4th switch is connected to one end of the 5th and 6th switches, the 2nd output reference signal, the other end of the 5th switch is grounded, the other end of the 6th switch is connected to one end of the 7th switch, one end of the 8th switch, the upper board of the 2nd capacitor, the other end of the 7th switch is grounded, the lower board of the 2nd capacitor is grounded, the other end of the 8th switch is connected to one end of the 9th and 10th switches, the upper board of the 3rd capacitor, the lower board of the 3rd capacitor is grounded, the other end of the 9th switch is connected to the 2nd output reference signal, the other end of the 10th switch is connected to one end of the 11th switch, one end of the 12th switch, the other end of the 12th switch is grounded, and the other end of the 11th switch is connected to the 1st output reference signal. Among them, the 4th, 5th, ..., 12th switches and the 2nd and 3rd capacitors form a switch network, corresponding to a set of signals: the 2nd internal reference signal and the 2nd output reference signal; the corresponding n-2 sets of signals: the 3rd, or 4th, ..., or nth internal reference signal and the 3rd, or 4th, ..., or nth output reference signal, correspond to n-2 sets of switch networks with the same connection method.

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