GCT chip cathode comb repair process

Abstract

This invention relates to a process for repairing GCT chip comb strips. First, an aluminum layer A is deposited on the comb strip to increase the longitudinal height between the comb strip and the gate region, thereby increasing the isolation gap between the longitudinal cathode comb strip and the gate region. Then, another aluminum layer B is deposited simultaneously on the comb strip and the gate region, improving the pattern processing quality of the gate region and the comb strip, which is beneficial for improving chip performance. A photosensitive polyimide insulating protective material layer is then applied to the upper surface of the chip. For a very small number of defective comb strips, in addition to removing the aluminum layer, a grinding process is added to make the comb strip height level with the aluminum layer of the gate region electrode. Finally, an insulating protective material is applied to the defective comb strip to insulate it, preventing it from contacting the cathode molybdenum sheet and shielding it from the negative impact of the failed comb strip. Using this process method can salvage a large number of chips, significantly improving the yield. Practice has also shown that, without affecting chip performance, using this invention increases the yield by at least 30%.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor device manufacturing technology, and specifically to a novel repair process for the cathode comb of a GCT power semiconductor device. Technical Background

[0002] As is well known, the novel power semiconductor device, the GCT, is a fully controllable device, capable of controlling both its turn-on and turn-off. For example... Figure 1 The diagram shows a schematic of the GCT chip structure, where Z-Z' is a partial cross-sectional view of the chip. The lower surface of the chip is the anode A, and the upper surface is divided into the cathode K and the integrated gate G. The cathode K is composed of thousands of combs 1 connected in parallel, which determines the current carrying capacity of the chip. To improve the speed of turn-on and turn-off current, each comb 1 is surrounded by an integrally connected gate region 2, which plays the role of rapidly injecting and extracting current, that is, improving the turn-on and turn-off capabilities. Most of the aluminum layer on the surface of the gate region 2 is covered by an insulating protective material layer 4, with only a central ring exposed on the aluminum surface, leading out the integrated gate G electrode, which will be connected to the external circuit in the future to load control signals. A ring-shaped PN junction 3 is designed between gate region 2 and comb 1. Applying a forward voltage to this ring-shaped PN junction 3 controls the conduction of the GCT chip, and applying a reverse voltage controls its turn-off. It is evident that the aluminum electrode layers on gate region 2 and comb 1 must be isolated along both sides of the ring-shaped PN junction 3; otherwise, a short circuit in the aluminum layer will prevent the loading of the control signal. Furthermore, the isolation spacing must be as small as possible; otherwise, the chip's turn-on and turn-off performance will degrade. Laterally, isolation is achieved through the spacing of the aluminum layers; vertically, isolation is achieved by the height difference between the aluminum layers of comb 1 and gate region 2, with the gate region 2 and the ring-shaped PN junction 3 filled with an insulating protective material layer 4.

[0003] It is evident that these comb strips 1 are an important component of the GCT (Gate Transformer Terminal) semiconductor device. The quality of the semiconductor chip comb strips 1 directly affects whether the semiconductor device can be considered a qualified product. Because these comb strips 1 are integrated in parallel on the upper surface of the chip, if the characteristics of a particular comb strip 1 are poor or unqualified, the initial characteristics of the chip are determined by the characteristics of that comb strip 1. Therefore, the processing requirements for the semiconductor chip comb strips 1 are extremely stringent during the manufacturing process. However, due to various factors during processing, it is inevitable that a very small number of comb strips out of thousands will not meet the processing requirements. Since these semiconductor chips are very expensive, further repair processes are needed to restore the comb strips 1 to their qualified state in order to prevent them from being discarded. Current technology involves evaporating a 20µm thick aluminum layer on the upper surface. Lateral isolation relies on etching 60µm grooves on the aluminum film, while longitudinal isolation relies on a 12µm height difference between the comb strip 1 and the gate region 2 chip itself for isolation. For defective comb bar 1 in the GCT chip, either it should be discarded directly, or the evaporated 20µm aluminum layer should be removed, leaving the upper surface of comb bar 1 suspended 20µm below other comb bars for isolation. To enhance the isolation effect, an insulating material layer is applied to the comb bar to shield it, preventing it from contacting the upper molybdenum sheet and restoring the chip's acceptable characteristics. However, current technology, due to the aluminum layer on cathode comb bar 1 being only 20µm, is prone to the following problems:

[0004] 1. Due to the unclean aluminum layer of the substandard comb bar, it is very easy to cause burrs and short circuits.

[0005] 2. The longitudinal shielding spacing is only 12um, which is insufficient and may lead to discharge.

[0006] 3. The lateral isolation spacing is only 60um. Due to the excessive thickness of the aluminum layer, the smoothness of the photolithography groove pattern is not good, which can easily cause short circuits between the gate region and the cathode comb. Summary of the Invention

[0007] The purpose of this invention is to address the shortcomings of current GCT chip manufacturing processes for repairing defective comb strips. It proposes a more reasonable, scientific, and complete GCT chip cathode comb strip repair process to address these shortcomings. This process aims to repair defective comb strips in multi-comb structure semiconductor chips, restore the chip's acceptable characteristics, and improve the yield rate during GCT chip manufacturing.

[0008] The technical solution adopted in this invention is a method for repairing cathode combs of GCT chips, characterized by the following steps performed sequentially after the Si chip is doped:

[0009] (1) First, an aluminum layer A is deposited separately on the comb on the Si chip to increase the vertical height between the comb and the gate region;

[0010] (2) At the same time, another aluminum layer B is deposited on the gate region and the comb. The annular PN junction between the gate region aluminum layer and the cathode comb aluminum layer is etched out by photolithography etching technology to form the gate region and cathode comb electrode isolation space, and to form the gate region electrode aluminum layer B and the cathode comb electrode aluminum layer A+ electrode aluminum layer B.

[0011] (3) A photosensitive polyimide insulating protective material layer is covered on the upper surface of the chip. The integrated gate electrode and the cathode comb electrode are etched by photolithography. The cathode comb electrode and the integrated gate electrode are exposed, while the rest is covered by the photosensitive polyimide insulating protective material layer. The photosensitive polyimide insulating protective material layer protects the gate cathode ring PN junction and the gate region aluminum layer B. On the one hand, it protects the surface of the gate cathode ring PN junction from the outside world. On the other hand, it makes the gate region aluminum layer B and the cathode comb aluminum layer A + aluminum layer B isolated in the longitudinal direction, in addition to the height difference for suspension, an additional layer of protective material insulation layer is added to further enhance the longitudinal isolation effect.

[0012] (4) Test the blocking and conduction characteristics of each comb bar, mark the unqualified comb bar, remove aluminum layer A and aluminum layer B from the unqualified comb bar, grind the silicon height of the unqualified comb bar so that the unqualified comb bar is level with the front gate electrode region of aluminum evaporation.

[0013] (5) Apply an insulating protective material - photosensitive polyimide insulating protective material layer to the unqualified comb strips after removing the aluminum layer and grinding off the silicon;

[0014] This completes the GCT chip cathode comb repair process.

[0015] The aluminum layer A on the comb has a resistivity of 223±5Ω / m and a thermal conductivity of 236±6W / mK. The material is 99.999% AL element, and its thickness is 20μm±2μm.

[0016] The resistivity of the aluminum layer B on the gate region and comb is 223±5Ω / m, the thermal conductivity is 236±6W / mK, the material is 99.999% AL, and its thickness is 7μm±2μm.

[0017] With the PN junction as the center line, 30±1um width of aluminum film is removed from each side to form the isolation gap between the gate electrode aluminum layer B and the cathode comb electrode, with an isolation gap of 60±2um.

[0018] The thickness of the photosensitive polyimide insulating protective material layer is 7±2μm.

[0019] The silicon height of the substandard comb bar is 12±2um.

[0020] Apply insulating protective material - photosensitive polyimide insulating protective material layer. The size of the application comb is as follows: the two ends are two semicircles with a diameter of 230um±2um, and the middle is a rectangle with a width of 230um±2um and a length of 1.6mm±1mm. The application height does not exceed 39um±2um. It will not contact the cathode molybdenum sheet during future encapsulation.

[0021] This invention changes the current technology of depositing a 20µm thick aluminum layer only once on the chip surface, proposing a complete, scientific, and reasonable repair process. First, a 20µm thick aluminum layer is deposited separately on the comb strip to increase the longitudinal height between the comb strip and the gate region, thereby increasing the isolation gap between the longitudinal cathode comb strip and the gate region. Second, a 7µm thick aluminum layer is deposited on the upper surface. For defective comb strips, in addition to removing the aluminum layer, a grinding process is added to make the comb strip's height level with the gate region electrode aluminum layer. Finally, an insulating protective material is applied to the defective comb strip to insulate it, preventing it from contacting the cathode molybdenum sheet and shielding it from the negative impacts of the failed comb strip. The advantages of this approach are: 1. It increases the vertical height difference between the comb and the gate region by 20µm, solving the problem of insufficient vertical isolation height; 2. The second aluminum evaporation of 7µm not only forms the gate electrode layer but also improves the processing quality of the gate region and comb pattern (because the thinner the aluminum layer, the shorter the aluminum etching time in the photolithography process, the smoother the etched aluminum lines, and the more regular and complete the pattern), which is beneficial to improving chip performance; 3. The comb grinding process further increases the height difference between the comb and the gate region by 12µm, greatly improving the yield of the repair process. Taking an 8000A / 4500V GCT device as an example to illustrate its beneficial effects, a comb only occupies about 1 / 11000 of the effective conduction area of ​​the cathode, and shielding individual failed combs has a negligible impact on the conduction current distribution. The cathode has 11,000 combs. According to the nominal data, the on-state current of 8,000A distributed to each comb is about 0.72727A. If one comb is removed, the on-state current share of the other combs becomes 0.72734A. The change rate of 0.00007A relative to 0.72727A is only 0.009625%, which is less than 0.01%.

[0022] Using this process method can save a large number of chips, significantly improving yield. Practice has also shown that, without affecting chip performance, using this invention increases yield by at least 30%. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of the GCT chip of the present invention.

[0024] Figure 2 This is a schematic diagram of the GCT chip structure for implementing the present invention. Detailed Implementation

[0025] 1. Immerse the doped semiconductor chip in a 40% pure HF acid solution to remove the oxide layer on the chip surface, and then clean it with RCA standard cleaning solution. Dry it in a clean oven, and then place it in an evaporation stage to evaporate a 20±2µm thick aluminum layer A5 onto the upper surface of the chip. The aluminum layer A5 has a resistivity of 223±5Ω / m, a thermal conductivity of 236±6W / mK, and is made of 99.999% AL element, with a thickness of 20µm±2µm. Then, using photolithography, remove the aluminum layer in the gate region, leaving only the aluminum layer on comb 1. The purpose is to increase the vertical height between comb 1 and the gate region 2.

[0026] 2. The chip is cleaned with RCA standard cleaning solution, dried in a clean oven, and then placed in an evaporation stage. A 7±2µm thick aluminum layer B6 is deposited on the upper surface of the chip. The aluminum layer B6 has a resistivity of 223±5Ω / m, a thermal conductivity of 236±6W / mK, and is made of 99.999% AL element with a thickness of 7μm±2μm. Then, using photolithography etching, the aluminum layer of the gate region 2 and the aluminum layer of the comb 1 on the upper surface are separated along the gate cathode annular PN junction 3. With PN junction 3 as the center line, 30µm±1µm of aluminum film width is removed on both sides to form the isolation spacing between the gate electrode aluminum layer B6 and the cathode comb 1 electrode, with a spacing of 60±2µm. Thus, the thickness of the gate region 2 aluminum layer B6 is 7±2µm, and the thickness of the cathode comb 1 aluminum layer is 27±4µm. A 20±2µm thick aluminum layer C7 is deposited on the lower surface, while the aluminum layer C7 on the lower surface is retained, forming the anode A of the GCT chip.

[0027] 3. Apply a photosensitive polyimide insulating protective material layer 4 uniformly to the upper surface of the chip. The thickness of the photosensitive polyimide insulating protective material layer 4 is 7±2μm. Then, the integrated gate electrode G and the cathode comb electrode 1 are etched out by photolithography, exposing the cathode comb electrode 1 and the integrated gate electrode G. The remaining part is covered by the photosensitive polyimide insulating protective material layer 4, which protects the gate cathode annular PN junction 3 and the gate region aluminum layer B6. On the one hand, it protects the surface of the gate cathode annular PN junction 3 from the outside world. On the other hand, in addition to the height difference that isolates the gate region aluminum layer B6 from the cathode comb 1 aluminum layer in the longitudinal direction, an additional layer of protective insulating material is added to further enhance the longitudinal isolation effect.

[0028] 4. Test the blocking and conduction characteristics of each comb bar 1 using specialized equipment, and mark the unqualified comb bars 8.

[0029] 5. Use specialized equipment to remove aluminum layers A5 and B6 from the substandard comb 8, including removing the aluminum layers and corroding aluminum residue.

[0030] 6. Grind the unqualified comb bar 8 to a height of 12±2um using special equipment, so that the height of the unqualified comb bar 8 is level with the height of the aluminum evaporation front gate electrode area.

[0031] 7. Fill the defective comb bar 8 with insulating protective material - polyimide insulating protective material layer 4. Apply the insulating protective material - photosensitive polyimide insulating protective material layer 4. The dimensions of the comb bar are as follows: two semicircles with a diameter of 230um±2um at both ends, and a rectangle with a width of 230um±2um and a length of 1.6mm±1mm in the middle. The application height shall not exceed 39um±2um. It will not contact the cathode molybdenum sheet during future encapsulation.

[0032] This completes the process for repairing defective comb bars in GCT chips.

Claims

1. A method for repairing cathode comb bars of a GCT chip, characterized in that: Based on the doped Si chip, the following steps are performed sequentially: (1) First, an aluminum layer A (5) is steamed onto the comb (1) to increase the longitudinal height between the comb (1) and the gate pole region (2); (2) At the same time, another aluminum layer B (6) is deposited on the gate region (2) and the comb (1). The annular PN junction (3) between the aluminum layer of the gate region (2) and the aluminum layer of the cathode comb (1) is etched out by photolithography etching technology to form an isolation space between the aluminum layer of the gate region (2) and the aluminum layer of the cathode comb (1), and to form the aluminum layer B (6) of the gate region electrode and the aluminum layer A (5) + aluminum layer B (6) of the cathode comb (1) electrode; (3) Cover the upper surface of the chip with a layer of photosensitive polyimide insulating protective material (4). Through photolithography, etch out the integrated gate (G) electrode and the cathode comb (1) electrode, expose the aluminum layer of the cathode comb (1) and the integrated gate aluminum layer (G), and cover the rest with the photosensitive polyimide insulating protective material layer (4). The photosensitive polyimide insulating protective material layer (4) protects the gate cathode ring PN junction (3) and the gate region aluminum layer B (6). On the one hand, it protects the surface of the gate cathode ring PN junction (3) from the outside world. On the other hand, it makes the gate region aluminum layer B (6) and the cathode comb (1) aluminum layer A (5) + aluminum layer B (6) isolated in the longitudinal direction in addition to the height difference. It also adds an insulating protective material layer to further enhance the longitudinal isolation effect. (4) Test the blocking and conduction characteristics of each comb bar (1) and mark the unqualified comb bar (8). Remove the aluminum layer A (5) and aluminum layer B (6) from the unqualified comb bar (8). Grind the silicon height of the unqualified comb bar (8) so that the height of the unqualified comb bar (8) is level with the height of the front gate electrode region of the aluminum evaporation. (5) Apply a photosensitive polyimide insulating protective material layer (4) to the unqualified comb bar (8) after removing the aluminum layer and grinding off the silicon; This completes the GCT chip cathode comb repair process.

2. The GCT chip cathode comb repair process method as described in claim 1, characterized in that: The aluminum layer A (5) on the comb (1) has a resistivity of 223±5Ω / m, a thermal conductivity of 236±6W / mK, and is made of 99.999% AL element with a thickness of 20μm±2μm.

3. The GCT chip cathode comb repair process method as described in claim 1, characterized in that: The aluminum layer B (6) on the gate region (2) and comb (1) has a resistivity of 223±5Ω / m, a thermal conductivity of 236±6W / mK, and is made of 99.999% AL element with a thickness of 7μm±2μm.

4. The GCT chip cathode comb repair process as described in claim 1, characterized in that: With the PN junction (3) as the center line, 30um±1um width of aluminum film is removed from both sides to form the isolation distance between the gate electrode aluminum layer B (6) and the cathode comb (1) electrode, and the isolation distance is 60±2um.

5. The GCT chip cathode comb repair process as described in claim 1, characterized in that: The thickness of the photosensitive polyimide insulating protective material layer (4) is 7±2μm.

6. The GCT chip cathode comb repair process as described in claim 1, characterized in that: The silicon height of the unqualified comb bar (8) is 12±2um.

7. The GCT chip cathode comb repair process method as described in claim 1, characterized in that: Apply a photosensitive polyimide insulating protective material layer (4). The size of the application comb is as follows: the two ends are two semicircles with a diameter of 230um±2um, and the middle is a rectangle with a width of 230um±2um and a length of 1.6mm±1mm. The application height does not exceed 39um±2um. It will not contact the cathode molybdenum sheet during future encapsulation.

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