A lithology density spectrogram analysis and measurement circuit

Abstract

The present invention discloses a lithology density spectrogram analysis and measurement circuit, which includes a baseline recovery circuit for receiving narrow pulse signals output by a lithology density dual detector, a slow core amplification circuit and a fast core amplification circuit electrically connected to the baseline recovery circuit, an A / D conversion circuit electrically connected to the slow core amplification circuit and the fast core amplification circuit, an FPGA electrically connected to the A / D conversion circuit, a communication interface and a high-voltage control circuit electrically connected to the FPGA; the communication interface communicates with a computer, and the high-voltage control circuit is electrically connected to the high-voltage module of the lithology density dual detector. The circuit disclosed by the present invention remembers the baseline level during the signal gap through the baseline recovery circuit and subtracts this level during the signal duration, reducing the baseline offset of the output signal, and the baseline zero potential is not greater than 10 mV; an integrating capacitor is introduced to eliminate the peak oscillation phenomenon of the output waveform, improving the accuracy of lithology density peak sampling.

Description

Technical Field

[0001] The present invention belongs to the field of electrical logging instruments in petroleum logging, and particularly relates to a lithology density spectrogram analysis and measurement circuit in this field, which is used for a micro-column rock density combination logging tool. Background Art

[0002] Lithology density logging uses an isotope gamma source 137 137 Cs to irradiate gamma rays to the formation, and measures the intensity of gamma rays after being scattered and absorbed by the formation through a detector at a certain distance from the source. The gamma ray energy of the cesium source used is 0.661 MeV. The gamma rays at this energy level interact with matter mainly to produce the Compton-Wu Youxun effect, and its scattering cross-section is closely related to the formation bulk density and the photoelectric index. Therefore, it can be used to qualitatively measure rocks. In the petroleum field, density logging tools usually install two detectors with long source distance and short source distance at different source distances, detect the gamma rays scattered and absorbed by the formation, and convert them into narrow voltage pulses for measurement. The pulse amplitude corresponds to the gamma ray energy, is classified and summarized into different channel addresses, and the acquisition count is recorded in the corresponding channel addresses. The difficulty lies in how to process and collect the narrow nuclear pulse signals. The general method of the instrument is to process first and then collect. That is, first, perform processing such as analog filter shaping (including peak broadening and holding), pole-zero cancellation, and baseline restoration, and then complete the pulse acquisition by a low-speed ADC. However, this method not only increases the circuit complexity but also increases the dead time brought by the circuit. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a new lithology density spectrogram analysis and measurement circuit.

[0004] The present invention adopts the following technical solutions:

[0005] A lithology density spectrogram analysis and measurement circuit, the improvement lies in: including a baseline restoration circuit for receiving narrow pulse signals output by a lithology density double detector, a slow nuclear amplification circuit and a fast nuclear amplification circuit electrically connected to the baseline restoration circuit, an A / D conversion circuit electrically connected to the slow nuclear amplification circuit and the fast nuclear amplification circuit, an FPGA electrically connected to the A / D conversion circuit, a communication interface and a high-voltage control circuit electrically connected to the FPGA; the communication interface communicates with a computer, and the high-voltage control circuit is electrically connected to the high-voltage module of the lithology density double detector.

[0006] Further, an integrating capacitor is added to the baseline restoration circuit.

[0007] Further, the slow nuclear amplification circuit includes a pulse width broadening circuit, a peak holding circuit, and a signal output circuit.

[0008] Further, the slow core amplification circuit further includes an operational amplifier, a comparator, a emitter follower, a J-K flip-flop, two NAND gates, a pulse control circuit, a timing circuit, a capacitor, an analog switch, and a peak detector.

[0009] Further, the fast core amplification circuit includes a threshold selection circuit and an ST logic generation circuit.

[0010] Further, the fast core amplification circuit further includes a differentiating circuit, a comparator, a J-K flip-flop, and a monostable flip-flop.

[0011] Further, the FPGA communicates with the A / D conversion circuit in SPI serial protocol.

[0012] Further, the high-voltage control circuit includes a D / A conversion circuit electrically connected to the FPGA. The input end of the dual-channel operational amplifier is electrically connected to the D / A conversion circuit, and the output end is electrically connected to the high-voltage module of the lithology density dual detector.

[0013] The beneficial effects of the present invention are as follows:

[0014] For the circuit disclosed by the present invention, the baseline recovery circuit remembers the baseline level during the signal gap period and subtracts this level during the signal duration period, reducing the baseline offset of the output signal. The baseline zero potential is not greater than 10 mV. The integration capacitor is introduced to eliminate the peak oscillation phenomenon of the output waveform, improving the peak sampling accuracy of the lithology density. The slow core amplification circuit and the fast core amplification circuit directly perform pulse width broadening, peak holding, threshold selection, and ST logic generation on the original narrow voltage pulse signal, reducing the complexity and dead time of the analog filter shaping circuit, being able to accurately measure the narrow pulse width electrical pulse signal of the density detector, and being able to work reliably for a long time at 175°C. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram of the circuit disclosed by the present invention;

[0016] Figure 2 is a circuit diagram of the slow core amplification circuit and the fast core amplification circuit in the circuit disclosed by the present invention;

[0017] Figure 3 is a circuit diagram of the high-voltage control circuit in the circuit disclosed by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] In order to make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0019] Embodiment 1 discloses a lithology density spectrogram analysis and measurement circuit for measuring long and short narrow voltage pulse signals from a density slide plate, as follows Figure 1 As shown, it includes a baseline restoration circuit 1 for receiving narrow pulse signals output by a lithology density dual detector, a slow core amplification circuit 2 and a fast core amplification circuit 3 electrically connected to the baseline restoration circuit, an A / D conversion circuit 4 electrically connected to the slow core amplification circuit and the fast core amplification circuit, an FPGA 5 electrically connected to the A / D conversion circuit, a communication interface 6 and a high-voltage control circuit 7 electrically connected to the FPGA; the communication interface communicates with a computer 8, and the high-voltage control circuit is electrically connected to the high-voltage module of the lithology density dual detector.

[0020] The lithology density instrument requires that the DC bias of the electrical pulse signal before entering the A / D acquisition module must be controlled within ±10 mV and does not increase with the increase in temperature. For this reason, the baseline restoration circuit is introduced in the circuit of this embodiment. By adjusting the resistance value between pin 1 and pin 3 of the module, the baseline offset of the output waveform of the pulse signal after passing through the slow core amplification circuit is reduced. At the same time, the peak oscillation is eliminated by adding an integrating capacitor, improving the peak sampling accuracy of the lithology density.

[0021] The slow core amplification circuit is mainly composed of an operational amplifier, a comparator, a emitter follower, a J-K flip-flop, two NAND gates and an analog switch. The core is to control the charging and discharging of the capacitor by the analog switch, expand the pulse width of the narrow voltage pulse signal, and perform peak holding and detection. When the measured pulse arrives, the corresponding pulse control circuit and timing circuit generate control signals to turn on the analog switch. The measured pulse charges the capacitor, holds the peak after reaching the peak, and disconnects the analog switch after the A / D conversion ends to discharge the capacitor and zero the peak detector.

[0022] As Figure 2 shown, in addition to sharing some circuits with the slow core amplification circuit, the fast core amplification circuit also adds a retriggerable monostable flip-flop. The core is to use the function of the differentiating circuit to identify the electrical pulse threshold and generate an ST logic control signal. When the peak of the measured pulse has passed, due to the existence of the differentiating circuit, a falling edge is generated at the output of the comparator, triggering the J-K flip-flop to generate a falling edge, triggering the monostable flip-flop to generate a 500 ns negative pulse, that is, the START signal, to start the high-speed AD spectrum acquisition circuit. If the input measured pulse is less than the voltage threshold set by the comparator, no logic control signal is generated by the comparator and the AD conversion will not be triggered.

[0023] The high-speed A / D conversion circuit mainly completes the conversion of the lithology density long and short channel pulse signals broadened by the fast and slow core amplification circuits into digital signals and transmits them to the FPGA for analysis and processing. The width of the electrical pulse signal is generally in the order of microseconds, and the ADC clock can reach the order of nanoseconds, and a pulse signal can be oversampled.

[0024] The FPGA (control processing module) communicates with the A / D conversion circuit at high speed through the SPI serial protocol, completes the acquisition, amplitude analysis and counting of the litho-density long and short channel spectrograms, classifies them into the corresponding channel addresses and uploads them to the surface system. By means of the downhole spectrum stabilization algorithm or receiving the surface high-voltage control instruction, it drives the high-voltage control circuit to automatically or according to the instruction adjust the amplification factor of the photomultiplier tube, so that the instrument realizes automatic spectrum stabilization in the well.

[0025] As Figure 3 shown, the high-voltage control circuit is mainly composed of a D / A conversion circuit and a dual-channel operational amplifier. The D / A conversion circuit is electrically connected to the FPGA. The input end of the dual-channel operational amplifier is electrically connected to the D / A conversion circuit, and the output end is electrically connected to the high-voltage module of the litho-density dual detector. The function of the high-voltage control circuit is to convert the digital high-voltage control instruction into an analog voltage and drive the amplification (gain about 4 times) to control the high-voltage module in the litho-density dual detector to realize the spectrum stabilization of the instrument.

[0026] The circuit of this embodiment uses FPGA + fast and slow core amplification circuits to analyze and measure the litho-density spectrogram. The fast core pulse is used to generate various control signals, the slow core pulse is used for narrow pulse amplitude measurement, and the FPGA is used for control and acquisition. The litho-density circuit has two measurement channels, long source distance and short source distance, with exactly the same form. Taking the long source distance measurement channel as an example, the circuit of this embodiment mainly completes the generation of various control signals, the broadening of the narrow voltage pulse, the high-voltage control and the spectrum stabilization function. The voltage pulse signal output from the litho-density dual detector is amplified and conditioned by the fast core amplification circuit, and the falling time of the pulse is shortened, and then a fast core pulse signal is generated. After passing through the control signal generator, various control signals are generated. The width of the electrical pulse signal output from the litho-density dual detector is also very narrow (the peak falling time is very fast and the falling edge pulse width is very narrow), and it is very difficult to accurately measure its amplitude. The solution is to use the slow core amplification circuit to expand the electrical pulse signal, make the top of the pulse flat, and ensure that the output amplitude of the signal is proportional to the amplitude of the input narrow electrical pulse signal. The high-voltage control circuit receives the high-voltage control instruction after DAC conversion, outputs a high-voltage control signal and sends it to the high-voltage module of the litho-density dual detector to control the high voltage in real time for real-time spectrum stabilization. The FPGA adjusts the amplification factor of the photomultiplier tube through the spectrum stabilization algorithm or the high-voltage control quantity sent by the surface control system, so that the instrument can also realize automatic spectrum stabilization in the well. The baseline recovery circuit is used to reduce the waveform baseline offset and oscillation phenomena that occur after the electrical pulse signal passes through the zero-pole adjustment circuit and the peak holding circuit.

Claims

1. A lithology density spectrogram analysis and measurement circuit, characterized in that: It includes a baseline recovery circuit for receiving narrow pulse signals output by a lithology density dual detector, a slow core amplification circuit and a fast core amplification circuit electrically connected to the baseline recovery circuit, an A / D conversion circuit electrically connected to the slow core amplification circuit and the fast core amplification circuit, an FPGA electrically connected to the A / D conversion circuit, a communication interface and a high-voltage control circuit electrically connected to the FPGA; the communication interface communicates with a computer, and the high-voltage control circuit is electrically connected to the high-voltage module of the lithology density dual detector; an integrating capacitor is added to the baseline recovery circuit; the slow core amplification circuit includes a pulse width broadening circuit, a peak holding circuit and a signal output circuit; the fast core amplification circuit includes a threshold selection circuit and an ST logic generation circuit.

2. The lithology density spectrogram analysis and measurement circuit according to claim 1, wherein: The slow core amplification circuit further includes an operational amplifier, a comparator, a emitter follower, a J-K flip-flop, two NAND gates, a pulse control circuit, a timing circuit, a capacitor, an analog switch and a peak detector.

3. The lithology density spectrogram analysis and measurement circuit according to claim 1, characterized in that: The fast core amplification circuit further includes a differentiating circuit, a comparator, a J-K flip-flop and a monostable flip-flop.

4. The lithology density spectrogram analysis and measurement circuit according to claim 1, characterized in that: The FPGA communicates with the A / D conversion circuit in SPI serial protocol.

5. The lithology density spectrogram analysis and measurement circuit according to claim 1, wherein: The high-voltage control circuit includes a D / A conversion circuit electrically connected to the FPGA, the input end of a dual-channel operational amplifier is electrically connected to the D / A conversion circuit, and the output end is electrically connected to the high-voltage module of the lithology density dual detector.

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