Semiconductor process chamber and semiconductor process equipment

Abstract

The present application discloses a semiconductor process chamber and a semiconductor process equipment, relating to the technical field of semiconductor process. The semiconductor process chamber includes a chamber body, a coil for generating plasma, a susceptor for carrying a wafer, and a metal structure member. Both the susceptor and the metal structure member are disposed within the chamber body. At least a part of the metal structure member is disposed opposite to the inner wall of the chamber body, and the metal structure member is disposed around or on the side of the position of the susceptor for placing the wafer. The metal structure member is electrically connected to the susceptor to form a metal film on the inner wall of the chamber body after being bombarded by ions in the plasma. This solution can solve the problem of low productivity of the current semiconductor process chamber.

Description

Technical Field

[0001] This application belongs to the technical field of semiconductor processes, and particularly relates to a semiconductor process chamber and semiconductor process equipment. Background Art

[0002] In the semiconductor field, a large number of by-product particles are generated during the wafer processing process. Especially during the etching process, with the continuous etching of the wafer, it can cause sputtered materials to deposit on the top, side, and around the chamber body. Especially when etching wafers made of carbon polymers such as PI (Polyimide) or PBO (poly-benzoxazole), which are widely used in the advanced packaging field and other related production lines, it is more obvious.

[0003] However, when the deposited carbonaceous material reaches a certain thickness, it will make the particles loose and move in the chamber body, thus falling on the wafer and contaminating the wafer, resulting in the wafer having excessive defects or the need for frequent maintenance of the top and side of the chamber body. In practical applications, in order to suppress the generation and shedding of particles during the process, the current method is to regularly use unqualified wafers or metal trays for the etching process to sputter a thin metal film on the top, side, and around the chamber body, so as to achieve the purpose of suppressing the generation and shedding of particles. However, under the current process, this metal etching process needs to be carried out frequently, which will lead to low productivity of the process chamber. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide a semiconductor process chamber and semiconductor process equipment, which can solve the problem of low productivity of the current semiconductor process chamber.

[0005] To solve the above technical problems, this application is implemented as follows:

[0006] In a first aspect, the embodiments of this application provide a semiconductor process chamber, including a chamber body, a coil for generating plasma, a susceptor for carrying a wafer, and a metal structure. The susceptor and the metal structure are both arranged inside the chamber body. At least part of the metal structure is arranged opposite to the inner wall of the chamber body, and the metal structure is arranged around or on the side of the position where the susceptor is used to place the wafer. The metal structure is electrically connected to the susceptor to form a metal film on the inner wall of the chamber body after being bombarded by ions in the plasma.

[0007] In a second aspect, the embodiments of this application also provide a semiconductor process equipment, including the above semiconductor process chamber.

[0008] In an embodiment of the present application, at least a part of the metal structural member is disposed opposite to the inner wall of the chamber body, and the metal structural member is disposed around or on the side of the position of the base for placing the wafer. Ions in the plasma generated by the coil bombard the metal structural member, so that the metal sputtered out by the bombardment is deposited on the inner wall of the chamber body, thereby enhancing the adhesion ability of by-product particles on the inner wall of the chamber body, extending the interval period of the metal etching process, and further enhancing the production capacity of the semiconductor process chamber. Description of the Drawings

[0009] Figure 1 It is a partial structural schematic diagram of the semiconductor process equipment disclosed in the embodiment of the present application;

[0010] Figure 2 It is a partial structural schematic diagram of the semiconductor process chamber disclosed in the embodiment of the present application;

[0011] Figure 3 It is a structural schematic diagram of the metal structural member disclosed in the embodiment of the present application.

[0012] Description of the Reference Numerals:

[0013] 110 - Chamber body, 111 - Top, 112 - Side, 113 - Inlet, 120 - Base, 121 - Wafer carrying surface, 130 - Metal structural member, 131 - Wafer limiting part, 132 - First sputtering part, 132a - Inclined surface, 133 - Second sputtering part, 133a - Top surface, 134 - Wafer supporting part, 140 - Conductive deformation part, 150 - Grounding ring, 160 - Insulating ring, 170 - Coil;

[0014] 200 - Upper electrode RF power supply;

[0015] 300 - Lower electrode RF power supply;

[0016] 500 - Insulating lining;

[0017] 600 - Faraday shield;

[0018] 700 - Metal disk. Detailed Embodiments

[0019] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0020] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of this application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type and do not limit the number of objects. For example, the first object can be one or multiple. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / ", generally represents an "or" relationship between the associated objects before and after.

[0021] The semiconductor process chamber and semiconductor process equipment provided by the embodiments of this application will be described in detail below with reference to the accompanying drawings through specific embodiments and their application scenarios.

[0022] As Figures 1 to 3 shown, an embodiment of this application discloses a semiconductor process chamber, including a chamber body 110, a coil 170 for generating plasma, a susceptor 120 for carrying a wafer, and a metal structure 130. The chamber body 110 is used to provide the conditions required for a specific process for the wafer so that the wafer is in an optimal process condition. The coil 170 is embedded in the chamber body 110. Optionally, the susceptor 120 can be an electrostatic chuck, a wafer tray, etc., and no specific limitation is made here. Both the susceptor 120 and the metal structure 130 are disposed in the chamber body 110. At least a part of the metal structure 130 is disposed opposite to the inner wall of the chamber body 110, and the metal structure 130 is disposed around or on the side of the position of the susceptor 120 for placing the wafer. The metal structure 130 is electrically connected to the susceptor 120 to form a metal film on the inner wall of the chamber body 110 after being bombarded by ions in the plasma. In other words, when the metal structure 130 is in an electrically conductive state, the ions in the plasma generated by the coil 170 bombard the metal structure 130 so that the sputtered metal is deposited on the inner wall of the chamber body 110 to form a metal film on the inner wall of the chamber body 110. It should be noted that in this embodiment, the metal structure 130 and the susceptor 120 can be respectively electrically connected to the power supply of the semiconductor process chamber. When the semiconductor process chamber is in a process state, the metal structure 130 and the susceptor 120 can work independently; and the electrical connection between the metal structure 130 and the susceptor 120 is beneficial to simplify the structural design of the conductive lines in the semiconductor process chamber, and can reduce the number of structural components in the semiconductor process chamber to save space and facilitate control.

[0023] In an embodiment of the present application, at least a part of the metal structure 130 is disposed opposite to the inner wall of the chamber body 110, and the metal structure 130 is disposed around or on the side of the position of the susceptor 120 for placing the wafer. Ions in the plasma generated by the coil 170 bombard the metal structure 130, so that the metal sputtered out by the bombardment is deposited on the inner wall of the chamber body 110, thereby enhancing the adhesion ability of by-product particles on the inner wall of the chamber body 110, extending the interval period of the metal etching process, and further enhancing the production capacity of the semiconductor process chamber.

[0024] Optionally, the semiconductor process chamber may further include a wafer retainer ring. The wafer retainer ring is disposed on the susceptor 120 and is used to limit the position of the wafer in cooperation with the wafer when the semiconductor process chamber is in the process state. At this time, the metal structure 130 and the wafer retainer ring may be disposed in a split manner and work independently. In another alternative embodiment, the metal structure 130 is a ring structure. The metal structure 130 is disposed at the edge of the susceptor 120, and the metal structure 130 has a wafer limiting portion 131. When the semiconductor process chamber is in the process state, the wafer limiting portion 131 is used to limit the position of the wafer in cooperation with the wafer. That is to say, in this solution, when the semiconductor process chamber is in the process state, the metal structure 130 can be used to limit the position of the wafer in cooperation with the wafer and can also attract ions in the plasma, so that the ions in the plasma bombard the metal structure 130, so that the metal sputtered out by the bombardment forms a metal film on the inner wall of the chamber body 110, thereby suppressing the generation and shedding of particles during the process. That is, the metal structure 130 has the effect of serving two purposes. This is not only beneficial to reducing the number of structural components of the semiconductor process chamber for easy control; moreover, the metal structure 130 occupies less space, which is beneficial to saving the internal space of the chamber body 110.

[0025] In a further optional embodiment, the chamber body 110 includes a connected top 111 and side 112. Optionally, the top 111 can be detachably disposed on the side 112, or the top 111 can be movably disposed on the side 112 to facilitate the maintenance of the inner wall of the chamber body 110 and the structural members disposed in the chamber body 110. The metal structural member 130 has a first sputtering portion 132, and the first sputtering portion 132 has a surface opposite to the top 111 and the side 112. When the ions in the plasma bombard the surface of the first sputtering portion 132, a metal film is formed on both the top 111 and the side 112 of the chamber body 110, suppressing the generation and shedding of particles on the top 111 and the side 112, thereby protecting the wafer. It should be noted that the first sputtering portion 132 having a surface opposite to the top 111 and the side 112 specifically refers to the positional relationship between the surface of the first sputtering portion 132 and the top 111 and the side 112 such that the metal sputtered by bombarding the first sputtering portion 132 can reach both the top 111 and the side 112. Of course, the metal sputtered by bombarding the first sputtering portion 132 can also form a metal film only on the side 112 or the top 111, but the utilization rate of the metal structural member 130 in this solution is relatively low, and the coverage area of the metal film is relatively small, and the suppression effect is not as good as forming metal films on both the top 111 and the side 112.

[0026] Optionally, the first sputtering portion 132 can be a stepped structure, with a part of the first sputtering portion 132 disposed opposite to the top 111 and another part disposed opposite to the side 112. At this time, the first sputtering portion 132 needs to receive the bombardment of the ions in the plasma from the side 112 and the ions in the plasma from the top 111, so that the metal sputtered by bombarding the first sputtering portion 132 is respectively deposited on the top 111 and the side 112, thereby forming metal films on both the top 111 and the side 112. In another embodiment, the first sputtering portion 132 has an inclined surface 132a inclined with respect to the bottom surface of the chamber body 110, that is, in the cross-section where the central axis of the metal structural member 130 is located, there is an included angle between the central axis of the metal structural member 130 and the inclined surface 132a, and this included angle can be an acute angle. At this time, the first sputtering portion 132 can receive the bombardment of the ions in the plasma from the side 112 and also the bombardment of the ions in the plasma from the top 111, that is, only one microwave source needs to emit plasma, making the structure of the semiconductor process chamber simpler; and, the side surface of the first sputtering portion 132 is set as the inclined surface 132a, which is convenient for the processing and manufacturing of the metal structural member 130. Of course, the first sputtering portion 132 can be an inclined conical surface or an inclined arc surface, and no specific limitation is made here.

[0027] Optionally, within the cross-section where the central axis of the metal structure member 130 lies, the angle between the central axis of the metal structure member 130 and the inclined surface 132a can be greater than 75° and less than 90°. At this time, the inclination of the inclined surface 132a is small, and most of the sputtered metal will be deposited on the top 111 of the chamber body 110, resulting in a thicker metal film on the top 111 and a thinner metal film on the side portion 112. Or, the angle between the first sputtering portion 132 and the bottom of the chamber body 110 can be less than 30°. At this time, the inclination of the inclined surface 132a is large, and most of the sputtered metal will be deposited on the side portion 112 of the chamber body 110, resulting in a thinner metal film on the top 111 and a thicker metal film on the side portion 112. Based on this, in an alternative embodiment, within the cross-section where the central axis of the metal structure member 130 lies, the angle between the central axis of the metal structure member 130 and the inclined surface 132a is 30° to 75°. In this case, the metal sputtered from the first sputtering portion 132 is deposited evenly on the top 111 and the side portion 112 simultaneously, so that the thickness of the metal films on the top 111 and the side portion 112 is appropriate, thereby better suppressing the generation and shedding of particles on the top 111 and the side portion 112.

[0028] In another alternative embodiment, the metal structure member 130 further has a second sputtering portion 133. The second sputtering portion 133 has a top surface 133a opposite to the top 111. The first sputtering portion 132 is disposed around the second sputtering portion 133. Within the cross-section where the central axis of the metal structure member 130 lies, there is an angle between the inclined surface 132a and the top surface 133a, and this angle can be an obtuse angle. The metal sputtered from the second sputtering portion 133 is deposited on the top 111, thereby forming a metal film on the top 111 to further suppress the generation and shedding of particles on the top 111.

[0029] Optionally, the top 111 can include a connected first annular region and a second annular region. The first annular region is located at the edge of the top 111, and the second annular region is located within the first annular region. Part of the metal sputtered from the first sputtering portion 132 is deposited within the first annular region, and the metal sputtered from the second sputtering portion 133 is deposited within the second annular region, thereby increasing the coverage area of the metal film to further optimize the protection ability of the metal film.

[0030] In a further optional embodiment, the metal structural member 130 further has a wafer support portion 134. When the semiconductor process chamber is in a process state, the wafer support portion 134 contacts the edge of the wafer. The wafer support portion 134 is used to support the wafer. Optionally, the base 120 has a wafer carrier portion, and the wafer carrier surface 121 of the wafer carrier portion is flush with the wafer support surface of the wafer support portion 134. The two jointly support the wafer, thereby improving the stability of the wafer. The second sputtering portion 133, the wafer limiting portion 131, and the wafer support portion 134 are connected in sequence to form a stepped structure. The second sputtering portion 133 protrudes relative to the wafer support portion 134. That is to say, the stepped structure of the metal structural member 130 is used to limit the wafer to prevent the wafer from shifting during the process. At the same time, this stepped structure can not only be used to support the wafer, but also receive the ion bombardment in the plasma generated by the coil 170, so that the metal sputtered by the bombardment is deposited on the top 111 of the chamber body 110, thereby forming a metal film.

[0031] The metal structural member 130 is electrically connected to the base 120, that is, the two can be in direct contact and electrically conductive. However, since both the metal structural member 130 and the base 120 are metal structures, the contact between them is a hard contact, with a small contact area and high requirements for the manufacturing process of the contact surface. Based on this, in an optional embodiment, the semiconductor process chamber further includes a conductive deformation member 140. The base 120 has a wafer carrier surface 121, and a receiving groove is provided at the edge of the wafer carrier surface 121. At least a part of the conductive deformation member 140 is disposed in the receiving groove, and the metal structural member 130 presses on the conductive deformation member 140 to make the metal structural member 130 electrically conductive with the base 120. The conductive deformation member 140 deforms under the pressure of the metal structural member 130, thereby increasing the contact area between the metal structural member 130 and the base 120, ensuring good electrical contact between the two, and reducing the manufacturing difficulty of the metal structural member 130 and the base 120.

[0032] Optionally, the receiving groove can be an annular groove, and the conductive deformation member 140 can be an annular structure to further increase the contact area between the metal structural member 130 and the base 120 and improve the electrical conductivity between the two.

[0033] Optionally, the conductive deformation member 140 can be an inductive coil or a conductive spring, which is convenient for the manufacturing of the conductive deformation member 140 on the basis of meeting the deformation requirements.

[0034] In yet another alternative embodiment, the semiconductor process chamber further includes a ground ring 150 and an insulating ring 160. Both the ground ring 150 and the insulating ring 160 are disposed within the chamber body 110. The ground ring 150 is connected to the susceptor 120 to set the reference voltage of the susceptor 120 to zero, thereby protecting the susceptor 120. The insulating ring 160 is disposed around the susceptor 120 and is located between the ground ring 150 and the metal structural member 130. The insulating ring 160 is used to prevent arcing between the metal structural member 130 and the ground ring 150, avoid the generation of by-product particles, and further extend the interval period of the metal etching process.

[0035] Optionally, the insulating ring 160 can be made of ceramic or quartz glass, and the embodiments of the present application do not make specific limitations thereon.

[0036] Optionally, the thickness of the insulating ring 160 can be 2 mm to 5 mm, so as to improve the insulation performance of the insulating ring 160.

[0037] In an alternative embodiment, the material of the metal structural member 130 is one of aluminum, aluminum-copper alloy, and titanium. Relatively speaking, since aluminum metal has excellent properties such as good electrical conductivity, thermal conductivity, attractiveness, and radiation resistance, and has good optoelectronic properties, it is beneficial for the metal structural member 130 to attract more plasma, thereby improving the utilization rate of the metal structural member 130. Optionally, the metal structural member 130 can also be made of other metal materials, and the embodiments of the present application do not make specific limitations thereon.

[0038] Based on the semiconductor process chamber disclosed in the embodiments of the present application, the embodiments of the present application also disclose a semiconductor process equipment, including the semiconductor process chamber described in any of the above embodiments.

[0039] Optionally, the semiconductor processing equipment further includes an upper electrode RF power supply 200, a lower electrode RF power supply 300, an insulating lining 500, a Faraday shield 600, and a metal disk 700. The upper electrode RF power supply 200 and the lower electrode RF power supply 300 are both disposed outside the chamber body 110. The insulating lining 500, the Faraday shield 600, and the metal disk 700 are all disposed inside the chamber body 110. The chamber body 110 is provided with an air inlet 113. Optionally, the side portion 112 of the chamber body 110 is provided with the air inlet 113 to facilitate the introduction of process gas into the chamber body 110. The upper electrode RF power supply 200 applies RF power to the coil 170 through a matcher, and the electromagnetic RF energy is coupled into the chamber body 110 through the Faraday shield 600, thereby exciting the process gas (such as argon) into plasma. The Faraday shield 600 has at least one slit, and this slit enables the Faraday shield 600 not to continuously generate eddy currents. The RF power of the lower electrode RF power supply 300 is applied to the base 120 through a matcher to generate an RF self-bias voltage, thereby attracting the plasma to bombard, and further removing impurities on the wafer or workpiece. When the number of wafers processed reaches a predetermined value, the metal disk 700 is placed on the base 120 by a manipulator to perform an etching process, thereby sputtering a metal film on the inner wall of the chamber body 110, and further suppressing the generation and shedding of particles.

[0040] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them belong to the protection scope of the present application.

Claims

1. A semiconductor process chamber, characterized in that, It includes a chamber body (110), a coil (170) for generating plasma, a susceptor (120) for carrying a wafer, and a metal structure (130). The susceptor (120) and the metal structure (130) are both disposed within the chamber body (110). At least a part of the metal structure (130) is disposed opposite to the inner wall of the chamber body (110), and the metal structure (130) is disposed around or beside the position of the susceptor (120) for placing the wafer. The metal structure (130) is electrically connected to the susceptor (120) to form a metal film on the inner wall of the chamber body (110) after being bombarded by ions in the plasma.

2. The semiconductor process chamber according to claim 1, wherein The metal structure (130) is a ring structure. The metal structure (130) is disposed at the edge of the susceptor (120), and the metal structure (130) has a wafer limiting portion (131). In the case where the semiconductor process chamber is in a process state, the wafer limiting portion (131) is in limiting cooperation with the wafer.

3. The semiconductor process chamber according to claim 2, wherein, The chamber body (110) includes a connected top (111) and side (112). The metal structure (130) has a first sputtering portion (132), and the first sputtering portion (132) has a surface opposite to the top (111) and the side (112).

4. The semiconductor process chamber according to claim 3, wherein The first sputtering portion (132) has an inclined surface (132a) inclined with respect to the bottom surface of the chamber body (110). In the cross-section where the central axis of the metal structure (130) is located, the included angle between the central axis of the metal structure (130) and the inclined surface (132a) is 30° to 75°.

5. The semiconductor process chamber according to claim 4, wherein The metal structure (130) further has a second sputtering portion (133). The second sputtering portion (133) has a top surface (133a) opposite to the top (111). The first sputtering portion (132) is disposed around the second sputtering portion (133). In the cross-section where the central axis of the metal structure (130) is located, there is an included angle between the inclined surface (132a) and the top surface (133a).

6. The semiconductor process chamber according to claim 5, wherein, The metal structure (130) further has a wafer support portion (134). The second sputtering portion (133), the wafer limiting portion (131), and the wafer support portion (134) are connected in sequence to form a stepped structure, and the second sputtering portion (133) protrudes relative to the wafer support portion (134).

7. The semiconductor process chamber according to claim 2, wherein, The semiconductor process chamber further includes a conductive deformation member (140). The susceptor (120) has a wafer carrying surface (121). A receiving groove is provided at the edge of the wafer carrying surface (121). At least a part of the conductive deformation member (140) is disposed within the receiving groove. The metal structure (130) presses on the conductive deformation member (140) to electrically connect the metal structure (130) to the susceptor (120).

8. The semiconductor process chamber according to claim 1, wherein, The semiconductor process chamber further includes a grounding ring (150) and an insulating ring (160). Both the grounding ring (150) and the insulating ring (160) are disposed within the chamber body (110). The grounding ring (150) is connected to the base (120). The insulating ring (160) is disposed around the base (120), and the insulating ring (160) is disposed between the grounding ring (150) and the metal structure member (130).

9. The semiconductor process chamber according to claim 1, wherein, The material of the metal structure member (130) is one of aluminum, aluminum-copper alloy, and titanium.

10. A semiconductor process equipment, characterized in that, A semiconductor process chamber according to any one of claims 1-9 is included.

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