Motor inverter

Abstract

The present disclosure provides a motor inverter coupled with an input power supply and a motor, and receives or turns off the input power supply by controlling a mechanical switch. The motor inverter includes a primary and a secondary auxiliary circuit, a microprocessor, a gate driver and a motor drive system. The primary auxiliary circuit is coupled with the input power supply to output a first output voltage, and the secondary auxiliary circuit is coupled with the input power supply to output a second output voltage, wherein the first output voltage is greater than the second output voltage. The microprocessor operates a drive switch of the motor drive circuit through the gate driver to switch the input power supply to drive the motor. When the microprocessor determines that the first output voltage is abnormal and the motor speed exceeds a safe speed limit, the microprocessor controls the drive switch to form an active short circuit through the gate driver to stop the motor, and cuts off the mechanical switch to protect the input power supply.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a motor inverter, in particular to a motor inverter applied to a permanent magnet motor for vehicle. BACKGROUND

[0002] When a permanent magnet motor is used in vehicle applications, the back electromotive force of the permanent magnet motor will be higher than the battery voltage when the permanent magnet motor is running at high speed. The energy generated by the back electromotive force will be backfilled to the battery through the body diode of the MOSFET, which may cause damage to the battery. In addition, the energy generated by the back electromotive force may cause negative torque output to the vehicle, which may cause the motor to brake. At the same time, if the relay of the battery is disconnected in order to protect the battery, the energy generated by the back electromotive force will damage the motor driver because there is no place to release the energy.

[0003] In order to avoid the back electromotive force from being backfilled, in the conventional motor control method, the controller performs active short circuit (ASC) on the motor driver to form a discharge circuit in the motor driver to release the energy generated by the back electromotive force. The active short circuit must be actively performed by the controller or control chip and cannot be completed simply by power-off. However, in vehicle applications, when the controller performs active short circuit on the motor driver, it often causes sudden or unexpected braking of the vehicle body, which may cause danger to the passengers.

[0004] Therefore, in order to avoid the unexpected braking phenomenon caused by the conventional active short circuit, the present disclosure proposes to use an auxiliary circuit to switch the motor driver to form an active short circuit to improve the above-mentioned problems. SUMMARY

[0005] The purpose of the present disclosure is to provide a motor inverter which can perform active short circuit by switching to an auxiliary circuit, and a mechanical switch is cut off after forming an active short circuit to stop the input power supply to the motor, thereby stopping the motor and avoiding energy backfilling to damage the battery.

[0006] To achieve the above objectives, this disclosure provides a motor frequency converter coupled to an input power supply and a motor. The input power supply has a mechanical switch, and the motor frequency converter receives or shuts off the input power supply by controlling the mechanical switch. The motor frequency converter includes a main auxiliary circuit, a secondary auxiliary circuit, a first diode, a second diode, a power control system, a motor drive system, and an encoder. The main auxiliary circuit is coupled to the input power supply to output a first output voltage. The secondary auxiliary circuit is coupled to the input power supply to output a second output voltage, wherein the first output voltage is greater than the second output voltage. The anode of the first diode is connected to the first output voltage, the anode of the second diode is connected to the second output voltage, and the cathodes of the first and second diodes are connected together to form a common contact. The power control system includes a microprocessor and a gate driver, wherein the microprocessor is coupled to the anode of the first diode to receive the first output voltage and determine whether the first output voltage is abnormal. The motor drive circuit includes multiple drive switches, wherein the microprocessor operates the drive switches through the gate driver, causing the drive switches to switch the input power supply to drive the motor. The encoder is coupled to the motor, wherein the microprocessor determines the motor speed via the encoder. When the microprocessor determines that the first output voltage is abnormal, it then checks whether the motor speed exceeds the safe speed limit. If the microprocessor determines that the motor speed exceeds the safe speed limit, it controls the drive switch via the gate driver to create an active short circuit to stop the motor, and simultaneously cuts off the mechanical switch to protect the input power supply. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of the architecture of a motor inverter, input power supply, and motor according to an embodiment of the present disclosure.

[0008] Figure 2 exemplify Figure 1 The operating process of the motor frequency converter.

[0009] Figure 3 for Figure 1 A schematic diagram of the circuit structure of the motor drive circuit.

[0010] Figure 4 Example of control Figure 3 The circuit structure of the upper and lower arm control circuits of the upper bridge transistor MOSFET U and the lower bridge transistor MOSFET X.

[0011] Figure 5 for Figure 1 A schematic diagram of the power switching circuit.

[0012] Explanation of reference numerals in the attached figures:

[0013] 1: Motor frequency converter

[0014] 2: Input power

[0015] 21: mechanical switch

[0016] 3: motor

[0017] 11: main auxiliary circuit

[0018] 12: sub auxiliary circuit

[0019] D1: first diode

[0020] D2: second diode

[0021] D3: third diode

[0022] 13: power control system

[0023] 14: motor drive circuit

[0024] 15: encoder

[0025] V1: first output voltage

[0026] V2: second output voltage

[0027] P: common contact

[0028] 131: microprocessor

[0029] 132: gate driver

[0030] 133: power monitor

[0031] VDD: power supply voltage

[0032] FO: power supply voltage abnormality signal

[0033] S1, S2, S3, S4, S5, S11, S12, S13, S21, S31, S41: step

[0034] MosU, MosV, MosW: upper bridge transistor

[0035] MosX, MosY, MosZ: lower bridge transistor

[0036] U, V, W: node

[0037] GU, GV, GW, GX, GY, GZ: gate terminal

[0038] 1321: upper bridge control circuit

[0039] 1322: lower bridge control circuit

[0040] 1323: delay circuit

[0041] 1324: controller

[0042] LIN, HIN, VCC, GND, LVG, OUT, HVG, Vboot: pins

[0043] ASC: active short circuit signal

[0044] SX, SU: control signals

[0045] R1: active resistor

[0046] Q1: active transistor

[0047] C1: active capacitor

[0048] G: gate terminal

[0049] D: drain terminal

[0050] S: source terminal

[0051] DD101: diode

[0052] DR110: current limiting resistor

[0053] DQ110, DQ111: transistors

[0054] DR111, DR112, DR113, DR114: gate resistors

[0055] DR120: current limiting resistor

[0056] DQ120, DQ121: transistors

[0057] DR121, DR122, DR123, DR124: gate resistors

[0058] Q2, Q3: transistors

[0059] 134: power switching circuit

[0060] Q4, Q5: transistors

[0061] DO_MCU: control signal DETAILED DESCRIPTION

[0062] Some exemplary embodiments embodying features and advantages of the present disclosure will be described in detail in the following description. It should be understood that the present disclosure can be varied in a wide range of embodiments, all of which do not depart from the scope of the present disclosure, and the description and drawings are essentially illustrative in nature, not intended to limit the present disclosure.

[0063] Figure 1 The schematic diagram of the motor inverter, input power supply and motor of an embodiment of the present disclosure. As shown in the figure, the motor inverter comprises a power supply switching circuit 134, a power supply input terminal VCC, a power supply output terminal GND, a LIN terminal, a HIN terminal, a Vboot terminal, a LVG terminal, an OUT terminal, a HVG terminal, a control signal terminal SX, a control signal terminal SU, a control signal terminal DO_MCU, a transistor Q1, a resistor R1, a capacitor C1, a diode DD101, a transistor DQ110, a transistor DQ111, a resistor DR111, a resistor DR112, a resistor DR113, a resistor DR114, a transistor DQ120, a transistor DQ121, a resistor DR121, a resistor DR122, a resistor DR123, a resistor DR124, a transistor Q2, a transistor Q3, a transistor Q4 and a transistor Q5. Figure 1As shown, a motor inverter 1 is coupled to an input power supply 2 and a motor 3. The input power supply 2 has a mechanical switch 21 (e.g., a relay), and the motor inverter 1 receives or shuts off the input power supply by controlling the mechanical switch 21. The motor inverter 1 includes a main auxiliary circuit 11, a secondary auxiliary circuit 12, a first diode D1, a second diode D2, a power control system 13, a motor drive circuit 14, and an encoder 15. In some embodiments, the motor inverter 1 includes the encoder 15, or the encoder 15 is disposed outside the motor inverter 1, but the invention is not limited thereto. The main auxiliary circuit 11 is coupled to the input power supply 2 to output a first output voltage V1. The secondary auxiliary circuit 12 is coupled to the input power supply 2 to output a second output voltage V2, wherein the first output voltage V1 is greater than the second output voltage V2. The anode of the first diode D1 is connected to the first output voltage V1, the anode of the second diode D2 is connected to the second output voltage V2, and the cathodes of the first diode D1 and the second diode D2 are connected together to form a common contact point P. The power control system 13 includes a microprocessor 131 and a gate driver 132, wherein the microprocessor 131 is coupled to the anode of a first diode D1 to receive a first output voltage V1, and the gate driver 132 is coupled to a common junction P. The motor drive circuit 14 includes multiple drive switches and is coupled to a mechanical switch 21, a motor 3, and the gate driver 132. The microprocessor 131 operates all drive switches via the gate driver 132, causing all drive switches to switch input power to drive the motor 3. An encoder 15 is coupled to the motor 3 and the microprocessor 131, wherein the microprocessor 131 determines the motor speed of the motor 3 via the encoder 15. In some embodiments, the input power source 2 is a battery used in automobiles, but the invention is not limited thereto.

[0064] Because the first output voltage V1 is greater than the second output voltage V2, under normal circumstances, the first diode D1 is turned on and the second diode D2 is reverse-biased off, with the first output voltage V1 supplying power to the gate driver 132. When the first output voltage V1 fails and falls below the second output voltage V2, the first diode D1 is reverse-biased off and the second diode D2 is turned on, with the second output voltage V2 supplying power to the gate driver 132. In some embodiments, the motor inverter 1 also includes a third diode D3. When an overvoltage abnormality occurs in the first output voltage V1, the voltage supplied to the gate driver 132 is clamped by the third diode D3, thereby forcing the fuse connected between the main auxiliary circuit 11 and the first diode D1 to blow.

[0065] Figure 2 exemplify Figure 1 The operating process of the motor frequency converter. The following will combine... Figure 1 and Figure 2 Explain the operating procedure of motor inverter 1. For example... Figure 1 and Figure 2As shown, first, in step S1, the microprocessor 131 judges whether the first output voltage V1 is abnormal. When the microprocessor 131 judges that the first output voltage V1 is abnormal, the microprocessor 131 judges whether the motor rotation speed exceeds a safety limit (step S11). When the microprocessor 131 judges that the motor rotation speed exceeds the safety limit, the microprocessor 131 stops the torque output of the motor 3 by controlling all the drive switches to form an active short circuit (ASC) through the gate driver 132 (step S12), and the microprocessor 131 turns off the mechanical switch 21 (step S5) to disconnect and protect the input power source 2. When the microprocessor 131 judges that the motor rotation speed is lower than the safety limit, the microprocessor 131 stops the torque output of the motor 3 by turning off all the drive switches through the gate driver 132 (step S13), and turns off the mechanical switch 21 (step S5) to disconnect and protect the input power source 2.

[0066] Therefore, the motor inverter 1 of the present disclosure can perform an active short circuit by switching to the auxiliary circuit, and the mechanical switch 21 is turned off after the active short circuit is formed, so that the input power source 2 stops supplying power to the motor 3, thereby stopping the motor 3 and avoiding damage to the battery due to energy backflow.

[0067] Please refer to Figure 1 and Figure 2 for further information. In some embodiments, the microprocessor 131 is coupled to the anode of the second diode D2 to receive the second output voltage V2. In the aforementioned step S1, if the microprocessor 131 judges that the first output voltage V1 is normal, the microprocessor 131 further performs step S2 to judge whether the second output voltage V2 is abnormal. When the microprocessor 131 judges that the second output voltage V2 is abnormal, the microprocessor 131 operates all the drive switches through the gate driver 132, so that the motor 3 runs at a reduced speed (step S21).

[0068] In some embodiments, the power control system 13 further includes a power monitor 133, and the power monitor 133 is coupled to the anode of the first diode D1 and receives the first output voltage V1 to generate a power voltage VDD for the microprocessor 131. The power monitor 133 outputs a power voltage abnormal signal FO when the power voltage VDD is abnormal. In some embodiments, the microprocessor 131 includes a power switching circuit 134, and the microprocessor 131 turns on or turns off the mechanical switch 21 by controlling the power switching circuit 134. Furthermore, the power switching circuit 134 can also receive the power voltage abnormal signal FO to turn off the mechanical switch 21. In other embodiments, the power switching circuit 134 can also be disposed outside the microprocessor 131, and the power switching circuit 134 directly receives the power voltage abnormal signal FO to turn off the mechanical switch 21.

[0069] If the microprocessor 131 determines that the second output voltage V2 is normal in the step S2, the power monitor 133 further performs a step S3 to detect and determine whether the power voltage VDD is abnormal. When the power monitor 133 detects and determines that the power voltage VDD is abnormal (i.e. the power monitor 133 is abnormal), the power monitor 133 stops providing the power voltage VDD to the microprocessor 131, and the power monitor 133 outputs a power voltage abnormal signal FO. The gate driver 132 receives the power voltage abnormal signal FO and operates all the drive switches to form an active short circuit (step S31), and the power switching circuit 134 receives the power voltage abnormal signal FO to turn off the mechanical switch 21 (step S5).

[0070] In some embodiments, if the power monitor 133 determines that the power voltage VDD is normal in the step S3, the microprocessor 131 further performs a step S4. In the step S4, the microprocessor 131 performs a self-diagnosis report, and determines whether the microprocessor 131 is abnormal according to the self-diagnosis report. When the microprocessor 131 determines that the microprocessor 131 is abnormal according to the self-diagnosis report (for example but not limited to, the internal power supply of the microprocessor 131 is abnormal), the microprocessor 131 controls all the drive switches through the gate driver 132 to form an active short circuit (step S41) to stop the torque output of the motor 3, and turns off the mechanical switch 21 (step S5) to disconnect and protect the input power supply 2. When the microprocessor 131 determines that the microprocessor 131 is normal according to the self-diagnosis report, the microprocessor 131 performs the step S1 again. During the operation of the motor inverter 1, the microprocessor 131 continuously performs the steps S1 to S4 to check whether each voltage is abnormal.

[0071] It should be noted that in the above embodiments, the normal voltage (for example, the first output voltage V1, the second output voltage V2, the power voltage VDD and the internal power supply of the microprocessor 131) means that the voltage meets the preset value and does not exceed the allowable error range, otherwise, the abnormal voltage means that it exceeds the allowable error range.

[0072] In addition, in the present disclosure, when the mechanical switch 21 is turned off, the mechanical switch 21 is completely turned off according to a mechanical response time (e.g. 1 ms), so that the input power source 2 stops supplying power to the motor driving circuit 14 after the active short circuit is formed. In other words, because the mechanical switch 21 itself has a certain mechanical response time, when the mechanical switch 21 receives a control signal from the microprocessor 131 or the power switching circuit 134, the mechanical switch 21 actually completes the turning off after the mechanical response time. In this way, it can be ensured that the mechanical switch 21 is turned off after the active short circuit is formed, and thus the input power source 2 is turned off after the active short circuit is formed, so as to avoid the back-feeding of the counter electromotive force of the motor 3 to damage the circuit and the battery. The advantage of this design is that it does not need to additionally set a delay circuit to turn off the input power source after the active short circuit is formed, so as to greatly reduce the design cost and reduce the product size.

[0073] Figure 3 For Figure 1 a circuit structure schematic diagram of the motor driving circuit. In some embodiments, as shown in Figure 3 , the driving switch of the motor driving circuit 14 includes a plurality of upper bridge transistors MosU, MosV and MosW and a plurality of lower bridge transistors MosX, MosY and MosZ. The first end point of each of the upper bridge transistors MosU, MosV and MosW is connected to the high voltage level of the input power source 2. The first end points of the lower bridge transistors MosX, MosY and MosZ are respectively connected to the second end points of the upper bridge transistors MosU, MosV and MosW. The second end points of each of the lower bridge transistors MosX, MosY and MosZ are connected to the low voltage level of the input power source 2. The node U is connected between the second end point of the upper bridge transistor MosU and the first end point of the lower bridge transistor MosX, the node V is connected between the second end point of the upper bridge transistor MosV and the first end point of the lower bridge transistor MosY, the node W is connected between the second end point of the upper bridge transistor MosW and the first end point of the lower bridge transistor MosZ, and the nodes U, V and W are respectively connected to the motor 3. In addition, the gate terminals of the upper bridge transistors MosU, MosV and MosW are GU, GV and GW respectively, and the gate terminals of the lower bridge transistors MosX, MosY and MosZ are GX, GY and GZ respectively.

[0074] In some embodiments, the gate driver 132 includes a plurality of upper and lower arm control circuits. Each upper and lower arm control circuit is connected to the common point P and controls one of the upper bridge transistors and one of the lower bridge transistors. For example, Figure 3Taking the motor drive circuit 14 shown as an example, the gate driver 132 may include three upper and lower arm control circuits, wherein the first upper and lower arm control circuit controls the upper bridge transistor MosU and the lower bridge transistor MosX, the second upper and lower arm control circuit controls the upper bridge transistor MosV and the lower bridge transistor MosY, and the first upper and lower arm control circuit controls the upper bridge transistor MosW and the lower bridge transistor MosZ. Furthermore, in some embodiments, in... Figure 2 In the process shown, when the power monitor 133 stops supplying power voltage VDD to the microprocessor 131 because it determines that the power voltage VDD is abnormal, the power monitor 133 outputs a power voltage abnormality signal FO to each upper and lower arm control circuit, so that each upper bridge transistor MosU, MosV and MosW is turned off, and each lower bridge transistor MosX, MosY and MosZ is turned on.

[0075] Figure 4 Example of control Figure 3 The circuit structure of the upper and lower arm control circuits of the upper-bridge transistor MOSFET U and the lower-bridge transistor MOSFET X is described here. Since the circuit structures of the various upper and lower arm control circuits are similar, this section will focus on... Figure 4 The circuit structure of the upper and lower arm control circuit is illustrated using an example. In some embodiments, such as... Figure 4 As shown, the upper and lower arm control circuit includes an upper bridge control circuit 1321, a lower bridge control circuit 1322, a delay circuit 1323, and a controller 1324. The upper bridge control circuit 1321 controls the corresponding upper bridge transistor MOSFET U, and the lower bridge control circuit 1322 controls the corresponding lower bridge transistor MOSFET X. The delay circuit 1323 is connected to the power supply voltage abnormality signal FO, the common contact P, and the lower bridge control circuit 1322. The controller 1324 is coupled to a microprocessor 131, wherein the microprocessor 131 operates the upper bridge control circuit 1321 and the lower bridge control circuit 1322 via the controller 1324. Figure 4 In this context, SX and SU are control signals originating from the microprocessor 131.

[0076] When the power monitor 133 stops supplying power voltage VDD to the microprocessor 131 due to an abnormal power voltage VDD, the controller 1324 stops operating the upper bridge control circuit 1321 and the lower bridge control circuit 1322. When the delay circuit 1323 receives the power voltage abnormality signal FO, the delay circuit 1323 receives the first output voltage V1 or the second output voltage V2 via the common contact P, and outputs an active short-circuit signal ASC. After the controller 1324 stops operating the upper bridge control circuit 1321 and the lower bridge control circuit 1322, the active short-circuit signal ASC is constantly turned on by the lower bridge transistor MOSFET corresponding to the lower bridge control circuit 1322.

[0077] Because the delay circuit 1323 delays the active short-circuit signal ASC, the upper-bridge transistor MOSFET U will actually turn off first, and then the lower-bridge transistor MOSFET X will turn on. This prevents damage to the upper-bridge transistor MOSFET U due to reverse current flow when the lower-bridge transistor MOSFET X is turned on.

[0078] In some embodiments, such as Figure 4 As shown, the delay circuit 1323 includes an active resistor R1, an active transistor Q1, and an active capacitor C1. The first terminal of the active resistor R1 is coupled to a common junction P. The gate terminal G of the active transistor Q1 is coupled to a power supply voltage abnormality signal FO. The drain terminal D of the active transistor Q1 is connected to the second terminal of the active resistor R1, and the source terminal S of the active transistor Q1 is grounded. One end of the active capacitor C1 is coupled to the drain terminal D of the active transistor Q1 and the lower-bridge control circuit 1322, and the other end of the active capacitor C1 is grounded. When the power supply voltage abnormality signal FO turns off the active transistor Q1, the first output voltage V1 or the second output voltage V2 flows through the active resistor R1 to form an active short-circuit signal ASC. The active short-circuit signal ASC flows into the active capacitor C1 and the lower-bridge control circuit 1322 to turn on the corresponding lower-bridge transistor MosX.

[0079] At Figure 4 In the circuit, when the control signal SU is high, the potential between the HVG pin of the controller 1324 and node U is equal to the voltage at the common junction P minus the voltage drop across diode DD101. Transistor DQ110 is turned on and transistor DQ111 is turned off via current-limiting resistor DR110. After transistor DQ110 is turned on, the gate terminal GU is driven to a high level via gate resistors DR111 and DR112. The potential between the gate terminal GU and node U is equal to the voltage at the common junction P minus the voltage drop across diode DD101 and the on-state voltage drop of the transistor.

[0080] When the control signal SU is low, the potential between the HVG pin of the controller 1324 and node U is 0V. Transistor DQ111 is turned on and transistor DQ110 is turned off via the current-limiting resistor DR110. After transistor DQ111 is turned on, the gate terminal GU is driven low via gate resistors DR113 and DR114. The potential between the gate terminal GU and node U is equal to the on-state voltage drop of transistor DQ111.

[0081] When the control signal SX is high, the potential between the pin LVG of the controller 1324 and the pin GND is equal to the voltage on the common point P. Via the current-limiting resistor DR120, the transistor DQ120 is turned on and the transistor DQ121 is turned off. After the transistor DQ120 is turned on, the gate terminal GX is driven to rise to a high level via the gate resistors DR121 and DR122. The potential between the gate terminal GX and the pin GND is equal to the voltage on the common point P minus the on-voltage drop of the transistor.

[0082] When the control signal SX is low, the potential between the pin LVG of the controller 1324 and the pin GND is equal to 0V. Via the current-limiting resistor DR120, the transistor DQ121 is turned on and the transistor DQ120 is turned off. After the transistor DQ121 is turned on, the gate terminal GX is driven to fall to a low level via the gate resistors DR123 and DR124. The potential between the gate terminal GX and the pin GND is equal to the on-voltage drop of the transistor DQ121.

[0083] In the case of an abnormality in the power supply voltage VDD, the control signals SU and SX fall to 0V, the potential between the pin HVG of the controller 1324 and the node U falls to 0V, the potential between the pin LVG of the controller 1324 and the pin GND falls to 0V, the power supply monitor 133 outputs the power supply abnormality signal FO, and the delay circuit 1323 receives the power supply abnormality signal FO and outputs the active short-circuit signal ASC. The active short-circuit signal ASC drives and turns on the transistor Q2, and thus turns on the transistor Q3. After the transistor Q3 is turned on, the transistors DQ120 and DQ121 are forcibly turned on and off, respectively. After the transistor DQ120 is turned on, the gate terminal GX is driven to rise to a high level via the gate resistors DR121 and DR122, thereby achieving an active short circuit.

[0084] Figure 5 The power supply switching circuit 134 is a circuit for switching the power supply of the motor 130. As shown in FIG. 1, the power supply switching circuit 134 includes a delay circuit 1323, a power supply monitor 133, a controller 1324, and a mechanical switch 21. The power supply monitor 133 receives the power supply voltage VDD and outputs a power supply abnormality signal FO. The delay circuit 1323 receives the power supply abnormality signal FO and outputs a control signal SU. The controller 1324 receives the control signal SU and outputs a control signal SX. The mechanical switch 21 is connected between the motor 130 and the power supply voltage VDD. Figure 1 Figure 5 As shown in FIG. 1, DO_MCU is a control signal from the microprocessor 131, and the power supply switching circuit 134 includes transistors Q4 and Q5. When the control signal DO_MCU is high, the transistor Q4 is turned on, and thus drives the mechanical switch 21 to be turned on. When the transistor Q5 receives the power supply abnormality signal FO, the transistor Q5 is driven to forcibly lower the gate potential of the transistor Q4 to a low level, so that the transistor Q4 is turned off, and thus the mechanical switch 21 is turned off.

[0085] In summary, the present disclosure provides a motor inverter that can perform an active short circuit by switching to an auxiliary circuit, and the mechanical switch is turned off after the active short circuit is formed, so that the input power supply stops supplying power to the motor, thereby stopping the motor and avoiding energy backflow. ​

[0086] It should be noted that the above-mentioned preferred embodiments are merely intended to illustrate the present disclosure, and the present disclosure is not limited to the described embodiments, the scope of the present disclosure being determined by the claims. The present disclosure can be modified in various ways by those skilled in the art without departing from the scope of the claims.

Claims

1. A motor frequency converter coupled to an input power supply and a motor, wherein the input power supply has a mechanical switch, and the motor frequency converter receives or shuts off the input power supply by controlling the mechanical switch, wherein the motor frequency converter comprises: A main auxiliary circuit is coupled to the input power supply to output a first output voltage; A secondary auxiliary circuit is required, coupled to the input power supply, to output a second output voltage, wherein the first output voltage is greater than the second output voltage; A first diode and a second diode, wherein the anode of the first diode is connected to the first output voltage, the anode of the second diode is connected to the second output voltage, and the cathodes of the first and second diodes are connected together to form a common contact. A power control system includes a microprocessor and a gate driver, wherein the microprocessor is coupled to the anode of the first diode to receive the first output voltage and determine whether the first output voltage is abnormal. A motor drive circuit includes multiple drive switches, wherein the microprocessor operates the multiple drive switches through the gate driver, causing the multiple drive switches to switch the input power supply to drive the motor. as well as An encoder is coupled to the motor, wherein the microprocessor determines the motor speed via the encoder; When the microprocessor determines that the first output voltage is abnormal, the microprocessor determines whether the motor speed exceeds a safe speed limit. When the microprocessor determines that the motor speed exceeds the safe speed limit, the microprocessor controls the multiple drive switches through the gate driver to form an active short circuit to stop the motor, and the microprocessor cuts off the mechanical switch to protect the input power supply.

2. The motor frequency converter as claimed in claim 1, wherein when the microprocessor determines that the motor speed is lower than the safe speed limit, the microprocessor stops the motor by turning off the plurality of drive switches through the gate driver, and the microprocessor turns off the mechanical switch to protect the input power supply.

3. The motor inverter of claim 1, wherein the microprocessor is coupled to the anode of the second diode to receive the second output voltage; After the microprocessor determines that the first output voltage is normal, it then determines whether the second output voltage is abnormal.

4. The motor inverter as claimed in claim 3, wherein when the microprocessor determines that the second output voltage is abnormal, the microprocessor operates the plurality of drive switches through the gate driver to cause the motor to decelerate.

5. The motor frequency converter as claimed in claim 3, wherein the power control system further includes a power monitor, and the power monitor is coupled to the anode of the first diode and receives the first output voltage to generate a power supply voltage for the microprocessor. After the microprocessor determines that the second output voltage is normal, the power monitor automatically checks whether the power supply voltage is abnormal.

6. The motor frequency converter as described in claim 5, wherein when the power monitor determines that the power supply voltage is abnormal, the power monitor stops supplying the power supply voltage to the microprocessor, and the power monitor outputs a power supply voltage abnormality signal. The gate driver receives the abnormal power supply voltage signal and operates the plurality of drive switches to form the active short circuit.

7. The motor inverter as claimed in claim 6, wherein the plurality of drive switches includes a plurality of upper-bridge transistors and a plurality of lower-bridge transistors; Each of the upper bridge transistors has a first terminal connected to a high voltage level of the input power supply, and each of the lower bridge transistors has a first terminal connected to a second terminal of each of the upper bridge transistors, and each of the lower bridge transistors has a second terminal coupled to a low voltage level of the input power supply. The gate driver includes multiple upper and lower arm control circuits, and each of the upper and lower arm control circuits is connected to the common contact point and controls one of the multiple upper bridge transistors and one of the multiple lower bridge transistors.

8. The motor inverter of claim 7, wherein when the power monitor stops supplying the power supply voltage to the microprocessor, the power monitor provides a power supply voltage abnormality signal to each of the upper and lower arm control circuits, such that each upper bridge transistor is turned off and each lower bridge transistor is turned on.

9. The motor frequency converter of claim 8, wherein each of the upper and lower arm control circuits comprises: An upper bridge control circuit is used to control the corresponding upper bridge transistor; A lower bridge control circuit is used to control the corresponding lower bridge transistor; A delay circuit is connected to the power supply voltage abnormality signal, the common contact, and the lower bridge control circuit; and A controller is coupled to the microprocessor, wherein the microprocessor operates the upper bridge control circuit and the lower bridge control circuit via the controller; When the power monitor stops supplying the power voltage to the microprocessor, the controller stops operating the upper bridge control circuit and the lower bridge control circuit. When the delay circuit receives the abnormal power supply voltage signal, the delay circuit receives the first output voltage or the second output voltage through the common contact point, and outputs an active short-circuit signal. After the controller stops operating the upper bridge control circuit and the lower bridge control circuit, the active short-circuit signal is constantly turned on by the lower bridge transistor corresponding to the lower bridge control circuit.

10. The motor frequency converter of claim 9, wherein the delay circuit comprises: An active resistor, wherein a first terminal of the active resistor is coupled to the common contact point; An active transistor, wherein a gate terminal of the active transistor is coupled to the abnormal power supply voltage signal, and a drain terminal of the active transistor is connected to a second terminal of the active resistor; and An active capacitor, one end of which is coupled to the drain terminal of the active transistor and the lower bridge control circuit; When the abnormal power supply voltage signal cuts off the active transistor, the first output voltage or the second output voltage flows through the active resistor to form the active short-circuit signal. The active short-circuit signal flows into the active capacitor and the lower bridge control circuit to turn on the corresponding lower bridge transistor.

11. The motor inverter of claim 10, wherein the microprocessor includes a power switching circuit, wherein the power switching circuit receives the abnormal power supply voltage signal to shut down the mechanical switch.

12. The motor inverter as claimed in claim 1 or 11, wherein when the mechanical switch is turned off, the mechanical switch is completely turned off according to a mechanical response time, such that the input power supply stops supplying power to the motor drive circuit after the active short circuit is formed.

13. The motor frequency converter as claimed in claim 5, wherein after the power monitor determines that the power supply voltage is normal, the microprocessor executes a self-diagnostic report and determines whether the microprocessor has malfunctioned based on the self-diagnostic report. When the microprocessor determines that an abnormality has occurred based on the self-diagnostic report, the microprocessor controls the multiple drive switches through the gate driver to form an active short circuit to stop the motor, and the microprocessor cuts off the mechanical switch to protect the input power supply.

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